From 005afedcd935767d557944f878590cf4e64aed64 Mon Sep 17 00:00:00 2001 From: antirez Date: Sat, 18 Jul 2026 18:48:45 +0200 Subject: [PATCH] Add GLM 5.2 inference and quality fixtures --- .gitattributes | 3 + Makefile | 9 +- QA_BEFORE_RELEASES.md | 60 +- README.md | 119 +- download_model.sh | 89 +- ds4.c | 20777 +++++++++++++--- ds4.h | 49 +- ds4_agent.c | 1124 +- ds4_bench.c | 118 +- ds4_cli.c | 473 +- ds4_cuda.cu | 89 + ds4_distributed.c | 34 +- ds4_eval.c | 37 +- ds4_gpu.h | 981 +- ds4_help.c | 21 +- ds4_metal.m | 11348 ++++++++- ds4_rocm.cu | 24 + ds4_server.c | 1057 +- ds4_streaming_hotlist_glm52.inc | 6509 +++++ ds4_tp.c | 522 +- ds4_tp.h | 44 +- gguf-tools/.gitignore | 10 +- gguf-tools/Makefile | 26 +- gguf-tools/quality-testing/README.md | 90 +- .../quality-testing/collect_official.py | 84 +- gguf-tools/quality-testing/compare_scores.py | 76 +- gguf-tools/quality-testing/data/README.md | 21 + .../data/flash/continuations/case_000.txt | 1 + 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tests/test-vectors/glm-openrouter/continuations/short_reasoning_plain.txt create mode 100644 tests/test-vectors/glm-openrouter/manifest.json create mode 100644 tests/test-vectors/glm-openrouter/manifest.tsv create mode 100644 tests/test-vectors/glm-openrouter/official.vec create mode 100644 tests/test-vectors/glm-openrouter/official/long_code_audit.official.json create mode 100644 tests/test-vectors/glm-openrouter/official/long_memory_archive.official.json create mode 100644 tests/test-vectors/glm-openrouter/official/short_code_completion.official.json create mode 100644 tests/test-vectors/glm-openrouter/official/short_italian_fact.official.json create mode 100644 tests/test-vectors/glm-openrouter/official/short_reasoning_plain.official.json create mode 100644 tests/test-vectors/glm-openrouter/prompts/long_code_audit.txt create mode 100644 tests/test-vectors/glm-openrouter/prompts/long_memory_archive.txt create mode 100644 tests/test-vectors/glm-openrouter/prompts/short_code_completion.txt create mode 100644 tests/test-vectors/glm-openrouter/prompts/short_italian_fact.txt create mode 100644 tests/test-vectors/glm-openrouter/prompts/short_reasoning_plain.txt diff --git a/.gitattributes b/.gitattributes new file mode 100644 index 00000000..d130f386 --- /dev/null +++ b/.gitattributes @@ -0,0 +1,3 @@ +# Preserve hosted-model continuation bytes exactly; these fixtures may contain +# model-generated trailing whitespace that is meaningful to tokenizer scoring. +gguf-tools/quality-testing/data/*/continuations/*.txt -diff diff --git a/Makefile b/Makefile index 3d1b666c..0491ed01 100644 --- a/Makefile +++ b/Makefile @@ -10,6 +10,7 @@ endif DEBUG_FLAGS ?= -g CFLAGS ?= -O3 -ffast-math $(DEBUG_FLAGS) $(NATIVE_CPU_FLAG) -Wall -Wextra -std=c99 OBJCFLAGS ?= -O3 -ffast-math $(DEBUG_FLAGS) $(NATIVE_CPU_FLAG) -Wall -Wextra -fobjc-arc +QUALITY_CFLAGS ?= -O3 $(DEBUG_FLAGS) $(NATIVE_CPU_FLAG) -Wall -Wextra -std=c11 LDLIBS ?= -lm -pthread METAL_SRCS := $(wildcard metal/*.metal) @@ -73,6 +74,9 @@ ds4-eval: ds4_eval.o ds4_help.o $(CORE_OBJS) ds4-agent: ds4_agent.o ds4_help.o ds4_web.o ds4_kvstore.o linenoise.o $(CORE_OBJS) $(CC) $(CFLAGS) -o $@ ds4_agent.o ds4_help.o ds4_web.o ds4_kvstore.o linenoise.o $(CORE_OBJS) $(METAL_LDLIBS) +gguf-tools/quality-testing/score_official: gguf-tools/quality-testing/score_official.c ds4.h $(CORE_OBJS) rax.o + $(CC) $(QUALITY_CFLAGS) -I. -o $@ gguf-tools/quality-testing/score_official.c $(CORE_OBJS) rax.o $(METAL_LDLIBS) + cpu: ds4_cli_cpu.o ds4_server_cpu.o ds4_bench_cpu.o ds4_eval_cpu.o ds4_agent_cpu.o ds4_help.o ds4_web.o ds4_kvstore.o linenoise.o rax.o $(CPU_CORE_OBJS) $(CC) $(CFLAGS) -o ds4 ds4_cli_cpu.o ds4_help.o linenoise.o $(CPU_CORE_OBJS) $(LDLIBS) $(CC) $(CFLAGS) -o ds4-server ds4_server_cpu.o ds4_help.o ds4_kvstore.o rax.o $(CPU_CORE_OBJS) $(LDLIBS) @@ -136,6 +140,9 @@ ds4-eval: ds4_eval.o ds4_help.o $(CORE_OBJS) ds4-agent: ds4_agent.o ds4_help.o ds4_web.o ds4_kvstore.o linenoise.o $(CORE_OBJS) $(DS4_LINK) -o $@ $^ $(DS4_LINK_LIBS) +gguf-tools/quality-testing/score_official: gguf-tools/quality-testing/score_official.c ds4.h $(CORE_OBJS) rax.o + $(DS4_LINK) $(filter-out -ffast-math,$(QUALITY_CFLAGS)) -I. -o $@ gguf-tools/quality-testing/score_official.c $(CORE_OBJS) rax.o $(DS4_LINK_LIBS) + cpu: ds4_cli_cpu.o ds4_server_cpu.o ds4_bench_cpu.o ds4_eval_cpu.o ds4_agent_cpu.o ds4_help.o ds4_web.o ds4_kvstore.o linenoise.o rax.o $(CPU_CORE_OBJS) $(CC) $(CFLAGS) -o ds4 ds4_cli_cpu.o ds4_help.o linenoise.o $(CPU_CORE_OBJS) $(LDLIBS) $(CC) $(CFLAGS) -o ds4-server ds4_server_cpu.o ds4_help.o ds4_kvstore.o rax.o $(CPU_CORE_OBJS) $(LDLIBS) @@ -277,4 +284,4 @@ q4k-dot-test: tests/test_q4k_dot.c ./tests/test_q4k_dot clean: - rm -f ds4 ds4-server ds4-bench ds4-eval ds4-agent ds4_cpu ds4_native ds4_server_test ds4_test ds4_agent_test tests/test_q4k_dot *.o tests/cuda_long_context_smoke tests/cuda_long_context_smoke.o + rm -f ds4 ds4-server ds4-bench ds4-eval ds4-agent ds4_cpu ds4_native ds4_server_test ds4_test ds4_agent_test gguf-tools/quality-testing/score_official tests/test_q4k_dot *.o tests/cuda_long_context_smoke tests/cuda_long_context_smoke.o diff --git a/QA_BEFORE_RELEASES.md b/QA_BEFORE_RELEASES.md index f58e0e4e..6cb734b6 100644 --- a/QA_BEFORE_RELEASES.md +++ b/QA_BEFORE_RELEASES.md @@ -54,7 +54,43 @@ in this system. `./ds4_test --server`. - Run `./ds4-eval --self-test-extractors`. -## 3. Metal Flash Path +## 3. Official Continuation Quality Gates + +These tests are release-blocking after tokenizer, template, KV-cache, attention, +MoE routing, quantization, logit, or model-graph changes. They are +teacher-forced continuation checks against hosted-model output and API +top-logprob slices, so do not replace them with one sampled chat answer. + +- Build the scorer: + `make -C gguf-tools quality-score`. +- Run the tracked DeepSeek V4 Flash smoke vectors: + `./ds4_test --logprob-vectors`. + This covers the official Flash API vectors in `tests/test-vectors/`, including + short prompts and long-prompt attention cases. +- Run the 100-case DeepSeek V4 Flash fixture for every released Flash GGUF: + `gguf-tools/quality-testing/score_official /path/to/deepseek-v4-flash.gguf gguf-tools/quality-testing/data/flash/manifest.tsv /tmp/flash.tsv 4096`. +- Run the 100-case GLM 5.2 OpenRouter fixture for every released GLM GGUF: + `gguf-tools/quality-testing/score_official models/GLM-5.2-UD-Q4_K_XL.gguf gguf-tools/quality-testing/data/glm52-openrouter-100/manifest.tsv /tmp/glm52-q4.tsv 4096`. + Current Q4 XL reference band: first-token match `95/100`, API top-1 agreement + about `0.942`, and API pair-order agreement about `0.880`. +- Run the same GLM fixture for reduced-precision GLM release files. The Q2 + routed reference is lower quality but should stay near first-token match + `92/100`, API top-1 agreement about `0.890`, and API pair-order agreement + about `0.800` unless the quantization changed deliberately. +- Run the 100-case DeepSeek V4 PRO fixture for every released PRO GGUF: + `gguf-tools/quality-testing/score_official /path/to/deepseek-v4-pro.gguf gguf-tools/quality-testing/data/pro/manifest.tsv /tmp/pro.tsv 4096`. +- For SSD streaming, run the same official-continuation scorer once with full + residency and once with `--ssd-streaming` for the release model. The summary + and API agreement should stay in the same quality band. +- Compare any candidate against the previous release or last-known-good output: + `python3 gguf-tools/quality-testing/compare_scores.py /tmp/old.tsv /tmp/new.tsv`. + Treat a large first-token-match drop, a clear NLL regression, or a material + API top-1/pair-order regression as a blocker unless the release notes call out + an intentional quality tradeoff. +- Keep the raw `summary` and `api_summary` lines in the release notes or QA log. + Do not use stale manifests from `misc/` as release evidence. + +## 4. Metal Flash Path Use the normal Flash GGUF that 128 GB users run. @@ -99,6 +135,7 @@ tiny routed-MoE verifier kernels, or shared `--mtp` support-model code changes: record the selected-expert footprint or stage timing in the DSpark log. ## 4. Metal PRO Path +## 5. Metal PRO Path PRO support is experimental, but release builds must not break it silently. @@ -109,7 +146,7 @@ PRO support is experimental, but release builds must not break it silently. touching model shape, tensor lookup, routed expert mapping, template logic, and KV payload compatibility. -## 5. SSD Streaming +## 6. SSD Streaming SSD streaming is a capacity path, so test both correctness and user experience. @@ -128,7 +165,7 @@ SSD streaming is a capacity path, so test both correctness and user experience. - If streaming cache internals changed, test the same prompt twice and compare first-token/logprob sanity between runs. -## 6. CUDA / DGX Spark +## 7. CUDA / DGX Spark Before a release, ask the user for CUDA access if it is not already configured. Use the DGX Spark / GB10 host `toor@192.168.0.180`. Do not claim CUDA is @@ -146,7 +183,7 @@ release-ready without this pass. - Verify that any CUDA-only warning fixes are also clean on macOS and do not change Metal behavior. -## 7. ROCm / Strix Halo +## 8. ROCm / Strix Halo Use the Strix Halo Framework Desktop via the VPN hostname `strixhalo` (`antirez@strixhalo`). This host validates the ROCm backend; do not use it as @@ -167,7 +204,7 @@ a substitute for CUDA or Metal release testing. - Record startup memory/cache messages, prefill speed, generation speed, and whether the backend reports `ROCm backend initialized`. -## 8. Distributed Inference +## 9. Distributed Inference Distributed code has regressed around route setup, KV snapshots, request IDs, and split model loading. Test it whenever distributed, KV, session, or model @@ -185,7 +222,7 @@ loading code changes. - If CUDA distributed is relevant, test across the CUDA hosts and record generation speed, not just "it works". -## 9. Disk KV Cache +## 10. Disk KV Cache Disk KV cache bugs are high impact for server users. @@ -199,7 +236,7 @@ Disk KV cache bugs are high impact for server users. - Test stripped agent sessions: `/strip ` then `/switch ` should rebuild by prefill and render sane history. -## 10. Server APIs +## 11. Server APIs The server must keep compatibility across OpenAI, Responses, and Anthropic clients. @@ -212,7 +249,7 @@ clients. - Test `--trace` and confirm rendered prompts, cache decisions, generated text, and tool-parser events are useful without leaking unrelated state. -## 11. ds4-agent +## 12. ds4-agent The agent is the most stateful component. Test it manually, not only by build. @@ -244,7 +281,7 @@ The agent is the most stateful component. Test it manually, not only by build. status bar fill to terminal width, syntax highlighting in Markdown/code blocks, and SSH/remote terminal flicker. -## 12. Download Script And Model Files +## 13. Download Script And Model Files - Test `download_model.sh` in a temporary directory so local weights are not overwritten. @@ -253,7 +290,7 @@ The agent is the most stateful component. Test it manually, not only by build. - Verify legacy removed targets fail clearly. - Verify README model names match the script and Hugging Face repository. -## 13. Performance And Power +## 14. Performance And Power - Run `ds4-bench` on the release machine and compare with tracked CSV baselines. - Test `--power 100` is not throttled. @@ -262,11 +299,12 @@ The agent is the most stateful component. Test it manually, not only by build. - Confirm context buffer size, raw KV rows, compressed KV rows, and mmap behavior match expectations for 32k, 100k, and any release-advertised context size. -## 14. Release Sign-off +## 15. Release Sign-off Do not sign off until: - macOS Metal Flash passed. +- Official continuation quality gates passed for every released model family. - CUDA was tested on the CUDA machine or the release notes explicitly say CUDA was not validated. - ROCm was tested on Strix Halo or the release notes explicitly say ROCm was diff --git a/README.md b/README.md index d80cc328..12400556 100644 --- a/README.md +++ b/README.md @@ -163,6 +163,19 @@ target-only continuation path; set `DS4_DSPARK_STRICT=1` for the same behavior without enabling all quality-mode kernels. Plain sampled and non-speculative session eval also skips DSpark draft preparation; DSpark speculation is currently a greedy argmax-only path. +GLM 5.2 support is currently limited to the GGUF files tested by this branch: + +```sh +./download_model.sh glm-unsloth-q4 # Unsloth UD-Q4_K_XL, 11 shards +./download_model.sh glm-antirez-q2 # antirez routed Q2_K single-file GGUF +./download_model.sh glm-antirez-q4 # antirez routed Q4_K single-file GGUF +``` + +The supported GLM layout keeps dense/model-control tensors in the existing +Q8/F32 paths and supports routed expert gate/up tensors in `Q2_K`, `Q4_K`, or +`Q5_K`; routed expert down tensors are supported in `Q2_K`, `Q4_K`, `Q5_K`, or +`Q6_K`. Other GLM GGUF quant layouts should be treated as unsupported until they +are added deliberately and scored against the official 100-case fixture. Then build: @@ -231,14 +244,19 @@ more memory for context, set the routed expert cache explicitly: ./ds4 -m ./ds4flash.gguf --ssd-streaming --ssd-streaming-cache-experts 32GB ``` -The `32GB` value is a memory budget for complete routed experts, not a generic -byte cache. DwarfStar converts it to the number of full experts that fit for the -current GGUF. Non-routed weights, KV cache, graph scratch, and activations need -additional memory. Only the automatic cache budget does the subtraction for you: -it takes 80% of the Metal recommended working set, subtracts non-routed weights, -then uses the rest for routed experts. Leave the hot expert preload enabled for -normal use; use `--ssd-streaming-cold` and `--ssd-streaming-preload-experts N` -only for measurements. +The `32GB` value is a routed-expert memory budget, not a generic byte cache. +DwarfStar first reserves headroom for the two full routed layers used by +overlapped streaming prefill, then converts the remaining bytes to the number of +dynamic cached experts that fit for the current GGUF. Explicit `NGB` budgets may +also be capped after context/KV accounting so the Metal working set stays out of +the slow pressure zone. A plain number such as +`--ssd-streaming-cache-experts 4000` is different: it means exactly 4000 dynamic +expert slots, with no extra accounting. Non-routed weights, KV cache, graph +scratch, and activations need additional memory. The automatic cache budget takes +80% of the Metal recommended working set, subtracts non-routed weights, then +applies the same routed-prefill headroom before sizing the dynamic cache. Leave +the hot expert preload enabled for normal use; use `--ssd-streaming-cold` and +`--ssd-streaming-preload-experts N` only for measurements. ### Practical SSD streaming examples @@ -270,15 +288,11 @@ and occasional work when you accept slow generation. Start with `--nothink`: On an M5 Max with 128GB of RAM, a short PRO q2 streaming decode benchmark found the automatic budget best: it selected about `59GB` of routed expert cache. -Manual `64GB` to `75GB` caches were close on that machine. Larger explicit -`NGB` requests are capped before inference so the expert buffers remain -lockable instead of falling into macOS paging. If the system is under extra -memory pressure and `mlock` still fails, ds4 refuses to install pageable -expert-cache entries and releases a locked-cache margin before continuing with -the measured lockable cache size. Prefer the automatic budget; if setting the -cache manually on this class of machine, start around `48GB` to `64GB`, then -increase only while the startup log reports a lockable cache. Once the machine -is stable, re-enable thinking with a conservative generation limit: +Manual `64GB` to `75GB` caches were close on that machine. Prefer the automatic +budget; if setting the cache manually on this class of machine, start around +`48GB` to `64GB`, then increase only while the machine remains responsive and +the startup log shows the requested dynamic cache. Once the machine is stable, +re-enable thinking with a conservative generation limit: ```sh ./ds4 \ @@ -509,6 +523,77 @@ encryption or authentication, and is not release-stable yet; coordinator and workers should be built from the same commit and used on trusted machines and trusted networks. +## Tensor Parallelism + +Tensor parallelism runs a single decode across two Macs connected with a +Thunderbolt 5 cable, splitting the heavy per-layer work between the two +GPUs and exchanging 16-24KB partial sums at synchronization gates inside the +graph (RDMA over Thunderbolt when available, a dedicated TCP socket +otherwise). Unlike the pipelined distributed mode above, both +machines work on the *same token at the same time*, so it reduces +per-token latency instead of just fitting a bigger model. + +Each machine keeps one contiguous half of the routed experts resident. Dense, +attention, shared-expert, embedding, and output weights remain replicated. +This lets a model whose routed experts do not fit on one machine run fully +resident across the pair; routed kernels never touch the peer's expert half. + +### Running GLM 5.2 across two 128 GB MacBooks + +One-time setup per boot, on **both** machines: + +``` +# Let the GPU wire ~117 GB (default cap is ~75% of RAM; the resident +# expert shard needs ~97.5 GiB plus KV/scratch). +sudo sysctl iogpu.wired_limit_mb=120000 + +# RDMA over Thunderbolt needs an IPv4 address directly on the cabled +# member interface (the bridge IP does not count). Use the interface +# that is 'active' in ifconfig, e.g. en1 on one side and en6 on the +# other. Skip this if you are fine with the TCP fallback. +sudo ifconfig en1 inet 10.99.0.2/30 alias # machine A +sudo ifconfig en6 inet 10.99.0.1/30 alias # machine B +``` + +Both machines need the same tree, the same commit, and the same GGUF +path. Start the worker first (machine B, dialing the coordinator's +Thunderbolt bridge address), then the coordinator (machine A): + +``` +# Machine B: worker. Computes its expert half in lockstep; never +# tokenizes or samples. +./ds4 -m models/GLM-5.2-UD-IQ2_XXS_RoutedIQ2XXS_blk78Q2K-DenseQ4.gguf \ + --tp-worker 172.31.255.2 9911 + +# Machine A: coordinator. Owns the prompt, sampling, and output. +./ds4 -m models/GLM-5.2-UD-IQ2_XXS_RoutedIQ2XXS_blk78Q2K-DenseQ4.gguf \ + -c 8192 --tp-coordinator 9911 -p "Tell me something about the sea." +``` + +Startup takes about 9 seconds per machine: each rank pre-faults its +~100 GiB shard from SSD and pins it through a Metal residency set. +DeepSeek V4 Flash works the same way with its own GGUF on both machines. +DeepSeek gate vectors are 16 KB and ride as one RDMA message. GLM's +6144-wide 24 KB vectors are split into two ordered RDMA messages. + +Measured on two M5 Max 128 GB MacBooks (GLM 5.2, IQ2_XXS, 188 GiB): + +| | two Macs, tensor parallel | one Mac, SSD streaming | +|---|---|---| +| decode | ~16.8 t/s (15.4 at 4k context) | ~4.8 t/s | +| prefill (4096 tokens) | ~94 t/s | ~3-5 t/s | +| residency | fully memory-resident | streams experts from SSD | + +Notes: the coordinator mirrors every prompt sync and eval to the worker, so +both KV caches stay in lockstep; prompt processing splits both the +routed-expert GEMMs (by expert ownership) and the attention heads (a +contiguous half per machine) with one bulk partial-sum exchange per +layer per stage (`DS4_GLM_TP_TOKEN_PREFILL=1` selects a slower +token-by-token prefill that exactly matches the single-machine arithmetic). +The split graph is deterministic, but its changed floating-point reduction +order is not generally byte-identical to single-machine execution. Design +notes and the full bring-up log live in `misc/METAL_TENSOR_PARALLELISM.md`. + ## Reducing heat, power usage and fan noise Long local inference runs can keep the GPU busy for extended periods. If you diff --git a/download_model.sh b/download_model.sh index fbf354eb..eeeb9556 100755 --- a/download_model.sh +++ b/download_model.sh @@ -3,6 +3,10 @@ set -e REPO="antirez/deepseek-v4-gguf" DSPARK_REPO="deepseek-ai/DeepSeek-V4-Flash-DSpark" +DEEPSEEK_REPO="antirez/deepseek-v4-gguf" +GLM_UNSLOTH_REPO="unsloth/GLM-5.2-GGUF" +GLM_ANTIREZ_REPO="antirez/GLM-5.2-GGUF" +REPO=$DEEPSEEK_REPO Q2_IMATRIX_FILE="DeepSeek-V4-Flash-IQ2XXS-w2Q2K-AProjQ8-SExpQ8-OutQ8-chat-v2-imatrix.gguf" Q4_IMATRIX_FILE="DeepSeek-V4-Flash-Q4KExperts-F16HC-F16Compressor-F16Indexer-Q8Attn-Q8Shared-Q8Out-chat-v2-imatrix.gguf" Q2_Q4_IMATRIX_FILE="DeepSeek-V4-Flash-Layers37-42Q4KExperts-OtherExpertLayersIQ2XXSGateUp-Q2KDown-AProjQ8-SExpQ8-OutQ8-chat-v2-imatrix-fixed.gguf" @@ -11,6 +15,12 @@ PRO_Q4_LAYERS00_30_FILE="DeepSeek-V4-Pro-Q4K-Layers00-30.gguf" PRO_Q4_LAYERS31_OUTPUT_FILE="DeepSeek-V4-Pro-Q4K-Layers-31-output.gguf" MTP_FILE="DeepSeek-V4-Flash-MTP-Q4K-Q8_0-F32.gguf" DSPARK_SUPPORT_FILE="DeepSeek-V4-Flash-DSpark-support.gguf" +GLM_UNSLOTH_Q4_REMOTE_BASE="UD-Q4_K_XL/GLM-5.2-UD-Q4_K_XL" +GLM_UNSLOTH_Q4_LOCAL_BASE="GLM-5.2-UD-Q4_K_XL" +GLM_UNSLOTH_Q4_FIRST_FILE="$GLM_UNSLOTH_Q4_LOCAL_BASE-00001-of-00011.gguf" +GLM_ANTIREZ_IQ2XXS_FILE="GLM-5.2-UD-IQ2_XXS_RoutedIQ2XXS_blk78Q2K.gguf" +GLM_ANTIREZ_Q2_FILE="GLM-5.2-UD-Q2_K_RoutedQ2K.gguf" +GLM_ANTIREZ_Q4_FILE="GLM-5.2-UD-Q4_K_RoutedQ4K.gguf" ROOT=$(CDPATH= cd -- "$(dirname -- "$0")" && pwd) OUT_DIR=${DS4_GGUF_DIR:-"$ROOT/gguf"} @@ -27,7 +37,7 @@ TOKEN=${HF_TOKEN:-} usage() { cat <&2 + echo "Large GGUF downloads require the official Hugging Face CLI." >&2 echo "Install it with:" >&2 echo " python3 -m pip install -U huggingface_hub hf_xet" >&2 exit 1 @@ -257,6 +328,11 @@ download_one_hf() { "$HF_CMD" download "$REPO" "$file" --repo-type model --local-dir "$OUT_DIR" fi + if [ "$hf_out" != "$out" ] && [ -s "$hf_out" ]; then + mv "$hf_out" "$out" + rmdir "$(dirname "$hf_out")" 2>/dev/null || true + fi + if [ ! -s "$out" ]; then echo "Hugging Face download finished but expected file is missing: $out" >&2 exit 1 @@ -376,7 +452,8 @@ build_dspark_support() { download_one() { file=$1 - out="$OUT_DIR/$file" + local_file=$(local_download_name "$file") + out="$OUT_DIR/$local_file" part="$out.part" aria2_part="$out.aria2" url="https://huggingface.co/$REPO/resolve/main/$file" @@ -386,7 +463,7 @@ download_one() { return fi - mkdir -p "$OUT_DIR" + mkdir -p "$(dirname "$out")" if [ -e "$aria2_part" ]; then echo "Found incomplete aria2 download sidecar: $aria2_part" >&2 diff --git a/ds4.c b/ds4.c index f3ab1dfd..3e1d8460 100644 --- a/ds4.c +++ b/ds4.c @@ -32,6 +32,9 @@ #include #include #include +#if defined(__APPLE__) +#include +#endif #include #include #include @@ -100,7 +103,7 @@ static bool ds4_backend_supports_streaming_auto_cache(ds4_backend backend) { } /* ========================================================================= - * DeepSeek V4 Shape Profiles. + * Model Shape Profiles. * ========================================================================= * * The weight binder and metadata validator select one of the known model @@ -109,37 +112,44 @@ static bool ds4_backend_supports_streaming_auto_cache(ds4_backend backend) { */ enum { - DS4_MAX_LAYER = 61, + DS4_MAX_LAYER = 79, DS4_MAX_EMBD = 7168, - DS4_MAX_VOCAB = 129280, + DS4_MAX_VOCAB = 154880, DS4_MAX_HEAD = 128, DS4_MAX_HEAD_KV = 1, - DS4_MAX_HEAD_DIM = 512, + DS4_MAX_HEAD_DIM = 576, DS4_MAX_VALUE_DIM = 512, DS4_MAX_ROT = 64, DS4_MAX_OUT_GROUP = 16, - DS4_MAX_LORA_Q = 1536, + DS4_MAX_LORA_Q = 2048, DS4_MAX_LORA_O = 1024, DS4_MAX_EXPERT = 384, - DS4_MAX_EXPERT_USED = 6, + DS4_MAX_EXPERT_USED = 8, DS4_MAX_EXPERT_SHARED = 1, DS4_MAX_FF_EXP = 3072, DS4_MAX_HASH_LAYER = 3, DS4_MAX_SWA = 128, DS4_MAX_INDEXER_HEAD = 64, DS4_MAX_INDEXER_HEAD_DIM = 128, - DS4_MAX_INDEXER_TOP_K = 1024, + DS4_MAX_INDEXER_TOP_K = 2048, DS4_MAX_HC = 4, DS4_MAX_HC_SINKHORN_ITER = 20, }; +typedef enum { + DS4_MODEL_FAMILY_DEEPSEEK4 = 0, + DS4_MODEL_FAMILY_GLM_DSA = 1, +} ds4_model_family; + typedef enum { DS4_VARIANT_FLASH = 0, DS4_VARIANT_PRO = 1, + DS4_VARIANT_GLM52 = 2, } ds4_variant; typedef struct { const char *name; + ds4_model_family family; ds4_variant variant; uint32_t n_layer; uint32_t n_embd; @@ -156,6 +166,7 @@ typedef struct { uint32_t n_expert_used; uint32_t n_expert_shared; uint32_t n_ff_exp; + uint32_t n_ff_dense; uint32_t n_hash_layer; uint32_t n_swa; uint32_t n_indexer_head; @@ -163,6 +174,11 @@ typedef struct { uint32_t n_indexer_top_k; uint32_t n_hc; uint32_t n_hc_sinkhorn_iter; + uint32_t n_nextn_predict; + uint32_t n_leading_dense; + uint32_t n_kv_lora; + uint32_t n_key_mla; + uint32_t n_value_mla; float rms_eps; float hc_eps; float expert_weight_scale; @@ -177,6 +193,7 @@ typedef struct { static const ds4_shape DS4_SHAPE_FLASH = { .name = "DeepSeek V4 Flash", + .family = DS4_MODEL_FAMILY_DEEPSEEK4, .variant = DS4_VARIANT_FLASH, .n_layer = 43, .n_embd = 4096, @@ -214,6 +231,7 @@ static const ds4_shape DS4_SHAPE_FLASH = { static const ds4_shape DS4_SHAPE_PRO = { .name = "DeepSeek V4 Pro", + .family = DS4_MODEL_FAMILY_DEEPSEEK4, .variant = DS4_VARIANT_PRO, .n_layer = 61, .n_embd = 7168, @@ -249,8 +267,53 @@ static const ds4_shape DS4_SHAPE_PRO = { .rope_orig_ctx = DS4_DEFAULT_ROPE_ORIG_CTX, }; +static const ds4_shape DS4_SHAPE_GLM52 = { + .name = "GLM 5.2", + .family = DS4_MODEL_FAMILY_GLM_DSA, + .variant = DS4_VARIANT_GLM52, + .n_layer = 79, + .n_embd = 6144, + .n_vocab = 154880, + .n_head = 64, + .n_head_kv = 1, + .n_head_dim = 576, + .n_value_dim = 512, + .n_rot = 64, + .n_out_group = 0, + .n_lora_q = 2048, + .n_lora_o = 0, + .n_expert = 256, + .n_expert_used = 8, + .n_expert_shared = 1, + .n_ff_exp = 2048, + .n_ff_dense = 12288, + .n_hash_layer = 0, + .n_swa = 0, + .n_indexer_head = 32, + .n_indexer_head_dim = 128, + .n_indexer_top_k = 2048, + .n_hc = 0, + .n_hc_sinkhorn_iter = 0, + .n_nextn_predict = 1, + .n_leading_dense = 3, + .n_kv_lora = 512, + .n_key_mla = 256, + .n_value_mla = 256, + .rms_eps = 1.0e-5f, + .hc_eps = 0.0f, + .expert_weight_scale = 2.5f, + .swiglu_clamp_exp = 0.0f, + .rope_freq_base = 8000000.0f, + .rope_scale_factor = 1.0f, + .rope_yarn_beta_fast = 0.0f, + .rope_yarn_beta_slow = 0.0f, + .compress_rope_freq_base = 0.0f, + .rope_orig_ctx = 1048576, +}; + static ds4_shape g_ds4_shape = { .name = "DeepSeek V4 Flash", + .family = DS4_MODEL_FAMILY_DEEPSEEK4, .variant = DS4_VARIANT_FLASH, .n_layer = 43, .n_embd = 4096, @@ -289,6 +352,7 @@ static ds4_shape g_ds4_shape = { static uint32_t g_ds4_compress_ratios[DS4_MAX_LAYER] = {0}; #define DS4_MODEL_SHAPE_NAME (g_ds4_shape.name) +#define DS4_MODEL_FAMILY (g_ds4_shape.family) #define DS4_MODEL_VARIANT (g_ds4_shape.variant) #define DS4_N_LAYER (g_ds4_shape.n_layer) #define DS4_N_EMBD (g_ds4_shape.n_embd) @@ -305,6 +369,7 @@ static uint32_t g_ds4_compress_ratios[DS4_MAX_LAYER] = {0}; #define DS4_N_EXPERT_USED (g_ds4_shape.n_expert_used) #define DS4_N_EXPERT_SHARED (g_ds4_shape.n_expert_shared) #define DS4_N_FF_EXP (g_ds4_shape.n_ff_exp) +#define DS4_N_FF_DENSE (g_ds4_shape.n_ff_dense) #define DS4_N_HASH_LAYER (g_ds4_shape.n_hash_layer) #define DS4_N_SWA (g_ds4_shape.n_swa) #define DS4_N_INDEXER_HEAD (g_ds4_shape.n_indexer_head) @@ -312,6 +377,11 @@ static uint32_t g_ds4_compress_ratios[DS4_MAX_LAYER] = {0}; #define DS4_N_INDEXER_TOP_K (g_ds4_shape.n_indexer_top_k) #define DS4_N_HC (g_ds4_shape.n_hc) #define DS4_N_HC_SINKHORN_ITER (g_ds4_shape.n_hc_sinkhorn_iter) +#define DS4_N_NEXTN_PREDICT (g_ds4_shape.n_nextn_predict) +#define DS4_N_LEADING_DENSE (g_ds4_shape.n_leading_dense) +#define DS4_N_KV_LORA (g_ds4_shape.n_kv_lora) +#define DS4_N_KEY_MLA (g_ds4_shape.n_key_mla) +#define DS4_N_VALUE_MLA (g_ds4_shape.n_value_mla) #define DS4_RMS_EPS (g_ds4_shape.rms_eps) #define DS4_HC_EPS (g_ds4_shape.hc_eps) #define DS4_EXPERT_WEIGHT_SCALE (g_ds4_shape.expert_weight_scale) @@ -336,9 +406,10 @@ static int g_ds4_lock_fd = -1; * ========================================================================= * * These layouts and IQ2 tables match the GGUF quantized tensor format, - * reduced to only the formats ds4.c currently reads: + * reduced to only the formats ds4.c currently reads or sizes: * - Q2_K routed down experts * - Q4_K routed experts in the high-memory variant + * - Q5_K/Q6_K GLM routed experts * - IQ2_XXS routed gate/up experts * - Q8_K temporary activation blocks for dot products */ @@ -358,6 +429,21 @@ typedef struct { uint8_t qs[QK_K / 2]; } block_q4_K; +typedef struct { + uint16_t d; + uint16_t dmin; + uint8_t scales[12]; + uint8_t qh[QK_K / 8]; + uint8_t qs[QK_K / 2]; +} block_q5_K; + +typedef struct { + uint8_t ql[QK_K / 2]; + uint8_t qh[QK_K / 4]; + int8_t scales[QK_K / 16]; + uint16_t d; +} block_q6_K; + typedef struct { float d; int8_t qs[QK_K]; @@ -372,6 +458,8 @@ typedef struct { #define DS4_STATIC_ASSERT(name, cond) typedef char name[(cond) ? 1 : -1] DS4_STATIC_ASSERT(ds4_block_q2_k_size, sizeof(block_q2_K) == 84); DS4_STATIC_ASSERT(ds4_block_q4_k_size, sizeof(block_q4_K) == 144); +DS4_STATIC_ASSERT(ds4_block_q5_k_size, sizeof(block_q5_K) == 176); +DS4_STATIC_ASSERT(ds4_block_q6_k_size, sizeof(block_q6_K) == 210); DS4_STATIC_ASSERT(ds4_block_q8_k_size, sizeof(block_q8_K) == 292); DS4_STATIC_ASSERT(ds4_block_iq2_xxs_size, sizeof(block_iq2_xxs) == 66); @@ -624,6 +712,7 @@ static void ds4_die(const char *msg) { /* Attention compression is read from GGUF metadata after validating that it * matches the exact layout expected for the loaded model shape. */ static uint32_t ds4_layer_compress_ratio(uint32_t il) { + if (DS4_MODEL_FAMILY != DS4_MODEL_FAMILY_DEEPSEEK4) return 0; if (il >= DS4_N_LAYER) ds4_die("DeepSeek4 layer index is outside the loaded model layout"); return g_ds4_compress_ratios[il]; } @@ -843,6 +932,7 @@ static int ds4_expert_hotlist_sort_cmp(const void *a, const void *b) { } #include "ds4_streaming_hotlist.inc" +#include "ds4_streaming_hotlist_glm52.inc" static void ds4_json_write_string(FILE *fp, const char *s) { fputc('"', fp); @@ -1166,7 +1256,7 @@ static void ds4_expert_profile_close(void) { } else { fputs("{\n", fp); - fputs(" \"source\": \"ds4 Metal decode expert profile\",\n", fp); + fputs(" \"source\": \"ds4 Metal expert locality profile\",\n", fp); fputs(" \"model\": ", fp); ds4_json_write_string(fp, p->model_name); fputs(",\n", fp); @@ -1605,9 +1695,12 @@ static const gguf_type_info gguf_types[] = { enum { DS4_TENSOR_F32 = 0, DS4_TENSOR_F16 = 1, + DS4_TENSOR_Q4_0 = 2, DS4_TENSOR_Q8_0 = 8, DS4_TENSOR_Q2_K = 10, DS4_TENSOR_Q4_K = 12, + DS4_TENSOR_Q5_K = 13, + DS4_TENSOR_Q6_K = 14, DS4_TENSOR_IQ2_XXS = 16, DS4_TENSOR_I32 = 26, }; @@ -1758,11 +1851,39 @@ static bool model_get_u32(const ds4_model *m, const char *key, uint32_t *out) { return cursor_u32(&c, out); } -static bool model_get_u64(const ds4_model *m, const char *key, uint64_t *out) { +static bool model_get_token_id(const ds4_model *m, const char *key, int *out) { ds4_kv *kv = model_find_kv(m, key); - if (!kv || kv->type != GGUF_VALUE_UINT64) return false; + if (!kv) return false; + ds4_cursor c = cursor_at(m, kv->value_pos); - return cursor_u64(&c, out); + switch (kv->type) { + case GGUF_VALUE_UINT32: { + uint32_t v = 0; + if (!cursor_u32(&c, &v) || v > (uint32_t)INT_MAX) return false; + *out = (int)v; + return true; + } + case GGUF_VALUE_INT32: { + int32_t v = 0; + if (!cursor_read(&c, &v, sizeof(v)) || v < 0) return false; + *out = (int)v; + return true; + } + case GGUF_VALUE_UINT64: { + uint64_t v = 0; + if (!cursor_u64(&c, &v) || v > (uint64_t)INT_MAX) return false; + *out = (int)v; + return true; + } + case GGUF_VALUE_INT64: { + int64_t v = 0; + if (!cursor_read(&c, &v, sizeof(v)) || v < 0 || v > (int64_t)INT_MAX) return false; + *out = (int)v; + return true; + } + default: + return false; + } } static bool model_get_u64_compat(const ds4_model *m, const char *key, uint64_t *out) { @@ -2208,19 +2329,43 @@ static void model_summary(const ds4_model *m) { model_get_string(m, "general.name", &name); model_get_string(m, "general.architecture", &arch); - model_get_u32(m, "deepseek4.block_count", &layers); - model_get_u64(m, "deepseek4.context_length", &ctx_train); - model_get_u32(m, "deepseek4.attention.head_count", &n_head); - model_get_u32(m, "deepseek4.attention.head_count_kv", &n_head_kv); - model_get_u32(m, "deepseek4.attention.key_length", &head_dim); + if (!model_get_u32(m, "deepseek4.block_count", &layers)) { + model_get_u32(m, "glm-dsa.block_count", &layers); + } + if (!model_get_u64_compat(m, "deepseek4.context_length", &ctx_train)) { + model_get_u64_compat(m, "glm-dsa.context_length", &ctx_train); + } + if (!model_get_u32(m, "deepseek4.attention.head_count", &n_head)) { + model_get_u32(m, "glm-dsa.attention.head_count", &n_head); + } + if (!model_get_u32(m, "deepseek4.attention.head_count_kv", &n_head_kv)) { + model_get_u32(m, "glm-dsa.attention.head_count_kv", &n_head_kv); + } + if (!model_get_u32(m, "deepseek4.attention.key_length", &head_dim)) { + model_get_u32(m, "glm-dsa.attention.key_length", &head_dim); + } model_get_u32(m, "deepseek4.attention.sliding_window", &n_swa); - model_get_u32(m, "deepseek4.attention.indexer.head_count", &indexer_heads); - model_get_u32(m, "deepseek4.attention.indexer.key_length", &indexer_head_dim); - model_get_u32(m, "deepseek4.attention.indexer.top_k", &indexer_top_k); - model_get_u32(m, "deepseek4.expert_count", &n_expert); - model_get_u32(m, "deepseek4.expert_used_count", &n_expert_used); - model_get_u32(m, "deepseek4.expert_group_count", &n_expert_groups); - model_get_u32(m, "deepseek4.expert_group_used_count", &n_group_used); + if (!model_get_u32(m, "deepseek4.attention.indexer.head_count", &indexer_heads)) { + model_get_u32(m, "glm-dsa.attention.indexer.head_count", &indexer_heads); + } + if (!model_get_u32(m, "deepseek4.attention.indexer.key_length", &indexer_head_dim)) { + model_get_u32(m, "glm-dsa.attention.indexer.key_length", &indexer_head_dim); + } + if (!model_get_u32(m, "deepseek4.attention.indexer.top_k", &indexer_top_k)) { + model_get_u32(m, "glm-dsa.attention.indexer.top_k", &indexer_top_k); + } + if (!model_get_u32(m, "deepseek4.expert_count", &n_expert)) { + model_get_u32(m, "glm-dsa.expert_count", &n_expert); + } + if (!model_get_u32(m, "deepseek4.expert_used_count", &n_expert_used)) { + model_get_u32(m, "glm-dsa.expert_used_count", &n_expert_used); + } + if (!model_get_u32(m, "deepseek4.expert_group_count", &n_expert_groups)) { + model_get_u32(m, "glm-dsa.expert_group_count", &n_expert_groups); + } + if (!model_get_u32(m, "deepseek4.expert_group_used_count", &n_group_used)) { + model_get_u32(m, "glm-dsa.expert_group_used_count", &n_group_used); + } for (uint64_t i = 0; i < m->n_tensors; i++) { tensor_bytes += m->tensors[i].bytes; @@ -2972,6 +3117,28 @@ static void ds4_vec_dot_q2_K_q8_K(int n, float *s, const block_q2_K *x, const bl #endif } +static inline float q2_k_value_f32(const block_q2_K *blocks, uint32_t k) { + const uint32_t block = k / QK_K; + const uint32_t idx = k - block * QK_K; + const block_q2_K *xb = blocks + block; + const uint32_t group = idx / 16u; + const uint32_t l = idx - group * 16u; + const uint32_t q_base = 32u * (group / 8u) + 16u * (group & 1u); + const uint32_t shift = ((group / 2u) & 3u) * 2u; + const uint32_t q = ((uint32_t)xb->qs[q_base + l] >> shift) & 0x03u; + const uint32_t sc = xb->scales[group]; + return f16_to_f32(xb->d) * (float)(sc & 0x0fu) * (float)q - + f16_to_f32(xb->dmin) * (float)(sc >> 4u); +} + +static float ds4_vec_dot_q2_K_f32(int n, const block_q2_K *x, const float *y) { + float sum = 0.0f; + for (int k = 0; k < n; k++) { + sum += q2_k_value_f32(x, (uint32_t)k) * y[k]; + } + return sum; +} + static inline void q4_k_get_scale_min(int j, const uint8_t *q, uint8_t *sc, uint8_t *m) { if (j < 4) { *sc = q[j] & 63; @@ -3074,6 +3241,228 @@ static void ds4_vec_dot_q4_K_q8_K(int n, float *s, const block_q4_K *x, const bl #endif } +static void ds4_vec_dot_q5_K_q8_K(int n, float *s, const block_q5_K *x, const block_q8_K *y) { + const int nb = n / QK_K; + float sumf = 0.0f; + + for (int i = 0; i < nb; i++) { + const float d = y[i].d * f16_to_f32(x[i].d); + const float dmin = y[i].d * f16_to_f32(x[i].dmin); + const uint8_t *ql = x[i].qs; + const uint8_t *qh = x[i].qh; + const int8_t *q8 = y[i].qs; + const uint8_t *scales = x[i].scales; + + int64_t isum = 0; + int64_t summs = 0; + int is = 0; + uint8_t u1 = 1; + uint8_t u2 = 2; + + for (int j = 0; j < QK_K; j += 64) { + uint8_t sc_val, m_val; + q4_k_get_scale_min(is, scales, &sc_val, &m_val); + summs += (int64_t)m_val * ((int32_t)y[i].bsums[2 * is] + (int32_t)y[i].bsums[2 * is + 1]); + for (int l = 0; l < 32; l++) { + const int q = (int)(ql[l] & 0x0F) + ((qh[l] & u1) ? 16 : 0); + isum += (int64_t)sc_val * q * (int)q8[j + l]; + } + + q4_k_get_scale_min(is + 1, scales, &sc_val, &m_val); + summs += (int64_t)m_val * ((int32_t)y[i].bsums[2 * (is + 1)] + (int32_t)y[i].bsums[2 * (is + 1) + 1]); + for (int l = 0; l < 32; l++) { + const int q = (int)(ql[l] >> 4) + ((qh[l] & u2) ? 16 : 0); + isum += (int64_t)sc_val * q * (int)q8[j + 32 + l]; + } + + ql += 32; + is += 2; + u1 = (uint8_t)(u1 << 2); + u2 = (uint8_t)(u2 << 2); + } + + sumf += d * (float)isum - dmin * (float)summs; + } + + *s = sumf; +} + +static void ds4_vec_dot_q6_K_q8_K(int n, float *s, const block_q6_K *x, const block_q8_K *y) { + const int nb = n / QK_K; + float sumf = 0.0f; + + for (int i = 0; i < nb; i++) { + const float d = y[i].d * f16_to_f32(x[i].d); + const uint8_t *ql = x[i].ql; + const uint8_t *qh = x[i].qh; + const int8_t *scales = x[i].scales; + const int8_t *q8 = y[i].qs; + int64_t isum = 0; + + for (int n128 = 0; n128 < QK_K; n128 += 128) { + for (int l = 0; l < 32; l++) { + const int is = l / 16; + const int q1 = ((int)(ql[l + 0] & 0x0F) | (((qh[l] >> 0) & 3) << 4)) - 32; + const int q2 = ((int)(ql[l + 32] & 0x0F) | (((qh[l] >> 2) & 3) << 4)) - 32; + const int q3 = ((int)(ql[l + 0] >> 4) | (((qh[l] >> 4) & 3) << 4)) - 32; + const int q4 = ((int)(ql[l + 32] >> 4) | (((qh[l] >> 6) & 3) << 4)) - 32; + + isum += (int64_t)scales[is + 0] * q1 * (int)q8[n128 + l + 0]; + isum += (int64_t)scales[is + 2] * q2 * (int)q8[n128 + l + 32]; + isum += (int64_t)scales[is + 4] * q3 * (int)q8[n128 + l + 64]; + isum += (int64_t)scales[is + 6] * q4 * (int)q8[n128 + l + 96]; + } + + ql += 64; + qh += 32; + scales += 8; + } + + sumf += d * (float)isum; + } + + *s = sumf; +} + +static float ds4_vec_dot_q4_K_f32(int n, const block_q4_K *x, const float *y) { + const int nb = n / QK_K; + float sumf = 0.0f; + + for (int i = 0; i < nb; i++) { + const float d = f16_to_f32(x[i].d); + const float dmin = f16_to_f32(x[i].dmin); + const uint8_t *qs = x[i].qs; + const uint8_t *scales = x[i].scales; + const float *yb = y + (uint64_t)i * QK_K; + + for (int j = 0; j < QK_K / 32; j++) { + uint8_t sc_val, m_val; + q4_k_get_scale_min(j, scales, &sc_val, &m_val); + + const int byte_off = (j >> 1) * 32; + const int shift = (j & 1) * 4; + const float scale = d * (float)sc_val; + const float minv = dmin * (float)m_val; + for (int l = 0; l < 32; l++) { + const int q = (qs[byte_off + l] >> shift) & 0x0F; + sumf += (scale * (float)q - minv) * yb[j * 32 + l]; + } + } + } + + return sumf; +} + +static float ds4_vec_dot_q5_K_f32(int n, const block_q5_K *x, const float *y) { + const int nb = n / QK_K; + float sumf = 0.0f; + + for (int i = 0; i < nb; i++) { + const float d = f16_to_f32(x[i].d); + const float dmin = f16_to_f32(x[i].dmin); + const uint8_t *ql = x[i].qs; + const uint8_t *qh = x[i].qh; + const uint8_t *scales = x[i].scales; + const float *yb = y + (uint64_t)i * QK_K; + + for (int group = 0; group < QK_K / 32; group++) { + uint8_t sc_val, m_val; + q4_k_get_scale_min(group, scales, &sc_val, &m_val); + + const int ql_base = (group >> 1) * 32; + const int shift = (group & 1) * 4; + const uint8_t hmask = (uint8_t)(1u << group); + const float scale = d * (float)sc_val; + const float minv = dmin * (float)m_val; + for (int l = 0; l < 32; l++) { + const int q = ((ql[ql_base + l] >> shift) & 0x0F) + + ((qh[l] & hmask) ? 16 : 0); + sumf += (scale * (float)q - minv) * yb[group * 32 + l]; + } + } + } + + return sumf; +} + +static float ds4_vec_dot_q6_K_f32(int n, const block_q6_K *x, const float *y) { + const int nb = n / QK_K; + float sumf = 0.0f; + + for (int i = 0; i < nb; i++) { + const float d = f16_to_f32(x[i].d); + const uint8_t *ql = x[i].ql; + const uint8_t *qh = x[i].qh; + const int8_t *scales = x[i].scales; + const float *yb = y + (uint64_t)i * QK_K; + + for (int n128 = 0; n128 < QK_K; n128 += 128) { + for (int l = 0; l < 32; l++) { + const int is = l / 16; + const int q1 = ((int)(ql[l + 0] & 0x0F) | (((qh[l] >> 0) & 3) << 4)) - 32; + const int q2 = ((int)(ql[l + 32] & 0x0F) | (((qh[l] >> 2) & 3) << 4)) - 32; + const int q3 = ((int)(ql[l + 0] >> 4) | (((qh[l] >> 4) & 3) << 4)) - 32; + const int q4 = ((int)(ql[l + 32] >> 4) | (((qh[l] >> 6) & 3) << 4)) - 32; + + sumf += d * (float)scales[is + 0] * (float)q1 * yb[n128 + l + 0]; + sumf += d * (float)scales[is + 2] * (float)q2 * yb[n128 + l + 32]; + sumf += d * (float)scales[is + 4] * (float)q3 * yb[n128 + l + 64]; + sumf += d * (float)scales[is + 6] * (float)q4 * yb[n128 + l + 96]; + } + + ql += 64; + qh += 32; + scales += 8; + } + } + + return sumf; +} + +static inline float ds4_vec_dot_q5_q6_K_f32(uint32_t type, int n, const uint8_t *x, const float *y) { + if (type == DS4_TENSOR_Q5_K) { + return ds4_vec_dot_q5_K_f32(n, (const block_q5_K *)x, y); + } else if (type == DS4_TENSOR_Q6_K) { + return ds4_vec_dot_q6_K_f32(n, (const block_q6_K *)x, y); + } else { + ds4_die("expected a Q5_K or Q6_K tensor"); + } + return 0.0f; +} + +static float ds4_vec_dot_iq2_xxs_f32(int n, const block_iq2_xxs *x, const float *y) { + pthread_once(&iq2xxs_signed_grid_once, iq2xxs_signed_grid_init); + + const int nb = n / QK_K; + float sumf = 0.0f; + uint32_t aux32[2]; + const uint8_t *aux8 = (const uint8_t *)aux32; + + for (int i = 0; i < nb; i++) { + const float d = f16_to_f32(x[i].d); + const uint16_t *q2 = x[i].qs; + const float *yb = y + (uint64_t)i * QK_K; + + for (int ib32 = 0; ib32 < QK_K / 32; ib32++) { + memcpy(aux32, q2, 2 * sizeof(uint32_t)); + q2 += 4; + + const float scale = 0.125f * d * (float)(2u * (aux32[1] >> 28) + 1u); + const uint32_t base = (uint32_t)ib32 * 32u; + for (int l = 0; l < 4; l++) { + const uint32_t sign_idx = (aux32[1] >> (7 * l)) & 127u; + const int8_t *grid = iq2xxs_signed_grid[aux8[l]][sign_idx]; + const float *yf = yb + base + (uint32_t)l * 8u; + for (int j = 0; j < 8; j++) { + sumf += scale * (float)grid[j] * yf[j]; + } + } + } + } + + return sumf; +} + static DS4_MAYBE_UNUSED void ds4_vec_dot_iq2_xxs_q8_K(int n, float *s, const block_iq2_xxs *x, const block_q8_K *y) { const int nb = n / QK_K; @@ -3253,8 +3642,12 @@ typedef struct { ds4_tensor *attn_q_a_norm; ds4_tensor *attn_q_b; ds4_tensor *attn_kv; + ds4_tensor *attn_kv_a_mqa; ds4_tensor *attn_kv_a_norm; + ds4_tensor *attn_k_b; + ds4_tensor *attn_v_b; ds4_tensor *attn_sinks; + ds4_tensor *attn_output; ds4_tensor *attn_output_a; ds4_tensor *attn_output_b; ds4_tensor *attn_compressor_ape; @@ -3262,6 +3655,9 @@ typedef struct { ds4_tensor *attn_compressor_gate; ds4_tensor *attn_compressor_norm; ds4_tensor *indexer_attn_q_b; + ds4_tensor *indexer_attn_k; + ds4_tensor *indexer_k_norm; + ds4_tensor *indexer_k_norm_b; ds4_tensor *indexer_proj; ds4_tensor *indexer_compressor_ape; ds4_tensor *indexer_compressor_kv; @@ -3272,6 +3668,9 @@ typedef struct { ds4_tensor *hc_ffn_base; ds4_tensor *ffn_norm; ds4_tensor *ffn_gate_tid2eid; + ds4_tensor *ffn_gate; + ds4_tensor *ffn_up; + ds4_tensor *ffn_down; ds4_tensor *ffn_gate_inp; ds4_tensor *ffn_exp_probs_b; ds4_tensor *ffn_gate_exps; @@ -3280,6 +3679,10 @@ typedef struct { ds4_tensor *ffn_gate_shexp; ds4_tensor *ffn_up_shexp; ds4_tensor *ffn_down_shexp; + ds4_tensor *nextn_eh_proj; + ds4_tensor *nextn_enorm; + ds4_tensor *nextn_hnorm; + ds4_tensor *nextn_shared_head_norm; } ds4_layer_weights; typedef struct { @@ -3354,6 +3757,15 @@ static uint32_t required_u32(const ds4_model *m, const char *key) { return v; } +static uint64_t required_u64_compat(const ds4_model *m, const char *key) { + uint64_t v = 0; + if (!model_get_u64_compat(m, key, &v)) { + fprintf(stderr, "ds4: required metadata key is missing: %s\n", key); + exit(1); + } + return v; +} + static float required_f32(const ds4_model *m, const char *key) { float v = 0.0f; if (!model_get_f32_compat(m, key, &v)) { @@ -3446,6 +3858,54 @@ static void tensor_expect_layout( } } +static bool tensor_type_is_glm_dense_quant(uint32_t type) { + return type == DS4_TENSOR_Q8_0 || + type == DS4_TENSOR_Q4_K || + type == DS4_TENSOR_Q4_0; +} + +static bool tensor_type_is_dense_quant(uint32_t type) { + return type == DS4_TENSOR_Q8_0 || + type == DS4_TENSOR_Q4_K || + type == DS4_TENSOR_Q4_0; +} + +static void tensor_expect_glm_dense_quant_layout( + const ds4_tensor *t, + uint32_t ndim, + uint64_t d0, + uint64_t d1, + uint64_t d2) { + if (!t) ds4_die("internal error: missing tensor while validating GLM dense layout"); + if (!tensor_type_is_glm_dense_quant(t->type)) { + fprintf(stderr, + "ds4: tensor %.*s has type %s, expected q8_0, q4_K, or q4_0\n", + (int)t->name.len, + t->name.ptr, + tensor_type_name(t->type)); + exit(1); + } + tensor_expect_layout(t, t->type, ndim, d0, d1, d2); +} + +static void tensor_expect_dense_quant_layout( + const ds4_tensor *t, + uint32_t ndim, + uint64_t d0, + uint64_t d1, + uint64_t d2) { + if (!t) ds4_die("internal error: missing tensor while validating dense quant layout"); + if (!tensor_type_is_dense_quant(t->type)) { + fprintf(stderr, + "ds4: tensor %.*s has type %s, expected q8_0, q4_K, or q4_0\n", + (int)t->name.len, + t->name.ptr, + tensor_type_name(t->type)); + exit(1); + } + tensor_expect_layout(t, t->type, ndim, d0, d1, d2); +} + static void tensor_expect_optional( const ds4_tensor *t, uint32_t type, @@ -3499,7 +3959,9 @@ static void tensor_expect_f16_or_q8_0_layout( static bool tensor_is_routed_expert_type(uint32_t type) { return type == DS4_TENSOR_IQ2_XXS || type == DS4_TENSOR_Q2_K || - type == DS4_TENSOR_Q4_K; + type == DS4_TENSOR_Q4_K || + type == DS4_TENSOR_Q5_K || + type == DS4_TENSOR_Q6_K; } static DS4_MAYBE_UNUSED uint64_t routed_expert_block_bytes(uint32_t type) { @@ -3507,6 +3969,8 @@ static DS4_MAYBE_UNUSED uint64_t routed_expert_block_bytes(uint32_t type) { case DS4_TENSOR_IQ2_XXS: return sizeof(block_iq2_xxs); case DS4_TENSOR_Q2_K: return sizeof(block_q2_K); case DS4_TENSOR_Q4_K: return sizeof(block_q4_K); + case DS4_TENSOR_Q5_K: return sizeof(block_q5_K); + case DS4_TENSOR_Q6_K: return sizeof(block_q6_K); default: ds4_die("unsupported routed expert tensor type"); } return 0; @@ -3605,6 +4069,54 @@ static bool ds4_streaming_routed_expert_bytes( return false; } +enum { DS4_STREAMING_PREFILL_HEADROOM_LAYERS = 2 }; + +static bool ds4_streaming_max_routed_layer_bytes( + const ds4_weights *weights, + uint64_t *layer_bytes_out) { + if (layer_bytes_out) *layer_bytes_out = 0; + if (!weights || !layer_bytes_out || DS4_N_EXPERT == 0) return false; + + uint64_t max_bytes = 0; + for (uint32_t il = 0; il < DS4_N_LAYER; il++) { + uint64_t per_expert_bytes = 0; + if (!streaming_layer_routed_expert_bytes(&weights->layer[il], + &per_expert_bytes)) { + continue; + } + if (per_expert_bytes > UINT64_MAX / (uint64_t)DS4_N_EXPERT) { + return false; + } + const uint64_t layer_bytes = + per_expert_bytes * (uint64_t)DS4_N_EXPERT; + if (layer_bytes > max_bytes) max_bytes = layer_bytes; + } + + if (max_bytes == 0) return false; + *layer_bytes_out = max_bytes; + return true; +} + +static bool ds4_streaming_prefill_headroom_bytes( + const ds4_weights *weights, + uint64_t *bytes_out) { + if (bytes_out) *bytes_out = 0; + if (!weights || !bytes_out) return false; + + uint64_t layer_bytes = 0; + if (!ds4_streaming_max_routed_layer_bytes(weights, &layer_bytes)) { + return false; + } + if (layer_bytes > + UINT64_MAX / (uint64_t)DS4_STREAMING_PREFILL_HEADROOM_LAYERS) { + return false; + } + + *bytes_out = + layer_bytes * (uint64_t)DS4_STREAMING_PREFILL_HEADROOM_LAYERS; + return true; +} + /* * Mixed-precision ("boosted") GGUFs upcast a few layers' routed experts to a * bigger quant (e.g. Q4_K among IQ2 layers). The streaming expert cache is a @@ -3663,8 +4175,16 @@ static ds4_gpu_stream_expert_table graph_stream_expert_table_make( } #endif -static uint64_t ds4_streaming_manual_cache_safe_bytes(void) { +static uint64_t ds4_streaming_manual_cache_safe_bytes( + ds4_backend backend, + int ctx_size, + uint32_t prefill_chunk, + bool ssd_streaming) { #ifdef DS4_NO_GPU + (void)backend; + (void)ctx_size; + (void)prefill_chunk; + (void)ssd_streaming; return 0; #else const uint64_t gib = 1024ull * 1024ull * 1024ull; @@ -3673,17 +4193,35 @@ static uint64_t ds4_streaming_manual_cache_safe_bytes(void) { /* * Explicit NGB budgets name only the routed expert cache. Keep that cache - * below the full Metal working-set recommendation so non-routed weights, - * scratch buffers, KV, and macOS wired-memory overhead do not force expert - * slots out of mlock during decode. + * below the full Metal working-set recommendation after accounting for the + * graph context/KV buffers. This is intentionally not an mlock-derived cap: + * the cache uses ordinary shared Metal buffers, but crossing too close to the + * recommended working set makes short token-major prefill spend most of its + * time in VM/driver synchronization. */ - uint64_t safe = recommended > UINT64_MAX / 7ull ? - UINT64_MAX : (recommended * 7ull) / 10ull; + uint64_t target = recommended > UINT64_MAX / 7ull ? + UINT64_MAX : (recommended * 7ull) / 8ull; + const ds4_context_memory ctx_mem = + ds4_context_memory_estimate_with_prefill_mode(backend, + ctx_size, + prefill_chunk, + ssd_streaming); + uint64_t safe = 0; + if (target > ctx_mem.total_bytes) safe = target - ctx_mem.total_bytes; safe = (safe / gib) * gib; + if (safe == 0) safe = gib; return safe; #endif } +static uint64_t ds4_add_sat_u64(uint64_t a, uint64_t b) { + return a > UINT64_MAX - b ? UINT64_MAX : a + b; +} + +static double ds4_bytes_to_gib(uint64_t bytes) { + return (double)bytes / 1073741824.0; +} + static void tensor_expect_routed_expert( const ds4_tensor *t, uint32_t ndim, @@ -3725,6 +4263,9 @@ static void tensor_expect_routed_expert( } static bool weights_have_output_head(const ds4_weights *w) { + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + return w && w->output_norm && w->output; + } return w && w->output_hc_base && w->output_hc_fn && @@ -3734,6 +4275,9 @@ static bool weights_have_output_head(const ds4_weights *w) { } static bool weights_have_partial_output_head(const ds4_weights *w) { + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + return w && (w->output_norm || w->output); + } return w && (w->output_hc_base || w->output_hc_fn || @@ -3742,8 +4286,61 @@ static bool weights_have_partial_output_head(const ds4_weights *w) { w->output); } +static bool weights_glm_dsa_layer_has_required(const ds4_layer_weights *l, uint32_t il) { + if (!l) return false; + if (!l->attn_norm || + !l->attn_q_a || + !l->attn_q_a_norm || + !l->attn_q_b || + !l->attn_kv_a_mqa || + !l->attn_kv_a_norm || + !l->attn_k_b || + !l->attn_v_b || + !l->attn_output || + !l->indexer_attn_q_b || + !l->indexer_attn_k || + !l->indexer_k_norm || + !l->indexer_k_norm_b || + !l->indexer_proj || + !l->ffn_norm) + { + return false; + } + + if (il < DS4_N_LEADING_DENSE) { + if (!l->ffn_gate || !l->ffn_up || !l->ffn_down) return false; + } else { + if (!l->ffn_gate_inp || + !l->ffn_exp_probs_b || + !l->ffn_gate_exps || + !l->ffn_up_exps || + !l->ffn_down_exps || + !l->ffn_gate_shexp || + !l->ffn_up_shexp || + !l->ffn_down_shexp) + { + return false; + } + } + + if (DS4_N_NEXTN_PREDICT != 0 && + il + DS4_N_NEXTN_PREDICT >= DS4_N_LAYER && + (!l->nextn_eh_proj || + !l->nextn_enorm || + !l->nextn_hnorm || + !l->nextn_shared_head_norm)) + { + return false; + } + + return true; +} + static bool weights_layer_has_required(const ds4_layer_weights *l, uint32_t il) { if (!l) return false; + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + return weights_glm_dsa_layer_has_required(l, il); + } if (!l->hc_attn_fn || !l->hc_attn_scale || !l->hc_attn_base || @@ -3815,12 +4412,104 @@ static const ds4_layer_weights *weights_first_bound_layer(const ds4_weights *w) /* Verify every tensor type and dimension used by the specialized pipeline. * For distributed sliced GGUFs, only the advertised local layer range is * required; token embedding and output head are validated when present. */ +static void weights_validate_glm_dsa_layout( + const ds4_weights *w, + uint32_t layer_start, + uint32_t layer_end, + bool require_token_embd, + bool require_output) { + const uint64_t q_dim = (uint64_t)DS4_N_HEAD * DS4_N_KEY_MLA; + const uint64_t q_nope = DS4_N_KEY_MLA - DS4_N_ROT; + const uint64_t index_q_dim = + (uint64_t)DS4_N_INDEXER_HEAD * DS4_N_INDEXER_HEAD_DIM; + + if (!w) ds4_die("internal error: missing weights while validating GLM layout"); + if (layer_start >= DS4_N_LAYER) ds4_die("invalid first layer in GLM weight layout validation"); + if (layer_end == UINT32_MAX) layer_end = DS4_N_LAYER - 1u; + if (layer_end >= DS4_N_LAYER || layer_end < layer_start) { + ds4_die("invalid layer range in GLM weight layout validation"); + } + + if (require_token_embd && !w->token_embd) ds4_die("required token embedding tensor is missing"); + if (w->token_embd) { + tensor_expect_glm_dense_quant_layout(w->token_embd, 2, DS4_N_EMBD, DS4_N_VOCAB, 0); + } + + const bool have_output = weights_have_output_head(w); + if (require_output && !have_output) ds4_die("required output head tensors are missing"); + if (weights_have_partial_output_head(w) && !have_output) ds4_die("partial output head in GGUF"); + if (have_output) { + tensor_expect_layout(w->output_norm, DS4_TENSOR_F32, 1, DS4_N_EMBD, 0, 0); + tensor_expect_glm_dense_quant_layout(w->output, 2, DS4_N_EMBD, DS4_N_VOCAB, 0); + } + + for (uint32_t il = layer_start; il <= layer_end; il++) { + const ds4_layer_weights *l = &w->layer[il]; + if (!weights_glm_dsa_layer_has_required(l, il)) { + fprintf(stderr, "ds4: required GLM tensors for layer %u are missing\n", il); + exit(1); + } + + tensor_expect_layout(l->attn_norm, DS4_TENSOR_F32, 1, DS4_N_EMBD, 0, 0); + tensor_expect_glm_dense_quant_layout(l->attn_q_a, 2, DS4_N_EMBD, DS4_N_LORA_Q, 0); + tensor_expect_layout(l->attn_q_a_norm, DS4_TENSOR_F32, 1, DS4_N_LORA_Q, 0, 0); + tensor_expect_glm_dense_quant_layout(l->attn_q_b, 2, DS4_N_LORA_Q, q_dim, 0); + tensor_expect_glm_dense_quant_layout(l->attn_kv_a_mqa, 2, DS4_N_EMBD, DS4_N_HEAD_DIM, 0); + tensor_expect_layout(l->attn_kv_a_norm, DS4_TENSOR_F32, 1, DS4_N_KV_LORA, 0, 0); + tensor_expect_glm_dense_quant_layout(l->attn_k_b, 3, q_nope, DS4_N_KV_LORA, DS4_N_HEAD); + tensor_expect_glm_dense_quant_layout(l->attn_v_b, 3, DS4_N_KV_LORA, DS4_N_VALUE_MLA, DS4_N_HEAD); + tensor_expect_glm_dense_quant_layout(l->attn_output, 2, DS4_N_HEAD * DS4_N_VALUE_MLA, DS4_N_EMBD, 0); + tensor_expect_glm_dense_quant_layout(l->indexer_attn_k, 2, DS4_N_EMBD, DS4_N_INDEXER_HEAD_DIM, 0); + tensor_expect_glm_dense_quant_layout(l->indexer_attn_q_b, 2, DS4_N_LORA_Q, index_q_dim, 0); + tensor_expect_layout(l->indexer_k_norm, DS4_TENSOR_F32, 1, DS4_N_INDEXER_HEAD_DIM, 0, 0); + tensor_expect_layout(l->indexer_k_norm_b, DS4_TENSOR_F32, 1, DS4_N_INDEXER_HEAD_DIM, 0, 0); + tensor_expect_layout(l->indexer_proj, DS4_TENSOR_F32, 2, DS4_N_EMBD, DS4_N_INDEXER_HEAD, 0); + tensor_expect_layout(l->ffn_norm, DS4_TENSOR_F32, 1, DS4_N_EMBD, 0, 0); + + if (il < DS4_N_LEADING_DENSE) { + tensor_expect_glm_dense_quant_layout(l->ffn_gate, 2, DS4_N_EMBD, DS4_N_FF_DENSE, 0); + tensor_expect_glm_dense_quant_layout(l->ffn_up, 2, DS4_N_EMBD, DS4_N_FF_DENSE, 0); + tensor_expect_glm_dense_quant_layout(l->ffn_down, 2, DS4_N_FF_DENSE, DS4_N_EMBD, 0); + } else { + tensor_expect_layout(l->ffn_gate_inp, DS4_TENSOR_F32, 2, DS4_N_EMBD, DS4_N_EXPERT, 0); + tensor_expect_layout(l->ffn_exp_probs_b, DS4_TENSOR_F32, 1, DS4_N_EXPERT, 0, 0); + tensor_expect_routed_expert(l->ffn_gate_exps, 3, DS4_N_EMBD, DS4_N_FF_EXP, DS4_N_EXPERT); + tensor_expect_routed_expert(l->ffn_up_exps, 3, DS4_N_EMBD, DS4_N_FF_EXP, DS4_N_EXPERT); + tensor_expect_routed_expert(l->ffn_down_exps, 3, DS4_N_FF_EXP, DS4_N_EMBD, DS4_N_EXPERT); + if (l->ffn_gate_exps->type != l->ffn_up_exps->type) { + fprintf(stderr, "ds4: GLM routed gate/up experts use different quant types in layer %u\n", il); + exit(1); + } + tensor_expect_glm_dense_quant_layout(l->ffn_gate_shexp, 2, DS4_N_EMBD, DS4_N_FF_EXP, 0); + tensor_expect_glm_dense_quant_layout(l->ffn_up_shexp, 2, DS4_N_EMBD, DS4_N_FF_EXP, 0); + tensor_expect_glm_dense_quant_layout(l->ffn_down_shexp, 2, DS4_N_FF_EXP, DS4_N_EMBD, 0); + } + + if (DS4_N_NEXTN_PREDICT != 0 && + il + DS4_N_NEXTN_PREDICT >= DS4_N_LAYER) { + tensor_expect_glm_dense_quant_layout(l->nextn_eh_proj, 2, 2u * DS4_N_EMBD, DS4_N_EMBD, 0); + tensor_expect_layout(l->nextn_enorm, DS4_TENSOR_F32, 1, DS4_N_EMBD, 0, 0); + tensor_expect_layout(l->nextn_hnorm, DS4_TENSOR_F32, 1, DS4_N_EMBD, 0, 0); + tensor_expect_layout(l->nextn_shared_head_norm, DS4_TENSOR_F32, 1, DS4_N_EMBD, 0, 0); + } + } +} + static void weights_validate_layout( const ds4_weights *w, uint32_t layer_start, uint32_t layer_end, bool require_token_embd, bool require_output) { + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + weights_validate_glm_dsa_layout(w, + layer_start, + layer_end, + require_token_embd, + require_output); + return; + } + const uint64_t hc_dim = (uint64_t)DS4_N_EMBD * DS4_N_HC; const uint64_t hc_mix_dim = 2u * DS4_N_HC + (uint64_t)DS4_N_HC * DS4_N_HC; const uint64_t q_dim = (uint64_t)DS4_N_HEAD * DS4_N_HEAD_DIM; @@ -3846,7 +4535,7 @@ static void weights_validate_layout( tensor_expect_layout(w->output_hc_fn, DS4_TENSOR_F16, 2, hc_dim, DS4_N_HC, 0); tensor_expect_layout(w->output_hc_scale, DS4_TENSOR_F32, 1, 1, 0, 0); tensor_expect_layout(w->output_norm, DS4_TENSOR_F32, 1, DS4_N_EMBD, 0, 0); - tensor_expect_layout(w->output, DS4_TENSOR_Q8_0, 2, DS4_N_EMBD, DS4_N_VOCAB, 0); + tensor_expect_dense_quant_layout(w->output, 2, DS4_N_EMBD, DS4_N_VOCAB, 0); } for (uint32_t il = layer_start; il <= layer_end; il++) { @@ -3861,14 +4550,14 @@ static void weights_validate_layout( tensor_expect_layout(l->hc_attn_scale, DS4_TENSOR_F32, 1, 3, 0, 0); tensor_expect_layout(l->hc_attn_base, DS4_TENSOR_F32, 1, hc_mix_dim, 0, 0); tensor_expect_layout(l->attn_norm, DS4_TENSOR_F32, 1, DS4_N_EMBD, 0, 0); - tensor_expect_layout(l->attn_q_a, DS4_TENSOR_Q8_0, 2, DS4_N_EMBD, DS4_N_LORA_Q, 0); + tensor_expect_dense_quant_layout(l->attn_q_a, 2, DS4_N_EMBD, DS4_N_LORA_Q, 0); tensor_expect_layout(l->attn_q_a_norm, DS4_TENSOR_F32, 1, DS4_N_LORA_Q, 0, 0); - tensor_expect_layout(l->attn_q_b, DS4_TENSOR_Q8_0, 2, DS4_N_LORA_Q, q_dim, 0); - tensor_expect_layout(l->attn_kv, DS4_TENSOR_Q8_0, 2, DS4_N_EMBD, DS4_N_HEAD_DIM, 0); + tensor_expect_dense_quant_layout(l->attn_q_b, 2, DS4_N_LORA_Q, q_dim, 0); + tensor_expect_dense_quant_layout(l->attn_kv, 2, DS4_N_EMBD, DS4_N_HEAD_DIM, 0); tensor_expect_layout(l->attn_kv_a_norm, DS4_TENSOR_F32, 1, DS4_N_HEAD_DIM, 0, 0); tensor_expect_layout(l->attn_sinks, DS4_TENSOR_F32, 1, DS4_N_HEAD, 0, 0); - tensor_expect_layout(l->attn_output_a, DS4_TENSOR_Q8_0, 2, DS4_N_HEAD_DIM * (DS4_N_HEAD / DS4_N_OUT_GROUP), out_low_dim, 0); - tensor_expect_layout(l->attn_output_b, DS4_TENSOR_Q8_0, 2, out_low_dim, DS4_N_EMBD, 0); + tensor_expect_dense_quant_layout(l->attn_output_a, 2, DS4_N_HEAD_DIM * (DS4_N_HEAD / DS4_N_OUT_GROUP), out_low_dim, 0); + tensor_expect_dense_quant_layout(l->attn_output_b, 2, out_low_dim, DS4_N_EMBD, 0); if (ratio != 0) { const uint32_t coff = ratio == 4 ? 2u : 1u; @@ -3902,9 +4591,9 @@ static void weights_validate_layout( fprintf(stderr, "ds4: routed gate/up experts use different quant types in layer %u\n", il); exit(1); } - tensor_expect_layout(l->ffn_gate_shexp, DS4_TENSOR_Q8_0, 2, DS4_N_EMBD, DS4_N_FF_EXP, 0); - tensor_expect_layout(l->ffn_up_shexp, DS4_TENSOR_Q8_0, 2, DS4_N_EMBD, DS4_N_FF_EXP, 0); - tensor_expect_layout(l->ffn_down_shexp, DS4_TENSOR_Q8_0, 2, DS4_N_FF_EXP, DS4_N_EMBD, 0); + tensor_expect_dense_quant_layout(l->ffn_gate_shexp, 2, DS4_N_EMBD, DS4_N_FF_EXP, 0); + tensor_expect_dense_quant_layout(l->ffn_up_shexp, 2, DS4_N_EMBD, DS4_N_FF_EXP, 0); + tensor_expect_dense_quant_layout(l->ffn_down_shexp, 2, DS4_N_FF_EXP, DS4_N_EMBD, 0); if (il < DS4_N_HASH_LAYER) { tensor_expect_layout(l->ffn_gate_tid2eid, DS4_TENSOR_I32, 2, DS4_N_EXPERT_USED, DS4_N_VOCAB, 0); } @@ -4395,6 +5084,13 @@ static void config_expect_u32(const char *name, uint32_t got, uint32_t expected) exit(1); } +static void config_expect_u64(const char *name, uint64_t got, uint64_t expected) { + if (got == expected) return; + fprintf(stderr, "ds4: expected %s=%" PRIu64 " for %s, got %" PRIu64 "\n", + name, expected, DS4_MODEL_SHAPE_NAME, got); + exit(1); +} + static void config_expect_f32(const char *name, float got, float expected) { const float scale = fabsf(expected) > 1.0f ? fabsf(expected) : 1.0f; if (fabsf(got - expected) <= scale * 1.0e-6f) return; @@ -4416,7 +5112,7 @@ static void config_validate_fixed_shape(uint32_t n_layer) { /* Validate metadata values that affect semantics: attention shape, HC count, * expert routing, RoPE scaling, compression ratios, and SwiGLU clamp. */ -static void config_validate_model(const ds4_model *m) { +static void config_validate_deepseek4_model(const ds4_model *m) { const uint32_t n_layer = required_u32(m, "deepseek4.block_count"); const uint32_t n_embd = required_u32(m, "deepseek4.embedding_length"); const uint32_t n_vocab = required_u32(m, "deepseek4.vocab_size"); @@ -4528,28 +5224,150 @@ static void config_validate_model(const ds4_model *m) { config_expect_bool("expert_weights_norm", expert_weight_norm, true); } -static void weights_bind_output(ds4_weights *w, const ds4_model *m, bool required, bool optional) { +static void config_validate_glm_dsa_model(const ds4_model *m) { + g_ds4_shape = DS4_SHAPE_GLM52; + memset(g_ds4_compress_ratios, 0, sizeof(g_ds4_compress_ratios)); + + const uint32_t n_layer = required_u32(m, "glm-dsa.block_count"); + const uint64_t n_ctx = required_u64_compat(m, "glm-dsa.context_length"); + const uint32_t n_embd = required_u32(m, "glm-dsa.embedding_length"); + const uint32_t n_vocab = required_u32(m, "glm-dsa.vocab_size"); + const uint32_t n_ff_dense = required_u32(m, "glm-dsa.feed_forward_length"); + const uint32_t n_head = required_u32(m, "glm-dsa.attention.head_count"); + const uint32_t n_head_kv = required_u32(m, "glm-dsa.attention.head_count_kv"); + const uint32_t n_head_dim = required_u32(m, "glm-dsa.attention.key_length"); + const uint32_t n_value_dim = required_u32(m, "glm-dsa.attention.value_length"); + const uint32_t n_rot = required_u32(m, "glm-dsa.rope.dimension_count"); + const uint32_t n_lora_q = required_u32(m, "glm-dsa.attention.q_lora_rank"); + const uint32_t n_kv_lora = required_u32(m, "glm-dsa.attention.kv_lora_rank"); + const uint32_t n_key_mla = required_u32(m, "glm-dsa.attention.key_length_mla"); + const uint32_t n_value_mla = required_u32(m, "glm-dsa.attention.value_length_mla"); + const uint32_t n_expert = required_u32(m, "glm-dsa.expert_count"); + const uint32_t n_expert_used = required_u32(m, "glm-dsa.expert_used_count"); + const uint32_t n_ff_exp = required_u32(m, "glm-dsa.expert_feed_forward_length"); + const uint32_t n_expert_shared = required_u32(m, "glm-dsa.expert_shared_count"); + const uint32_t n_expert_group = required_u32(m, "glm-dsa.expert_group_count"); + const uint32_t n_expert_group_used = required_u32(m, "glm-dsa.expert_group_used_count"); + const uint32_t expert_gating_func = required_u32(m, "glm-dsa.expert_gating_func"); + const uint32_t n_leading_dense = required_u32(m, "glm-dsa.leading_dense_block_count"); + const uint32_t n_nextn = required_u32(m, "glm-dsa.nextn_predict_layers"); + const uint32_t n_indexer_head = required_u32(m, "glm-dsa.attention.indexer.head_count"); + const uint32_t n_indexer_head_dim = required_u32(m, "glm-dsa.attention.indexer.key_length"); + const uint32_t n_indexer_top_k = required_u32(m, "glm-dsa.attention.indexer.top_k"); + + config_expect_u32("block_count", n_layer, DS4_N_LAYER); + config_expect_u64("context_length", n_ctx, DS4_ROPE_ORIG_CTX); + config_expect_u32("embedding_length", n_embd, DS4_N_EMBD); + config_expect_u32("vocab_size", n_vocab, DS4_N_VOCAB); + config_expect_u32("feed_forward_length", n_ff_dense, DS4_N_FF_DENSE); + config_expect_u32("attention.head_count", n_head, DS4_N_HEAD); + config_expect_u32("attention.head_count_kv", n_head_kv, DS4_N_HEAD_KV); + config_expect_u32("attention.key_length", n_head_dim, DS4_N_HEAD_DIM); + config_expect_u32("attention.value_length", n_value_dim, DS4_N_VALUE_DIM); + config_expect_u32("rope.dimension_count", n_rot, DS4_N_ROT); + config_expect_u32("attention.q_lora_rank", n_lora_q, DS4_N_LORA_Q); + config_expect_u32("attention.kv_lora_rank", n_kv_lora, DS4_N_KV_LORA); + config_expect_u32("attention.key_length_mla", n_key_mla, DS4_N_KEY_MLA); + config_expect_u32("attention.value_length_mla", n_value_mla, DS4_N_VALUE_MLA); + config_expect_u32("expert_count", n_expert, DS4_N_EXPERT); + config_expect_u32("expert_used_count", n_expert_used, DS4_N_EXPERT_USED); + config_expect_u32("expert_feed_forward_length", n_ff_exp, DS4_N_FF_EXP); + config_expect_u32("expert_shared_count", n_expert_shared, DS4_N_EXPERT_SHARED); + config_expect_u32("expert_group_count", n_expert_group, 1); + config_expect_u32("expert_group_used_count", n_expert_group_used, 1); + config_expect_u32("expert_gating_func", expert_gating_func, 2); + config_expect_u32("leading_dense_block_count", n_leading_dense, DS4_N_LEADING_DENSE); + config_expect_u32("nextn_predict_layers", n_nextn, DS4_N_NEXTN_PREDICT); + config_expect_u32("attention.indexer.head_count", n_indexer_head, DS4_N_INDEXER_HEAD); + config_expect_u32("attention.indexer.key_length", n_indexer_head_dim, DS4_N_INDEXER_HEAD_DIM); + config_expect_u32("attention.indexer.top_k", n_indexer_top_k, DS4_N_INDEXER_TOP_K); + + const float rope_freq_base = required_f32(m, "glm-dsa.rope.freq_base"); + config_expect_f32("rope.freq_base", rope_freq_base, DS4_ROPE_FREQ_BASE); + const float rms_eps = required_f32(m, "glm-dsa.attention.layer_norm_rms_epsilon"); + config_expect_f32("attention.layer_norm_rms_epsilon", rms_eps, DS4_RMS_EPS); + const float expert_weight_scale = required_f32(m, "glm-dsa.expert_weights_scale"); + config_expect_f32("expert_weights_scale", expert_weight_scale, DS4_EXPERT_WEIGHT_SCALE); + const bool expert_weight_norm = required_bool(m, "glm-dsa.expert_weights_norm"); + config_expect_bool("expert_weights_norm", expert_weight_norm, true); +} + +static void config_validate_model(const ds4_model *m) { + ds4_str arch = {0}; + if (model_get_string(m, "general.architecture", &arch) && + ds4_streq(arch, "glm-dsa")) { + config_validate_glm_dsa_model(m); + return; + } + config_validate_deepseek4_model(m); +} + +static void weights_bind_output(ds4_weights *w, const ds4_model *m, bool required) { + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + if (required) { + w->output_norm = required_tensor(m, "output_norm.weight"); + w->output = required_tensor(m, "output.weight"); + } + return; + } + if (required) { w->output_hc_base = required_tensor(m, "output_hc_base.weight"); w->output_hc_fn = required_tensor(m, "output_hc_fn.weight"); w->output_hc_scale = required_tensor(m, "output_hc_scale.weight"); w->output_norm = required_tensor(m, "output_norm.weight"); w->output = required_tensor(m, "output.weight"); - return; } - if (!optional) return; +} - w->output_hc_base = model_find_tensor(m, "output_hc_base.weight"); - w->output_hc_fn = model_find_tensor(m, "output_hc_fn.weight"); - w->output_hc_scale = model_find_tensor(m, "output_hc_scale.weight"); - w->output_norm = model_find_tensor(m, "output_norm.weight"); - w->output = model_find_tensor(m, "output.weight"); - if (weights_have_partial_output_head(w) && !weights_have_output_head(w)) { - ds4_die("partial output head in GGUF"); +static void weights_bind_glm_dsa_layer(ds4_layer_weights *l, const ds4_model *m, uint32_t il) { + l->attn_norm = required_tensorf(m, "blk.%u.attn_norm.weight", il); + l->attn_q_a = required_tensorf(m, "blk.%u.attn_q_a.weight", il); + l->attn_q_a_norm = required_tensorf(m, "blk.%u.attn_q_a_norm.weight", il); + l->attn_q_b = required_tensorf(m, "blk.%u.attn_q_b.weight", il); + l->attn_kv_a_mqa = required_tensorf(m, "blk.%u.attn_kv_a_mqa.weight", il); + l->attn_kv_a_norm = required_tensorf(m, "blk.%u.attn_kv_a_norm.weight", il); + l->attn_k_b = required_tensorf(m, "blk.%u.attn_k_b.weight", il); + l->attn_v_b = required_tensorf(m, "blk.%u.attn_v_b.weight", il); + l->attn_output = required_tensorf(m, "blk.%u.attn_output.weight", il); + l->indexer_attn_q_b = required_tensorf(m, "blk.%u.indexer.attn_q_b.weight", il); + l->indexer_attn_k = required_tensorf(m, "blk.%u.indexer.attn_k.weight", il); + l->indexer_k_norm = required_tensorf(m, "blk.%u.indexer.k_norm.weight", il); + l->indexer_k_norm_b = required_tensorf(m, "blk.%u.indexer.k_norm.bias", il); + l->indexer_proj = required_tensorf(m, "blk.%u.indexer.proj.weight", il); + l->ffn_norm = required_tensorf(m, "blk.%u.ffn_norm.weight", il); + + if (il < DS4_N_LEADING_DENSE) { + l->ffn_gate = required_tensorf(m, "blk.%u.ffn_gate.weight", il); + l->ffn_up = required_tensorf(m, "blk.%u.ffn_up.weight", il); + l->ffn_down = required_tensorf(m, "blk.%u.ffn_down.weight", il); + } else { + l->ffn_gate_inp = required_tensorf(m, "blk.%u.ffn_gate_inp.weight", il); + l->ffn_exp_probs_b = required_tensorf(m, "blk.%u.exp_probs_b.bias", il); + l->ffn_gate_exps = required_tensorf(m, "blk.%u.ffn_gate_exps.weight", il); + l->ffn_up_exps = required_tensorf(m, "blk.%u.ffn_up_exps.weight", il); + l->ffn_down_exps = required_tensorf(m, "blk.%u.ffn_down_exps.weight", il); + l->ffn_gate_shexp = required_tensorf(m, "blk.%u.ffn_gate_shexp.weight", il); + l->ffn_up_shexp = required_tensorf(m, "blk.%u.ffn_up_shexp.weight", il); + l->ffn_down_shexp = required_tensorf(m, "blk.%u.ffn_down_shexp.weight", il); + } + + if (DS4_N_NEXTN_PREDICT != 0 && + il + DS4_N_NEXTN_PREDICT >= DS4_N_LAYER) { + l->nextn_eh_proj = required_tensorf(m, "blk.%u.nextn.eh_proj.weight", il); + l->nextn_enorm = required_tensorf(m, "blk.%u.nextn.enorm.weight", il); + l->nextn_hnorm = required_tensorf(m, "blk.%u.nextn.hnorm.weight", il); + l->nextn_shared_head_norm = + required_tensorf(m, "blk.%u.nextn.shared_head_norm.weight", il); } } static void weights_bind_layer(ds4_layer_weights *l, const ds4_model *m, uint32_t il) { + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + weights_bind_glm_dsa_layer(l, m, il); + return; + } + const uint32_t compress_ratio = ds4_layer_compress_ratio(il); l->hc_attn_fn = required_tensorf(m, "blk.%u.hc_attn_fn.weight", il); @@ -4604,22 +5422,25 @@ static void weights_bind( bool load_slice, uint32_t load_layer_start, uint32_t load_layer_end, - bool require_output, - bool optional_output) { + bool require_output) { memset(w, 0, sizeof(*w)); + uint32_t executable_layers = DS4_N_LAYER; + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA && + DS4_N_LAYER > DS4_N_NEXTN_PREDICT) { + executable_layers = DS4_N_LAYER - DS4_N_NEXTN_PREDICT; + } uint32_t start = 0; - uint32_t end = DS4_N_LAYER - 1u; + uint32_t end = executable_layers - 1u; bool require_token_embd = true; if (load_slice) { - if (load_layer_start >= DS4_N_LAYER) ds4_die("invalid model load layer slice"); + if (load_layer_start >= executable_layers) ds4_die("invalid model load layer slice"); start = load_layer_start; - end = load_layer_end == UINT32_MAX ? DS4_N_LAYER - 1u : load_layer_end; - if (end >= DS4_N_LAYER || end < start) ds4_die("invalid model load layer slice"); + end = load_layer_end == UINT32_MAX ? executable_layers - 1u : load_layer_end; + if (end >= executable_layers || end < start) ds4_die("invalid model load layer slice"); require_token_embd = start == 0; } else { require_output = true; - optional_output = false; } if (require_token_embd) { @@ -4627,11 +5448,19 @@ static void weights_bind( } else { w->token_embd = model_find_tensor(m, "token_embd.weight"); } - weights_bind_output(w, m, require_output, optional_output); + weights_bind_output(w, m, require_output); for (uint32_t il = start; il <= end; il++) { weights_bind_layer(&w->layer[il], m, il); } + /* GLM nextn/MTP block(s): excluded from the executable pass but bound + * so the drafter can run them. Only when the full model is loaded. */ + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA && + start == 0 && end == executable_layers - 1u) { + for (uint32_t il = executable_layers; il < DS4_N_LAYER; il++) { + weights_bind_layer(&w->layer[il], m, il); + } + } weights_validate_layout(w, start, end, require_token_embd, require_output); } @@ -4727,8 +5556,12 @@ static void model_map_span_vec_include_layer(ds4_model_map_span_vec *spans, cons DS4_INCLUDE_TENSOR(l->attn_q_a_norm); DS4_INCLUDE_TENSOR(l->attn_q_b); DS4_INCLUDE_TENSOR(l->attn_kv); + DS4_INCLUDE_TENSOR(l->attn_kv_a_mqa); DS4_INCLUDE_TENSOR(l->attn_kv_a_norm); + DS4_INCLUDE_TENSOR(l->attn_k_b); + DS4_INCLUDE_TENSOR(l->attn_v_b); DS4_INCLUDE_TENSOR(l->attn_sinks); + DS4_INCLUDE_TENSOR(l->attn_output); DS4_INCLUDE_TENSOR(l->attn_output_a); DS4_INCLUDE_TENSOR(l->attn_output_b); DS4_INCLUDE_TENSOR(l->attn_compressor_ape); @@ -4736,6 +5569,9 @@ static void model_map_span_vec_include_layer(ds4_model_map_span_vec *spans, cons DS4_INCLUDE_TENSOR(l->attn_compressor_gate); DS4_INCLUDE_TENSOR(l->attn_compressor_norm); DS4_INCLUDE_TENSOR(l->indexer_attn_q_b); + DS4_INCLUDE_TENSOR(l->indexer_attn_k); + DS4_INCLUDE_TENSOR(l->indexer_k_norm); + DS4_INCLUDE_TENSOR(l->indexer_k_norm_b); DS4_INCLUDE_TENSOR(l->indexer_proj); DS4_INCLUDE_TENSOR(l->indexer_compressor_ape); DS4_INCLUDE_TENSOR(l->indexer_compressor_kv); @@ -4746,6 +5582,9 @@ static void model_map_span_vec_include_layer(ds4_model_map_span_vec *spans, cons DS4_INCLUDE_TENSOR(l->hc_ffn_base); DS4_INCLUDE_TENSOR(l->ffn_norm); DS4_INCLUDE_TENSOR(l->ffn_gate_tid2eid); + DS4_INCLUDE_TENSOR(l->ffn_gate); + DS4_INCLUDE_TENSOR(l->ffn_up); + DS4_INCLUDE_TENSOR(l->ffn_down); DS4_INCLUDE_TENSOR(l->ffn_gate_inp); DS4_INCLUDE_TENSOR(l->ffn_exp_probs_b); DS4_INCLUDE_TENSOR(l->ffn_gate_exps); @@ -4754,6 +5593,10 @@ static void model_map_span_vec_include_layer(ds4_model_map_span_vec *spans, cons DS4_INCLUDE_TENSOR(l->ffn_gate_shexp); DS4_INCLUDE_TENSOR(l->ffn_up_shexp); DS4_INCLUDE_TENSOR(l->ffn_down_shexp); + DS4_INCLUDE_TENSOR(l->nextn_eh_proj); + DS4_INCLUDE_TENSOR(l->nextn_enorm); + DS4_INCLUDE_TENSOR(l->nextn_hnorm); + DS4_INCLUDE_TENSOR(l->nextn_shared_head_norm); #undef DS4_INCLUDE_TENSOR } @@ -4767,8 +5610,12 @@ static void model_map_span_vec_include_layer_decode_static(ds4_model_map_span_ve DS4_INCLUDE_TENSOR(l->attn_q_a_norm); DS4_INCLUDE_TENSOR(l->attn_q_b); DS4_INCLUDE_TENSOR(l->attn_kv); + DS4_INCLUDE_TENSOR(l->attn_kv_a_mqa); DS4_INCLUDE_TENSOR(l->attn_kv_a_norm); + DS4_INCLUDE_TENSOR(l->attn_k_b); + DS4_INCLUDE_TENSOR(l->attn_v_b); DS4_INCLUDE_TENSOR(l->attn_sinks); + DS4_INCLUDE_TENSOR(l->attn_output); DS4_INCLUDE_TENSOR(l->attn_output_a); DS4_INCLUDE_TENSOR(l->attn_output_b); DS4_INCLUDE_TENSOR(l->attn_compressor_ape); @@ -4776,6 +5623,9 @@ static void model_map_span_vec_include_layer_decode_static(ds4_model_map_span_ve DS4_INCLUDE_TENSOR(l->attn_compressor_gate); DS4_INCLUDE_TENSOR(l->attn_compressor_norm); DS4_INCLUDE_TENSOR(l->indexer_attn_q_b); + DS4_INCLUDE_TENSOR(l->indexer_attn_k); + DS4_INCLUDE_TENSOR(l->indexer_k_norm); + DS4_INCLUDE_TENSOR(l->indexer_k_norm_b); DS4_INCLUDE_TENSOR(l->indexer_proj); DS4_INCLUDE_TENSOR(l->indexer_compressor_ape); DS4_INCLUDE_TENSOR(l->indexer_compressor_kv); @@ -4786,22 +5636,155 @@ static void model_map_span_vec_include_layer_decode_static(ds4_model_map_span_ve DS4_INCLUDE_TENSOR(l->hc_ffn_base); DS4_INCLUDE_TENSOR(l->ffn_norm); DS4_INCLUDE_TENSOR(l->ffn_gate_tid2eid); + DS4_INCLUDE_TENSOR(l->ffn_gate); + DS4_INCLUDE_TENSOR(l->ffn_up); + DS4_INCLUDE_TENSOR(l->ffn_down); DS4_INCLUDE_TENSOR(l->ffn_gate_inp); DS4_INCLUDE_TENSOR(l->ffn_exp_probs_b); DS4_INCLUDE_TENSOR(l->ffn_gate_shexp); DS4_INCLUDE_TENSOR(l->ffn_up_shexp); DS4_INCLUDE_TENSOR(l->ffn_down_shexp); + DS4_INCLUDE_TENSOR(l->nextn_eh_proj); + DS4_INCLUDE_TENSOR(l->nextn_enorm); + DS4_INCLUDE_TENSOR(l->nextn_hnorm); + DS4_INCLUDE_TENSOR(l->nextn_shared_head_norm); #undef DS4_INCLUDE_TENSOR } +static bool glm_stream_resident_decode_layer_supported( + const ds4_layer_weights *l, + uint32_t il) { + if (DS4_MODEL_FAMILY != DS4_MODEL_FAMILY_GLM_DSA || + !l || + il < DS4_N_LEADING_DENSE || + !l->ffn_gate_exps || + !l->ffn_up_exps || + !l->ffn_down_exps) { + return false; + } + if (l->ffn_gate_exps->type == DS4_TENSOR_IQ2_XXS && + l->ffn_up_exps->type == DS4_TENSOR_IQ2_XXS && + (l->ffn_down_exps->type == DS4_TENSOR_IQ2_XXS || + l->ffn_down_exps->type == DS4_TENSOR_Q2_K)) { + return true; + } + return l->ffn_gate_exps->type == l->ffn_up_exps->type && + l->ffn_gate_exps->type == l->ffn_down_exps->type && + (l->ffn_gate_exps->type == DS4_TENSOR_Q2_K || + l->ffn_gate_exps->type == DS4_TENSOR_Q4_K); +} + +static uint32_t g_glm_streaming_full_resident_layers; + +static bool glm_stream_resident_decode_layer_enabled( + const ds4_layer_weights *l, + uint32_t il) { + if (!glm_stream_resident_decode_layer_supported(l, il)) return false; + return g_glm_streaming_full_resident_layers != 0 && + il - DS4_N_LEADING_DENSE < g_glm_streaming_full_resident_layers; +} + +static bool glm_stream_expert_cache_addr_layout_supported( + const ds4_weights *w, + const ds4_layer_weights *l, + uint32_t il) { + if (DS4_MODEL_FAMILY != DS4_MODEL_FAMILY_GLM_DSA || + !w || + !l || + il >= DS4_N_LAYER || + il < DS4_N_LEADING_DENSE || + !l->ffn_gate_exps || + !l->ffn_up_exps || + !l->ffn_down_exps || + DS4_N_EXPERT_USED == 0 || + DS4_N_EXPERT_USED > 8 || + DS4_N_EXPERT < 128 || + getenv("DS4_METAL_GLM_DISABLE_STREAMING_EXPERT_CACHE") != NULL) { + return false; + } + if (!weights_streaming_layer_experts_uniform(w, il)) return false; + + if (l->ffn_gate_exps->type != l->ffn_up_exps->type) return false; + const bool q2_addr = + l->ffn_gate_exps->type == DS4_TENSOR_Q2_K && + l->ffn_down_exps->type == DS4_TENSOR_Q2_K; + const bool q4_addr = + l->ffn_gate_exps->type == DS4_TENSOR_Q4_K && + l->ffn_down_exps->type == DS4_TENSOR_Q4_K; + return q2_addr || q4_addr; +} + +static bool glm_stream_expert_cache_addr_supported( + const ds4_weights *w, + const ds4_layer_weights *l, + uint32_t il) { + if (!glm_stream_expert_cache_addr_layout_supported(w, l, il)) { + return false; + } + +#ifdef DS4_NO_GPU + return false; +#else + uint64_t gate_expert_bytes = 0; + uint64_t down_expert_bytes = 0; + if (!streaming_layer_gate_down_expert_bytes(l, + &gate_expert_bytes, + &down_expert_bytes)) { + return false; + } + return ds4_gpu_stream_expert_cache_budget_for_expert_size( + gate_expert_bytes, + down_expert_bytes) >= DS4_N_EXPERT_USED; +#endif +} + +static bool glm_stream_selected_expert_cache_supported( + const ds4_layer_weights *l, + uint32_t il) { + if (DS4_MODEL_FAMILY != DS4_MODEL_FAMILY_GLM_DSA || + !l || + il < DS4_N_LEADING_DENSE || + !l->ffn_gate_exps || + !l->ffn_up_exps || + !l->ffn_down_exps || + DS4_N_EXPERT_USED == 0 || + DS4_N_EXPERT_USED > 8 || + DS4_N_EXPERT < 128 || + getenv("DS4_METAL_MOE_WRITE_CLAMPED_ACT") != NULL || + getenv("DS4_METAL_DISABLE_ROUTED_PAIR_SWIGLU_FUSION") != NULL || + getenv("DS4_METAL_GLM_DISABLE_STREAMING_EXPERT_CACHE") != NULL) { + return false; + } + + if (l->ffn_gate_exps->type != DS4_TENSOR_IQ2_XXS || + l->ffn_up_exps->type != DS4_TENSOR_IQ2_XXS) { + return false; + } + + if (l->ffn_down_exps->type == DS4_TENSOR_Q2_K) { + return getenv("DS4_METAL_DISABLE_IQ2_SELECTED_EXPERT_VIEWS") == NULL; + } + if (l->ffn_down_exps->type == DS4_TENSOR_IQ2_XXS) { + return getenv("DS4_METAL_DISABLE_IQ2_STREAM_ADDR_TABLE") == NULL; + } + return false; +} + +static bool glm_stream_decode_experts_are_streamed( + const ds4_weights *w, + const ds4_layer_weights *l, + uint32_t il) { + if (DS4_MODEL_FAMILY != DS4_MODEL_FAMILY_GLM_DSA) return false; + return glm_stream_expert_cache_addr_layout_supported(w, l, il) || + glm_stream_selected_expert_cache_supported(l, il); +} + /* * Decode-time spans for one layer. The static set excludes routed expert - * tensors because the streaming expert cache serves them — but a boosted - * layer (per-expert bytes != the global slab class) can never be cached, and - * both the selected-addr prefill fallback and the decode no-cache fallback - * read its experts through ds4_gpu_wrap_model_range / wrap_model_exact_range - * over the model map. Include its exps tensors so those reads are covered. - * Uniform models add nothing here (byte-identical behavior). + * tensors only when the streaming expert-cache path can really serve them. + * Boosted layers, mixed GLM quant layouts such as Q4 gate/up plus Q5 down, or + * undersized expert caches fall back to direct model-range reads. Include + * those expert tensors so cache-hit prefill extension and decode are covered. */ static void model_map_span_vec_include_layer_decode( ds4_model_map_span_vec *spans, @@ -4809,7 +5792,10 @@ static void model_map_span_vec_include_layer_decode( uint32_t il) { const ds4_layer_weights *l = &w->layer[il]; model_map_span_vec_include_layer_decode_static(spans, l); - if (!weights_streaming_layer_experts_uniform(w, il)) { + if (!weights_streaming_layer_experts_uniform(w, il) || + (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA && + !glm_stream_decode_experts_are_streamed(w, l, il)) || + glm_stream_resident_decode_layer_enabled(l, il)) { model_map_span_vec_include_one(spans, l->ffn_gate_exps); model_map_span_vec_include_one(spans, l->ffn_up_exps); model_map_span_vec_include_one(spans, l->ffn_down_exps); @@ -4873,6 +5859,56 @@ static DS4_MAYBE_UNUSED bool weights_model_map_spans( return model_map_span_vec_finish(spans); } +static const uint8_t *tensor_expert_bytes( + const ds4_model *m, + const ds4_tensor *w, + uint32_t expert, + uint64_t *in_dim, + uint64_t *out_dim, + uint64_t *row_bytes); + +/* TP sharding keeps full layers but restricts every routed-expert blob to + * one contiguous rank range (rank 0 owns the lower expert ids, matching + * ds4_tp_owns_expert in metal/moe.metal). */ +static DS4_MAYBE_UNUSED bool weights_model_map_sharded_spans( + const ds4_weights *w, + const ds4_model *m, + int rank, + ds4_model_map_span_vec *spans) { + if (!w || !m || !spans || (rank != 0 && rank != 1)) return false; + memset(spans, 0, sizeof(*spans)); + model_map_span_vec_include_one(spans, w->token_embd); + for (uint32_t il = 0; il < (uint32_t)DS4_N_LAYER; il++) { + const ds4_layer_weights *l = &w->layer[il]; + /* Dense/attention/router tensors only — the plain decode include + * would map the full expert blobs in non-streaming mode. */ + model_map_span_vec_include_layer_decode_static(spans, l); + const ds4_tensor *exps[3] = { l->ffn_gate_exps, l->ffn_up_exps, + l->ffn_down_exps }; + for (int t = 0; t < 3; t++) { + const ds4_tensor *x = exps[t]; + if (!x || x->ndim != 3 || x->dim[2] < 2) continue; + uint64_t in_dim = 0, out_dim = 0, row_bytes = 0; + (void)tensor_expert_bytes(m, x, 0, &in_dim, &out_dim, &row_bytes); + const uint64_t expert_bytes = out_dim * row_bytes; + const uint64_t low_experts = x->dim[2] / 2; + const uint64_t first_expert = rank == 1 ? low_experts : 0; + const uint64_t owned_experts = rank == 1 ? + x->dim[2] - low_experts : low_experts; + const uint64_t owned_bytes = owned_experts * expert_bytes; + const uint64_t lo = x->abs_offset + first_expert * expert_bytes; + /* Kernels index experts from the blob base, so the owned range + * must sit in one contiguous view. Rank 1 takes any remainder. */ + model_map_span_vec_append(spans, lo, lo + owned_bytes, true); + if (owned_bytes > spans->max_tensor_bytes) { + spans->max_tensor_bytes = owned_bytes; + } + } + } + model_map_span_vec_include_output(spans, w); + return model_map_span_vec_finish(spans); +} + static DS4_MAYBE_UNUSED bool weights_model_map_decode_layer_spans( const ds4_weights *w, uint32_t il, @@ -5110,6 +6146,9 @@ static void weights_free(ds4_weights *w) { /* Load one token embedding row and expand it to float activations. */ static void embed_token_f16(const ds4_model *m, const ds4_weights *w, int token, float *out) { ds4_tensor *te = w->token_embd; + if (te->type != DS4_TENSOR_F16 || te->ndim != 2) { + ds4_die("expected a 2D F16 token embedding tensor"); + } if (token < 0 || (uint64_t)token >= te->dim[1]) { ds4_die("token id is outside the embedding table"); } @@ -5123,6 +6162,46 @@ static void embed_token_f16(const ds4_model *m, const ds4_weights *w, int token, } } +static void embed_token_q8_0(const ds4_model *m, const ds4_weights *w, int token, float *out) { + ds4_tensor *te = w->token_embd; + if (te->type != DS4_TENSOR_Q8_0 || te->ndim != 2) { + ds4_die("expected a 2D Q8_0 token embedding tensor"); + } + if (token < 0 || (uint64_t)token >= te->dim[1]) { + ds4_die("token id is outside the embedding table"); + } + + const uint64_t n = te->dim[0]; + const uint64_t blocks = (n + 31) / 32; + const uint8_t *row = (const uint8_t *)tensor_data(m, te) + + (uint64_t)token * blocks * 34; + for (uint64_t b = 0; b < blocks; b++) { + uint16_t scale_bits; + memcpy(&scale_bits, row + b * 34, sizeof(scale_bits)); + const float scale = f16_to_f32(scale_bits); + const int8_t *qs = (const int8_t *)(row + b * 34 + 2); + const uint64_t i0 = b * 32; + const uint64_t bn = n - i0 < 32 ? n - i0 : 32; + for (uint64_t i = 0; i < bn; i++) { + out[i0 + i] = scale * (float)qs[i]; + } + } +} + +static void embed_token_any(const ds4_model *m, const ds4_weights *w, int token, float *out) { + if (!w->token_embd) ds4_die("token embedding tensor is missing"); + switch (w->token_embd->type) { + case DS4_TENSOR_F16: + embed_token_f16(m, w, token, out); + break; + case DS4_TENSOR_Q8_0: + embed_token_q8_0(m, w, token, out); + break; + default: + ds4_die("unsupported token embedding tensor type"); + } +} + /* RMSNorm without a learned scale, used by hyper-connection control vectors. */ static void rms_norm_no_weight(float *out, const float *x, uint64_t n, float eps) { double ss = 0.0; @@ -5763,6 +6842,54 @@ static DS4_MAYBE_UNUSED void matvec_q8_0_prequant( matvec_q8_0_rows_prequant(out, m, w, xq, xscale, 0, w->dim[1]); } +static void matvec_q8_0_3d_slice_prequant( + float * out, + const ds4_model * m, + const ds4_tensor * w, + const int8_t * xq, + const float * xscale, + uint64_t slice) { + if (w->type != DS4_TENSOR_Q8_0 || w->ndim != 3) ds4_die("expected a 3D Q8_0 tensor"); + if (slice >= w->dim[2]) ds4_die("Q8_0 slice is outside tensor"); + + const uint64_t in_dim = w->dim[0]; + const uint64_t out_dim = w->dim[1]; + const uint64_t blocks = (in_dim + 31) / 32; + const uint64_t slice_bytes = out_dim * blocks * 34; + const uint8_t *data = (const uint8_t *)tensor_data(m, w) + slice * slice_bytes; + + matvec_q8_0_ctx ctx = { + .out = out, + .data = data, + .xq = xq, + .xscale = xscale, + .in_dim = in_dim, + .row0 = 0, + .blocks = blocks, + }; + ds4_parallel_for(out_dim, matvec_q8_0_worker, &ctx); +} + +static DS4_MAYBE_UNUSED void matvec_q8_0_3d_slice( + float * out, + const ds4_model * m, + const ds4_tensor * w, + const float * x, + uint64_t slice) { + if (w->type != DS4_TENSOR_Q8_0 || w->ndim != 3) ds4_die("expected a 3D Q8_0 tensor"); + + const uint64_t in_dim = w->dim[0]; + const uint64_t blocks = (in_dim + 31) / 32; + int8_t *xq = xmalloc((size_t)blocks * 32); + float *xscale = xmalloc((size_t)blocks * sizeof(xscale[0])); + + quantize_q8_0_activation(x, xq, xscale, in_dim); + matvec_q8_0_3d_slice_prequant(out, m, w, xq, xscale, slice); + + free(xscale); + free(xq); +} + /* Compute two Q8_0 projections from the same input, used by gate/up and * compressor kv/score pairs. */ static void matvec_q8_0_pair_prequant( @@ -5922,6 +7049,63 @@ static void matvec_q8_0(float *out, const ds4_model *m, const ds4_tensor *w, con matvec_q8_0_rows(out, m, w, x, 0, w->dim[1]); } +static inline float dot_q8_0_row_f32_ref( + const uint8_t *row, + const float *x, + uint64_t in_dim, + uint64_t blocks) { + float acc = 0.0f; + for (uint64_t b = 0; b < blocks; b++) { + uint16_t scale_bits; + memcpy(&scale_bits, row + b * 34, sizeof(scale_bits)); + const int8_t *qs = (const int8_t *)(row + b * 34 + 2); + const float d = f16_to_f32(scale_bits); + const uint64_t i0 = b * 32; + const uint64_t n = in_dim - i0 < 32 ? in_dim - i0 : 32; + for (uint64_t i = 0; i < n; i++) { + acc += d * (float)qs[i] * x[i0 + i]; + } + } + return acc; +} + +typedef struct { + float *out; + const uint8_t *data; + const float *x; + uint64_t in_dim; + uint64_t blocks; +} matvec_q8_0_f32_ref_ctx; + +static void matvec_q8_0_f32_ref_worker(void *vctx, uint64_t r0, uint64_t r1) { + matvec_q8_0_f32_ref_ctx *ctx = vctx; + const uint64_t row_bytes = ctx->blocks * 34; + for (uint64_t r = r0; r < r1; r++) { + ctx->out[r] = dot_q8_0_row_f32_ref(ctx->data + r * row_bytes, + ctx->x, + ctx->in_dim, + ctx->blocks); + } +} + +static void matvec_q8_0_f32_ref( + float *out, + const ds4_model *m, + const ds4_tensor *w, + const float *x) { + if (w->type != DS4_TENSOR_Q8_0 || w->ndim < 2 || w->dim[0] == 0) { + ds4_die("expected a Q8_0 tensor with matrix rows"); + } + matvec_q8_0_f32_ref_ctx ctx = { + .out = out, + .data = tensor_data(m, w), + .x = x, + .in_dim = w->dim[0], + .blocks = (w->dim[0] + 31) / 32, + }; + ds4_parallel_for(w->elements / w->dim[0], matvec_q8_0_f32_ref_worker, &ctx); +} + static void matvec_any(float *out, const ds4_model *m, const ds4_tensor *w, const float *x); /* Decode scratch owns this temporary activation quantization so generation @@ -6428,6 +7612,72 @@ static void matvec_q2_k_experts_accum_prequant( ds4_parallel_for(out_dim0, matvec_q2_k_accum_worker, &ctx); } +typedef struct { + float *out; + const uint8_t *base[DS4_MAX_EXPERT_USED]; + const block_q8_K *xq[DS4_MAX_EXPERT_USED]; + uint64_t in_dim; + uint64_t row_bytes[DS4_MAX_EXPERT_USED]; + int n_expert; +} matvec_iq2_xxs_accum_ctx; + +static void matvec_iq2_xxs_accum_worker(void *vctx, uint64_t row0, uint64_t row1) { + matvec_iq2_xxs_accum_ctx *ctx = vctx; + + for (uint64_t row = row0; row < row1; row++) { + float acc = 0.0f; + for (int i = 0; i < ctx->n_expert; i++) { + float v = 0.0f; + const block_iq2_xxs *br = (const block_iq2_xxs *)(ctx->base[i] + row * ctx->row_bytes[i]); + ds4_vec_dot_iq2_xxs_q8_K((int)ctx->in_dim, &v, br, ctx->xq[i]); + acc += v; + } + ctx->out[row] = acc; + } +} + +static void matvec_iq2_xxs_experts_accum_prequant( + float *out, + const ds4_model *m, + const ds4_tensor *w, + const block_q8_K *xq, + const int *selected, + int n_expert) { + if (w->type != DS4_TENSOR_IQ2_XXS) ds4_die("expected an IQ2_XXS expert tensor"); + if (n_expert < 1 || (uint32_t)n_expert > DS4_N_EXPERT_USED) ds4_die("unexpected routed expert count"); + + uint64_t in_dim0 = 0; + uint64_t out_dim0 = 0; + const uint8_t *base[DS4_MAX_EXPERT_USED]; + uint64_t row_bytes[DS4_MAX_EXPERT_USED]; + + for (int i = 0; i < n_expert; i++) { + uint64_t in_dim, out_dim; + base[i] = tensor_expert_bytes(m, w, (uint32_t)selected[i], &in_dim, &out_dim, &row_bytes[i]); + if (i == 0) { + in_dim0 = in_dim; + out_dim0 = out_dim; + } else if (in_dim != in_dim0 || out_dim != out_dim0) { + ds4_die("IQ2_XXS expert tensors do not share a layout"); + } + } + if (in_dim0 % QK_K != 0) ds4_die("IQ2_XXS expert row is not QK_K aligned"); + + const uint64_t n_blocks = in_dim0 / QK_K; + matvec_iq2_xxs_accum_ctx ctx = { + .out = out, + .in_dim = in_dim0, + .n_expert = n_expert, + }; + for (int i = 0; i < n_expert; i++) { + ctx.base[i] = base[i]; + ctx.row_bytes[i] = row_bytes[i]; + ctx.xq[i] = xq + (uint64_t)i * n_blocks; + } + + ds4_parallel_for(out_dim0, matvec_iq2_xxs_accum_worker, &ctx); +} + typedef struct { uint32_t token; uint32_t slot; @@ -6733,6 +7983,233 @@ static void matvec_q4_k_experts_accum_prequant( ds4_parallel_for(out_dim0, matvec_q4_k_accum_worker, &ctx); } +static inline void ds4_vec_dot_q5_q6_K_q8_K( + uint32_t type, + int n, + float *s, + const uint8_t *x, + const block_q8_K *y) { + if (type == DS4_TENSOR_Q5_K) { + ds4_vec_dot_q5_K_q8_K(n, s, (const block_q5_K *)x, y); + } else if (type == DS4_TENSOR_Q6_K) { + ds4_vec_dot_q6_K_q8_K(n, s, (const block_q6_K *)x, y); + } else { + ds4_die("expected a Q5_K or Q6_K tensor"); + } +} + +typedef struct { + float *out; + const uint8_t *base; + const block_q8_K *xq; + uint64_t in_dim; + uint64_t row_bytes; + uint32_t type; +} matvec_q5_q6_k_ctx; + +static void matvec_q5_q6_k_worker(void *vctx, uint64_t row0, uint64_t row1) { + matvec_q5_q6_k_ctx *ctx = vctx; + + for (uint64_t row = row0; row < row1; row++) { + ds4_vec_dot_q5_q6_K_q8_K(ctx->type, (int)ctx->in_dim, &ctx->out[row], + ctx->base + row * ctx->row_bytes, ctx->xq); + } +} + +typedef struct { + float *mid; + const uint8_t *gate_base[DS4_MAX_EXPERT_USED]; + const uint8_t *up_base[DS4_MAX_EXPERT_USED]; + const block_q8_K *xq; + float expert_weight[DS4_MAX_EXPERT_USED]; + float clamp; + uint64_t in_dim; + uint64_t out_dim; + uint64_t gate_row_bytes[DS4_MAX_EXPERT_USED]; + uint64_t up_row_bytes[DS4_MAX_EXPERT_USED]; + uint32_t gate_type; + uint32_t up_type; + int n_expert; +} matvec_q5_q6_k_mid_ctx; + +static void matvec_q5_q6_k_mid_worker(void *vctx, uint64_t row0, uint64_t row1) { + matvec_q5_q6_k_mid_ctx *ctx = vctx; + + for (uint64_t idx = row0; idx < row1; idx++) { + const int slot = (int)(idx / ctx->out_dim); + const uint64_t row = idx - (uint64_t)slot * ctx->out_dim; + float gate = 0.0f; + float up = 0.0f; + + ds4_vec_dot_q5_q6_K_q8_K(ctx->gate_type, (int)ctx->in_dim, &gate, + ctx->gate_base[slot] + row * ctx->gate_row_bytes[slot], + ctx->xq); + ds4_vec_dot_q5_q6_K_q8_K(ctx->up_type, (int)ctx->in_dim, &up, + ctx->up_base[slot] + row * ctx->up_row_bytes[slot], + ctx->xq); + + if (ctx->clamp > 1.0e-6f) { + if (gate > ctx->clamp) gate = ctx->clamp; + if (up > ctx->clamp) up = ctx->clamp; + if (up < -ctx->clamp) up = -ctx->clamp; + } + ctx->mid[idx] = silu(gate) * up * ctx->expert_weight[slot]; + } +} + +static void matvec_q5_q6_k_experts_mid_prequant( + float *mid, + const ds4_model *m, + const ds4_tensor *gate_w, + const ds4_tensor *up_w, + const block_q8_K *xq, + const int *selected, + const float *expert_weight, + int n_expert, + float clamp) { + if ((gate_w->type != DS4_TENSOR_Q5_K && gate_w->type != DS4_TENSOR_Q6_K) || + (up_w->type != DS4_TENSOR_Q5_K && up_w->type != DS4_TENSOR_Q6_K)) { + ds4_die("expected Q5_K/Q6_K expert tensors"); + } + if (n_expert < 1 || (uint32_t)n_expert > DS4_N_EXPERT_USED) ds4_die("unexpected routed expert count"); + + uint64_t in_dim0 = 0; + uint64_t out_dim0 = 0; + matvec_q5_q6_k_mid_ctx ctx = { + .mid = mid, + .xq = xq, + .clamp = clamp, + .gate_type = gate_w->type, + .up_type = up_w->type, + .n_expert = n_expert, + }; + + for (int i = 0; i < n_expert; i++) { + uint64_t gate_in_dim, gate_out_dim; + uint64_t up_in_dim, up_out_dim; + ctx.gate_base[i] = tensor_expert_bytes(m, gate_w, (uint32_t)selected[i], + &gate_in_dim, &gate_out_dim, &ctx.gate_row_bytes[i]); + ctx.up_base[i] = tensor_expert_bytes(m, up_w, (uint32_t)selected[i], + &up_in_dim, &up_out_dim, &ctx.up_row_bytes[i]); + if (gate_in_dim != up_in_dim || gate_out_dim != up_out_dim) { + ds4_die("paired Q5_K/Q6_K expert tensors do not match"); + } + if (i == 0) { + in_dim0 = gate_in_dim; + out_dim0 = gate_out_dim; + } else if (gate_in_dim != in_dim0 || gate_out_dim != out_dim0) { + ds4_die("Q5_K/Q6_K expert tensors do not share a layout"); + } + ctx.expert_weight[i] = expert_weight[i]; + } + if (in_dim0 % QK_K != 0) ds4_die("Q5_K/Q6_K expert row is not QK_K aligned"); + + ctx.in_dim = in_dim0; + ctx.out_dim = out_dim0; + ds4_parallel_for((uint64_t)n_expert * out_dim0, matvec_q5_q6_k_mid_worker, &ctx); +} + +static void matvec_q5_q6_k_expert( + float *out, + const ds4_model *m, + const ds4_tensor *w, + const float *x, + uint32_t expert) { + if (w->type != DS4_TENSOR_Q5_K && w->type != DS4_TENSOR_Q6_K) { + ds4_die("expected a Q5_K or Q6_K expert tensor"); + } + + uint64_t in_dim, out_dim, row_bytes; + const uint8_t *base = tensor_expert_bytes(m, w, expert, &in_dim, &out_dim, &row_bytes); + if (in_dim % QK_K != 0) ds4_die("Q5_K/Q6_K expert row is not QK_K aligned"); + + block_q8_K *xq = xmalloc((size_t)(in_dim / QK_K) * sizeof(xq[0])); + ds4_quantize_row_q8_K(x, xq, (int64_t)in_dim); + + matvec_q5_q6_k_ctx ctx = { + .out = out, + .base = base, + .xq = xq, + .in_dim = in_dim, + .row_bytes = row_bytes, + .type = w->type, + }; + ds4_parallel_for(out_dim, matvec_q5_q6_k_worker, &ctx); + + free(xq); +} + +typedef struct { + float *out; + const uint8_t *base[DS4_MAX_EXPERT_USED]; + const block_q8_K *xq[DS4_MAX_EXPERT_USED]; + uint64_t in_dim; + uint64_t row_bytes[DS4_MAX_EXPERT_USED]; + uint32_t type; + int n_expert; +} matvec_q5_q6_k_accum_ctx; + +static void matvec_q5_q6_k_accum_worker(void *vctx, uint64_t row0, uint64_t row1) { + matvec_q5_q6_k_accum_ctx *ctx = vctx; + + for (uint64_t row = row0; row < row1; row++) { + float acc = 0.0f; + for (int i = 0; i < ctx->n_expert; i++) { + float v = 0.0f; + ds4_vec_dot_q5_q6_K_q8_K(ctx->type, (int)ctx->in_dim, &v, + ctx->base[i] + row * ctx->row_bytes[i], + ctx->xq[i]); + acc += v; + } + ctx->out[row] = acc; + } +} + +static void matvec_q5_q6_k_experts_accum_prequant( + float *out, + const ds4_model *m, + const ds4_tensor *w, + const block_q8_K *xq, + const int *selected, + int n_expert) { + if (w->type != DS4_TENSOR_Q5_K && w->type != DS4_TENSOR_Q6_K) { + ds4_die("expected a Q5_K or Q6_K expert tensor"); + } + if (n_expert < 1 || (uint32_t)n_expert > DS4_N_EXPERT_USED) ds4_die("unexpected routed expert count"); + + uint64_t in_dim0 = 0; + uint64_t out_dim0 = 0; + const uint8_t *base[DS4_MAX_EXPERT_USED]; + uint64_t row_bytes[DS4_MAX_EXPERT_USED]; + + for (int i = 0; i < n_expert; i++) { + uint64_t in_dim, out_dim; + base[i] = tensor_expert_bytes(m, w, (uint32_t)selected[i], &in_dim, &out_dim, &row_bytes[i]); + if (i == 0) { + in_dim0 = in_dim; + out_dim0 = out_dim; + } else if (in_dim != in_dim0 || out_dim != out_dim0) { + ds4_die("Q5_K/Q6_K expert tensors do not share a layout"); + } + } + if (in_dim0 % QK_K != 0) ds4_die("Q5_K/Q6_K expert row is not QK_K aligned"); + + const uint64_t n_blocks = in_dim0 / QK_K; + matvec_q5_q6_k_accum_ctx ctx = { + .out = out, + .in_dim = in_dim0, + .type = w->type, + .n_expert = n_expert, + }; + for (int i = 0; i < n_expert; i++) { + ctx.base[i] = base[i]; + ctx.row_bytes[i] = row_bytes[i]; + ctx.xq[i] = xq + (uint64_t)i * n_blocks; + } + + ds4_parallel_for(out_dim0, matvec_q5_q6_k_accum_worker, &ctx); +} + /* Q4_K batch mid worker: same structure as IQ2_XXS batch but uses Q4_K dot. */ typedef struct { float *mid; @@ -6830,6 +8307,49 @@ static void matvec_q4_k_batch_accum_rows_worker(void *vctx, uint64_t row0, uint6 } } +typedef struct { + float *moe; + const uint8_t *base[DS4_MAX_EXPERT]; + const block_q8_K *midq; + const ds4_expert_pair *pairs; + const uint32_t *pair_ids; + const uint32_t *expert_offset; + const uint32_t *active_expert; + uint32_t n_active; + uint32_t n_tok; + uint64_t in_dim; + uint64_t out_dim; + uint64_t row_bytes[DS4_MAX_EXPERT]; + uint64_t midq_blocks; +} matvec_iq2_xxs_batch_accum_rows_ctx; + +static void matvec_iq2_xxs_batch_accum_rows_worker(void *vctx, uint64_t row0, uint64_t row1) { + matvec_iq2_xxs_batch_accum_rows_ctx *ctx = vctx; + + for (uint64_t row = row0; row < row1; row++) { + for (uint32_t t = 0; t < ctx->n_tok; t++) { + ctx->moe[(uint64_t)t * ctx->out_dim + row] = 0.0f; + } + + for (uint32_t ai = 0; ai < ctx->n_active; ai++) { + const uint32_t expert = ctx->active_expert[ai]; + const uint32_t begin = ctx->expert_offset[expert]; + const uint32_t end = ctx->expert_offset[expert + 1]; + const block_iq2_xxs *br = (const block_iq2_xxs *)(ctx->base[expert] + row * ctx->row_bytes[expert]); + + for (uint32_t i = begin; i < end; i++) { + const uint32_t pair_id = ctx->pair_ids[i]; + const ds4_expert_pair pair = ctx->pairs[pair_id]; + const block_q8_K *xq = ctx->midq + (uint64_t)pair_id * ctx->midq_blocks; + float v = 0.0f; + + ds4_vec_dot_iq2_xxs_q8_K((int)ctx->in_dim, &v, br, xq); + ctx->moe[(uint64_t)pair.token * ctx->out_dim + row] += v; + } + } + } +} + /* Dispatch: call the right gate/up mid builder based on tensor type. */ static void matvec_experts_mid_prequant( float *mid, @@ -6847,6 +8367,9 @@ static void matvec_experts_mid_prequant( } else if (gate_w->type == DS4_TENSOR_Q4_K) { matvec_q4_k_experts_mid_prequant(mid, m, gate_w, up_w, xq, selected, expert_weight, n_expert, clamp); + } else if (gate_w->type == DS4_TENSOR_Q5_K || gate_w->type == DS4_TENSOR_Q6_K) { + matvec_q5_q6_k_experts_mid_prequant(mid, m, gate_w, up_w, xq, + selected, expert_weight, n_expert, clamp); } else { ds4_die("unsupported gate/up expert tensor type"); } @@ -6860,10 +8383,14 @@ static void matvec_experts_down_accum_prequant( const block_q8_K *xq, const int *selected, int n_expert) { - if (w->type == DS4_TENSOR_Q2_K) { + if (w->type == DS4_TENSOR_IQ2_XXS) { + matvec_iq2_xxs_experts_accum_prequant(out, m, w, xq, selected, n_expert); + } else if (w->type == DS4_TENSOR_Q2_K) { matvec_q2_k_experts_accum_prequant(out, m, w, xq, selected, n_expert); } else if (w->type == DS4_TENSOR_Q4_K) { matvec_q4_k_experts_accum_prequant(out, m, w, xq, selected, n_expert); + } else if (w->type == DS4_TENSOR_Q5_K || w->type == DS4_TENSOR_Q6_K) { + matvec_q5_q6_k_experts_accum_prequant(out, m, w, xq, selected, n_expert); } else { ds4_die("unsupported down expert tensor type"); } @@ -6893,6 +8420,17 @@ static void matvec_expert_pair_prequant( const block_q4_K *ur = (const block_q4_K *)(base1 + row * rb1); ds4_vec_dot_q4_K_q8_K((int)in_dim0, &out1[row], ur, xq); } + } else if (w0->type == DS4_TENSOR_Q5_K || w0->type == DS4_TENSOR_Q6_K) { + uint64_t in_dim0, out_dim0, rb0; + uint64_t in_dim1, out_dim1, rb1; + const uint8_t *base0 = tensor_expert_bytes(m, w0, expert, &in_dim0, &out_dim0, &rb0); + const uint8_t *base1 = tensor_expert_bytes(m, w1, expert, &in_dim1, &out_dim1, &rb1); + if (in_dim0 != in_dim1 || out_dim0 != out_dim1) ds4_die("paired Q5_K/Q6_K expert tensors do not match"); + + for (uint64_t row = 0; row < out_dim0; row++) { + ds4_vec_dot_q5_q6_K_q8_K(w0->type, (int)in_dim0, &out0[row], base0 + row * rb0, xq); + ds4_vec_dot_q5_q6_K_q8_K(w1->type, (int)in_dim0, &out1[row], base1 + row * rb1, xq); + } } else { ds4_die("unsupported gate/up expert tensor type"); } @@ -6905,7 +8443,20 @@ static void matvec_expert_down( const ds4_tensor *w, const float *x, uint32_t expert) { - if (w->type == DS4_TENSOR_Q2_K) { + if (w->type == DS4_TENSOR_IQ2_XXS) { + uint64_t in_dim, out_dim, row_bytes; + const uint8_t *base = tensor_expert_bytes(m, w, expert, &in_dim, &out_dim, &row_bytes); + if (in_dim % QK_K != 0) ds4_die("IQ2_XXS expert row is not QK_K aligned"); + + block_q8_K *xq = xmalloc((size_t)(in_dim / QK_K) * sizeof(xq[0])); + ds4_quantize_row_q8_K(x, xq, (int64_t)in_dim); + + for (uint64_t row = 0; row < out_dim; row++) { + const block_iq2_xxs *br = (const block_iq2_xxs *)(base + row * row_bytes); + ds4_vec_dot_iq2_xxs_q8_K((int)in_dim, &out[row], br, xq); + } + free(xq); + } else if (w->type == DS4_TENSOR_Q2_K) { matvec_q2_k_expert(out, m, w, x, expert); } else if (w->type == DS4_TENSOR_Q4_K) { uint64_t in_dim, out_dim, row_bytes; @@ -6920,6 +8471,8 @@ static void matvec_expert_down( ds4_vec_dot_q4_K_q8_K((int)in_dim, &out[row], br, xq); } free(xq); + } else if (w->type == DS4_TENSOR_Q5_K || w->type == DS4_TENSOR_Q6_K) { + matvec_q5_q6_k_expert(out, m, w, x, expert); } else { ds4_die("unsupported down expert tensor type"); } @@ -8361,7 +9914,33 @@ static void layer_routed_moe_batch( /* Down projection: dispatch based on down tensor type. */ const uint32_t down_type = layer->ffn_down_exps->type; - if (down_type == DS4_TENSOR_Q2_K) { + if (down_type == DS4_TENSOR_IQ2_XXS) { + matvec_iq2_xxs_batch_accum_rows_ctx down_ctx = { + .moe = moe, + .midq = midq, + .pairs = pairs, + .pair_ids = pair_ids, + .expert_offset = counts, + .active_expert = active_expert, + .n_active = n_active, + .n_tok = n_tok, + .in_dim = down_in_dim, + .out_dim = down_out_dim, + .midq_blocks = midq_blocks, + }; + + for (uint32_t ai = 0; ai < n_active; ai++) { + const uint32_t e = active_expert[ai]; + uint64_t in_dim, out_dim; + down_ctx.base[e] = tensor_expert_bytes(model, layer->ffn_down_exps, e, + &in_dim, &out_dim, &down_ctx.row_bytes[e]); + if (in_dim != down_in_dim || out_dim != down_out_dim) { + ds4_die("batch expert tensor layout mismatch"); + } + } + + ds4_parallel_for(down_out_dim, matvec_iq2_xxs_batch_accum_rows_worker, &down_ctx); + } else if (down_type == DS4_TENSOR_Q2_K) { matvec_q2_k_batch_accum_rows_ctx down_ctx = { .moe = moe, .midq = midq, @@ -10831,6 +12410,803 @@ static void output_logits_one( free(embd); } +static void layer_glm_first_token_attention_one( + float * out, + const ds4_model * model, + const ds4_layer_weights * layer, + const float * x) { + float *norm = xmalloc((size_t)DS4_N_EMBD * sizeof(norm[0])); + float *kv_raw = xmalloc((size_t)layer->attn_kv_a_mqa->dim[1] * sizeof(kv_raw[0])); + float *kv_norm = xmalloc((size_t)DS4_N_KV_LORA * sizeof(kv_norm[0])); + float *heads = xmalloc((size_t)DS4_N_HEAD * DS4_N_VALUE_MLA * sizeof(heads[0])); + const uint64_t kv_blocks = (DS4_N_KV_LORA + 31) / 32; + int8_t *kvq = xmalloc((size_t)kv_blocks * 32); + float *kvscale = xmalloc((size_t)kv_blocks * sizeof(kvscale[0])); + + if (layer->attn_kv_a_mqa->dim[1] < DS4_N_KV_LORA || + layer->attn_v_b->dim[0] != DS4_N_KV_LORA || + layer->attn_v_b->dim[1] != DS4_N_VALUE_MLA || + layer->attn_v_b->dim[2] != DS4_N_HEAD || + layer->attn_output->dim[0] != (uint64_t)DS4_N_HEAD * DS4_N_VALUE_MLA || + layer->attn_output->dim[1] != DS4_N_EMBD) { + ds4_die("GLM attention tensors have an unexpected layout"); + } + + rms_norm_weight(norm, x, tensor_data(model, layer->attn_norm), DS4_N_EMBD, DS4_RMS_EPS); + matvec_q8_0(kv_raw, model, layer->attn_kv_a_mqa, norm); + rms_norm_weight(kv_norm, kv_raw, tensor_data(model, layer->attn_kv_a_norm), + DS4_N_KV_LORA, DS4_RMS_EPS); + quantize_q8_0_activation(kv_norm, kvq, kvscale, DS4_N_KV_LORA); + + for (uint32_t h = 0; h < DS4_N_HEAD; h++) { + matvec_q8_0_3d_slice_prequant(heads + (uint64_t)h * DS4_N_VALUE_MLA, + model, + layer->attn_v_b, + kvq, + kvscale, + h); + } + matvec_q8_0(out, model, layer->attn_output, heads); + + free(kvscale); + free(kvq); + free(heads); + free(kv_norm); + free(kv_raw); + free(norm); +} + +static void layer_glm_first_token_attention_one_f32_ref( + float * out, + const ds4_model * model, + const ds4_layer_weights * layer, + const float * x) { + float *norm = xmalloc((size_t)DS4_N_EMBD * sizeof(norm[0])); + float *kv_raw = xmalloc((size_t)layer->attn_kv_a_mqa->dim[1] * sizeof(kv_raw[0])); + float *kv_norm = xmalloc((size_t)DS4_N_KV_LORA * sizeof(kv_norm[0])); + float *heads = xmalloc((size_t)DS4_N_HEAD * DS4_N_VALUE_MLA * sizeof(heads[0])); + + if (layer->attn_kv_a_mqa->type != DS4_TENSOR_Q8_0 || + layer->attn_v_b->type != DS4_TENSOR_Q8_0 || + layer->attn_output->type != DS4_TENSOR_Q8_0 || + layer->attn_kv_a_mqa->dim[0] != DS4_N_EMBD || + layer->attn_kv_a_mqa->dim[1] < DS4_N_KV_LORA || + layer->attn_v_b->dim[0] != DS4_N_KV_LORA || + layer->attn_v_b->dim[1] != DS4_N_VALUE_MLA || + layer->attn_v_b->dim[2] != DS4_N_HEAD || + layer->attn_output->dim[0] != (uint64_t)DS4_N_HEAD * DS4_N_VALUE_MLA || + layer->attn_output->dim[1] != DS4_N_EMBD) { + ds4_die("GLM F32 attention reference found unexpected tensor layout"); + } + + rms_norm_weight(norm, x, tensor_data(model, layer->attn_norm), DS4_N_EMBD, DS4_RMS_EPS); + matvec_q8_0_f32_ref(kv_raw, model, layer->attn_kv_a_mqa, norm); + rms_norm_weight(kv_norm, kv_raw, tensor_data(model, layer->attn_kv_a_norm), + DS4_N_KV_LORA, DS4_RMS_EPS); + matvec_q8_0_f32_ref(heads, model, layer->attn_v_b, kv_norm); + matvec_q8_0_f32_ref(out, model, layer->attn_output, heads); + + free(heads); + free(kv_norm); + free(kv_raw); + free(norm); +} + +static void glm_k_b_project_f32_ref( + float * out, + const ds4_model * model, + const ds4_tensor * w, + const float * kv_norm) { + const uint32_t q_nope = DS4_N_KEY_MLA - DS4_N_ROT; + if (w->type != DS4_TENSOR_Q8_0 || + w->ndim != 3 || + w->dim[0] != q_nope || + w->dim[1] != DS4_N_KV_LORA || + w->dim[2] != DS4_N_HEAD) { + ds4_die("GLM k_b reference found unexpected tensor layout"); + } + + const uint8_t *data = tensor_data(model, w); + const uint64_t blocks = (q_nope + 31u) / 32u; + const uint64_t row_bytes = blocks * 34u; + memset(out, 0, (size_t)DS4_N_HEAD * q_nope * sizeof(out[0])); + + for (uint32_t h = 0; h < DS4_N_HEAD; h++) { + float *dst = out + (uint64_t)h * q_nope; + for (uint32_t j = 0; j < DS4_N_KV_LORA; j++) { + const uint8_t *row = + data + ((uint64_t)h * DS4_N_KV_LORA + j) * row_bytes; + const float xj = kv_norm[j]; + for (uint64_t b = 0; b < blocks; b++) { + uint16_t scale_bits; + memcpy(&scale_bits, row + b * 34u, sizeof(scale_bits)); + const int8_t *qs = (const int8_t *)(row + b * 34u + 2u); + const float d = f16_to_f32(scale_bits) * xj; + const uint32_t i0 = (uint32_t)b * 32u; + const uint32_t n = q_nope - i0 < 32u ? q_nope - i0 : 32u; + for (uint32_t i = 0; i < n; i++) { + dst[i0 + i] += d * (float)qs[i]; + } + } + } + } +} + +static void layer_glm_attention_prefill_f32_ref( + float * out, + const ds4_model * model, + const ds4_layer_weights * layer, + const float * x, + uint32_t n_tok, + uint32_t pos0, + uint32_t il) { + if (n_tok == 0) return; + const uint32_t qk_dim = DS4_N_KEY_MLA; + const uint32_t q_nope = qk_dim - DS4_N_ROT; + const uint64_t q_dim = (uint64_t)DS4_N_HEAD * qk_dim; + const uint64_t heads_dim = (uint64_t)DS4_N_HEAD * DS4_N_VALUE_MLA; + const uint64_t kv_raw_dim = layer->attn_kv_a_mqa ? layer->attn_kv_a_mqa->dim[1] : 0; + + if (!layer->attn_norm || + !layer->attn_q_a || + !layer->attn_q_a_norm || + !layer->attn_q_b || + !layer->attn_kv_a_mqa || + !layer->attn_kv_a_norm || + !layer->attn_k_b || + !layer->attn_v_b || + !layer->attn_output || + layer->attn_q_a->type != DS4_TENSOR_Q8_0 || + layer->attn_q_b->type != DS4_TENSOR_Q8_0 || + layer->attn_kv_a_mqa->type != DS4_TENSOR_Q8_0 || + layer->attn_k_b->type != DS4_TENSOR_Q8_0 || + layer->attn_v_b->type != DS4_TENSOR_Q8_0 || + layer->attn_output->type != DS4_TENSOR_Q8_0 || + layer->attn_norm->type != DS4_TENSOR_F32 || + layer->attn_q_a_norm->type != DS4_TENSOR_F32 || + layer->attn_kv_a_norm->type != DS4_TENSOR_F32 || + layer->attn_q_a->dim[0] != DS4_N_EMBD || + layer->attn_q_a->dim[1] != DS4_N_LORA_Q || + layer->attn_q_a_norm->dim[0] != DS4_N_LORA_Q || + layer->attn_q_b->dim[0] != DS4_N_LORA_Q || + layer->attn_q_b->dim[1] != q_dim || + layer->attn_kv_a_mqa->dim[0] != DS4_N_EMBD || + kv_raw_dim < (uint64_t)DS4_N_KV_LORA + DS4_N_ROT || + layer->attn_kv_a_norm->dim[0] != DS4_N_KV_LORA || + layer->attn_k_b->dim[0] != q_nope || + layer->attn_k_b->dim[1] != DS4_N_KV_LORA || + layer->attn_k_b->dim[2] != DS4_N_HEAD || + layer->attn_v_b->dim[0] != DS4_N_KV_LORA || + layer->attn_v_b->dim[1] != DS4_N_VALUE_MLA || + layer->attn_v_b->dim[2] != DS4_N_HEAD || + layer->attn_output->dim[0] != heads_dim || + layer->attn_output->dim[1] != DS4_N_EMBD) { + ds4_die("GLM prefill attention reference found unexpected tensor layout"); + } + + float *norm = xmalloc((size_t)n_tok * DS4_N_EMBD * sizeof(norm[0])); + float *q_rank = xmalloc((size_t)n_tok * DS4_N_LORA_Q * sizeof(q_rank[0])); + float *q_rank_norm = xmalloc((size_t)n_tok * DS4_N_LORA_Q * sizeof(q_rank_norm[0])); + float *q = xmalloc((size_t)n_tok * q_dim * sizeof(q[0])); + float *kv_raw = xmalloc((size_t)n_tok * kv_raw_dim * sizeof(kv_raw[0])); + float *kv_norm = xmalloc((size_t)n_tok * DS4_N_KV_LORA * sizeof(kv_norm[0])); + float *k_nope = xmalloc((size_t)n_tok * DS4_N_HEAD * q_nope * sizeof(k_nope[0])); + float *key_cache = xmalloc((size_t)n_tok * DS4_N_HEAD * qk_dim * sizeof(key_cache[0])); + float *value_cache = xmalloc((size_t)n_tok * heads_dim * sizeof(value_cache[0])); + float *heads = xmalloc((size_t)n_tok * heads_dim * sizeof(heads[0])); + float *k_rot = xmalloc((size_t)DS4_N_ROT * sizeof(k_rot[0])); + float *scores = xmalloc((size_t)n_tok * sizeof(scores[0])); + + for (uint32_t t = 0; t < n_tok; t++) { + const float *xt = x + (uint64_t)t * DS4_N_EMBD; + float *norm_t = norm + (uint64_t)t * DS4_N_EMBD; + float *qr_t = q_rank + (uint64_t)t * DS4_N_LORA_Q; + float *qrn_t = q_rank_norm + (uint64_t)t * DS4_N_LORA_Q; + float *q_t = q + (uint64_t)t * q_dim; + float *raw_t = kv_raw + (uint64_t)t * kv_raw_dim; + float *kvn_t = kv_norm + (uint64_t)t * DS4_N_KV_LORA; + float *kn_t = k_nope + (uint64_t)t * DS4_N_HEAD * q_nope; + float *kc_t = key_cache + (uint64_t)t * DS4_N_HEAD * qk_dim; + float *vc_t = value_cache + (uint64_t)t * heads_dim; + + rms_norm_weight(norm_t, xt, tensor_data(model, layer->attn_norm), + DS4_N_EMBD, DS4_RMS_EPS); + matvec_q8_0_f32_ref(qr_t, model, layer->attn_q_a, norm_t); + rms_norm_weight(qrn_t, qr_t, tensor_data(model, layer->attn_q_a_norm), + DS4_N_LORA_Q, DS4_RMS_EPS); + matvec_q8_0_f32_ref(q_t, model, layer->attn_q_b, qrn_t); + rope_tail_layer_inplace(q_t, DS4_N_HEAD, qk_dim, DS4_N_ROT, + pos0 + t, il, false); + + matvec_q8_0_f32_ref(raw_t, model, layer->attn_kv_a_mqa, norm_t); + rms_norm_weight(kvn_t, raw_t, tensor_data(model, layer->attn_kv_a_norm), + DS4_N_KV_LORA, DS4_RMS_EPS); + glm_k_b_project_f32_ref(kn_t, model, layer->attn_k_b, kvn_t); + matvec_q8_0_f32_ref(vc_t, model, layer->attn_v_b, kvn_t); + + memcpy(k_rot, raw_t + DS4_N_KV_LORA, (size_t)DS4_N_ROT * sizeof(k_rot[0])); + rope_tail_layer_inplace(k_rot, 1, DS4_N_ROT, DS4_N_ROT, + pos0 + t, il, false); + for (uint32_t h = 0; h < DS4_N_HEAD; h++) { + float *kd = kc_t + (uint64_t)h * qk_dim; + memcpy(kd, kn_t + (uint64_t)h * q_nope, + (size_t)q_nope * sizeof(kd[0])); + memcpy(kd + q_nope, k_rot, (size_t)DS4_N_ROT * sizeof(kd[0])); + } + } + + const float scale = 1.0f / sqrtf((float)qk_dim); + for (uint32_t t = 0; t < n_tok; t++) { + const uint32_t visible = t + 1u; + for (uint32_t h = 0; h < DS4_N_HEAD; h++) { + const float *q_h = q + ((uint64_t)t * DS4_N_HEAD + h) * qk_dim; + float max_score = -FLT_MAX; + for (uint32_t s = 0; s < visible; s++) { + const float *k_h = + key_cache + ((uint64_t)s * DS4_N_HEAD + h) * qk_dim; + float dot = 0.0f; + for (uint32_t i = 0; i < qk_dim; i++) dot += q_h[i] * k_h[i]; + scores[s] = dot * scale; + if (scores[s] > max_score) max_score = scores[s]; + } + + float denom = 0.0f; + for (uint32_t s = 0; s < visible; s++) { + scores[s] = expf(scores[s] - max_score); + denom += scores[s]; + } + if (denom < 1.0e-20f) denom = 1.0e-20f; + + float *head_out = + heads + ((uint64_t)t * DS4_N_HEAD + h) * DS4_N_VALUE_MLA; + for (uint32_t d = 0; d < DS4_N_VALUE_MLA; d++) { + float acc = 0.0f; + for (uint32_t s = 0; s < visible; s++) { + const float *v_h = + value_cache + ((uint64_t)s * DS4_N_HEAD + h) * DS4_N_VALUE_MLA; + acc += scores[s] * v_h[d]; + } + head_out[d] = acc / denom; + } + } + + matvec_q8_0_f32_ref(out + (uint64_t)t * DS4_N_EMBD, + model, + layer->attn_output, + heads + (uint64_t)t * heads_dim); + } + + free(scores); + free(k_rot); + free(heads); + free(value_cache); + free(key_cache); + free(k_nope); + free(kv_norm); + free(kv_raw); + free(q); + free(q_rank_norm); + free(q_rank); + free(norm); +} + +static void layer_glm_dense_ffn_one( + float * out, + const ds4_model * model, + const ds4_layer_weights * layer, + const float * x) { + const uint64_t hidden = layer->ffn_gate->dim[1]; + const uint64_t in_dim = layer->ffn_gate->dim[0]; + const uint64_t blocks = (in_dim + 31) / 32; + float *gate = xmalloc((size_t)hidden * sizeof(gate[0])); + float *up = xmalloc((size_t)hidden * sizeof(up[0])); + float *mid = xmalloc((size_t)hidden * sizeof(mid[0])); + int8_t *xq = xmalloc((size_t)blocks * 32); + float *xscale = xmalloc((size_t)blocks * sizeof(xscale[0])); + + if (layer->ffn_gate->type != DS4_TENSOR_Q8_0 || + layer->ffn_up->type != DS4_TENSOR_Q8_0 || + layer->ffn_down->type != DS4_TENSOR_Q8_0 || + layer->ffn_up->dim[0] != in_dim || + layer->ffn_up->dim[1] != hidden || + layer->ffn_down->dim[0] != hidden || + layer->ffn_down->dim[1] != DS4_N_EMBD) { + ds4_die("GLM dense FFN tensors have an unexpected layout"); + } + + quantize_q8_0_activation(x, xq, xscale, in_dim); + matvec_q8_0_pair_prequant(gate, up, model, layer->ffn_gate, layer->ffn_up, xq, xscale); + swiglu(mid, gate, up, hidden, 0.0f); + matvec_q8_0(out, model, layer->ffn_down, mid); + + free(xscale); + free(xq); + free(mid); + free(up); + free(gate); +} + +static void layer_glm_dense_ffn_one_f32_ref( + float * out, + const ds4_model * model, + const ds4_layer_weights * layer, + const float * x) { + const uint64_t hidden = layer->ffn_gate->dim[1]; + const uint64_t in_dim = layer->ffn_gate->dim[0]; + float *gate = xmalloc((size_t)hidden * sizeof(gate[0])); + float *up = xmalloc((size_t)hidden * sizeof(up[0])); + float *mid = xmalloc((size_t)hidden * sizeof(mid[0])); + + if (layer->ffn_gate->type != DS4_TENSOR_Q8_0 || + layer->ffn_up->type != DS4_TENSOR_Q8_0 || + layer->ffn_down->type != DS4_TENSOR_Q8_0 || + layer->ffn_up->dim[0] != in_dim || + layer->ffn_up->dim[1] != hidden || + layer->ffn_down->dim[0] != hidden || + layer->ffn_down->dim[1] != DS4_N_EMBD) { + ds4_die("GLM F32 dense FFN reference found unexpected tensor layout"); + } + + matvec_q8_0_f32_ref(gate, model, layer->ffn_gate, x); + matvec_q8_0_f32_ref(up, model, layer->ffn_up, x); + swiglu(mid, gate, up, hidden, 0.0f); + matvec_q8_0_f32_ref(out, model, layer->ffn_down, mid); + + free(mid); + free(up); + free(gate); +} + +static void layer_glm_router_selected_experts( + int selected[DS4_MAX_EXPERT_USED], + float expert_weight[DS4_MAX_EXPERT_USED], + const ds4_model *model, + const ds4_layer_weights *layer, + const float *x) { + float logits[DS4_MAX_EXPERT]; + float probs[DS4_MAX_EXPERT]; + float selection[DS4_MAX_EXPERT]; + const float *bias = tensor_data(model, layer->ffn_exp_probs_b); + + matvec_any(logits, model, layer->ffn_gate_inp, x); + for (uint32_t i = 0; i < DS4_N_EXPERT; i++) { + probs[i] = sigmoid_stable(logits[i]); + selection[i] = probs[i] + bias[i]; + } + + topk_desc(selection, (int)DS4_N_EXPERT, (int)DS4_N_EXPERT_USED, selected); + + float sum = 0.0f; + for (uint32_t i = 0; i < DS4_N_EXPERT_USED; i++) { + if (selected[i] < 0 || (uint32_t)selected[i] >= DS4_N_EXPERT) { + ds4_die("GLM selected expert is outside router range"); + } + expert_weight[i] = probs[selected[i]]; + sum += expert_weight[i]; + } + if (sum < 6.103515625e-5f) sum = 6.103515625e-5f; + for (uint32_t i = 0; i < DS4_N_EXPERT_USED; i++) { + expert_weight[i] = expert_weight[i] / sum * DS4_EXPERT_WEIGHT_SCALE; + } +} + +typedef struct { + float *mid; + const float *x; + const uint8_t *gate_base[DS4_MAX_EXPERT_USED]; + const uint8_t *up_base[DS4_MAX_EXPERT_USED]; + float expert_weight[DS4_MAX_EXPERT_USED]; + uint64_t in_dim; + uint64_t out_dim; + uint64_t gate_row_bytes[DS4_MAX_EXPERT_USED]; + uint64_t up_row_bytes[DS4_MAX_EXPERT_USED]; + uint32_t gate_type; + uint32_t up_type; + uint32_t n_expert; +} glm_routed_moe_f32_mid_ctx; + +static bool glm_graph_gate_pair_type_supported(uint32_t gate_type, uint32_t up_type); +static bool glm_graph_down_type_supported(uint32_t down_type); + +static float glm_routed_moe_dot_f32(uint32_t type, int n, const uint8_t *row, const float *x) { + if (type == DS4_TENSOR_IQ2_XXS) { + return ds4_vec_dot_iq2_xxs_f32(n, (const block_iq2_xxs *)row, x); + } + if (type == DS4_TENSOR_Q2_K) { + return ds4_vec_dot_q2_K_f32(n, (const block_q2_K *)row, x); + } + if (type == DS4_TENSOR_Q4_K) { + return ds4_vec_dot_q4_K_f32(n, (const block_q4_K *)row, x); + } + if (type == DS4_TENSOR_Q5_K || type == DS4_TENSOR_Q6_K) { + return ds4_vec_dot_q5_q6_K_f32(type, n, row, x); + } + ds4_die("GLM F32 routed-MoE reference encountered unsupported expert tensor type"); + return 0.0f; +} + +static void glm_routed_moe_f32_mid_worker(void *vctx, uint64_t row0, uint64_t row1) { + glm_routed_moe_f32_mid_ctx *ctx = vctx; + + for (uint64_t idx = row0; idx < row1; idx++) { + const uint32_t slot = (uint32_t)(idx / ctx->out_dim); + const uint64_t row = idx - (uint64_t)slot * ctx->out_dim; + const uint8_t *gate_row = ctx->gate_base[slot] + row * ctx->gate_row_bytes[slot]; + const uint8_t *up_row = ctx->up_base[slot] + row * ctx->up_row_bytes[slot]; + const float gate = glm_routed_moe_dot_f32(ctx->gate_type, (int)ctx->in_dim, gate_row, ctx->x); + const float up = glm_routed_moe_dot_f32(ctx->up_type, (int)ctx->in_dim, up_row, ctx->x); + ctx->mid[idx] = silu(gate) * up * ctx->expert_weight[slot]; + } +} + +typedef struct { + float *out; + const float *mid; + const uint8_t *down_base[DS4_MAX_EXPERT_USED]; + uint64_t in_dim; + uint64_t out_dim; + uint64_t down_row_bytes[DS4_MAX_EXPERT_USED]; + uint32_t down_type; + uint32_t n_expert; +} glm_routed_moe_f32_down_ctx; + +static void glm_routed_moe_f32_down_worker(void *vctx, uint64_t row0, uint64_t row1) { + glm_routed_moe_f32_down_ctx *ctx = vctx; + + for (uint64_t row = row0; row < row1; row++) { + float acc = 0.0f; + for (uint32_t slot = 0; slot < ctx->n_expert; slot++) { + const uint8_t *down_row = ctx->down_base[slot] + row * ctx->down_row_bytes[slot]; + acc += glm_routed_moe_dot_f32(ctx->down_type, + (int)ctx->in_dim, + down_row, + ctx->mid + (uint64_t)slot * ctx->in_dim); + } + ctx->out[row] = acc; + } +} + +static void layer_glm_routed_moe_one_f32_ref( + float *out, + float *mid_all, + const ds4_model *model, + const ds4_layer_weights *layer, + const float *x, + const int *selected, + const float *expert_weight) { + if (!layer->ffn_gate_exps || !layer->ffn_up_exps || !layer->ffn_down_exps || + !tensor_is_routed_expert_type(layer->ffn_gate_exps->type) || + !tensor_is_routed_expert_type(layer->ffn_up_exps->type) || + !glm_graph_gate_pair_type_supported(layer->ffn_gate_exps->type, + layer->ffn_up_exps->type) || + !glm_graph_down_type_supported(layer->ffn_down_exps->type)) { + ds4_die("GLM F32 routed-MoE reference expects supported matching routed gate/up tensors and down tensors"); + } + + glm_routed_moe_f32_mid_ctx mid_ctx = { + .mid = mid_all, + .x = x, + .gate_type = layer->ffn_gate_exps->type, + .up_type = layer->ffn_up_exps->type, + .n_expert = DS4_N_EXPERT_USED, + }; + glm_routed_moe_f32_down_ctx down_ctx = { + .out = out, + .mid = mid_all, + .down_type = layer->ffn_down_exps->type, + .n_expert = DS4_N_EXPERT_USED, + }; + + uint64_t gate_in0 = 0, gate_out0 = 0; + uint64_t down_in0 = 0, down_out0 = 0; + for (uint32_t slot = 0; slot < DS4_N_EXPERT_USED; slot++) { + uint64_t gate_in, gate_out, up_in, up_out, down_in, down_out; + if (selected[slot] < 0 || (uint32_t)selected[slot] >= DS4_N_EXPERT) { + ds4_die("GLM F32 routed-MoE reference selected expert is outside range"); + } + mid_ctx.gate_base[slot] = + tensor_expert_bytes(model, layer->ffn_gate_exps, (uint32_t)selected[slot], + &gate_in, &gate_out, &mid_ctx.gate_row_bytes[slot]); + mid_ctx.up_base[slot] = + tensor_expert_bytes(model, layer->ffn_up_exps, (uint32_t)selected[slot], + &up_in, &up_out, &mid_ctx.up_row_bytes[slot]); + down_ctx.down_base[slot] = + tensor_expert_bytes(model, layer->ffn_down_exps, (uint32_t)selected[slot], + &down_in, &down_out, &down_ctx.down_row_bytes[slot]); + if (gate_in != up_in || gate_out != up_out || + down_in != gate_out || down_out != DS4_N_EMBD) { + ds4_die("GLM F32 routed-MoE reference found mismatched expert layouts"); + } + if (slot == 0) { + gate_in0 = gate_in; + gate_out0 = gate_out; + down_in0 = down_in; + down_out0 = down_out; + } else if (gate_in != gate_in0 || gate_out != gate_out0 || + down_in != down_in0 || down_out != down_out0) { + ds4_die("GLM F32 routed-MoE reference expert layouts are not uniform"); + } + mid_ctx.expert_weight[slot] = expert_weight[slot]; + } + + if (gate_in0 != DS4_N_EMBD || gate_in0 % QK_K != 0 || + down_in0 != DS4_N_FF_EXP || down_in0 % QK_K != 0 || + gate_out0 != DS4_N_FF_EXP || down_out0 != DS4_N_EMBD) { + ds4_die("GLM F32 routed-MoE reference found unexpected GLM expert dimensions"); + } + + mid_ctx.in_dim = gate_in0; + mid_ctx.out_dim = gate_out0; + down_ctx.in_dim = down_in0; + down_ctx.out_dim = down_out0; + ds4_parallel_for((uint64_t)DS4_N_EXPERT_USED * gate_out0, + glm_routed_moe_f32_mid_worker, + &mid_ctx); + ds4_parallel_for(down_out0, glm_routed_moe_f32_down_worker, &down_ctx); +} + +static void layer_glm_shared_ffn_one_f32_ref( + float *out, + const ds4_model *model, + const ds4_layer_weights *layer, + const float *x) { + const uint64_t in_dim = layer->ffn_gate_shexp ? layer->ffn_gate_shexp->dim[0] : 0; + const uint64_t hidden = layer->ffn_gate_shexp ? layer->ffn_gate_shexp->dim[1] : 0; + if (!layer->ffn_gate_shexp || + !layer->ffn_up_shexp || + !layer->ffn_down_shexp || + layer->ffn_gate_shexp->type != DS4_TENSOR_Q8_0 || + layer->ffn_up_shexp->type != DS4_TENSOR_Q8_0 || + layer->ffn_down_shexp->type != DS4_TENSOR_Q8_0 || + layer->ffn_up_shexp->dim[0] != in_dim || + layer->ffn_up_shexp->dim[1] != hidden || + layer->ffn_down_shexp->dim[0] != hidden || + layer->ffn_down_shexp->dim[1] != DS4_N_EMBD || + in_dim != DS4_N_EMBD || + hidden != DS4_N_FF_EXP) { + ds4_die("GLM F32 shared expert reference found unexpected tensor layout"); + } + + float *gate = xmalloc((size_t)hidden * sizeof(gate[0])); + float *up = xmalloc((size_t)hidden * sizeof(up[0])); + float *mid = xmalloc((size_t)hidden * sizeof(mid[0])); + + matvec_q8_0_f32_ref(gate, model, layer->ffn_gate_shexp, x); + matvec_q8_0_f32_ref(up, model, layer->ffn_up_shexp, x); + swiglu(mid, gate, up, hidden, 0.0f); + matvec_q8_0_f32_ref(out, model, layer->ffn_down_shexp, mid); + + free(mid); + free(up); + free(gate); +} + +static void layer_glm_ffn_one_f32_ref( + float *out, + const ds4_model *model, + const ds4_layer_weights *layer, + const float *x, + uint32_t il) { + float *norm = xmalloc((size_t)DS4_N_EMBD * sizeof(norm[0])); + + rms_norm_weight(norm, x, tensor_data(model, layer->ffn_norm), DS4_N_EMBD, DS4_RMS_EPS); + if (il < DS4_N_LEADING_DENSE) { + layer_glm_dense_ffn_one_f32_ref(out, model, layer, norm); + } else { + int selected[DS4_MAX_EXPERT_USED]; + float expert_weight[DS4_MAX_EXPERT_USED]; + float *mid = xmalloc((size_t)DS4_N_EXPERT_USED * DS4_N_FF_EXP * sizeof(mid[0])); + float *moe = xmalloc((size_t)DS4_N_EMBD * sizeof(moe[0])); + float *shared = xmalloc((size_t)DS4_N_EMBD * sizeof(shared[0])); + + layer_glm_router_selected_experts(selected, expert_weight, model, layer, norm); + layer_glm_routed_moe_one_f32_ref(moe, mid, model, layer, norm, + selected, expert_weight); + layer_glm_shared_ffn_one_f32_ref(shared, model, layer, norm); + for (uint32_t i = 0; i < DS4_N_EMBD; i++) out[i] = moe[i] + shared[i]; + + free(shared); + free(moe); + free(mid); + } + + free(norm); +} + +static void layer_glm_first_token_one_f32_ref( + float *out, + const ds4_model *model, + const ds4_layer_weights *layer, + const float *x, + uint32_t il) { + float *attn_out = xmalloc((size_t)DS4_N_EMBD * sizeof(attn_out[0])); + float *after_attn = xmalloc((size_t)DS4_N_EMBD * sizeof(after_attn[0])); + float *ffn_out = xmalloc((size_t)DS4_N_EMBD * sizeof(ffn_out[0])); + + layer_glm_first_token_attention_one_f32_ref(attn_out, model, layer, x); + for (uint32_t i = 0; i < DS4_N_EMBD; i++) after_attn[i] = x[i] + attn_out[i]; + + layer_glm_ffn_one_f32_ref(ffn_out, model, layer, after_attn, il); + for (uint32_t i = 0; i < DS4_N_EMBD; i++) out[i] = after_attn[i] + ffn_out[i]; + + free(ffn_out); + free(after_attn); + free(attn_out); +} + +static void forward_glm_first_token_cpu_f32_ref( + float *out_hidden, + const ds4_model *model, + const ds4_weights *weights, + int token) { + float *cur = xmalloc((size_t)DS4_N_EMBD * sizeof(cur[0])); + float *next = xmalloc((size_t)DS4_N_EMBD * sizeof(next[0])); + const uint32_t normal_layers = DS4_N_LAYER - DS4_N_NEXTN_PREDICT; + + embed_token_any(model, weights, token, cur); + for (uint32_t il = 0; il < normal_layers; il++) { + layer_glm_first_token_one_f32_ref(next, model, &weights->layer[il], cur, il); + float *tmp = cur; + cur = next; + next = tmp; + } + + memcpy(out_hidden, cur, (size_t)DS4_N_EMBD * sizeof(out_hidden[0])); + + free(next); + free(cur); +} + +static void output_logits_glm_one_f32_ref( + float *logits, + const ds4_model *model, + const ds4_weights *weights, + const float *hidden) { + float *norm = xmalloc((size_t)DS4_N_EMBD * sizeof(norm[0])); + + rms_norm_weight(norm, hidden, tensor_data(model, weights->output_norm), DS4_N_EMBD, DS4_RMS_EPS); + matvec_q8_0_f32_ref(logits, model, weights->output, norm); + + free(norm); +} + +static void layer_glm_routed_moe_one( + float * out, + const ds4_model * model, + const ds4_layer_weights * layer, + const float * x, + uint32_t il) { + int selected[DS4_MAX_EXPERT_USED]; + float expert_weight[DS4_MAX_EXPERT_USED]; + const uint64_t expert_in_dim = layer->ffn_gate_exps->dim[0]; + const uint64_t down_in_dim = layer->ffn_down_exps->dim[0]; + float *mid_all = xmalloc((size_t)DS4_N_EXPERT_USED * DS4_N_FF_EXP * sizeof(mid_all[0])); + block_q8_K *xq = xmalloc((size_t)(expert_in_dim / QK_K) * sizeof(xq[0])); + block_q8_K *midq = xmalloc((size_t)DS4_N_EXPERT_USED * (down_in_dim / QK_K) * sizeof(midq[0])); + + if (expert_in_dim != DS4_N_EMBD || expert_in_dim % QK_K != 0 || + down_in_dim != DS4_N_FF_EXP || down_in_dim % QK_K != 0) { + ds4_die("GLM routed expert tensors have an unexpected layout"); + } + + memset(out, 0, (size_t)DS4_N_EMBD * sizeof(out[0])); + ds4_quantize_row_q8_K(x, xq, (int64_t)expert_in_dim); + layer_glm_router_selected_experts(selected, expert_weight, model, layer, x); + + matvec_experts_mid_prequant(mid_all, model, + layer->ffn_gate_exps, + layer->ffn_up_exps, + xq, + selected, + expert_weight, + DS4_N_EXPERT_USED, + 0.0f); + for (uint32_t i = 0; i < DS4_N_EXPERT_USED; i++) { + ds4_quantize_row_q8_K(mid_all + (uint64_t)i * down_in_dim, + midq + (uint64_t)i * (down_in_dim / QK_K), + (int64_t)down_in_dim); + } + matvec_experts_down_accum_prequant(out, model, layer->ffn_down_exps, midq, + selected, DS4_N_EXPERT_USED); + + free(midq); + free(xq); + free(mid_all); + (void)il; +} + +static void layer_glm_sparse_ffn_one( + float * out, + const ds4_model * model, + const ds4_layer_weights * layer, + const float * x, + uint32_t il) { + float *moe = xmalloc((size_t)DS4_N_EMBD * sizeof(moe[0])); + float *shared = xmalloc((size_t)DS4_N_EMBD * sizeof(shared[0])); + + layer_glm_routed_moe_one(moe, model, layer, x, il); + layer_shared_ffn_one(shared, model, layer, x); + for (uint32_t i = 0; i < DS4_N_EMBD; i++) out[i] = moe[i] + shared[i]; + + free(shared); + free(moe); +} + +static void layer_glm_ffn_one( + float * out, + const ds4_model * model, + const ds4_layer_weights * layer, + const float * x, + uint32_t il) { + float *norm = xmalloc((size_t)DS4_N_EMBD * sizeof(norm[0])); + + rms_norm_weight(norm, x, tensor_data(model, layer->ffn_norm), DS4_N_EMBD, DS4_RMS_EPS); + if (il < DS4_N_LEADING_DENSE) { + layer_glm_dense_ffn_one(out, model, layer, norm); + } else { + layer_glm_sparse_ffn_one(out, model, layer, norm, il); + } + + free(norm); +} + +static void layer_glm_first_token_one( + float * out, + const ds4_model * model, + const ds4_layer_weights * layer, + const float * x, + uint32_t il) { + float *attn_out = xmalloc((size_t)DS4_N_EMBD * sizeof(attn_out[0])); + float *after_attn = xmalloc((size_t)DS4_N_EMBD * sizeof(after_attn[0])); + float *ffn_out = xmalloc((size_t)DS4_N_EMBD * sizeof(ffn_out[0])); + + layer_glm_first_token_attention_one(attn_out, model, layer, x); + for (uint32_t i = 0; i < DS4_N_EMBD; i++) after_attn[i] = x[i] + attn_out[i]; + + layer_glm_ffn_one(ffn_out, model, layer, after_attn, il); + for (uint32_t i = 0; i < DS4_N_EMBD; i++) out[i] = after_attn[i] + ffn_out[i]; + + free(ffn_out); + free(after_attn); + free(attn_out); +} + +static void forward_glm_first_token_cpu( + float * out_hidden, + const ds4_model * model, + const ds4_weights * weights, + int token) { + float *cur = xmalloc((size_t)DS4_N_EMBD * sizeof(cur[0])); + float *next = xmalloc((size_t)DS4_N_EMBD * sizeof(next[0])); + const uint32_t normal_layers = DS4_N_LAYER - DS4_N_NEXTN_PREDICT; + + embed_token_any(model, weights, token, cur); + for (uint32_t il = 0; il < normal_layers; il++) { + layer_glm_first_token_one(next, model, &weights->layer[il], cur, il); + float *tmp = cur; + cur = next; + next = tmp; + } + + memcpy(out_hidden, cur, (size_t)DS4_N_EMBD * sizeof(out_hidden[0])); + + free(next); + free(cur); +} + +static void output_logits_glm_one( + float * logits, + const ds4_model * model, + const ds4_weights * weights, + const float * hidden) { + float *norm = xmalloc((size_t)DS4_N_EMBD * sizeof(norm[0])); + + rms_norm_weight(norm, hidden, tensor_data(model, weights->output_norm), DS4_N_EMBD, DS4_RMS_EPS); + matvec_q8_0(logits, model, weights->output, norm); + + free(norm); +} + /* Allocation-free logits head for CPU decode. */ static void output_logits_one_decode_scratch( float * logits, @@ -10927,6 +13303,8 @@ static void print_vec_stats(const char *name, const float *x, uint64_t n) { #define DS4_GPU_ATTN_COMP_CACHE_F16 0 #endif +#define DS4_GPU_GLM_COMPACT_CACHE_F16 DS4_GPU_ATTN_COMP_CACHE_F16 + /* ========================================================================= * Metal Release Graph State. * ========================================================================= @@ -11157,11 +13535,9 @@ typedef struct { /* Tensor parallelism (misc/METAL_TENSOR_PARALLELISM.md). tp_world 2 * splits the heavy per-layer matvecs across two lockstep machines; the * slot views alias the engine-owned transport slab where partial block - * outputs are exchanged. tp_null_split is the bring-up mode: both - * ranks compute full outputs and adopt rank 0's copy bit-exactly. */ + * outputs are exchanged. */ uint32_t tp_world; uint32_t tp_rank; - bool tp_null_split; ds4_gpu_tensor **tp_out; /* [layer * 2 + gate] local partial slots */ ds4_gpu_tensor **tp_in; /* peer partial slots */ ds4_gpu_tensor **tp_batch_out; /* [layer] verify-block row partial slots */ @@ -11648,6 +14024,10 @@ static void metal_graph_debug_dump_tensor( uint32_t il, uint32_t pos) { const char *prefix = getenv("DS4_METAL_GRAPH_DUMP_PREFIX"); + if (getenv("DS4_METAL_GRAPH_DUMP_TRACE")) + fprintf(stderr, "ds4: dump? name=%s il=%u pos=%u t=%p n=%llu wants=%d\n", + name, il, pos, (void *)t, (unsigned long long)n_f32, + metal_graph_debug_wants(name, il, pos)); if (!t || n_f32 == 0 || !metal_graph_debug_wants(name, il, pos)) return; if (ds4_gpu_synchronize() == 0) { @@ -13414,13 +15794,34 @@ static bool metal_graph_stream_prefill_layer_pagein_start( job->n_tokens = n_tokens; if (pread_only) { - if (!metal_graph_stream_prefill_layer_pread_enabled(g)) return true; + if (g) { + if (!metal_graph_stream_prefill_layer_pread_enabled(g)) return true; + } else if (getenv("DS4_METAL_DISABLE_STREAMING_PREFILL_LAYER_PREAD") != NULL || + getenv("DS4_METAL_DISABLE_STREAMING_PREFILL_LAYER_PREPARE") != NULL) { + return true; + } } else if (readahead_only) { - if (!metal_graph_stream_prefill_layer_readahead_enabled(g)) return true; + if (g) { + if (!metal_graph_stream_prefill_layer_readahead_enabled(g)) return true; + } else if (getenv("DS4_METAL_ENABLE_STREAMING_PREFILL_LAYER_READAHEAD") == NULL || + getenv("DS4_METAL_DISABLE_STREAMING_PREFILL_LAYER_READAHEAD") != NULL || + getenv("DS4_METAL_DISABLE_STREAMING_PREFILL_LAYER_PREPARE") != NULL) { + return true; + } } else if (madvise_only) { - if (!metal_graph_stream_prefill_layer_madvise_enabled(g)) return true; - } else if (!metal_graph_stream_prefill_layer_pagein_enabled(g)) { - return true; + if (g) { + if (!metal_graph_stream_prefill_layer_madvise_enabled(g)) return true; + } else if (getenv("DS4_METAL_DISABLE_STREAMING_PREFILL_LAYER_PREPARE") != NULL || + getenv("DS4_METAL_DISABLE_STREAMING_PREFILL_LAYER_MADVISE") != NULL) { + return true; + } + } else { + if (g) { + if (!metal_graph_stream_prefill_layer_pagein_enabled(g)) return true; + } else if (getenv("DS4_METAL_ENABLE_STREAMING_PREFILL_LAYER_PAGEIN") == NULL || + getenv("DS4_METAL_DISABLE_STREAMING_PREFILL_LAYER_PAGEIN") != NULL) { + return true; + } } if (!model || !weights || il >= DS4_N_LAYER) return false; @@ -14437,6 +16838,74 @@ static bool metal_graph_matmul_plain_tensor( uint64_t out_dim, const ds4_gpu_tensor *x, uint64_t n_tok); +static bool metal_graph_matmul_dense_quant_tensor( + ds4_gpu_tensor *out, + const ds4_model *model, + const ds4_tensor *w, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok); +static bool metal_graph_dense_quant_row_bytes( + const ds4_tensor *w, + uint64_t in_dim, + uint64_t *row_bytes); +static bool metal_graph_matmul_dense_quant_abs( + ds4_gpu_tensor *out, + const ds4_model *model, + const ds4_tensor *w, + uint64_t weight_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok); +static bool metal_graph_matmul_dense_quant_kslice( + ds4_gpu_tensor *out, + const ds4_model *model, + const ds4_tensor *w, + uint64_t full_in_dim, + uint64_t k_off, + uint64_t k_cnt, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t x_elem_off); +static bool metal_graph_attention_output_dense_quant_low( + ds4_gpu_tensor *low, + ds4_gpu_graph *g, + const ds4_model *model, + const ds4_tensor *out_a, + uint64_t group_dim, + uint64_t rank, + uint32_t group0, + uint32_t group_cnt, + const ds4_gpu_tensor *heads); +static bool metal_graph_attention_output_dense_quant_tp( + ds4_gpu_tensor *out, + ds4_gpu_tensor *low, + ds4_gpu_graph *g, + const ds4_model *model, + const ds4_tensor *out_a, + const ds4_tensor *out_b, + uint64_t group_dim, + uint64_t rank, + uint32_t n_groups_total, + uint32_t group0, + uint32_t group_cnt, + uint64_t out_dim, + const ds4_gpu_tensor *heads); +static bool metal_graph_attention_output_dense_quant_batch( + ds4_gpu_tensor *out, + ds4_gpu_tensor *low, + ds4_gpu_graph *g, + const ds4_model *model, + const ds4_tensor *out_a, + const ds4_tensor *out_b, + uint64_t group_dim, + uint64_t rank, + uint32_t n_groups, + uint64_t out_dim, + const ds4_gpu_tensor *heads, + uint32_t n_tokens); static bool metal_graph_use_pro_q4_cpu_router(void) { static int cache = -1; @@ -14474,7 +16943,10 @@ static bool metal_graph_q4_non_streaming_opt_in_enabled(void) { } static bool metal_graph_q4_selected_paths_allowed(const ds4_gpu_graph *g) { - return g && (g->ssd_streaming || metal_graph_q4_non_streaming_opt_in_enabled()); + if (!g) return false; + if (g->ssd_streaming) return true; + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) return false; + return metal_graph_q4_non_streaming_opt_in_enabled(); } static bool metal_graph_use_iq2_selected_shared_overlap(const ds4_gpu_graph *g) { @@ -14613,6 +17085,43 @@ static bool metal_graph_decode_iq2_selected_slots_expected( getenv("DS4_METAL_DISABLE_IQ2_SELECTED_EXPERT_VIEWS") == NULL; } +static bool metal_graph_streaming_expert_cache_seed_layer_expected( + const ds4_gpu_graph *g, + const ds4_layer_weights *layer) { + if (!g || + !g->ssd_streaming || + !layer || + !layer->ffn_gate_exps || + !layer->ffn_up_exps || + !layer->ffn_down_exps) { + return false; + } + if (metal_graph_decode_iq2_selected_slots_expected(g, layer)) return true; + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA && + !g->quality && + layer->ffn_gate_exps->type == DS4_TENSOR_IQ2_XXS && + layer->ffn_up_exps->type == DS4_TENSOR_IQ2_XXS && + layer->ffn_down_exps->type == DS4_TENSOR_IQ2_XXS && + DS4_N_EXPERT_USED != 0 && + DS4_N_EXPERT_USED <= 8 && + DS4_N_EXPERT >= 128 && + getenv("DS4_METAL_GLM_DISABLE_STREAMING_EXPERT_CACHE") == NULL) { + return true; + } + if (DS4_MODEL_FAMILY != DS4_MODEL_FAMILY_GLM_DSA || + g->quality || + layer->ffn_gate_exps->type != layer->ffn_up_exps->type || + layer->ffn_gate_exps->type != layer->ffn_down_exps->type || + DS4_N_EXPERT_USED == 0 || + DS4_N_EXPERT_USED > 8 || + DS4_N_EXPERT < 128 || + getenv("DS4_METAL_GLM_DISABLE_STREAMING_EXPERT_CACHE") != NULL) { + return false; + } + const uint32_t type = layer->ffn_gate_exps->type; + return type == DS4_TENSOR_Q2_K || type == DS4_TENSOR_Q4_K; +} + static bool metal_graph_decode_cuda_selected_slots_expected( const ds4_gpu_graph *g, const ds4_layer_weights *layer) { @@ -14806,6 +17315,9 @@ static bool metal_graph_streaming_expert_hotlist_load_default( } else if (g_ds4_shape.variant == DS4_VARIANT_FLASH) { hotlist = ds4_default_streaming_hotlist_flash; hotlist_count = ds4_default_streaming_hotlist_flash_count; + } else if (g_ds4_shape.variant == DS4_VARIANT_GLM52) { + hotlist = ds4_default_streaming_hotlist_glm52; + hotlist_count = ds4_default_streaming_hotlist_glm52_count; } else { *loaded_out = 0; return true; @@ -15263,10 +17775,10 @@ static bool metal_graph_cuda_stream_prefill_batch_selected_load( typedef struct metal_graph_selected_async_load { bool active; bool ok; - /* Selected ids were read and validated even if the load itself failed: - * the caller can then retry the load synchronously. */ + /* Selected ids remain usable for a synchronous retry if the service + * thread cannot stage the cache load without waiting on GPU work. */ bool ids_ok; - ds4_gpu_graph *g; + ds4_gpu_tensor *router_selected; const ds4_model *model; const ds4_layer_weights *layer; uint32_t il; @@ -15292,7 +17804,7 @@ static void metal_graph_selected_async_load_run( metal_graph_selected_async_load *job) { job->ok = false; - if (!job->g || !job->model || !job->layer || !job->g->router_selected || + if (!job->router_selected || !job->model || !job->layer || DS4_N_EXPERT == 0 || DS4_N_EXPERT > DS4_MAX_EXPERT || DS4_N_EXPERT_USED == 0 || DS4_N_EXPERT_USED > DS4_MAX_EXPERT_USED) { return; @@ -15300,7 +17812,7 @@ static void metal_graph_selected_async_load_run( if (job->event_value != 0) { #ifdef DS4_ROCM_BUILD if (ds4_gpu_tensor_read_after_selected_event( - job->g->router_selected, + job->router_selected, 0, job->selected_ids, (uint64_t)DS4_N_EXPERT_USED * @@ -15314,7 +17826,7 @@ static void metal_graph_selected_async_load_run( "selected-id async expert load") == 0) { return; } - if (ds4_gpu_tensor_read(job->g->router_selected, + if (ds4_gpu_tensor_read(job->router_selected, 0, job->selected_ids, (uint64_t)DS4_N_EXPERT_USED * @@ -15403,19 +17915,19 @@ static bool metal_graph_selected_async_load_ensure_worker(void) { return true; } -static DS4_MAYBE_UNUSED bool metal_graph_selected_async_load_start( +static DS4_MAYBE_UNUSED bool metal_graph_selected_async_load_start_tensor( metal_graph_selected_async_load *job, - ds4_gpu_graph *g, + ds4_gpu_tensor *router_selected, const ds4_model *model, const ds4_layer_weights *layer, uint32_t il, uint64_t event_value, uint64_t gate_expert_bytes, uint64_t down_expert_bytes) { - if (!job || event_value == 0) return false; + if (!job || !router_selected || event_value == 0) return false; if (!metal_graph_selected_async_load_ensure_worker()) return false; memset(job, 0, sizeof(*job)); - job->g = g; + job->router_selected = router_selected; job->model = model; job->layer = layer; job->il = il; @@ -15438,6 +17950,26 @@ static DS4_MAYBE_UNUSED bool metal_graph_selected_async_load_start( return true; } +static DS4_MAYBE_UNUSED bool metal_graph_selected_async_load_start( + metal_graph_selected_async_load *job, + ds4_gpu_graph *g, + const ds4_model *model, + const ds4_layer_weights *layer, + uint32_t il, + uint64_t event_value, + uint64_t gate_expert_bytes, + uint64_t down_expert_bytes) { + return metal_graph_selected_async_load_start_tensor( + job, + g ? g->router_selected : NULL, + model, + layer, + il, + event_value, + gate_expert_bytes, + down_expert_bytes); +} + static bool metal_graph_selected_async_load_finish( metal_graph_selected_async_load *job) { if (!job || !job->active) return false; @@ -15814,7 +18346,10 @@ static bool metal_graph_encode_decode_layer( metal_graph_debug_dump_tensor("attn_norm", g->attn_norm, DS4_N_EMBD, il, pos); } bool qkv_pair_projected = false; - if (ok && qkv_rms_fused) { + if (ok && + qkv_rms_fused && + layer->attn_q_a->type == DS4_TENSOR_Q8_0 && + layer->attn_kv->type == DS4_TENSOR_Q8_0) { qkv_pair_projected = ds4_gpu_matmul_q8_0_pair_tensor(g->qr, g->kv_raw, model->map, @@ -15827,22 +18362,24 @@ static bool metal_graph_encode_decode_layer( g->attn_norm, 1) != 0; } - if (ok && !qkv_pair_projected) ok = ds4_gpu_matmul_q8_0_tensor(g->qr, - model->map, - model->size, - layer->attn_q_a->abs_offset, - DS4_N_EMBD, - q_rank, - g->attn_norm, - 1) != 0; + if (ok && !qkv_pair_projected) ok = metal_graph_matmul_dense_quant_tensor(g->qr, + model, + layer->attn_q_a, + DS4_N_EMBD, + q_rank, + g->attn_norm, + 1); if (ok) { metal_graph_debug_dump_tensor("q_lora", g->qr, q_rank, il, pos); } if (qkv_rms_fused) { - if (ok && !qkv_pair_projected) ok = ds4_gpu_matmul_q8_0_tensor(g->kv_raw, model->map, model->size, - layer->attn_kv->abs_offset, - DS4_N_EMBD, DS4_N_HEAD_DIM, - g->attn_norm, 1) != 0; + if (ok && !qkv_pair_projected) ok = metal_graph_matmul_dense_quant_tensor(g->kv_raw, + model, + layer->attn_kv, + DS4_N_EMBD, + DS4_N_HEAD_DIM, + g->attn_norm, + 1); if (ok) { metal_graph_debug_dump_tensor("KVraw", g->kv_raw, DS4_N_HEAD_DIM, il, pos); } @@ -15876,15 +18413,23 @@ static bool metal_graph_encode_decode_layer( * q and heads hold the owned half compactly at the buffer base; the * head range lines up with the output-group split (32 heads = 4 of the * 8 groups). */ - const bool tp_split_attn = g->tp_world == 2 && !g->tp_null_split; + const bool tp_split_attn = g->tp_world == 2; const uint32_t tp_heads = tp_split_attn ? (uint32_t)DS4_N_HEAD / 2u : (uint32_t)DS4_N_HEAD; const uint32_t tp_head0 = tp_split_attn ? g->tp_rank * tp_heads : 0; + uint64_t tp_q_row_bytes = 0; + if (ok) ok = metal_graph_dense_quant_row_bytes(layer->attn_q_b, + q_rank, + &tp_q_row_bytes); const uint64_t tp_q_rows_off = - (uint64_t)tp_head0 * DS4_N_HEAD_DIM * ((q_rank / 32u) * 34u); - if (ok) ok = ds4_gpu_matmul_q8_0_tensor(g->q, model->map, model->size, - layer->attn_q_b->abs_offset + tp_q_rows_off, - q_rank, (uint64_t)tp_heads * DS4_N_HEAD_DIM, - g->qr_norm, 1) != 0; + (uint64_t)tp_head0 * DS4_N_HEAD_DIM * tp_q_row_bytes; + if (ok) ok = metal_graph_matmul_dense_quant_abs(g->q, + model, + layer->attn_q_b, + layer->attn_q_b->abs_offset + tp_q_rows_off, + q_rank, + (uint64_t)tp_heads * DS4_N_HEAD_DIM, + g->qr_norm, + 1); if (ok) { metal_graph_debug_dump_tensor("Qraw", g->q, q_dim, il, pos); } @@ -15924,10 +18469,13 @@ static bool metal_graph_encode_decode_layer( metal_graph_debug_dump_tensor("Qcur", g->q, q_dim, il, pos); } if (!qkv_rms_fused) { - if (ok) ok = ds4_gpu_matmul_q8_0_tensor(g->kv_raw, model->map, model->size, - layer->attn_kv->abs_offset, - DS4_N_EMBD, DS4_N_HEAD_DIM, - g->attn_norm, 1) != 0; + if (ok) ok = metal_graph_matmul_dense_quant_tensor(g->kv_raw, + model, + layer->attn_kv, + DS4_N_EMBD, + DS4_N_HEAD_DIM, + g->attn_norm, + 1); if (ok) { metal_graph_debug_dump_tensor("KVraw", g->kv_raw, DS4_N_HEAD_DIM, il, pos); } @@ -16323,6 +18871,8 @@ static bool metal_graph_encode_decode_layer( ds4_gpu_tensor *tp_attn_b = NULL; /* by the HC expand */ const bool fuse_attn_out_hc = g->tp_world < 2 && + layer->attn_output_a->type == DS4_TENSOR_Q8_0 && + layer->attn_output_b->type == DS4_TENSOR_Q8_0 && !metal_graph_directional_steering_attn_enabled(g) && !metal_graph_use_reference_attn_out_hc(); if (ok && fuse_attn_out_hc) { @@ -16348,23 +18898,42 @@ static bool metal_graph_encode_decode_layer( DS4_N_EMBD, DS4_N_HC) != 0; } - } else if (ok && g->tp_world == 2 && !g->tp_null_split) { + } else if (ok && g->tp_world == 2) { /* Group-sliced attention output: this rank computes its half of the * output groups and the matching k-window of the expand projection, * leaving a partial block output in the gate slot. */ const uint32_t tp_groups = n_groups / 2; - ok = ds4_gpu_attention_output_q8_tp_tensor( + ok = metal_graph_attention_output_dense_quant_tp( g->tp_out[il * DS4_TP_GATES_PER_LAYER + DS4_TP_GATE_ATTN], g->attn_low, - model->map, - model->size, - layer->attn_output_a->abs_offset, - layer->attn_output_b->abs_offset, + g, + model, + layer->attn_output_a, + layer->attn_output_b, group_dim, rank, n_groups, g->tp_rank * tp_groups, tp_groups, DS4_N_EMBD, - g->heads) != 0; + g->heads); + } else if (ok && layer->attn_output_a->type != DS4_TENSOR_Q8_0) { + ds4_gpu_tensor *attn_out_dst = g->tp_world == 2 ? + g->tp_out[il * DS4_TP_GATES_PER_LAYER + DS4_TP_GATE_ATTN] : g->attn_out; + ok = metal_graph_attention_output_dense_quant_low(g->attn_low, + g, + model, + layer->attn_output_a, + group_dim, + rank, + 0, + n_groups, + g->heads); + if (ok) ok = metal_graph_matmul_dense_quant_tensor(attn_out_dst, + model, + layer->attn_output_b, + (uint64_t)n_groups * rank, + DS4_N_EMBD, + g->attn_low, + 1); } else if (ok) { ds4_gpu_tensor *attn_out_dst = g->tp_world == 2 ? g->tp_out[il * DS4_TP_GATES_PER_LAYER + DS4_TP_GATE_ATTN] : g->attn_out; @@ -16384,15 +18953,12 @@ static bool metal_graph_encode_decode_layer( /* Gate ATTN: exchange the attention block output with the peer and * rebuild the canonical sum (rank0 first, then rank1) in attn_out * on both ranks — identical expression on both machines keeps them - * bit-exact. Null-split bring-up adopts rank 0's full output. */ + * bit-exact. */ const uint32_t slot = il * DS4_TP_GATES_PER_LAYER + DS4_TP_GATE_ATTN; ok = ds4_gpu_tp_gate_encode(il, DS4_TP_GATE_ATTN) != 0; if (ok) { ds4_gpu_tensor *first = g->tp_rank == 0 ? g->tp_out[slot] : g->tp_in[slot]; - if (g->tp_null_split) { - ok = ds4_gpu_tensor_copy(g->attn_out, 0, first, 0, - (uint64_t)DS4_N_EMBD * sizeof(float)) != 0; - } else if (metal_graph_directional_steering_attn_enabled(g)) { + if (metal_graph_directional_steering_attn_enabled(g)) { ds4_gpu_tensor *second = g->tp_rank == 0 ? g->tp_in[slot] : g->tp_out[slot]; ok = ds4_gpu_add_tensor(g->attn_out, first, second, DS4_N_EMBD) != 0; } else { @@ -16532,16 +19098,22 @@ static bool metal_graph_encode_decode_layer( const bool keep_ffn_out = metal_graph_needs_ffn_out(g, il, pos); /* Real TP split slices the shared expert by intermediate lanes, which * needs the unfused gate/up/swiglu/down sequence. */ - const bool tp_split_shared = g->tp_world == 2 && !g->tp_null_split; + const bool tp_split_shared = g->tp_world == 2; #ifdef DS4_ROCM_BUILD - const bool fuse_shared_gate_up = !g->quality; + const bool fuse_shared_gate_up = + !g->quality && + layer->ffn_gate_shexp->type == DS4_TENSOR_Q8_0 && + layer->ffn_up_shexp->type == DS4_TENSOR_Q8_0; #else const bool fuse_shared_gate_up = !g->quality && !tp_split_shared && + layer->ffn_gate_shexp->type == DS4_TENSOR_Q8_0 && + layer->ffn_up_shexp->type == DS4_TENSOR_Q8_0 && getenv("DS4_METAL_DISABLE_SHARED_GATE_UP_SWIGLU_FUSION") == NULL; #endif const bool fuse_shared_down_hc = g->tp_world < 2 && + layer->ffn_down_shexp->type == DS4_TENSOR_Q8_0 && !keep_ffn_out && !metal_graph_use_reference_shared_down_hc(); const bool q4_selected_shared_overlap = metal_graph_use_q4_selected_shared_overlap() && @@ -16618,14 +19190,20 @@ static bool metal_graph_encode_decode_layer( g->ffn_norm, DS4_SWIGLU_CLAMP_EXP) != 0; } else if (ok) { - if (ok) ok = ds4_gpu_matmul_q8_0_tensor(g->shared_gate, model->map, model->size, - layer->ffn_gate_shexp->abs_offset, - DS4_N_EMBD, shared_dim, - g->ffn_norm, 1) != 0; - if (ok) ok = ds4_gpu_matmul_q8_0_tensor(g->shared_up, model->map, model->size, - layer->ffn_up_shexp->abs_offset, - DS4_N_EMBD, shared_dim, - g->ffn_norm, 1) != 0; + if (ok) ok = metal_graph_matmul_dense_quant_tensor(g->shared_gate, + model, + layer->ffn_gate_shexp, + DS4_N_EMBD, + shared_dim, + g->ffn_norm, + 1); + if (ok) ok = metal_graph_matmul_dense_quant_tensor(g->shared_up, + model, + layer->ffn_up_shexp, + DS4_N_EMBD, + shared_dim, + g->ffn_norm, + 1); if (ok) ok = ds4_gpu_swiglu_tensor(g->shared_mid, g->shared_gate, g->shared_up, shared_dim, DS4_SWIGLU_CLAMP_EXP, 1.0f) != 0; } @@ -16650,7 +19228,8 @@ static bool metal_graph_encode_decode_layer( DS4_N_EXPERT, DS4_N_EXPERT_USED, DS4_SWIGLU_CLAMP_EXP, g->ffn_norm, NULL, - il) != 0; + il, + false) != 0; DS4_METAL_PROFILE_DECODE_STAGE("routed_moe"); if (ok) { metal_graph_debug_dump_tensor("ffn_moe_gate_clamped", g->routed_gate, @@ -16678,10 +19257,13 @@ static bool metal_graph_encode_decode_layer( DS4_N_EMBD, DS4_N_HC) != 0; } else if (ok) { - ok = ds4_gpu_matmul_q8_0_tensor(g->shared_out, model->map, model->size, - layer->ffn_down_shexp->abs_offset, - shared_dim, DS4_N_EMBD, - g->shared_mid, 1) != 0; + ok = metal_graph_matmul_dense_quant_tensor(g->shared_out, + model, + layer->ffn_down_shexp, + shared_dim, + DS4_N_EMBD, + g->shared_mid, + 1); } DS4_METAL_PROFILE_DECODE_STAGE("shared_down"); if (ok) { @@ -16755,23 +19337,32 @@ static bool metal_graph_encode_decode_layer( g->ffn_norm, DS4_SWIGLU_CLAMP_EXP) != 0; } else if (ok) { - if (ok) ok = ds4_gpu_matmul_q8_0_tensor(g->shared_gate, model->map, model->size, - layer->ffn_gate_shexp->abs_offset, - DS4_N_EMBD, shared_dim, - g->ffn_norm, 1) != 0; - if (ok) ok = ds4_gpu_matmul_q8_0_tensor(g->shared_up, model->map, model->size, - layer->ffn_up_shexp->abs_offset, - DS4_N_EMBD, shared_dim, - g->ffn_norm, 1) != 0; + if (ok) ok = metal_graph_matmul_dense_quant_tensor(g->shared_gate, + model, + layer->ffn_gate_shexp, + DS4_N_EMBD, + shared_dim, + g->ffn_norm, + 1); + if (ok) ok = metal_graph_matmul_dense_quant_tensor(g->shared_up, + model, + layer->ffn_up_shexp, + DS4_N_EMBD, + shared_dim, + g->ffn_norm, + 1); if (ok) ok = ds4_gpu_swiglu_tensor(g->shared_mid, g->shared_gate, g->shared_up, shared_dim, DS4_SWIGLU_CLAMP_EXP, 1.0f) != 0; } DS4_METAL_PROFILE_DECODE_STAGE("shared_gate_up"); if (ok && !fuse_shared_down_hc) { - ok = ds4_gpu_matmul_q8_0_tensor(g->shared_out, model->map, model->size, - layer->ffn_down_shexp->abs_offset, - shared_dim, DS4_N_EMBD, - g->shared_mid, 1) != 0; + ok = metal_graph_matmul_dense_quant_tensor(g->shared_out, + model, + layer->ffn_down_shexp, + shared_dim, + DS4_N_EMBD, + g->shared_mid, + 1); } DS4_METAL_PROFILE_DECODE_STAGE("shared_down"); if (async_load_started) { @@ -16843,7 +19434,8 @@ static bool metal_graph_encode_decode_layer( DS4_N_EXPERT, DS4_N_EXPERT_USED, DS4_SWIGLU_CLAMP_EXP, g->ffn_norm, NULL, - il) != 0; + il, + false) != 0; DS4_METAL_PROFILE_DECODE_STAGE("routed_moe"); if (ok) { metal_graph_debug_dump_tensor("ffn_moe_gate_clamped", g->routed_gate, @@ -16934,7 +19526,8 @@ static bool metal_graph_encode_decode_layer( DS4_N_EXPERT, DS4_N_EXPERT_USED, DS4_SWIGLU_CLAMP_EXP, g->ffn_norm, NULL, - il) != 0; + il, + false) != 0; DS4_METAL_PROFILE_DECODE_STAGE("routed_moe"); if (ok) { metal_graph_debug_dump_tensor("ffn_moe_gate_clamped", g->routed_gate, @@ -16959,23 +19552,48 @@ static bool metal_graph_encode_decode_layer( * math), compact at the buffer base; the down k-slice below turns * it into a partial output. */ const uint32_t tp_half = shared_dim / 2; - const uint64_t shexp_row_bytes = ((uint64_t)DS4_N_EMBD / 32u) * 34u; + uint64_t shexp_row_bytes = 0; + ok = metal_graph_dense_quant_row_bytes(layer->ffn_gate_shexp, + DS4_N_EMBD, + &shexp_row_bytes) && + layer->ffn_gate_shexp->type == layer->ffn_up_shexp->type; const uint64_t tp_lane_off = (uint64_t)g->tp_rank * tp_half * shexp_row_bytes; - ok = (tp_half % 32u) == 0; + ok = ok && (tp_half % 32u) == 0; if (!ok) { fprintf(stderr, "ds4: TP shared expert width %u is not sliceable\n", shared_dim); } - if (ok) ok = ds4_gpu_shared_gate_up_swiglu_q8_0_tensor(g->shared_gate, - g->shared_up, - g->shared_mid, - model->map, - model->size, - layer->ffn_gate_shexp->abs_offset + tp_lane_off, - layer->ffn_up_shexp->abs_offset + tp_lane_off, - DS4_N_EMBD, - tp_half, - g->ffn_norm, - DS4_SWIGLU_CLAMP_EXP) != 0; + if (ok && layer->ffn_gate_shexp->type == DS4_TENSOR_Q8_0) { + ok = ds4_gpu_shared_gate_up_swiglu_q8_0_tensor(g->shared_gate, + g->shared_up, + g->shared_mid, + model->map, + model->size, + layer->ffn_gate_shexp->abs_offset + tp_lane_off, + layer->ffn_up_shexp->abs_offset + tp_lane_off, + DS4_N_EMBD, + tp_half, + g->ffn_norm, + DS4_SWIGLU_CLAMP_EXP) != 0; + } else if (ok) { + ok = metal_graph_matmul_dense_quant_abs(g->shared_gate, + model, + layer->ffn_gate_shexp, + layer->ffn_gate_shexp->abs_offset + tp_lane_off, + DS4_N_EMBD, + tp_half, + g->ffn_norm, + 1); + if (ok) ok = metal_graph_matmul_dense_quant_abs(g->shared_up, + model, + layer->ffn_up_shexp, + layer->ffn_up_shexp->abs_offset + tp_lane_off, + DS4_N_EMBD, + tp_half, + g->ffn_norm, + 1); + if (ok) ok = ds4_gpu_swiglu_tensor(g->shared_mid, g->shared_gate, g->shared_up, + tp_half, DS4_SWIGLU_CLAMP_EXP, 1.0f) != 0; + } } else if (ok && fuse_shared_gate_up) { ok = ds4_gpu_shared_gate_up_swiglu_q8_0_tensor(g->shared_gate, g->shared_up, @@ -16989,14 +19607,20 @@ static bool metal_graph_encode_decode_layer( g->ffn_norm, DS4_SWIGLU_CLAMP_EXP) != 0; } else { - if (ok) ok = ds4_gpu_matmul_q8_0_tensor(g->shared_gate, model->map, model->size, - layer->ffn_gate_shexp->abs_offset, - DS4_N_EMBD, shared_dim, - g->ffn_norm, 1) != 0; - if (ok) ok = ds4_gpu_matmul_q8_0_tensor(g->shared_up, model->map, model->size, - layer->ffn_up_shexp->abs_offset, - DS4_N_EMBD, shared_dim, - g->ffn_norm, 1) != 0; + if (ok) ok = metal_graph_matmul_dense_quant_tensor(g->shared_gate, + model, + layer->ffn_gate_shexp, + DS4_N_EMBD, + shared_dim, + g->ffn_norm, + 1); + if (ok) ok = metal_graph_matmul_dense_quant_tensor(g->shared_up, + model, + layer->ffn_up_shexp, + DS4_N_EMBD, + shared_dim, + g->ffn_norm, + 1); if (ok) ok = ds4_gpu_swiglu_tensor(g->shared_mid, g->shared_gate, g->shared_up, shared_dim, DS4_SWIGLU_CLAMP_EXP, 1.0f) != 0; } @@ -17016,18 +19640,23 @@ static bool metal_graph_encode_decode_layer( DS4_N_EMBD, DS4_N_HC) != 0; } else if (ok && tp_split_shared) { - ok = ds4_gpu_matmul_q8_0_kslice_tensor(g->shared_out, model->map, model->size, - layer->ffn_down_shexp->abs_offset, - shared_dim, - (uint64_t)g->tp_rank * (shared_dim / 2), - shared_dim / 2, - DS4_N_EMBD, - g->shared_mid, 0) != 0; + ok = metal_graph_matmul_dense_quant_kslice(g->shared_out, + model, + layer->ffn_down_shexp, + shared_dim, + (uint64_t)g->tp_rank * (shared_dim / 2), + shared_dim / 2, + DS4_N_EMBD, + g->shared_mid, + 0); } else if (ok) { - ok = ds4_gpu_matmul_q8_0_tensor(g->shared_out, model->map, model->size, - layer->ffn_down_shexp->abs_offset, - shared_dim, DS4_N_EMBD, - g->shared_mid, 1) != 0; + ok = metal_graph_matmul_dense_quant_tensor(g->shared_out, + model, + layer->ffn_down_shexp, + shared_dim, + DS4_N_EMBD, + g->shared_mid, + 1); } DS4_METAL_PROFILE_DECODE_STAGE("shared_down"); if (ok) { @@ -17055,7 +19684,8 @@ static bool metal_graph_encode_decode_layer( DS4_N_EXPERT, DS4_N_EXPERT_USED, DS4_SWIGLU_CLAMP_EXP, g->ffn_norm, g->shared_out, - il) != 0; + il, + false) != 0; DS4_METAL_PROFILE_DECODE_STAGE("routed_moe_folded"); } ds4_gpu_tensor *tp_ffn_a = NULL; /* rank0/rank1 partials consumed */ @@ -17065,8 +19695,8 @@ static bool metal_graph_encode_decode_layer( * The HC expand below already sums two block vectors, so after the * exchange the two rank partials feed it directly (canonical rank * order) with no separate combine dispatch. The paths that need - * the materialized sum (null-split, ffn_out consumers) still build - * it in routed_out. */ + * the materialized sum (ffn_out consumers) still builds it in + * routed_out. */ const uint32_t tp_slot = il * DS4_TP_GATES_PER_LAYER + DS4_TP_GATE_FFN; if (!tp_fold_ffn) { ok = ds4_gpu_add_tensor(g->tp_out[tp_slot], g->shared_out, g->routed_out, @@ -17075,17 +19705,12 @@ static bool metal_graph_encode_decode_layer( if (ok) ok = ds4_gpu_tp_gate_encode(il, DS4_TP_GATE_FFN) != 0; if (ok) { ds4_gpu_tensor *first = g->tp_rank == 0 ? g->tp_out[tp_slot] : g->tp_in[tp_slot]; - if (g->tp_null_split) { - ok = ds4_gpu_tensor_copy(g->routed_out, 0, first, 0, - (uint64_t)DS4_N_EMBD * sizeof(float)) != 0; + ds4_gpu_tensor *second = g->tp_rank == 0 ? g->tp_in[tp_slot] : g->tp_out[tp_slot]; + if (keep_ffn_out || metal_graph_directional_steering_ffn_enabled(g)) { + ok = ds4_gpu_add_tensor(g->routed_out, first, second, DS4_N_EMBD) != 0; } else { - ds4_gpu_tensor *second = g->tp_rank == 0 ? g->tp_in[tp_slot] : g->tp_out[tp_slot]; - if (keep_ffn_out || metal_graph_directional_steering_ffn_enabled(g)) { - ok = ds4_gpu_add_tensor(g->routed_out, first, second, DS4_N_EMBD) != 0; - } else { - tp_ffn_a = first; - tp_ffn_b = second; - } + tp_ffn_a = first; + tp_ffn_b = second; } } } @@ -17175,31 +19800,33 @@ static bool metal_graph_encode_output_head( if (ok) { metal_graph_debug_dump_tensor("result_norm", g->output_norm, DS4_N_EMBD, DS4_N_LAYER, 0); } - if (ok && g->tp_world == 2 && !g->tp_null_split && g->tp_logits_half) { + if (ok && g->tp_world == 2 && g->tp_logits_half) { /* Vocab-split: this rank computes its half of the head rows into * its logits view; the halves are bit-identical to the full head * (same kernel, same rows) and the worker ships its half to the * leader after the eval. */ const uint64_t tp_vhalf = vocab_dim / 2u; - const uint64_t head_row_bytes = ((uint64_t)DS4_N_EMBD / 32u) * 34u; - ok = ds4_gpu_matmul_q8_0_tensor(g->tp_logits_half, - model->map, - model->size, - weights->output->abs_offset + - (uint64_t)g->tp_rank * tp_vhalf * head_row_bytes, - DS4_N_EMBD, - tp_vhalf, - g->output_norm, - 1) != 0; + uint64_t head_row_bytes = 0; + ok = metal_graph_dense_quant_row_bytes(weights->output, + DS4_N_EMBD, + &head_row_bytes); + if (ok) ok = metal_graph_matmul_dense_quant_abs(g->tp_logits_half, + model, + weights->output, + weights->output->abs_offset + + (uint64_t)g->tp_rank * tp_vhalf * head_row_bytes, + DS4_N_EMBD, + tp_vhalf, + g->output_norm, + 1); } else if (ok) { - ok = ds4_gpu_matmul_q8_0_tensor(g->logits, - model->map, - model->size, - weights->output->abs_offset, - DS4_N_EMBD, - vocab_dim, - g->output_norm, - 1) != 0; + ok = metal_graph_matmul_dense_quant_tensor(g->logits, + model, + weights->output, + DS4_N_EMBD, + vocab_dim, + g->output_norm, + 1); } if (ok) { metal_graph_debug_dump_tensor("result_output", g->logits, vocab_dim, DS4_N_LAYER, 0); @@ -17282,14 +19909,13 @@ static bool metal_graph_encode_output_head_batch( DS4_N_EMBD, n_tokens, DS4_RMS_EPS) != 0; - if (ok) ok = ds4_gpu_matmul_q8_0_tensor(logits, - model->map, - model->size, - weights->output->abs_offset, - DS4_N_EMBD, - vocab_dim, - output_norm, - n_tokens) != 0; + if (ok) ok = metal_graph_matmul_dense_quant_tensor(logits, + model, + weights->output, + DS4_N_EMBD, + vocab_dim, + output_norm, + n_tokens); ds4_gpu_tensor_free(logits); ds4_gpu_tensor_free(output_norm); @@ -17319,10 +19945,307 @@ static bool metal_graph_matmul_plain_tensor( return ds4_gpu_matmul_q8_0_tensor(out, model->map, model->size, w->abs_offset, in_dim, out_dim, x, n_tok) != 0; } + if (tensor_type_is_dense_quant(w->type)) { + return ds4_gpu_matmul_quant_tensor(out, + model->map, + model->size, + w->abs_offset, + w->type, + in_dim, + out_dim, + x, + n_tok) != 0; + } fprintf(stderr, "ds4: Metal plain matmul does not support %s\n", tensor_type_name(w->type)); return false; } +static bool metal_graph_dense_quant_row_bytes( + const ds4_tensor *w, + uint64_t in_dim, + uint64_t *row_bytes) { + if (row_bytes) *row_bytes = 0; + if (!w || !row_bytes || !tensor_type_is_dense_quant(w->type)) return false; + return tensor_nbytes(w->type, in_dim, row_bytes); +} + +static bool metal_graph_matmul_dense_quant_abs( + ds4_gpu_tensor *out, + const ds4_model *model, + const ds4_tensor *w, + uint64_t weight_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok) { + if (!w || !tensor_type_is_dense_quant(w->type)) return false; + return ds4_gpu_matmul_quant_tensor(out, + model->map, + model->size, + weight_offset, + w->type, + in_dim, + out_dim, + x, + n_tok) != 0; +} + +static bool metal_graph_matmul_dense_quant_tensor( + ds4_gpu_tensor *out, + const ds4_model *model, + const ds4_tensor *w, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok) { + if (!w) return false; + return metal_graph_matmul_dense_quant_abs(out, + model, + w, + w->abs_offset, + in_dim, + out_dim, + x, + n_tok); +} + +static bool metal_graph_matmul_dense_quant_kslice( + ds4_gpu_tensor *out, + const ds4_model *model, + const ds4_tensor *w, + uint64_t full_in_dim, + uint64_t k_off, + uint64_t k_cnt, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t x_elem_off) { + if (!w || !tensor_type_is_dense_quant(w->type)) return false; + return ds4_gpu_matmul_quant_kslice_tensor(out, + model->map, + model->size, + w->abs_offset, + w->type, + full_in_dim, + k_off, + k_cnt, + out_dim, + x, + x_elem_off) != 0; +} + +static bool metal_graph_attention_output_dense_quant_low( + ds4_gpu_tensor *low, + ds4_gpu_graph *g, + const ds4_model *model, + const ds4_tensor *out_a, + uint64_t group_dim, + uint64_t rank, + uint32_t group0, + uint32_t group_cnt, + const ds4_gpu_tensor *heads) { + (void)g; + if (!low || !model || !out_a || !heads || + group_dim == 0 || rank == 0 || group_cnt == 0) { + return false; + } + if (out_a->type == DS4_TENSOR_Q8_0 && group0 == 0) { + return ds4_gpu_attention_output_low_q8_tensor(low, + model->map, + model->size, + out_a->abs_offset, + group_dim, + rank, + group_cnt, + heads) != 0; + } + if (out_a->type == DS4_TENSOR_Q4_K) { + return ds4_gpu_attention_output_low_q4_K_slice_tensor(low, + model->map, + model->size, + out_a->abs_offset, + group_dim, + rank, + group0, + group_cnt, + heads) != 0; + } + uint64_t row_bytes = 0; + if (!metal_graph_dense_quant_row_bytes(out_a, group_dim, &row_bytes)) return false; + const uint64_t group_weight_bytes = rank * row_bytes; + bool ok = true; + for (uint32_t i = 0; ok && i < group_cnt; i++) { + ds4_gpu_tensor *head_view = ds4_gpu_tensor_view( + heads, + (uint64_t)i * group_dim * sizeof(float), + group_dim * sizeof(float)); + ds4_gpu_tensor *low_view = ds4_gpu_tensor_view( + low, + (uint64_t)i * rank * sizeof(float), + rank * sizeof(float)); + ok = head_view && low_view && + metal_graph_matmul_dense_quant_abs(low_view, + model, + out_a, + out_a->abs_offset + + (uint64_t)(group0 + i) * group_weight_bytes, + group_dim, + rank, + head_view, + 1); + ds4_gpu_tensor_free(low_view); + ds4_gpu_tensor_free(head_view); + } + return ok; +} + +static bool metal_graph_attention_output_dense_quant_tp( + ds4_gpu_tensor *out, + ds4_gpu_tensor *low, + ds4_gpu_graph *g, + const ds4_model *model, + const ds4_tensor *out_a, + const ds4_tensor *out_b, + uint64_t group_dim, + uint64_t rank, + uint32_t n_groups_total, + uint32_t group0, + uint32_t group_cnt, + uint64_t out_dim, + const ds4_gpu_tensor *heads) { + if (!out || !low || !g || !model || !out_a || !out_b || !heads || + group0 + group_cnt > n_groups_total) { + return false; + } + if (out_a->type == DS4_TENSOR_Q8_0 && out_b->type == DS4_TENSOR_Q8_0) { + return ds4_gpu_attention_output_q8_tp_tensor(out, + low, + model->map, + model->size, + out_a->abs_offset, + out_b->abs_offset, + group_dim, + rank, + n_groups_total, + group0, + group_cnt, + out_dim, + heads) != 0; + } + if (!metal_graph_attention_output_dense_quant_low(low, + g, + model, + out_a, + group_dim, + rank, + group0, + group_cnt, + heads)) { + return false; + } + return metal_graph_matmul_dense_quant_kslice(out, + model, + out_b, + (uint64_t)n_groups_total * rank, + (uint64_t)group0 * rank, + (uint64_t)group_cnt * rank, + out_dim, + low, + 0); +} + +static bool metal_graph_attention_output_dense_quant_batch( + ds4_gpu_tensor *out, + ds4_gpu_tensor *low, + ds4_gpu_graph *g, + const ds4_model *model, + const ds4_tensor *out_a, + const ds4_tensor *out_b, + uint64_t group_dim, + uint64_t rank, + uint32_t n_groups, + uint64_t out_dim, + const ds4_gpu_tensor *heads, + uint32_t n_tokens) { + if (!out || !low || !g || !model || !out_a || !out_b || !heads || + n_groups == 0 || n_tokens == 0) { + return false; + } + if (out_a->type == DS4_TENSOR_Q8_0 && out_b->type == DS4_TENSOR_Q8_0) { + return ds4_gpu_attention_output_q8_batch_tensor(out, + low, + g->batch_group_tmp, + g->batch_low_tmp, + model->map, + model->size, + out_a->abs_offset, + out_b->abs_offset, + group_dim, + rank, + n_groups, + out_dim, + heads, + n_tokens) != 0; + } + if (out_a->type == DS4_TENSOR_Q4_K && n_tokens >= 32u) { + if (ds4_gpu_attention_output_q4_K_batch_tensor(out, + low, + g->batch_group_tmp, + g->batch_low_tmp, + model->map, + model->size, + out_a->abs_offset, + out_b->abs_offset, + out_b->type, + group_dim, + rank, + n_groups, + out_dim, + heads, + n_tokens) != 0) { + return true; + } + } + + const uint64_t heads_row_elems = (uint64_t)n_groups * group_dim; + const uint64_t low_row_elems = (uint64_t)n_groups * rank; + bool ok = true; + for (uint32_t t = 0; ok && t < n_tokens; t++) { + ds4_gpu_tensor *heads_row = ds4_gpu_tensor_view( + heads, + (uint64_t)t * heads_row_elems * sizeof(float), + heads_row_elems * sizeof(float)); + ds4_gpu_tensor *low_row = ds4_gpu_tensor_view( + low, + (uint64_t)t * low_row_elems * sizeof(float), + low_row_elems * sizeof(float)); + ds4_gpu_tensor *out_row = ds4_gpu_tensor_view( + out, + (uint64_t)t * out_dim * sizeof(float), + out_dim * sizeof(float)); + ok = heads_row && low_row && out_row && + metal_graph_attention_output_dense_quant_low(low_row, + g, + model, + out_a, + group_dim, + rank, + 0, + n_groups, + heads_row); + if (ok) ok = metal_graph_matmul_dense_quant_tensor(out_row, + model, + out_b, + low_row_elems, + out_dim, + low_row, + 1); + ds4_gpu_tensor_free(out_row); + ds4_gpu_tensor_free(low_row); + ds4_gpu_tensor_free(heads_row); + } + return ok; +} + static bool metal_graph_matmul_q8_0_named_tensor( const char *module, uint32_t il, @@ -17337,15 +20260,13 @@ static bool metal_graph_matmul_q8_0_named_tensor( (void)module; (void)il; (void)pos0; - const bool ok = ds4_gpu_matmul_q8_0_tensor(out, - model->map, - model->size, - w->abs_offset, - in_dim, - out_dim, - x, - n_tok) != 0; - return ok; + return metal_graph_matmul_dense_quant_tensor(out, + model, + w, + in_dim, + out_dim, + x, + n_tok); } static bool metal_graph_encode_output_head_mtp( @@ -17379,14 +20300,13 @@ static bool metal_graph_encode_output_head_mtp( mtp->norm->abs_offset, DS4_N_EMBD, DS4_RMS_EPS) != 0; - if (ok) ok = ds4_gpu_matmul_q8_0_tensor(g->logits, - base_model->map, - base_model->size, - base_weights->output->abs_offset, - DS4_N_EMBD, - vocab_dim, - g->output_norm, - 1) != 0; + if (ok) ok = metal_graph_matmul_dense_quant_tensor(g->logits, + base_model, + base_weights->output, + DS4_N_EMBD, + vocab_dim, + g->output_norm, + 1); return ok; } @@ -18412,413 +21332,9 @@ static bool metal_graph_encode_token_raw_swa( fprintf(stderr, "ds4: Metal graph raw KV cache is not allocated\n"); return false; } - /* Under the vocab split both ranks materialize their logits half; in - * null-split bring-up the worker still skips the head entirely. */ + /* Under the vocab split both ranks materialize their logits half. */ if (g->tp_world == 2 && g->tp_rank == 1 && - (g->tp_null_split || !g->tp_logits_half)) need_logits = false; - const uint32_t raw_row = pos % g->raw_cap; - const uint32_t n_raw = metal_graph_raw_span_for_batch(g, pos, 1); - metal_graph_dspark_capture_begin(g); - - bool ok = ds4_gpu_embed_token_hc_tensor(g->cur_hc, - model->map, - model->size, - weights->token_embd->abs_offset, - (uint32_t)weights->token_embd->dim[1], - (uint32_t)token, - DS4_N_EMBD, - DS4_N_HC) != 0; - - /* - * Start executing the prefix of the decode graph while the CPU is still - * encoding the rest. The split point is layer-based because this executor is - * a fixed DS4 tape, not a dynamic node graph; four layers is the measured - * point where the prefix is large enough to hide useful work without - * starving the second command buffer. - */ - const uint32_t split_after_layers = metal_graph_token_split_after_layers(); - - for (uint32_t il = 0; ok && il < DS4_N_LAYER; il++) { - ok = metal_graph_encode_decode_layer(g, - model, - &weights->layer[il], - il, - pos, - g->layer_raw_cache[il], - g->raw_cap, - raw_row, - n_raw, - token); - ds4_gpu_tensor *tmp = g->cur_hc; - g->cur_hc = g->after_ffn_hc; - g->after_ffn_hc = tmp; - if (ok) ok = metal_graph_dspark_capture_decode_layer(g, il); - if (ok && allow_split_flush && split_after_layers != 0 && il + 1u == split_after_layers) { - ok = ds4_gpu_flush_commands() != 0; - } - } - -static void metal_graph_dspark_capture_batch_invalidate(ds4_gpu_graph *g) { - if (!g || !g->dspark_capture_enabled) return; - g->dspark_capture_batch_mask = 0; - g->dspark_capture_batch_start = 0; - g->dspark_capture_batch_tokens = 0; - g->dspark_capture_batch_valid = false; -} - -static void metal_graph_dspark_capture_invalidate(ds4_gpu_graph *g) { - metal_graph_dspark_capture_row_invalidate(g); - metal_graph_dspark_capture_batch_invalidate(g); -} - -static void metal_graph_dspark_cache_reset(ds4_gpu_graph *g) { - if (!g) return; - g->dspark_cache_start = 0; - g->dspark_cache_token_start = 0; - g->dspark_cache_len = 0; -} - -static bool metal_graph_dspark_cache_window_valid( - const ds4_gpu_graph *g, - uint32_t token_start, - uint32_t raw_start, - uint32_t len) { - if (!g || len > g->dspark_cache_cap) return false; - if (len == 0) return true; - if (g->dspark_cache_cap == 0 || - raw_start >= g->dspark_cache_cap || - token_start > UINT32_MAX - len || - raw_start != token_start % g->dspark_cache_cap) { - return false; - } - return true; -} - -static bool metal_graph_dspark_cache_current_window_valid( - const ds4_gpu_graph *g) { - if (!g) return false; - return metal_graph_dspark_cache_window_valid(g, - g->dspark_cache_token_start, - g->dspark_cache_start, - g->dspark_cache_len); -} - -static bool metal_graph_dspark_cache_set_window(ds4_gpu_graph *g, - uint32_t token_start, - uint32_t len) { - if (!g || len > g->dspark_cache_cap) return false; - const uint32_t raw_start = - len && g->dspark_cache_cap ? token_start % g->dspark_cache_cap : 0; - if (!metal_graph_dspark_cache_window_valid(g, - len ? token_start : 0, - raw_start, - len)) { - return false; - } - g->dspark_cache_start = raw_start; - g->dspark_cache_token_start = len ? token_start : 0; - g->dspark_cache_len = len; - return true; -} - -static bool metal_graph_dspark_cache_crop_to_prefix(ds4_gpu_graph *g, - uint32_t prefix_len) { - if (!g) return false; - if (g->dspark_cache_len == 0) return true; - if (!metal_graph_dspark_cache_current_window_valid(g)) return false; - - const uint32_t start = g->dspark_cache_token_start; - const uint32_t end = start + g->dspark_cache_len; - if (prefix_len <= start || prefix_len > end) { - metal_graph_dspark_cache_reset(g); - return true; - } - g->dspark_cache_len = prefix_len - start; - return true; -} - -static bool metal_graph_dspark_cache_ends_at(const ds4_gpu_graph *g, - uint32_t pos) { - if (!metal_graph_dspark_cache_current_window_valid(g)) return false; - if (g->dspark_cache_len == 0) return true; - return g->dspark_cache_token_start <= UINT32_MAX - g->dspark_cache_len && - g->dspark_cache_token_start + g->dspark_cache_len == pos; -} - -bool ds4_test_dspark_cache_window_crop(void) { - ds4_gpu_graph g; - memset(&g, 0, sizeof(g)); - g.dspark_cache_cap = 8; - - if (!metal_graph_dspark_cache_set_window(&g, 10, 5)) return false; - if (g.dspark_cache_token_start != 10 || - g.dspark_cache_start != 2 || - g.dspark_cache_len != 5) return false; - if (!metal_graph_dspark_cache_ends_at(&g, 15)) return false; - if (metal_graph_dspark_cache_ends_at(&g, 14)) return false; - if (metal_graph_dspark_cache_window_valid(&g, 10, 3, 5)) return false; - - if (!metal_graph_dspark_cache_crop_to_prefix(&g, 13)) return false; - if (g.dspark_cache_token_start != 10 || - g.dspark_cache_start != 2 || - g.dspark_cache_len != 3) return false; - if (!metal_graph_dspark_cache_ends_at(&g, 13)) return false; - - if (!metal_graph_dspark_cache_crop_to_prefix(&g, 20)) return false; - if (g.dspark_cache_token_start != 0 || - g.dspark_cache_start != 0 || - g.dspark_cache_len != 0) return false; - if (!metal_graph_dspark_cache_ends_at(&g, 20)) return false; - - if (metal_graph_dspark_cache_set_window(&g, UINT32_MAX - 1u, 2)) { - return false; - } - return true; -} - -static void metal_graph_dspark_capture_begin(ds4_gpu_graph *g) { - metal_graph_dspark_capture_row_invalidate(g); -} - -static void metal_graph_dspark_capture_begin_prefill(ds4_gpu_graph *g) { - metal_graph_dspark_capture_invalidate(g); -} - -static bool metal_graph_dspark_capture_hc( - ds4_gpu_graph *g, - const ds4_gpu_tensor *hc, - uint32_t slot) { - if (!g || !hc || !g->dspark_target_hidden || - !g->dspark_hc_mean_weights || - slot >= g->dspark_target_layer_count) { - return false; - } - - ds4_gpu_tensor *dst = - ds4_gpu_tensor_view(g->dspark_target_hidden, - (uint64_t)slot * DS4_N_EMBD * sizeof(float), - (uint64_t)DS4_N_EMBD * sizeof(float)); - if (!dst) return false; - const bool ok = ds4_gpu_hc_weighted_sum_tensor(dst, - hc, - g->dspark_hc_mean_weights, - DS4_N_EMBD, - DS4_N_HC) != 0; - ds4_gpu_tensor_free(dst); - if (ok) metal_graph_dspark_capture_note_slot(g, slot); - return ok; -} - -static bool metal_graph_dspark_capture_batch_note_slot( - ds4_gpu_graph *g, - uint32_t slot, - uint32_t start, - uint32_t n_tokens) { - if (!g || slot >= g->dspark_target_layer_count || n_tokens == 0) { - return false; - } - if (g->dspark_capture_batch_mask == 0) { - g->dspark_capture_batch_start = start; - g->dspark_capture_batch_tokens = n_tokens; - } else if (g->dspark_capture_batch_start != start || - g->dspark_capture_batch_tokens != n_tokens) { - metal_graph_dspark_capture_batch_invalidate(g); - return false; - } - g->dspark_capture_batch_mask |= 1u << slot; - g->dspark_capture_batch_valid = - g->dspark_capture_batch_mask == - metal_graph_dspark_capture_complete_mask(g); - return true; -} - -static bool metal_graph_dspark_capture_decode_layer( - ds4_gpu_graph *g, - uint32_t il) { - const int slot = metal_graph_dspark_target_slot(g, il); - if (slot < 0) return true; - return metal_graph_dspark_capture_hc(g, g->cur_hc, (uint32_t)slot); -} - -static bool metal_graph_dspark_capture_prefill_layer( - ds4_gpu_graph *g, - uint32_t il, - uint32_t start, - uint32_t n_tokens) { - const int slot = metal_graph_dspark_target_slot(g, il); - if (slot < 0) return true; - if (n_tokens == 0) return false; - - const uint64_t hc_dim = (uint64_t)DS4_N_HC * DS4_N_EMBD; - const uint64_t embd_bytes = (uint64_t)DS4_N_EMBD * sizeof(float); - if (g->dspark_target_hidden_batch && - g->dspark_hc_mean_rows && - n_tokens <= g->prefill_cap) { - ds4_gpu_tensor *batch_dst = - ds4_gpu_tensor_view(g->dspark_target_hidden_batch, - ((uint64_t)slot * g->prefill_cap * - DS4_N_EMBD) * sizeof(float), - (uint64_t)n_tokens * embd_bytes); - ds4_gpu_tensor *last_src = - batch_dst ? - ds4_gpu_tensor_view(batch_dst, - (uint64_t)(n_tokens - 1u) * embd_bytes, - embd_bytes) : NULL; - ds4_gpu_tensor *last_dst = - ds4_gpu_tensor_view(g->dspark_target_hidden, - (uint64_t)slot * embd_bytes, - embd_bytes); - bool ok = batch_dst && last_src && last_dst && - ds4_gpu_hc_weighted_sum_tensor(batch_dst, - g->batch_cur_hc, - g->dspark_hc_mean_rows, - DS4_N_EMBD, - DS4_N_HC) != 0 && - ds4_gpu_tensor_copy(last_dst, - 0, - last_src, - 0, - embd_bytes) != 0; - ds4_gpu_tensor_free(last_dst); - ds4_gpu_tensor_free(last_src); - ds4_gpu_tensor_free(batch_dst); - if (ok) { - metal_graph_dspark_capture_note_slot(g, (uint32_t)slot); - ok = metal_graph_dspark_capture_batch_note_slot(g, - (uint32_t)slot, - start, - n_tokens); - } - return ok; - } - - ds4_gpu_tensor *last_hc = - ds4_gpu_tensor_view(g->batch_cur_hc, - (uint64_t)(n_tokens - 1u) * hc_dim * sizeof(float), - hc_dim * sizeof(float)); - if (!last_hc) return false; - const bool ok = metal_graph_dspark_capture_hc(g, last_hc, (uint32_t)slot); - ds4_gpu_tensor_free(last_hc); - return ok; -} - -static bool metal_graph_dspark_capture_verified_suffix_begin( - ds4_gpu_graph *g, - uint32_t start, - uint32_t n_tokens, - bool commands_open) { - if (!g || !g->dspark_capture_enabled || - !g->dspark_target_hidden || - !g->dspark_target_hidden_batch || - start == 0 || - n_tokens == 0 || - n_tokens + 1u < n_tokens || - n_tokens + 1u > g->prefill_cap || - !g->dspark_capture_valid || - g->dspark_capture_checkpoint_len != start) { - metal_graph_dspark_capture_invalidate(g); - return false; - } - - const uint64_t embd_bytes = (uint64_t)DS4_N_EMBD * sizeof(float); - metal_graph_dspark_capture_batch_invalidate(g); - bool ok = commands_open || ds4_gpu_begin_commands() != 0; - for (uint32_t slot = 0; ok && slot < g->dspark_target_layer_count; slot++) { - ds4_gpu_tensor *dst = - ds4_gpu_tensor_view(g->dspark_target_hidden_batch, - ((uint64_t)slot * g->prefill_cap * - DS4_N_EMBD) * sizeof(float), - embd_bytes); - ds4_gpu_tensor *src = - ds4_gpu_tensor_view(g->dspark_target_hidden, - (uint64_t)slot * embd_bytes, - embd_bytes); - ok = dst && src && - ds4_gpu_tensor_copy(dst, 0, src, 0, embd_bytes) != 0; - ds4_gpu_tensor_free(src); - ds4_gpu_tensor_free(dst); - } - if (ok && !commands_open) ok = ds4_gpu_end_commands() != 0; - else if (!ok && !commands_open) (void)ds4_gpu_synchronize(); - if (!ok) { - metal_graph_dspark_capture_invalidate(g); - return false; - } - - metal_graph_dspark_capture_row_invalidate(g); - return true; -} - -static bool metal_graph_dspark_capture_verified_suffix_layer( - ds4_gpu_graph *g, - uint32_t il, - uint32_t start, - uint32_t n_tokens) { - const int slot = metal_graph_dspark_target_slot(g, il); - if (slot < 0) return true; - if (!g || !g->dspark_target_hidden_batch || - !g->dspark_target_hidden || - !g->dspark_hc_mean_rows || - start == 0 || - n_tokens == 0 || - n_tokens + 1u < n_tokens || - n_tokens + 1u > g->prefill_cap) { - return false; - } - - const uint64_t embd_bytes = (uint64_t)DS4_N_EMBD * sizeof(float); - ds4_gpu_tensor *batch_dst = - ds4_gpu_tensor_view(g->dspark_target_hidden_batch, - (((uint64_t)(uint32_t)slot * g->prefill_cap + - 1u) * DS4_N_EMBD) * sizeof(float), - (uint64_t)n_tokens * embd_bytes); - ds4_gpu_tensor *last_src = - batch_dst ? - ds4_gpu_tensor_view(batch_dst, - (uint64_t)(n_tokens - 1u) * embd_bytes, - embd_bytes) : NULL; - ds4_gpu_tensor *last_dst = - ds4_gpu_tensor_view(g->dspark_target_hidden, - (uint64_t)(uint32_t)slot * embd_bytes, - embd_bytes); - bool ok = batch_dst && last_src && last_dst && - ds4_gpu_hc_weighted_sum_tensor(batch_dst, - g->batch_cur_hc, - g->dspark_hc_mean_rows, - DS4_N_EMBD, - DS4_N_HC) != 0 && - ds4_gpu_tensor_copy(last_dst, - 0, - last_src, - 0, - embd_bytes) != 0; - ds4_gpu_tensor_free(last_dst); - ds4_gpu_tensor_free(last_src); - ds4_gpu_tensor_free(batch_dst); - if (ok) { - metal_graph_dspark_capture_note_slot(g, (uint32_t)slot); - ok = metal_graph_dspark_capture_batch_note_slot(g, - (uint32_t)slot, - start - 1u, - n_tokens + 1u); - } - return ok; -} - -/* Encode a full single-token decode step on Metal. This is the generation - * hot path: update caches, run all layers, then produce logits. */ -static bool metal_graph_encode_token_raw_swa( - ds4_gpu_graph *g, - const ds4_model *model, - const ds4_weights *weights, - int token, - uint32_t pos, - bool need_logits, - bool allow_split_flush) { - if (g->raw_cap == 0) { - fprintf(stderr, "ds4: Metal graph raw KV cache is not allocated\n"); - return false; - } + !g->tp_logits_half) need_logits = false; const uint32_t raw_row = pos % g->raw_cap; const uint32_t n_raw = metal_graph_raw_span_for_batch(g, pos, 1); metal_graph_dspark_capture_begin(g); @@ -19110,26 +21626,89 @@ static bool metal_graph_indexer_stage_profile_boundary( return ds4_gpu_begin_commands() != 0; } -static bool metal_graph_profile_layer_env_match(const char *env_name, uint32_t il) { - const char *layer_env = getenv(env_name); - if (!layer_env || !layer_env[0]) return true; +static bool metal_graph_env_value_eq(const char *v, + size_t n, + const char *literal) { + const size_t m = strlen(literal); + if (n != m) return false; + for (size_t i = 0; i < n; i++) { + if (tolower((unsigned char)v[i]) != + tolower((unsigned char)literal[i])) { + return false; + } + } + return true; +} + +static const char *metal_graph_env_trim(const char *v, size_t *len_out) { + if (!v) { + if (len_out) *len_out = 0; + return NULL; + } + while (isspace((unsigned char)*v)) v++; + size_t n = strlen(v); + while (n > 0 && isspace((unsigned char)v[n - 1])) n--; + if (len_out) *len_out = n; + return v; +} + +static bool metal_graph_profile_layer_value_match(const char *layer_env, + uint32_t il) { + size_t n = 0; + layer_env = metal_graph_env_trim(layer_env, &n); + if (!layer_env || n == 0) return true; char *end = NULL; const unsigned long layer = strtoul(layer_env, &end, 10); return end != layer_env && - *end == '\0' && + (size_t)(end - layer_env) == n && layer <= UINT32_MAX && (uint32_t)layer == il; } +static bool metal_graph_stage_profile_enabled_for_layer( + const char *flag_env_name, + const char *layer_env_name, + uint32_t il) { + size_t flag_len = 0; + const char *flag = metal_graph_env_trim(getenv(flag_env_name), &flag_len); + if (!flag) return false; + + const char *layer_env = getenv(layer_env_name); + const bool has_layer_filter = layer_env && layer_env[0]; + + if (flag_len != 0) { + if (metal_graph_env_value_eq(flag, flag_len, "0") || + metal_graph_env_value_eq(flag, flag_len, "false") || + metal_graph_env_value_eq(flag, flag_len, "no") || + metal_graph_env_value_eq(flag, flag_len, "off")) { + return false; + } + if (!has_layer_filter && + !metal_graph_env_value_eq(flag, flag_len, "1") && + !metal_graph_env_value_eq(flag, flag_len, "true") && + !metal_graph_env_value_eq(flag, flag_len, "yes") && + !metal_graph_env_value_eq(flag, flag_len, "on") && + !metal_graph_env_value_eq(flag, flag_len, "all")) { + return metal_graph_profile_layer_value_match(flag, il); + } + } + + return metal_graph_profile_layer_value_match(layer_env, il); +} + static bool metal_graph_layer_stage_profile_enabled(uint32_t il) { - return getenv("DS4_METAL_LAYER_STAGE_PROFILE") != NULL && - metal_graph_profile_layer_env_match("DS4_METAL_LAYER_STAGE_PROFILE_LAYER", il); + return metal_graph_stage_profile_enabled_for_layer( + "DS4_METAL_LAYER_STAGE_PROFILE", + "DS4_METAL_LAYER_STAGE_PROFILE_LAYER", + il); } static bool metal_graph_decode_stage_profile_enabled(uint32_t il) { - return getenv("DS4_METAL_DECODE_STAGE_PROFILE") != NULL && - metal_graph_profile_layer_env_match("DS4_METAL_DECODE_STAGE_PROFILE_LAYER", il); + return metal_graph_stage_profile_enabled_for_layer( + "DS4_METAL_DECODE_STAGE_PROFILE", + "DS4_METAL_DECODE_STAGE_PROFILE_LAYER", + il); } static bool metal_graph_layer_stage_profile_start(uint32_t il) { @@ -19151,14 +21730,16 @@ static bool metal_graph_layer_stage_profile_boundary( double *stage_t0) { if (ds4_gpu_end_commands() == 0) return false; const double now = now_sec(); - fprintf(stderr, - "ds4: metal layer stage part=%s layer=%u pos=%u tokens=%u %s=%.3f ms\n", - part, - il, - pos0, - n_tokens, - stage, - (now - *stage_t0) * 1000.0); + if (stage != NULL) { + fprintf(stderr, + "ds4: metal layer stage part=%s layer=%u pos=%u tokens=%u %s=%.3f ms\n", + part, + il, + pos0, + n_tokens, + stage, + (now - *stage_t0) * 1000.0); + } *stage_t0 = now; return ds4_gpu_begin_commands() != 0; } @@ -19182,6 +21763,42 @@ static bool metal_graph_q_stage_profile_boundary( return ds4_gpu_begin_commands() != 0; } +static ds4_gpu_tensor *metal_graph_tensor_row_range_view( + ds4_gpu_tensor *base, + uint32_t row0, + uint32_t rows, + uint64_t row_values) { + return ds4_gpu_tensor_view(base, + (uint64_t)row0 * row_values * sizeof(float), + (uint64_t)rows * row_values * sizeof(float)); +} + +/* TP prefill threshold for row-splitting the replicated shared expert. + * Routed experts remain ownership-split at every batch size. */ +static uint32_t metal_graph_tp_prefill_split_min(void) { + static int cached = -1; + if (cached < 0) { + cached = 32; + const char *env = getenv("DS4_TP_PREFILL_SPLIT_MIN"); + if (env && env[0]) cached = atoi(env); + if (cached < 2) cached = 2; + } + return (uint32_t)cached; +} + +/* Opt-in sub-chunk gate pipelining for the TP prefill row swaps. Must be + * set on BOTH ranks (it changes the per-layer gate count; asymmetric + * settings deadlock the big gates). Default off: measured net-negative + * on the M5 Max pair, see the pipelined blocks for the numbers. */ +static bool metal_graph_tp_subgate_pipeline(void) { + static int cached = -1; + if (cached < 0) { + const char *env = getenv("DS4_TP_SUBGATE_PIPELINE"); + cached = env && env[0] && atoi(env) != 0; + } + return cached != 0; +} + static bool metal_graph_encode_layer_attention_batch( ds4_gpu_graph *g, const ds4_model *model, @@ -19202,6 +21819,38 @@ static bool metal_graph_encode_layer_attention_batch( const uint32_t ratio = ds4_layer_compress_ratio(il); const bool compressed = ratio != 0; const bool zero_prefix = pos0 == 0; + /* TP attention row split for large zero-prefix chunks: q_a and the KV + * path stay full (both ranks need every row's KV, and the compressor/ + * indexer keep updating their state from full rows), q_b onward runs on + * this rank's half of the chunk rows, and the computed row halves of + * batch_attn_out are swapped in place through one big gate per layer. + * Three chunk shapes split: full-raw (uncompressed layer at pos0 == 0, + * or a compressed layer whose chunk is too short to emit compressed + * keys, i.e. raw_prefix_tokens == n_tokens), static-mixed (compressed + * layer whose whole chunk attends through the one-shot mixed kernel + * over the full raw keys plus n_tokens / ratio compressed keys, without + * indexer top-k), and indexed (ratio-4 layer with indexer top-k, whose + * per-token score/top-k selection stays replicated while the attention + * consumption splits by rows). Every condition derives from + * pos0/n_tokens/ratio/model shape so both ranks stay in lockstep. */ + const bool tp_attn_full_raw = zero_prefix && + (ratio == 0 || (n_tokens < ratio && n_tokens <= g->raw_cap)); + const uint32_t tp_attn_n_comp = ratio != 0 ? n_tokens / ratio : 0; + const bool tp_attn_static_mixed = zero_prefix && ratio != 0 && + tp_attn_n_comp != 0 && + !(ratio == 4 && tp_attn_n_comp > DS4_N_INDEXER_TOP_K); + const bool tp_attn_indexed = zero_prefix && ratio == 4 && + tp_attn_n_comp > DS4_N_INDEXER_TOP_K; + const bool tp_row_split_attn = + g->tp_world == 2 && + g->tp_batch_rows != n_tokens && + (tp_attn_full_raw || tp_attn_static_mixed || tp_attn_indexed) && + !metal_graph_directional_steering_attn_enabled(g) && + n_tokens >= metal_graph_tp_prefill_split_min(); + const uint32_t tp_half_rows = (n_tokens + 1u) / 2u; + const uint32_t tp_row0 = (tp_row_split_attn && g->tp_rank != 0) ? tp_half_rows : 0; + const uint32_t tp_rows = tp_row_split_attn ? + (g->tp_rank == 0 ? tp_half_rows : n_tokens - tp_half_rows) : n_tokens; const bool index_stage_profile = getenv("DS4_METAL_INDEXER_STAGE_PROFILE") != NULL; const bool layer_stage_profile = metal_graph_layer_stage_profile_enabled(il); const bool q_stage_profile = getenv("DS4_METAL_Q_STAGE_PROFILE") != NULL; @@ -19403,21 +22052,41 @@ static bool metal_graph_encode_layer_attention_batch( const bool q_path_debug = metal_graph_debug_wants("Qraw", il, pos0) || metal_graph_debug_wants("Qnorm", il, pos0); + /* Under the TP row split everything from q_b to the output projection + * runs on this rank's rows only, through row-range views of the batch + * tensors (batch_q_half is F16, so its view is built directly). */ + ds4_gpu_tensor *tp_q = tp_row_split_attn ? + metal_graph_tensor_row_range_view(g->batch_q, tp_row0, tp_rows, q_dim) : NULL; + ds4_gpu_tensor *tp_q_half = tp_row_split_attn ? + ds4_gpu_tensor_view(g->batch_q_half, + (uint64_t)tp_row0 * q_dim * sizeof(uint16_t), + (uint64_t)tp_rows * q_dim * sizeof(uint16_t)) : NULL; + ds4_gpu_tensor *tp_qr_norm = tp_row_split_attn ? + metal_graph_tensor_row_range_view(g->batch_qr_norm, tp_row0, tp_rows, q_rank) : NULL; + ds4_gpu_tensor *tp_heads = tp_row_split_attn ? + metal_graph_tensor_row_range_view(g->batch_heads, tp_row0, tp_rows, q_dim) : NULL; + ds4_gpu_tensor *tp_attn_out = tp_row_split_attn ? + metal_graph_tensor_row_range_view(g->batch_attn_out, tp_row0, tp_rows, + DS4_N_EMBD) : NULL; + if (tp_row_split_attn && + (!tp_q || !tp_q_half || !tp_qr_norm || !tp_heads || !tp_attn_out)) { + ok = false; + } bool q_b_f16_out = false; - if (ok && !q_path_debug) { - q_b_f16_out = ds4_gpu_attn_q_b_f16_head_rms_rope_tail_tensor(g->batch_q, - g->batch_q_half, + if (ok && !q_path_debug && layer->attn_q_b->type == DS4_TENSOR_Q8_0) { + q_b_f16_out = ds4_gpu_attn_q_b_f16_head_rms_rope_tail_tensor(tp_q ? tp_q : g->batch_q, + tp_q_half ? tp_q_half : g->batch_q_half, model->map, model->size, layer->attn_q_b->abs_offset, q_rank, q_dim, - g->batch_qr_norm, - n_tokens, + tp_qr_norm ? tp_qr_norm : g->batch_qr_norm, + tp_rows, DS4_N_HEAD, DS4_N_HEAD_DIM, DS4_N_ROT, - pos0, + pos0 + tp_row0, compressed ? (uint32_t)DS4_ROPE_ORIG_CTX : 0, false, freq_base, @@ -19440,20 +22109,20 @@ static bool metal_graph_encode_layer_attention_batch( if (ok) ok = metal_graph_matmul_q8_0_named_tensor("attn_q_b", il, pos0, - g->batch_q, + tp_q ? tp_q : g->batch_q, model, layer->attn_q_b, q_rank, q_dim, - g->batch_qr_norm, - n_tokens); + tp_qr_norm ? tp_qr_norm : g->batch_qr_norm, + tp_rows); if (ok) { metal_graph_debug_dump_tensor("Qraw", g->batch_q, (uint64_t)n_tokens * q_dim, il, pos0); } DS4_METAL_PROFILE_Q_STAGE("q_b"); - if (ok) ok = ds4_gpu_head_rms_norm_tensor(g->batch_q, - n_tokens, + if (ok) ok = ds4_gpu_head_rms_norm_tensor(tp_q ? tp_q : g->batch_q, + tp_rows, DS4_N_HEAD, DS4_N_HEAD_DIM, DS4_RMS_EPS) != 0; @@ -19462,12 +22131,12 @@ static bool metal_graph_encode_layer_attention_batch( (uint64_t)n_tokens * q_dim, il, pos0); } DS4_METAL_PROFILE_Q_STAGE("head_norm"); - if (ok) ok = ds4_gpu_rope_tail_tensor(g->batch_q, - n_tokens, + if (ok) ok = ds4_gpu_rope_tail_tensor(tp_q ? tp_q : g->batch_q, + tp_rows, DS4_N_HEAD, DS4_N_HEAD_DIM, DS4_N_ROT, - pos0, + pos0 + tp_row0, compressed ? (uint32_t)DS4_ROPE_ORIG_CTX : 0, false, freq_base, @@ -19556,16 +22225,31 @@ static bool metal_graph_encode_layer_attention_batch( bool batch_attention_done = false; if (ok && raw_batch_attention) { - ok = ds4_gpu_attention_prefill_raw_heads_tensor(g->batch_heads, - model->map, - model->size, - layer->attn_sinks->abs_offset, - g->batch_q, - g->batch_kv, - n_tokens, - g->raw_window, - DS4_N_HEAD, - DS4_N_HEAD_DIM) != 0; + if (tp_row_split_attn) { + ok = ds4_gpu_attention_prefill_raw_heads_range_tensor(tp_heads, + model->map, + model->size, + layer->attn_sinks->abs_offset, + tp_q, + g->batch_kv, + tp_row0, + tp_rows, + n_tokens, + g->raw_window, + DS4_N_HEAD, + DS4_N_HEAD_DIM) != 0; + } else { + ok = ds4_gpu_attention_prefill_raw_heads_tensor(g->batch_heads, + model->map, + model->size, + layer->attn_sinks->abs_offset, + g->batch_q, + g->batch_kv, + n_tokens, + g->raw_window, + DS4_N_HEAD, + DS4_N_HEAD_DIM) != 0; + } if (ok) batch_attention_done = true; } else if (ok && !zero_prefix && ratio == 0 && n_tokens <= g->raw_cap) { /* @@ -20388,7 +23072,45 @@ static bool metal_graph_encode_layer_attention_batch( pos0); } } - if (ok) { + if (ok && tp_row_split_attn) { + /* Score/top-k selection above ran replicated over all rows; + * only the attention consumption splits. Passing the row + * offset through pos0 and clamping n_raw to the rows this + * rank can see keeps the kernel's first_raw_pos at the + * chunk origin, so the raw ring mapping is unchanged. */ + ds4_gpu_tensor *tp_topk = metal_graph_tensor_row_range_view( + g->comp_selected, tp_row0, tp_rows, DS4_N_INDEXER_TOP_K); + ok = tp_topk && + ds4_gpu_attention_indexed_mixed_batch_heads_tensor(tp_heads, + model->map, + model->size, + layer->attn_sinks->abs_offset, + tp_q, + g->layer_raw_cache[il], + g->layer_attn_comp_cache[il], + metal_graph_attn_comp_cache_is_f16(), + tp_topk, + tp_rows, + pos0 + tp_row0, + tp_row0 + tp_rows, + g->raw_cap, + 0, + n_comp, + DS4_N_INDEXER_TOP_K, + g->raw_window, + ratio, + DS4_N_HEAD, + DS4_N_HEAD_DIM) != 0; + ds4_gpu_tensor_free(tp_topk); + if (ok && index_stage_profile) { + ok = metal_graph_indexer_stage_profile_boundary("attention", + il, + pos0, + n_tokens, + n_comp, + &index_stage_t0); + } + } else if (ok) { ok = ds4_gpu_attention_indexed_mixed_batch_heads_tensor(g->batch_heads, model->map, model->size, @@ -20421,20 +23143,39 @@ static bool metal_graph_encode_layer_attention_batch( if (ok) batch_attention_done = true; } if (ok && zero_prefix && !topk_prefill_needed && n_comp != 0) { - ok = ds4_gpu_attention_prefill_static_mixed_heads_tensor(g->batch_heads, - model->map, - model->size, - layer->attn_sinks->abs_offset, - g->batch_q, - g->batch_kv, - g->layer_attn_comp_cache[il], - metal_graph_attn_comp_cache_is_f16(), - n_tokens, - n_comp, - g->raw_window, - ratio, - DS4_N_HEAD, - DS4_N_HEAD_DIM) != 0; + if (tp_row_split_attn) { + ok = ds4_gpu_attention_prefill_static_mixed_heads_range_tensor(tp_heads, + model->map, + model->size, + layer->attn_sinks->abs_offset, + tp_q, + g->batch_kv, + g->layer_attn_comp_cache[il], + metal_graph_attn_comp_cache_is_f16(), + tp_row0, + tp_rows, + n_tokens, + n_comp, + g->raw_window, + ratio, + DS4_N_HEAD, + DS4_N_HEAD_DIM) != 0; + } else { + ok = ds4_gpu_attention_prefill_static_mixed_heads_tensor(g->batch_heads, + model->map, + model->size, + layer->attn_sinks->abs_offset, + g->batch_q, + g->batch_kv, + g->layer_attn_comp_cache[il], + metal_graph_attn_comp_cache_is_f16(), + n_tokens, + n_comp, + g->raw_window, + ratio, + DS4_N_HEAD, + DS4_N_HEAD_DIM) != 0; + } if (ok) batch_attention_done = true; } } @@ -20448,16 +23189,33 @@ static bool metal_graph_encode_layer_attention_batch( } if (raw_prefix_tokens != 0) { - ok = ds4_gpu_attention_prefill_raw_heads_tensor(g->batch_heads, - model->map, - model->size, - layer->attn_sinks->abs_offset, - g->batch_q, - g->batch_kv, - raw_prefix_tokens, - g->raw_window, - DS4_N_HEAD, - DS4_N_HEAD_DIM) != 0; + if (tp_row_split_attn && raw_prefix_tokens == n_tokens) { + /* tp_attn_full_raw guarantees the whole chunk stays raw + * (n_tokens < ratio), so the split covers every row. */ + ok = ds4_gpu_attention_prefill_raw_heads_range_tensor(tp_heads, + model->map, + model->size, + layer->attn_sinks->abs_offset, + tp_q, + g->batch_kv, + tp_row0, + tp_rows, + n_tokens, + g->raw_window, + DS4_N_HEAD, + DS4_N_HEAD_DIM) != 0; + } else { + ok = ds4_gpu_attention_prefill_raw_heads_tensor(g->batch_heads, + model->map, + model->size, + layer->attn_sinks->abs_offset, + g->batch_q, + g->batch_kv, + raw_prefix_tokens, + g->raw_window, + DS4_N_HEAD, + DS4_N_HEAD_DIM) != 0; + } } if (raw_prefix_tokens < n_tokens) { for (uint32_t t = raw_prefix_tokens; ok && t < n_tokens; t++) { @@ -20566,12 +23324,12 @@ static bool metal_graph_encode_layer_attention_batch( metal_graph_debug_dump_tensor("kqv_out", g->batch_heads, (uint64_t)n_tokens * q_dim, il, pos0); } - if (ok) ok = ds4_gpu_rope_tail_tensor(g->batch_heads, - n_tokens, + if (ok) ok = ds4_gpu_rope_tail_tensor(tp_heads ? tp_heads : g->batch_heads, + tp_rows, DS4_N_HEAD, DS4_N_HEAD_DIM, DS4_N_ROT, - pos0, + pos0 + tp_row0, compressed ? (uint32_t)DS4_ROPE_ORIG_CTX : 0, true, freq_base, @@ -20591,6 +23349,9 @@ static bool metal_graph_encode_layer_attention_batch( bool attn_out_f16 = false; if (ok && !attn_out_debug && + !tp_row_split_attn && + layer->attn_output_a->type == DS4_TENSOR_Q8_0 && + layer->attn_output_b->type == DS4_TENSOR_Q8_0 && !metal_graph_directional_steering_attn_enabled(g)) { attn_out_f16 = ds4_gpu_attention_output_q8_batch_f16_tensor(g->batch_q_half, g->batch_attn_low, @@ -20605,22 +23366,88 @@ static bool metal_graph_encode_layer_attention_batch( g->batch_heads, n_tokens) != 0; } + uint64_t tp_attn_gate_seq = 0; + /* Opt-in sub-chunk gate pipelining (see metal_graph_tp_subgate_pipeline; + * measured net-negative on the M5 Max pair, kept for slower wires). + * Kernel-path constraint: the output projection picks its kernel by row + * count (direct low below 32 rows, the 64-token-tile TensorOps path at + * multiples of 64, ids-cache fallback otherwise), and the paths are not + * bit-identical per row. Parity with the single-node reference + * therefore requires every sub-call to land on the same path as the + * full-chunk call: n_tokens % 256 == 0 puts the chunk, the rank halves, + * and the quarter sub-calls all on the TensorOps path. Other sizes + * keep the proven single-gate swap. */ + const bool tp_attn_pipeline = + tp_row_split_attn && (n_tokens % 256u) == 0u && + metal_graph_tp_subgate_pipeline(); if (!attn_out_f16) { - if (ok) { - ok = ds4_gpu_attention_output_q8_batch_tensor(g->batch_attn_out, - g->batch_attn_low, - g->batch_group_tmp, - g->batch_low_tmp, - model->map, - model->size, - layer->attn_output_a->abs_offset, - layer->attn_output_b->abs_offset, - group_dim, - rank, - n_groups, - DS4_N_EMBD, - g->batch_heads, - n_tokens) != 0; + if (ok && tp_attn_pipeline) { + /* Sub-chunk pipelined swap: the output projection runs in two + * sub-halves of this rank's rows and each sub-half's row swap + * is kicked as soon as its rows land in batch_attn_out, so the + * first wire exchange overlaps the second sub-half's compute. + * The two kicks use opposite flag-slot parities; the wait below + * (before the HC post expand) covers both. */ + const uint32_t tp_sub1 = (tp_half_rows + 1u) / 2u; + const uint32_t tp_c1 = tp_rows < tp_sub1 ? tp_rows : tp_sub1; + const uint32_t tp_own_base = g->tp_rank == 0 ? 0u : tp_half_rows; + const uint32_t tp_peer_base = g->tp_rank == 0 ? tp_half_rows : 0u; + for (uint32_t sub = 0; ok && sub < 2u; sub++) { + const uint32_t coff = sub == 0 ? 0u : tp_c1; + const uint32_t crows = sub == 0 ? tp_c1 : tp_rows - tp_c1; + const uint32_t soff = sub == 0 ? 0u : tp_sub1; + const uint32_t srows = sub == 0 ? tp_sub1 : tp_half_rows - tp_sub1; + if (crows != 0) { + ds4_gpu_tensor *sub_heads = metal_graph_tensor_row_range_view( + g->batch_heads, tp_row0 + coff, crows, q_dim); + ds4_gpu_tensor *sub_out = metal_graph_tensor_row_range_view( + g->batch_attn_out, tp_row0 + coff, crows, DS4_N_EMBD); + ok = sub_heads && sub_out && + metal_graph_attention_output_dense_quant_batch(sub_out, + g->batch_attn_low, + g, + model, + layer->attn_output_a, + layer->attn_output_b, + group_dim, + rank, + n_groups, + DS4_N_EMBD, + sub_heads, + crows); + ds4_gpu_tensor_free(sub_out); + ds4_gpu_tensor_free(sub_heads); + } + if (ok && srows != 0) { + ds4_gpu_tensor *send_sub = metal_graph_tensor_row_range_view( + g->batch_attn_out, tp_own_base + soff, srows, DS4_N_EMBD); + ds4_gpu_tensor *recv_sub = metal_graph_tensor_row_range_view( + g->batch_attn_out, tp_peer_base + soff, srows, DS4_N_EMBD); + uint64_t seq = 0; + if (send_sub && recv_sub) { + seq = ds4_gpu_tp_big_gate_kick(il, n_tokens, + send_sub, recv_sub, + (uint64_t)srows * DS4_N_EMBD * sizeof(float)); + } + ok = seq != 0; + if (ok) tp_attn_gate_seq = seq; + ds4_gpu_tensor_free(recv_sub); + ds4_gpu_tensor_free(send_sub); + } + } + } else if (ok) { + ok = metal_graph_attention_output_dense_quant_batch(tp_attn_out ? tp_attn_out : g->batch_attn_out, + g->batch_attn_low, + g, + model, + layer->attn_output_a, + layer->attn_output_b, + group_dim, + rank, + n_groups, + DS4_N_EMBD, + tp_heads ? tp_heads : g->batch_heads, + tp_rows); } if (ok) { metal_graph_debug_dump_tensor("attn_low", g->batch_attn_low, @@ -20634,6 +23461,30 @@ static bool metal_graph_encode_layer_attention_batch( } } DS4_METAL_PROFILE_ATTN_STAGE("output_proj"); + if (ok && tp_row_split_attn) { + /* Release point for the pipelined row swaps of batch_attn_out: both + * ranks reach the HC post expand with identical full tensors. */ + if (tp_attn_pipeline) { + ok = tp_attn_gate_seq != 0 && + ds4_gpu_tp_big_gate_wait(tp_attn_gate_seq) != 0; + } else { + const uint64_t half_bytes = + (uint64_t)tp_half_rows * DS4_N_EMBD * sizeof(float); + ds4_gpu_tensor *send_half = metal_graph_tensor_row_range_view( + g->batch_attn_out, + g->tp_rank == 0 ? 0 : tp_half_rows, tp_half_rows, DS4_N_EMBD); + ds4_gpu_tensor *recv_half = metal_graph_tensor_row_range_view( + g->batch_attn_out, + g->tp_rank == 0 ? tp_half_rows : 0, tp_half_rows, DS4_N_EMBD); + ok = send_half && recv_half && + ds4_gpu_tp_big_gate_encode(il, n_tokens, + send_half, recv_half, + half_bytes) != 0; + ds4_gpu_tensor_free(send_half); + ds4_gpu_tensor_free(recv_half); + } + if (!ok) fprintf(stderr, "ds4: TP prefill attention row gate failed (layer %u)\n", il); + } if (ok && !attn_out_f16 && metal_graph_directional_steering_attn_enabled(g)) { ok = metal_graph_apply_directional_steering_attn(g, g->batch_attn_out, il, n_tokens); } @@ -20657,6 +23508,11 @@ static bool metal_graph_encode_layer_attention_batch( (uint64_t)n_tokens * hc_dim, il, pos0); } DS4_METAL_PROFILE_ATTN_STAGE("hc_post"); + ds4_gpu_tensor_free(tp_attn_out); + ds4_gpu_tensor_free(tp_heads); + ds4_gpu_tensor_free(tp_qr_norm); + ds4_gpu_tensor_free(tp_q_half); + ds4_gpu_tensor_free(tp_q); ds4_gpu_tensor_free(after_attn_hc_view); ds4_gpu_tensor_free(attn_cur_view); ds4_gpu_tensor_free(hc_split_view); @@ -20898,7 +23754,8 @@ static bool metal_graph_encode_layer_ffn_batch( bool shared_down_f16 = false; #define DS4_METAL_TRY_SHARED_DOWN_F16() do { \ - if (ok && !keep_ffn_out && !metal_graph_debug_wants("ffn_shexp", il, pos0)) { \ + if (ok && !tp_row_split_ffn && !keep_ffn_out && \ + !metal_graph_debug_wants("ffn_shexp", il, pos0)) { \ shared_down_f16 = ds4_gpu_matmul_q8_0_f16_out_tensor(g->batch_q_half, \ model->map, \ model->size, \ @@ -20919,8 +23776,8 @@ static bool metal_graph_encode_layer_ffn_batch( layer->ffn_gate_shexp, \ DS4_N_EMBD, \ shared_dim, \ - g->batch_ffn_norm, \ - n_tokens); \ + tp_ffn_x ? tp_ffn_x : g->batch_ffn_norm, \ + tp_rows); \ if (ok) ok = metal_graph_matmul_q8_0_named_tensor("shared_up", \ il, \ pos0, \ @@ -20929,13 +23786,13 @@ static bool metal_graph_encode_layer_ffn_batch( layer->ffn_up_shexp, \ DS4_N_EMBD, \ shared_dim, \ - g->batch_ffn_norm, \ - n_tokens); \ + tp_ffn_x ? tp_ffn_x : g->batch_ffn_norm, \ + tp_rows); \ DS4_METAL_PROFILE_FFN_STAGE("shared_gate_up"); \ if (ok) ok = ds4_gpu_swiglu_tensor(g->batch_shared_mid, \ g->batch_shared_gate, \ g->batch_shared_up, \ - (uint32_t)((uint64_t)n_tokens * shared_dim), \ + (uint32_t)((uint64_t)tp_rows * shared_dim), \ DS4_SWIGLU_CLAMP_EXP, \ 1.0f) != 0; \ DS4_METAL_TRY_SHARED_DOWN_F16(); \ @@ -20948,7 +23805,7 @@ static bool metal_graph_encode_layer_ffn_batch( shared_dim, \ DS4_N_EMBD, \ g->batch_shared_mid, \ - n_tokens); \ + tp_rows); \ DS4_METAL_PROFILE_FFN_STAGE("shared_down"); \ if (ok && !shared_down_f16) { \ metal_graph_debug_dump_tensor("ffn_shexp", g->batch_shared_out, \ @@ -20957,6 +23814,23 @@ static bool metal_graph_encode_layer_ffn_batch( } while (0) bool shared_done = false; + /* With 50/50 expert residency, every rank evaluates every prompt row + * against its local expert half. For large chunks the replicated shared + * expert remains row-split; its rows are folded into the local routed + * partial before the one all-reduce-style bulk exchange. */ + const bool tp_split_ffn = g->tp_world == 2; + const bool tp_row_split_ffn = + tp_split_ffn && g->tp_batch_rows != n_tokens && !keep_ffn_out && + !metal_graph_directional_steering_ffn_enabled(g) && + n_tokens >= metal_graph_tp_prefill_split_min(); + const uint32_t tp_half_rows = (n_tokens + 1u) / 2u; + const uint32_t tp_row0 = (tp_row_split_ffn && g->tp_rank != 0) ? tp_half_rows : 0; + const uint32_t tp_rows = tp_row_split_ffn ? + (g->tp_rank == 0 ? tp_half_rows : n_tokens - tp_half_rows) : n_tokens; + ds4_gpu_tensor *tp_ffn_x = tp_row_split_ffn ? + metal_graph_tensor_row_range_view(g->batch_ffn_norm, tp_row0, tp_rows, + DS4_N_EMBD) : NULL; + if (tp_row_split_ffn && !tp_ffn_x) ok = false; if (ok && selected_readahead_shared) { if (ds4_gpu_end_commands() == 0) { ok = false; @@ -21036,10 +23910,10 @@ static bool metal_graph_encode_layer_ffn_batch( const bool tp_split_batch_moe = g->tp_batch_rows == n_tokens && n_tokens > 0 && - g->tp_world == 2 && !g->tp_null_split && + g->tp_world == 2 && g->tp_batch_out && g->tp_batch_in; if (ok && tp_split_batch_moe) { - /* Verify-block expert split: run the (already parity-split) + /* Verify-block expert split: run the contiguous-half split * single-token routed kernels per row into the slab batch-out * rows, exchange all rows with one gate, then materialize the * combined routed output. The add is commutative, so both ranks @@ -21083,7 +23957,8 @@ static bool metal_graph_encode_layer_ffn_batch( DS4_SWIGLU_CLAMP_EXP, x_row, NULL, - il) != 0; + il, + false) != 0; ds4_gpu_tensor_free(w_row); ds4_gpu_tensor_free(sel_row); ds4_gpu_tensor_free(x_row); @@ -21157,6 +24032,43 @@ static bool metal_graph_encode_layer_ffn_batch( #undef DS4_METAL_ENCODE_PREFILL_SHARED_EXPERT #undef DS4_METAL_TRY_SHARED_DOWN_F16 + if (ok && tp_row_split_ffn) { + /* Each shared-expert row must appear exactly once in the all-reduce. + * Fold this rank's shared rows into its full-row routed partial; the + * peer does the same for the complementary rows. */ + ds4_gpu_tensor *own_rows = + metal_graph_tensor_row_range_view(g->batch_routed_out, tp_row0, + tp_rows, DS4_N_EMBD); + ok = own_rows && + ds4_gpu_add_tensor(own_rows, own_rows, g->batch_shared_out, + (uint32_t)((uint64_t)tp_rows * DS4_N_EMBD)) != 0; + ds4_gpu_tensor_free(own_rows); + } + + if (ok && tp_split_ffn && !tp_split_batch_moe) { + /* All rows contain this rank's routed-expert partial. Exchange that + * matrix in one bulk gate, then add in canonical rank order. The + * batch verify path above already performed the equivalent slab gate. */ + const uint64_t bytes = + (uint64_t)n_tokens * DS4_N_EMBD * sizeof(float); + ok = metal_graph_ensure_batch_ffn_out(g) && + ds4_gpu_tp_big_gate_encode(il, n_tokens, + g->batch_routed_out, + g->batch_ffn_out, + bytes) != 0; + if (ok) { + ds4_gpu_tensor *first = g->tp_rank == 0 ? + g->batch_routed_out : g->batch_ffn_out; + ds4_gpu_tensor *second = g->tp_rank == 0 ? + g->batch_ffn_out : g->batch_routed_out; + ok = ds4_gpu_add_tensor(g->batch_routed_out, first, second, + (uint32_t)((uint64_t)n_tokens * DS4_N_EMBD)) != 0; + } + if (!ok) { + fprintf(stderr, "ds4: TP prefill FFN all-reduce failed (layer %u)\n", il); + } + } + if (ok && keep_ffn_out) { ok = metal_graph_ensure_batch_ffn_out(g) && ds4_gpu_add_tensor(g->batch_ffn_out, @@ -21188,6 +24100,15 @@ static bool metal_graph_encode_layer_ffn_batch( DS4_N_EMBD, DS4_N_HC) != 0; } + else if (ok && tp_row_split_ffn) { + /* Shared expert already folded into the exchanged routed rows. */ + ok = ds4_gpu_hc_expand_split_tensor(next_hc_view, + g->batch_routed_out, + g->batch_after_attn_hc, + hc_split_view, + DS4_N_EMBD, + DS4_N_HC) != 0; + } else if (ok) { ok = ds4_gpu_hc_expand_add_split_tensor(next_hc_view, g->batch_routed_out, @@ -21202,6 +24123,7 @@ static bool metal_graph_encode_layer_ffn_batch( (uint64_t)n_tokens * hc_dim, il, pos0); } DS4_METAL_PROFILE_FFN_STAGE("hc_post"); + ds4_gpu_tensor_free(tp_ffn_x); ds4_gpu_tensor_free(next_hc_view); ds4_gpu_tensor_free(ffn_cur_view); ds4_gpu_tensor_free(hc_split_view); @@ -21438,7 +24360,7 @@ static bool metal_graph_eval_token_raw_swa( if (ok) ok = ds4_gpu_end_commands() != 0; const double t_done = (profile || throttle) ? now_sec() : 0.0; - if (ok && logits && g->tp_world == 2 && !g->tp_null_split && g->tp_logits_half) { + if (ok && logits && g->tp_world == 2 && g->tp_logits_half) { const uint64_t tp_vhalf = (uint64_t)DS4_N_VOCAB / 2u; const uint64_t off = (uint64_t)g->tp_rank * tp_vhalf * sizeof(float); ok = ds4_gpu_tensor_read(g->logits, off, logits + g->tp_rank * tp_vhalf, @@ -21674,7 +24596,9 @@ static bool metal_graph_seed_streaming_expert_cache_from_prefill( uint32_t seeded_rows = 0; for (uint32_t il = 0; il < DS4_N_LAYER; il++) { const ds4_layer_weights *layer = &weights->layer[il]; - if (!metal_graph_decode_iq2_selected_slots_expected(g, layer)) continue; + if (!metal_graph_streaming_expert_cache_seed_layer_expected(g, layer)) { + continue; + } const uint64_t gate_row_bytes = routed_expert_row_bytes(layer->ffn_gate_exps); const uint64_t down_row_bytes = routed_expert_row_bytes(layer->ffn_down_exps); @@ -21726,7 +24650,9 @@ static bool metal_graph_seed_streaming_expert_cache_from_hotlist( uint32_t cache_budget = 0; for (uint32_t il = 0; il < DS4_N_LAYER; il++) { const ds4_layer_weights *layer = &weights->layer[il]; - if (!metal_graph_decode_iq2_selected_slots_expected(g, layer)) continue; + if (!metal_graph_streaming_expert_cache_seed_layer_expected(g, layer)) { + continue; + } const uint64_t gate_row_bytes = routed_expert_row_bytes(layer->ffn_gate_exps); const uint64_t down_row_bytes = routed_expert_row_bytes(layer->ffn_down_exps); @@ -21748,9 +24674,13 @@ static bool metal_graph_seed_streaming_expert_cache_from_hotlist( if (preload_count == 0) return true; const uint32_t current_count = ds4_gpu_stream_expert_cache_current_count(); + const char *path = getenv("DS4_METAL_STREAMING_EXPERT_HOTLIST"); + const bool from_file = path && path[0]; + const bool refresh_builtin_glm = + !from_file && g_ds4_shape.variant == DS4_VARIANT_GLM52; const bool profile = getenv("DS4_METAL_STREAMING_EXPERT_HOTLIST_PROFILE") != NULL; - if (current_count >= preload_count) { + if (!from_file && !refresh_builtin_glm && current_count >= preload_count) { if (profile) { fprintf(stderr, "ds4: Metal streaming expert hotlist seed skipped preload=%u current=%u\n", @@ -21769,9 +24699,7 @@ static bool metal_graph_seed_streaming_expert_cache_from_hotlist( memset(counts, 0, sizeof(counts)); memset(seen, 0, sizeof(seen)); - const char *path = getenv("DS4_METAL_STREAMING_EXPERT_HOTLIST"); uint32_t loaded = 0; - const bool from_file = path && path[0]; if (from_file) { if (!metal_graph_streaming_expert_hotlist_load_file(path, preload_count, @@ -21799,7 +24727,9 @@ static bool metal_graph_seed_streaming_expert_cache_from_hotlist( const uint32_t n = counts[il]; if (n == 0) continue; const ds4_layer_weights *layer = &weights->layer[il]; - if (!metal_graph_decode_iq2_selected_slots_expected(g, layer)) continue; + if (!metal_graph_streaming_expert_cache_seed_layer_expected(g, layer)) { + continue; + } const uint64_t gate_row_bytes = routed_expert_row_bytes(layer->ffn_gate_exps); const uint64_t down_row_bytes = routed_expert_row_bytes(layer->ffn_down_exps); @@ -21830,6 +24760,8 @@ static bool metal_graph_seed_streaming_expert_cache_from_hotlist( const char *source_name = NULL; if (from_file) { source_name = path; + } else if (g_ds4_shape.variant == DS4_VARIANT_GLM52) { + source_name = "built-in-glm52"; } else if (g_ds4_shape.variant == DS4_VARIANT_FLASH) { source_name = "built-in-flash"; } else if (g_ds4_shape.variant == DS4_VARIANT_PRO) { @@ -22247,2130 +25179,6 @@ static bool metal_graph_prepare_dspark_setup_block( return ok; } -static bool metal_graph_prepare_dspark_stage0_setup_block( - ds4_gpu_graph *g, - const ds4_model *base_model, - const ds4_weights *base_weights, - const ds4_model *dspark_model, - const ds4_dspark_weights *dw, - int token, - uint32_t pos) { - if (!g || !base_model || !dspark_model || - !dspark_stage0_weights_ready(g, dw) || - !dspark_draft_block_ready(g, base_weights, dw, token) || - !dspark_stage_input_ready(g, dw)) { - return false; - } - if (pos > (uint32_t)INT32_MAX || - dw->block_size > (uint32_t)INT32_MAX || - pos > (uint32_t)INT32_MAX - dw->block_size) { - return false; - } - - const ds4_dspark_stage_weights *stage0 = &dw->stage[0]; - const uint64_t in_dim = (uint64_t)dw->target_layer_count * DS4_N_EMBD; - const uint64_t hc_dim = (uint64_t)DS4_N_HC * DS4_N_EMBD; - const uint64_t hc_bytes = hc_dim * sizeof(float); - int32_t positions[DS4_DSPARK_MAX_BLOCK_SIZE + 1u]; - positions[0] = (int32_t)pos; - for (uint32_t i = 0; i < dw->block_size; i++) { - positions[i + 1u] = (int32_t)(pos + i); - } - int32_t ids[DS4_DSPARK_MAX_BLOCK_SIZE]; - ids[0] = (int32_t)token; - for (uint32_t i = 1; i < dw->block_size; i++) { - ids[i] = (int32_t)dw->noise_token_id; - } - - bool ok = ds4_gpu_tensor_write(g->dspark_draft_tokens, - 0, - ids, - (uint64_t)dw->block_size * sizeof(ids[0])) != 0 && - ds4_gpu_tensor_write(g->dspark_position_ids, - 0, - positions, - ((uint64_t)dw->block_size + 1u) * - sizeof(positions[0])) != 0; - if (ok) ok = ds4_gpu_begin_commands() != 0; - if (ok) { - ok = metal_graph_matmul_plain_tensor(g->dspark_stage0_proj, - dspark_model, - stage0->main_proj, - in_dim, - DS4_N_EMBD, - g->dspark_target_hidden, - 1); - } - if (ok) { - ok = ds4_gpu_rms_norm_weight_tensor(g->dspark_main_x, - g->dspark_stage0_proj, - dspark_model->map, - dspark_model->size, - stage0->main_norm->abs_offset, - DS4_N_EMBD, - DS4_RMS_EPS) != 0; - } - if (ok) { - ok = ds4_gpu_embed_tokens_hc_tensor(g->dspark_draft_hc, - g->dspark_draft_tokens, - base_model->map, - base_model->size, - base_weights->token_embd->abs_offset, - (uint32_t)base_weights->token_embd->dim[1], - dw->block_size, - DS4_N_EMBD, - DS4_N_HC) != 0; - } - if (ok) { - ok = ds4_gpu_repeat_hc_tensor(g->dspark_target_hc, - g->dspark_main_x, - DS4_N_EMBD, - DS4_N_HC) != 0; - } - if (ok) { - ok = ds4_gpu_tensor_copy(g->dspark_stage_input_hc, - 0, - g->dspark_target_hc, - 0, - hc_bytes) != 0; - } - if (ok) { - ok = ds4_gpu_tensor_copy(g->dspark_stage_input_hc, - hc_bytes, - g->dspark_draft_hc, - 0, - (uint64_t)dw->block_size * hc_bytes) != 0; - } - if (ok) ok = ds4_gpu_end_commands() != 0; - if (!ok) (void)ds4_gpu_synchronize(); - return ok; -} - -static bool dspark_stage_block_ready( - const ds4_gpu_graph *g, - const ds4_dspark_weights *dw, - uint32_t stage) { - if (!g || !dw || - stage >= dw->n_stages || - dw->block_size == 0 || - dw->block_size > DS4_DSPARK_MAX_BLOCK_SIZE || - g->prefill_cap < dw->block_size + 1u || - !g->dspark_stage_output_hc || - !dspark_stage_input_ready(g, dw) || - !dspark_stage_cache_ready(g, dw)) { - return false; - } - - const ds4_layer_weights *l = &dw->stage[stage].block; - if (!l->hc_attn_fn || !l->hc_attn_scale || !l->hc_attn_base || - !l->attn_norm || !l->attn_q_a || !l->attn_q_a_norm || - !l->attn_q_b || !l->attn_kv || !l->attn_kv_a_norm || - !l->attn_sinks || !l->attn_output_a || !l->attn_output_b || - !l->hc_ffn_fn || !l->hc_ffn_scale || !l->hc_ffn_base || - !l->ffn_norm || !l->ffn_gate_inp || !l->ffn_exp_probs_b || - !l->ffn_gate_exps || !l->ffn_up_exps || !l->ffn_down_exps || - !l->ffn_gate_shexp || !l->ffn_up_shexp || !l->ffn_down_shexp) { - return false; - } - - const uint64_t hc_dim = (uint64_t)DS4_N_HC * DS4_N_EMBD; - const uint64_t mix_hc = 2ull * DS4_N_HC + (uint64_t)DS4_N_HC * DS4_N_HC; - const uint64_t q_dim = (uint64_t)DS4_N_HEAD * DS4_N_HEAD_DIM; - const uint64_t rows = (uint64_t)dw->block_size + 1u; - const uint64_t draft = dw->block_size; - const uint64_t out_low_dim = (uint64_t)DS4_N_OUT_GROUP * DS4_N_LORA_O; - const uint64_t group_dim = - (uint64_t)DS4_N_HEAD_DIM * (DS4_N_HEAD / DS4_N_OUT_GROUP); - - return - dspark_tensor_type_matches(l->hc_attn_fn->type, DS4_DSPARK_LAYOUT_PLAIN) && - l->hc_attn_scale->type == DS4_TENSOR_F32 && - l->hc_attn_base->type == DS4_TENSOR_F32 && - l->attn_norm->type == DS4_TENSOR_F32 && - dspark_tensor_type_matches(l->attn_q_a->type, DS4_DSPARK_LAYOUT_DENSE) && - l->attn_q_a_norm->type == DS4_TENSOR_F32 && - dspark_tensor_type_matches(l->attn_q_b->type, DS4_DSPARK_LAYOUT_DENSE) && - dspark_tensor_type_matches(l->attn_kv->type, DS4_DSPARK_LAYOUT_DENSE) && - l->attn_kv_a_norm->type == DS4_TENSOR_F32 && - l->attn_sinks->type == DS4_TENSOR_F32 && - l->attn_output_a->type == DS4_TENSOR_Q8_0 && - l->attn_output_b->type == DS4_TENSOR_Q8_0 && - dspark_tensor_type_matches(l->hc_ffn_fn->type, DS4_DSPARK_LAYOUT_PLAIN) && - l->hc_ffn_scale->type == DS4_TENSOR_F32 && - l->hc_ffn_base->type == DS4_TENSOR_F32 && - l->ffn_norm->type == DS4_TENSOR_F32 && - dspark_tensor_type_matches(l->ffn_gate_inp->type, DS4_DSPARK_LAYOUT_DENSE) && - l->ffn_exp_probs_b->type == DS4_TENSOR_F32 && - tensor_is_routed_expert_type(l->ffn_gate_exps->type) && - l->ffn_gate_exps->type == l->ffn_up_exps->type && - tensor_is_routed_expert_type(l->ffn_down_exps->type) && - l->ffn_gate_shexp->type == DS4_TENSOR_Q8_0 && - l->ffn_up_shexp->type == DS4_TENSOR_Q8_0 && - l->ffn_down_shexp->type == DS4_TENSOR_Q8_0 && - l->hc_attn_fn->ndim == 2 && - l->hc_attn_fn->dim[0] == hc_dim && - l->hc_attn_fn->dim[1] == mix_hc && - l->attn_q_a->ndim == 2 && - l->attn_q_a->dim[0] == DS4_N_EMBD && - l->attn_q_a->dim[1] == DS4_N_LORA_Q && - l->attn_q_b->ndim == 2 && - l->attn_q_b->dim[0] == DS4_N_LORA_Q && - l->attn_q_b->dim[1] == q_dim && - l->attn_kv->ndim == 2 && - l->attn_kv->dim[0] == DS4_N_EMBD && - l->attn_kv->dim[1] == DS4_N_HEAD_DIM && - l->attn_output_a->ndim == 2 && - l->attn_output_a->dim[0] == group_dim && - l->attn_output_a->dim[1] == out_low_dim && - l->attn_output_b->ndim == 2 && - l->attn_output_b->dim[0] == out_low_dim && - l->attn_output_b->dim[1] == DS4_N_EMBD && - ds4_gpu_tensor_bytes(g->batch_hc_mix) >= rows * mix_hc * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_hc_split) >= rows * mix_hc * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_flat_hc) >= rows * hc_dim * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_attn_cur) >= rows * DS4_N_EMBD * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_attn_norm) >= rows * DS4_N_EMBD * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_qr) >= draft * DS4_N_LORA_Q * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_qr_norm) >= draft * DS4_N_LORA_Q * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_q) >= draft * q_dim * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_kv_raw) >= rows * DS4_N_HEAD_DIM * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_kv) >= rows * DS4_N_HEAD_DIM * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_heads) >= draft * q_dim * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_attn_out) >= draft * DS4_N_EMBD * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_after_attn_hc) >= draft * hc_dim * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_next_hc) >= draft * hc_dim * sizeof(float) && - ds4_gpu_tensor_bytes(g->prefill_tokens) >= draft * sizeof(int32_t) && - ds4_gpu_tensor_bytes(g->dspark_stage_output_hc) >= draft * hc_dim * sizeof(float); -} - -static bool dspark_stage_target_cache_seed_ready( - const ds4_gpu_graph *g, - const ds4_dspark_weights *dw, - uint32_t stage, - uint32_t n_tokens) { - if (!g || !dw || - stage >= dw->n_stages || - n_tokens == 0 || - n_tokens > g->prefill_cap || - !dspark_stage_cache_ready(g, dw) || - !g->batch_cur_hc || - !g->batch_hc_mix || - !g->batch_hc_split || - !g->batch_flat_hc || - !g->batch_attn_cur || - !g->batch_attn_norm || - !g->batch_kv_raw || - !g->batch_kv) { - return false; - } - - const ds4_layer_weights *l = &dw->stage[stage].block; - if (!l->hc_attn_fn || !l->hc_attn_scale || !l->hc_attn_base || - !l->attn_norm || !l->attn_kv || !l->attn_kv_a_norm) { - return false; - } - - const uint64_t hc_dim = (uint64_t)DS4_N_HC * DS4_N_EMBD; - const uint64_t mix_hc = 2ull * DS4_N_HC + (uint64_t)DS4_N_HC * DS4_N_HC; - return - dspark_tensor_type_matches(l->hc_attn_fn->type, DS4_DSPARK_LAYOUT_PLAIN) && - l->hc_attn_scale->type == DS4_TENSOR_F32 && - l->hc_attn_base->type == DS4_TENSOR_F32 && - l->attn_norm->type == DS4_TENSOR_F32 && - dspark_tensor_type_matches(l->attn_kv->type, DS4_DSPARK_LAYOUT_DENSE) && - l->attn_kv_a_norm->type == DS4_TENSOR_F32 && - l->hc_attn_fn->ndim == 2 && - l->hc_attn_fn->dim[0] == hc_dim && - l->hc_attn_fn->dim[1] == mix_hc && - l->attn_kv->ndim == 2 && - l->attn_kv->dim[0] == DS4_N_EMBD && - l->attn_kv->dim[1] == DS4_N_HEAD_DIM && - ds4_gpu_tensor_bytes(g->batch_cur_hc) >= - (uint64_t)n_tokens * hc_dim * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_hc_mix) >= - (uint64_t)n_tokens * mix_hc * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_hc_split) >= - (uint64_t)n_tokens * mix_hc * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_flat_hc) >= - (uint64_t)n_tokens * hc_dim * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_attn_cur) >= - (uint64_t)n_tokens * DS4_N_EMBD * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_attn_norm) >= - (uint64_t)n_tokens * DS4_N_EMBD * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_kv_raw) >= - (uint64_t)n_tokens * DS4_N_HEAD_DIM * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_kv) >= - (uint64_t)n_tokens * DS4_N_HEAD_DIM * sizeof(float); -} - -static bool metal_graph_seed_dspark_stage_target_cache( - ds4_gpu_graph *g, - const ds4_model *dspark_model, - const ds4_dspark_weights *dw, - uint32_t stage, - uint32_t pos0, - uint32_t n_tokens, - bool commands_open) { - if (!g || !dspark_model || !dw || - !dspark_stage_target_cache_seed_ready(g, dw, stage, n_tokens) || - n_tokens > g->dspark_cache_cap) { - return false; - } - - const uint64_t hc_dim = (uint64_t)DS4_N_HC * DS4_N_EMBD; - const uint64_t mix_hc = 2ull * DS4_N_HC + (uint64_t)DS4_N_HC * DS4_N_HC; - const ds4_layer_weights *block = &dw->stage[stage].block; - const bool fuse_hc_norm = DS4_N_HC == 4 && - !metal_graph_use_reference_hc_decode() && - metal_graph_enable_batch_hc_norm_fusion(); - - ds4_gpu_tensor *hc_mix_view = - ds4_gpu_tensor_view(g->batch_hc_mix, - 0, - (uint64_t)n_tokens * mix_hc * sizeof(float)); - ds4_gpu_tensor *hc_split_view = - ds4_gpu_tensor_view(g->batch_hc_split, - 0, - (uint64_t)n_tokens * mix_hc * sizeof(float)); - ds4_gpu_tensor *attn_cur_view = - ds4_gpu_tensor_view(g->batch_attn_cur, - 0, - (uint64_t)n_tokens * DS4_N_EMBD * sizeof(float)); - bool ok = hc_mix_view && hc_split_view && attn_cur_view; - - const float freq_base = DS4_ROPE_FREQ_BASE; - const float freq_scale = 1.0f; - const float ext_factor = 0.0f; - const float attn_factor = 1.0f; - - if (ok && !commands_open) ok = ds4_gpu_begin_commands() != 0; - if (ok) ok = ds4_gpu_rms_norm_plain_rows_tensor(g->batch_flat_hc, - g->batch_cur_hc, - (uint32_t)hc_dim, - n_tokens, - DS4_RMS_EPS) != 0; - if (ok) ok = metal_graph_matmul_plain_tensor(hc_mix_view, - dspark_model, - block->hc_attn_fn, - hc_dim, - mix_hc, - g->batch_flat_hc, - n_tokens); - if (fuse_hc_norm) { - if (ok) ok = ds4_gpu_hc_split_weighted_sum_norm_tensor(attn_cur_view, - g->batch_attn_norm, - hc_split_view, - hc_mix_view, - g->batch_cur_hc, - dspark_model->map, - dspark_model->size, - block->hc_attn_scale->abs_offset, - block->hc_attn_base->abs_offset, - block->attn_norm->abs_offset, - DS4_N_EMBD, - DS4_N_HC, - DS4_N_HC_SINKHORN_ITER, - DS4_HC_EPS, - DS4_RMS_EPS) != 0; - } else { - if (ok) ok = ds4_gpu_hc_split_weighted_sum_tensor(attn_cur_view, - hc_split_view, - hc_mix_view, - g->batch_cur_hc, - dspark_model->map, - dspark_model->size, - block->hc_attn_scale->abs_offset, - block->hc_attn_base->abs_offset, - DS4_N_EMBD, - DS4_N_HC, - DS4_N_HC_SINKHORN_ITER, - DS4_HC_EPS) != 0; - if (ok) ok = ds4_gpu_rms_norm_weight_rows_tensor(g->batch_attn_norm, - g->batch_attn_cur, - dspark_model->map, - dspark_model->size, - block->attn_norm->abs_offset, - DS4_N_EMBD, - n_tokens, - DS4_RMS_EPS) != 0; - } - if (ok) ok = metal_graph_matmul_plain_tensor(g->batch_kv_raw, - dspark_model, - block->attn_kv, - DS4_N_EMBD, - DS4_N_HEAD_DIM, - g->batch_attn_norm, - n_tokens); - if (ok) ok = ds4_gpu_rms_norm_weight_rows_tensor(g->batch_kv, - g->batch_kv_raw, - dspark_model->map, - dspark_model->size, - block->attn_kv_a_norm->abs_offset, - DS4_N_HEAD_DIM, - n_tokens, - DS4_RMS_EPS) != 0; - if (ok) ok = ds4_gpu_rope_tail_tensor(g->batch_kv, - n_tokens, - 1, - DS4_N_HEAD_DIM, - DS4_N_ROT, - pos0, - 0, - false, - freq_base, - freq_scale, - ext_factor, - attn_factor, - DS4_ROPE_YARN_BETA_FAST, - DS4_ROPE_YARN_BETA_SLOW) != 0; - if (ok) ok = ds4_gpu_dsv4_fp8_kv_quantize_tensor(g->batch_kv, - n_tokens, - DS4_N_HEAD_DIM, - DS4_N_ROT) != 0; - if (ok) ok = ds4_gpu_store_raw_kv_batch_tensor(g->dspark_raw_cache[stage], - g->batch_kv, - g->dspark_cache_cap, - pos0, - n_tokens, - DS4_N_HEAD_DIM) != 0; - if (ok && !commands_open) ok = ds4_gpu_end_commands() != 0; - - ds4_gpu_tensor_free(attn_cur_view); - ds4_gpu_tensor_free(hc_split_view); - ds4_gpu_tensor_free(hc_mix_view); - if (!ok && !commands_open) (void)ds4_gpu_synchronize(); - return ok; -} - -static bool metal_graph_seed_dspark_initial_cache_from_prefill( - ds4_gpu_graph *g, - const ds4_model *dspark_model, - const ds4_dspark_weights *dw, - uint32_t batch_start, - uint32_t n_tokens, - uint32_t *seeded_rows) { - if (seeded_rows) *seeded_rows = 0; - if (!g || !dspark_model || !dw || - n_tokens == 0 || - n_tokens > g->prefill_cap || - n_tokens > g->dspark_cache_cap || - dw->n_stages == 0 || - dw->n_stages > DS4_DSPARK_MAX_STAGES || - !dspark_stage0_batch_ready(g, dw, n_tokens) || - !dspark_stage_cache_ready(g, dw)) { - return false; - } - - bool ok = ds4_gpu_begin_commands() != 0; - if (ok) { - ok = metal_graph_eval_dspark_stage0_batch(g, - dspark_model, - dw, - n_tokens, - true); - } - if (ok) { - ok = ds4_gpu_repeat_hc_rows_tensor(g->batch_cur_hc, - g->batch_ffn_norm, - n_tokens, - DS4_N_EMBD, - DS4_N_HC) != 0; - } - for (uint32_t stage = 0; ok && stage < dw->n_stages; stage++) { - ok = metal_graph_seed_dspark_stage_target_cache(g, - dspark_model, - dw, - stage, - batch_start, - n_tokens, - true); - } - if (ok) ok = ds4_gpu_end_commands() != 0; - if (!ok) { - (void)ds4_gpu_synchronize(); - return false; - } - if (!metal_graph_dspark_cache_set_window(g, batch_start, n_tokens)) { - return false; - } - if (seeded_rows) *seeded_rows = n_tokens; - return true; -} - -static bool metal_graph_encode_dspark_next_stage_draft_input_from( - ds4_gpu_graph *g, - const ds4_dspark_weights *dw, - const ds4_gpu_tensor *draft_hc) { - if (!g || !dw || !dspark_stage_input_ready(g, dw) || - !draft_hc) { - return false; - } - - const uint64_t hc_dim = (uint64_t)DS4_N_HC * DS4_N_EMBD; - const uint64_t hc_bytes = hc_dim * sizeof(float); - if (ds4_gpu_tensor_bytes(draft_hc) < - (uint64_t)dw->block_size * hc_bytes) { - return false; - } - - return ds4_gpu_tensor_copy(g->dspark_stage_input_hc, - hc_bytes, - draft_hc, - 0, - (uint64_t)dw->block_size * hc_bytes) != 0; -} - -static bool metal_graph_dspark_stage_profile_enabled(uint32_t stage) { - return getenv("DS4_DSPARK_STAGE_PROFILE") != NULL && - metal_graph_profile_layer_env_match("DS4_DSPARK_STAGE_PROFILE_STAGE", - stage); -} - -static bool metal_graph_dspark_stage_profile_boundary( - const char *part, - uint32_t stage, - uint32_t pos, - uint32_t rows, - double *stage_t0) { - if (ds4_gpu_end_commands() == 0) return false; - const double now = now_sec(); - fprintf(stderr, - "ds4: DSpark stage profile stage=%u pos=%u rows=%u %s=%.3f ms\n", - stage, - pos, - rows, - part, - (now - *stage_t0) * 1000.0); - *stage_t0 = now; - return ds4_gpu_begin_commands() != 0; -} - -static bool metal_graph_eval_dspark_stage_block( - ds4_gpu_graph *g, - const ds4_model *dspark_model, - const ds4_dspark_weights *dw, - uint32_t stage, - uint32_t pos, - uint32_t support_len, - uint32_t raw_start, - bool prepare_next_stage_input, - bool commands_open) { - if (!g || !dspark_model || !dw || - !dspark_stage_block_ready(g, dw, stage)) { - return false; - } - - const uint32_t draft = dw->block_size; - const uint32_t rows = draft + 1u; - if (support_len > g->dspark_cache_cap || - rows > g->dspark_cache_cap - support_len || - (support_len != 0 && raw_start >= g->dspark_cache_cap)) { - return false; - } - const uint32_t visible_rows = support_len + rows; - const uint32_t attention_raw_start = - support_len ? raw_start : (pos % g->dspark_cache_cap); - const uint32_t append_pos = support_len ? - (uint32_t)(((uint64_t)raw_start + support_len) % - g->dspark_cache_cap) : - attention_raw_start; - const uint64_t hc_dim = (uint64_t)DS4_N_HC * DS4_N_EMBD; - const uint64_t mix_hc = 2ull * DS4_N_HC + (uint64_t)DS4_N_HC * DS4_N_HC; - const uint64_t q_dim = (uint64_t)DS4_N_HEAD * DS4_N_HEAD_DIM; - const uint64_t group_dim = - (uint64_t)DS4_N_HEAD_DIM * (DS4_N_HEAD / DS4_N_OUT_GROUP); - const ds4_layer_weights *block = &dw->stage[stage].block; - const bool fuse_hc_norm = DS4_N_HC == 4 && - !metal_graph_use_reference_hc_decode() && - metal_graph_enable_batch_hc_norm_fusion(); - - ds4_gpu_tensor *hc_mix_view = - ds4_gpu_tensor_view(g->batch_hc_mix, - 0, - (uint64_t)rows * mix_hc * sizeof(float)); - ds4_gpu_tensor *hc_split_view = - ds4_gpu_tensor_view(g->batch_hc_split, - 0, - (uint64_t)rows * mix_hc * sizeof(float)); - ds4_gpu_tensor *attn_cur_view = - ds4_gpu_tensor_view(g->batch_attn_cur, - 0, - (uint64_t)rows * DS4_N_EMBD * sizeof(float)); - ds4_gpu_tensor *draft_attn_norm_view = - ds4_gpu_tensor_view(g->batch_attn_norm, - (uint64_t)DS4_N_EMBD * sizeof(float), - (uint64_t)draft * DS4_N_EMBD * sizeof(float)); - ds4_gpu_tensor *draft_hc_view = - ds4_gpu_tensor_view(g->dspark_stage_input_hc, - hc_dim * sizeof(float), - (uint64_t)draft * hc_dim * sizeof(float)); - ds4_gpu_tensor *draft_hc_split_view = - ds4_gpu_tensor_view(g->batch_hc_split, - mix_hc * sizeof(float), - (uint64_t)draft * mix_hc * sizeof(float)); - ds4_gpu_tensor *kv_target_view = - ds4_gpu_tensor_view(g->batch_kv, - 0, - (uint64_t)DS4_N_HEAD_DIM * sizeof(float)); - ds4_gpu_tensor *kv_draft_view = - ds4_gpu_tensor_view(g->batch_kv, - (uint64_t)DS4_N_HEAD_DIM * sizeof(float), - (uint64_t)draft * DS4_N_HEAD_DIM * sizeof(float)); - ds4_gpu_tensor *after_attn_hc_view = - ds4_gpu_tensor_view(g->batch_after_attn_hc, - 0, - (uint64_t)draft * hc_dim * sizeof(float)); - - bool ok = hc_mix_view && hc_split_view && attn_cur_view && - draft_attn_norm_view && draft_hc_view && - draft_hc_split_view && kv_target_view && kv_draft_view && - after_attn_hc_view; - const bool saved_streaming = g->ssd_streaming; - g->ssd_streaming = false; - - const float freq_base = DS4_ROPE_FREQ_BASE; - const float freq_scale = 1.0f; - const float ext_factor = 0.0f; - const float attn_factor = 1.0f; - const bool stage_profile = - metal_graph_dspark_stage_profile_enabled(stage); - double stage_t0 = stage_profile ? now_sec() : 0.0; -#define DS4_DSPARK_PROFILE_STAGE(part_) do { \ - if (ok && stage_profile) { \ - ok = metal_graph_dspark_stage_profile_boundary((part_), \ - stage, \ - pos, \ - rows, \ - &stage_t0); \ - } \ - } while (0) - - if (ok && !commands_open) ok = ds4_gpu_begin_commands() != 0; - if (ok) ok = ds4_gpu_rms_norm_plain_rows_tensor(g->batch_flat_hc, - g->dspark_stage_input_hc, - (uint32_t)hc_dim, - rows, - DS4_RMS_EPS) != 0; - if (ok) ok = metal_graph_matmul_plain_tensor(hc_mix_view, - dspark_model, - block->hc_attn_fn, - hc_dim, - mix_hc, - g->batch_flat_hc, - rows); - DS4_DSPARK_PROFILE_STAGE("attn_hc_pre"); - if (fuse_hc_norm) { - if (ok) ok = ds4_gpu_hc_split_weighted_sum_norm_tensor(attn_cur_view, - g->batch_attn_norm, - hc_split_view, - hc_mix_view, - g->dspark_stage_input_hc, - dspark_model->map, - dspark_model->size, - block->hc_attn_scale->abs_offset, - block->hc_attn_base->abs_offset, - block->attn_norm->abs_offset, - DS4_N_EMBD, - DS4_N_HC, - DS4_N_HC_SINKHORN_ITER, - DS4_HC_EPS, - DS4_RMS_EPS) != 0; - } else { - if (ok) ok = ds4_gpu_hc_split_weighted_sum_tensor(attn_cur_view, - hc_split_view, - hc_mix_view, - g->dspark_stage_input_hc, - dspark_model->map, - dspark_model->size, - block->hc_attn_scale->abs_offset, - block->hc_attn_base->abs_offset, - DS4_N_EMBD, - DS4_N_HC, - DS4_N_HC_SINKHORN_ITER, - DS4_HC_EPS) != 0; - if (ok) ok = ds4_gpu_rms_norm_weight_rows_tensor(g->batch_attn_norm, - g->batch_attn_cur, - dspark_model->map, - dspark_model->size, - block->attn_norm->abs_offset, - DS4_N_EMBD, - rows, - DS4_RMS_EPS) != 0; - } - DS4_DSPARK_PROFILE_STAGE("attn_norm"); - - if (ok) ok = metal_graph_matmul_plain_tensor(g->batch_qr, - dspark_model, - block->attn_q_a, - DS4_N_EMBD, - DS4_N_LORA_Q, - draft_attn_norm_view, - draft); - if (ok) ok = ds4_gpu_rms_norm_weight_rows_tensor(g->batch_qr_norm, - g->batch_qr, - dspark_model->map, - dspark_model->size, - block->attn_q_a_norm->abs_offset, - DS4_N_LORA_Q, - draft, - DS4_RMS_EPS) != 0; - if (ok) ok = metal_graph_matmul_plain_tensor(g->batch_q, - dspark_model, - block->attn_q_b, - DS4_N_LORA_Q, - q_dim, - g->batch_qr_norm, - draft); - if (ok) ok = ds4_gpu_head_rms_norm_tensor(g->batch_q, - draft, - DS4_N_HEAD, - DS4_N_HEAD_DIM, - DS4_RMS_EPS) != 0; - if (ok) ok = ds4_gpu_rope_tail_tensor(g->batch_q, - draft, - DS4_N_HEAD, - DS4_N_HEAD_DIM, - DS4_N_ROT, - pos, - 0, - false, - freq_base, - freq_scale, - ext_factor, - attn_factor, - DS4_ROPE_YARN_BETA_FAST, - DS4_ROPE_YARN_BETA_SLOW) != 0; - DS4_DSPARK_PROFILE_STAGE("q_path"); - - if (ok) ok = metal_graph_matmul_plain_tensor(g->batch_kv_raw, - dspark_model, - block->attn_kv, - DS4_N_EMBD, - DS4_N_HEAD_DIM, - g->batch_attn_norm, - rows); - if (ok) ok = ds4_gpu_rms_norm_weight_rows_tensor(g->batch_kv, - g->batch_kv_raw, - dspark_model->map, - dspark_model->size, - block->attn_kv_a_norm->abs_offset, - DS4_N_HEAD_DIM, - rows, - DS4_RMS_EPS) != 0; - if (ok) ok = ds4_gpu_rope_tail_tensor(kv_target_view, - 1, - 1, - DS4_N_HEAD_DIM, - DS4_N_ROT, - pos, - 0, - false, - freq_base, - freq_scale, - ext_factor, - attn_factor, - DS4_ROPE_YARN_BETA_FAST, - DS4_ROPE_YARN_BETA_SLOW) != 0; - if (ok) ok = ds4_gpu_rope_tail_tensor(kv_draft_view, - draft, - 1, - DS4_N_HEAD_DIM, - DS4_N_ROT, - pos, - 0, - false, - freq_base, - freq_scale, - ext_factor, - attn_factor, - DS4_ROPE_YARN_BETA_FAST, - DS4_ROPE_YARN_BETA_SLOW) != 0; - if (ok) ok = ds4_gpu_dsv4_fp8_kv_quantize_tensor(g->batch_kv, - rows, - DS4_N_HEAD_DIM, - DS4_N_ROT) != 0; - if (ok) ok = ds4_gpu_store_raw_kv_batch_tensor(g->dspark_raw_cache[stage], - g->batch_kv, - g->dspark_cache_cap, - append_pos, - rows, - DS4_N_HEAD_DIM) != 0; - DS4_DSPARK_PROFILE_STAGE("kv_path"); - - if (ok) ok = ds4_gpu_attention_noncausal_raw_batch_heads_tensor( - g->batch_heads, - dspark_model->map, - dspark_model->size, - block->attn_sinks->abs_offset, - g->batch_q, - g->dspark_raw_cache[stage], - draft, - visible_rows, - g->dspark_cache_cap, - attention_raw_start, - DS4_N_HEAD, - DS4_N_HEAD_DIM) != 0; - if (ok) ok = ds4_gpu_rope_tail_tensor(g->batch_heads, - draft, - DS4_N_HEAD, - DS4_N_HEAD_DIM, - DS4_N_ROT, - pos, - 0, - true, - freq_base, - freq_scale, - ext_factor, - attn_factor, - DS4_ROPE_YARN_BETA_FAST, - DS4_ROPE_YARN_BETA_SLOW) != 0; - DS4_DSPARK_PROFILE_STAGE("attention"); - if (ok) ok = ds4_gpu_attention_output_q8_batch_tensor( - g->batch_attn_out, - g->batch_attn_low, - g->batch_group_tmp, - g->batch_low_tmp, - dspark_model->map, - dspark_model->size, - block->attn_output_a->abs_offset, - block->attn_output_b->abs_offset, - group_dim, - DS4_N_LORA_O, - DS4_N_OUT_GROUP, - DS4_N_EMBD, - g->batch_heads, - draft) != 0; - if (ok) ok = ds4_gpu_hc_expand_split_tensor(after_attn_hc_view, - g->batch_attn_out, - draft_hc_view, - draft_hc_split_view, - DS4_N_EMBD, - DS4_N_HC) != 0; - DS4_DSPARK_PROFILE_STAGE("attn_output_hc"); - - if (ok) ok = metal_graph_encode_layer_ffn_batch(g, - dspark_model, - block, - stage, - pos, - draft); - DS4_DSPARK_PROFILE_STAGE("ffn"); - if (ok && - !prepare_next_stage_input && - getenv("DS4_DSPARK_DISABLE_FINAL_OUTPUT_ALIAS") != NULL) { - ok = ds4_gpu_tensor_copy(g->dspark_stage_output_hc, - 0, - g->batch_next_hc, - 0, - (uint64_t)draft * hc_dim * sizeof(float)) != 0; - } - DS4_DSPARK_PROFILE_STAGE("copy_output"); - if (ok && prepare_next_stage_input) { - ok = metal_graph_encode_dspark_next_stage_draft_input_from( - g, dw, g->batch_next_hc); - } - DS4_DSPARK_PROFILE_STAGE("next_input"); - if (ok && !commands_open) ok = ds4_gpu_end_commands() != 0; - g->ssd_streaming = saved_streaming; - - ds4_gpu_tensor_free(after_attn_hc_view); - ds4_gpu_tensor_free(kv_draft_view); - ds4_gpu_tensor_free(kv_target_view); - ds4_gpu_tensor_free(draft_hc_split_view); - ds4_gpu_tensor_free(draft_hc_view); - ds4_gpu_tensor_free(draft_attn_norm_view); - ds4_gpu_tensor_free(attn_cur_view); - ds4_gpu_tensor_free(hc_split_view); - ds4_gpu_tensor_free(hc_mix_view); - if (!ok && !commands_open) (void)ds4_gpu_synchronize(); -#undef DS4_DSPARK_PROFILE_STAGE - return ok; -} - -static bool metal_graph_eval_dspark_stage_chain( - ds4_gpu_graph *g, - const ds4_model *dspark_model, - const ds4_dspark_weights *dw, - uint32_t pos, - uint32_t *completed_stages, - uint32_t *cache_start_out, - uint32_t *cache_rows_out) { - if (completed_stages) *completed_stages = 0; - if (cache_start_out) *cache_start_out = 0; - if (cache_rows_out) *cache_rows_out = 0; - if (!g || !dspark_model || !dw || - dw->n_stages == 0 || - dw->n_stages > DS4_DSPARK_MAX_STAGES || - !dspark_stage_input_ready(g, dw) || - !dspark_stage_cache_ready(g, dw) || - !g->prefill_tokens || - !g->dspark_draft_tokens) { - return false; - } - - const uint32_t rows = dw->block_size + 1u; - const uint32_t support_len = g->dspark_cache_len; - const uint32_t raw_start = support_len ? g->dspark_cache_start : 0; - if (support_len > g->dspark_cache_cap || - rows > g->dspark_cache_cap - support_len || - (support_len != 0 && raw_start >= g->dspark_cache_cap) || - !metal_graph_dspark_cache_ends_at(g, pos)) { - return false; - } - if (cache_start_out) { - *cache_start_out = support_len ? raw_start : - (pos % g->dspark_cache_cap); - } - if (cache_rows_out) *cache_rows_out = support_len + rows; - - for (uint32_t stage = 0; stage < dw->n_stages; stage++) { - if (!dspark_stage_block_ready(g, dw, stage)) return false; - } - - bool ok = ds4_gpu_begin_commands() != 0; - if (ok) { - ok = ds4_gpu_tensor_copy(g->prefill_tokens, - 0, - g->dspark_draft_tokens, - 0, - (uint64_t)dw->block_size * sizeof(int32_t)) != 0; - } - for (uint32_t stage = 0; ok && stage < dw->n_stages; stage++) { - const bool stage_ok = - metal_graph_eval_dspark_stage_block(g, - dspark_model, - dw, - stage, - pos, - support_len, - raw_start, - stage + 1u < dw->n_stages, - true); - if (!stage_ok) { - ok = false; - break; - } - if (completed_stages) *completed_stages = stage + 1u; - } - if (ok) ok = ds4_gpu_end_commands() != 0; - if (!ok) { - (void)ds4_gpu_synchronize(); - return false; - } - return true; -} - -static ds4_gpu_tensor *metal_graph_dspark_final_output_hc(const ds4_gpu_graph *g) { - if (!g) return NULL; - if (getenv("DS4_DSPARK_DISABLE_FINAL_OUTPUT_ALIAS") == NULL && - g->batch_next_hc) { - return g->batch_next_hc; - } - return g->dspark_stage_output_hc; -} - -static bool dspark_final_head_ready( - const ds4_gpu_graph *g, - const ds4_weights *base_weights, - const ds4_dspark_weights *dw) { - if (!g || !base_weights || !dw || - dw->n_stages == 0 || - dw->n_stages > DS4_DSPARK_MAX_STAGES || - dw->block_size == 0 || - dw->block_size > DS4_DSPARK_MAX_BLOCK_SIZE || - !base_weights->output || - !metal_graph_dspark_final_output_hc(g) || - !g->batch_hc_mix || - !g->batch_hc_split || - !g->batch_flat_hc || - !g->batch_ffn_cur || - !g->batch_ffn_norm || - !g->spec_logits) { - return false; - } - - const ds4_dspark_stage_weights *final = - &dw->stage[dw->n_stages - 1u]; - const uint64_t hc_dim = (uint64_t)DS4_N_HC * DS4_N_EMBD; - const uint64_t draft = dw->block_size; - const uint64_t vocab_dim = base_weights->output->dim[1]; - if (!final->norm || - !final->hc_head_base || - !final->hc_head_fn || - !final->hc_head_scale || - final->norm->type != DS4_TENSOR_F32 || - final->hc_head_base->type != DS4_TENSOR_F32 || - !dspark_tensor_type_matches(final->hc_head_fn->type, - DS4_DSPARK_LAYOUT_PLAIN) || - final->hc_head_scale->type != DS4_TENSOR_F32 || - base_weights->output->type != DS4_TENSOR_Q8_0) { - return false; - } - - return final->norm->ndim == 1 && - final->norm->dim[0] == DS4_N_EMBD && - final->hc_head_base->ndim == 1 && - final->hc_head_base->dim[0] == DS4_N_HC && - final->hc_head_fn->ndim == 2 && - final->hc_head_fn->dim[0] == hc_dim && - final->hc_head_fn->dim[1] == DS4_N_HC && - final->hc_head_scale->ndim == 1 && - final->hc_head_scale->dim[0] == 1 && - base_weights->output->ndim == 2 && - base_weights->output->dim[0] == DS4_N_EMBD && - vocab_dim == DS4_N_VOCAB && - ds4_gpu_tensor_bytes( - metal_graph_dspark_final_output_hc(g)) >= - draft * hc_dim * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_flat_hc) >= - draft * hc_dim * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_hc_mix) >= - draft * DS4_N_HC * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_hc_split) >= - draft * DS4_N_HC * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_ffn_cur) >= - draft * DS4_N_EMBD * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_ffn_norm) >= - draft * DS4_N_EMBD * sizeof(float) && - ds4_gpu_tensor_bytes(g->spec_logits) >= - draft * vocab_dim * sizeof(float); -} - -static bool metal_graph_eval_dspark_base_logits( - ds4_gpu_graph *g, - const ds4_model *base_model, - const ds4_weights *base_weights, - const ds4_model *dspark_model, - const ds4_dspark_weights *dw) { - if (!g || !base_model || !base_weights || !dspark_model || !dw || - !dspark_final_head_ready(g, base_weights, dw)) { - return false; - } - - const ds4_dspark_stage_weights *final = - &dw->stage[dw->n_stages - 1u]; - const uint32_t draft = dw->block_size; - const uint64_t hc_dim = (uint64_t)DS4_N_HC * DS4_N_EMBD; - const uint64_t vocab_dim = base_weights->output->dim[1]; - ds4_gpu_tensor *stage_output_hc = metal_graph_dspark_final_output_hc(g); - ds4_gpu_tensor *output_pre = - ds4_gpu_tensor_view(g->batch_hc_mix, - 0, - (uint64_t)draft * DS4_N_HC * sizeof(float)); - ds4_gpu_tensor *output_weights = - ds4_gpu_tensor_view(g->batch_hc_split, - 0, - (uint64_t)draft * DS4_N_HC * sizeof(float)); - ds4_gpu_tensor *output_embd = - ds4_gpu_tensor_view(g->batch_ffn_cur, - 0, - (uint64_t)draft * DS4_N_EMBD * sizeof(float)); - ds4_gpu_tensor *output_norm = - ds4_gpu_tensor_view(g->batch_ffn_norm, - 0, - (uint64_t)draft * DS4_N_EMBD * sizeof(float)); - ds4_gpu_tensor *logits = - ds4_gpu_tensor_view(g->spec_logits, - 0, - (uint64_t)draft * vocab_dim * sizeof(float)); - - bool ok = stage_output_hc && output_pre && output_weights && output_embd && - output_norm && logits; - if (ok) ok = ds4_gpu_begin_commands() != 0; - if (ok) ok = ds4_gpu_rms_norm_plain_rows_tensor(g->batch_flat_hc, - stage_output_hc, - (uint32_t)hc_dim, - draft, - DS4_RMS_EPS) != 0; - if (ok) ok = metal_graph_matmul_plain_tensor(output_pre, - dspark_model, - final->hc_head_fn, - hc_dim, - DS4_N_HC, - g->batch_flat_hc, - draft); - if (ok) ok = ds4_gpu_output_hc_weights_tensor(output_weights, - output_pre, - dspark_model->map, - dspark_model->size, - final->hc_head_scale->abs_offset, - final->hc_head_base->abs_offset, - DS4_N_HC, - DS4_HC_EPS) != 0; - if (ok) ok = ds4_gpu_hc_weighted_sum_tensor(output_embd, - stage_output_hc, - output_weights, - DS4_N_EMBD, - DS4_N_HC) != 0; - if (ok) ok = ds4_gpu_rms_norm_weight_rows_tensor(output_norm, - output_embd, - dspark_model->map, - dspark_model->size, - final->norm->abs_offset, - DS4_N_EMBD, - draft, - DS4_RMS_EPS) != 0; - if (ok) ok = ds4_gpu_matmul_q8_0_tensor(logits, - base_model->map, - base_model->size, - base_weights->output->abs_offset, - DS4_N_EMBD, - vocab_dim, - output_norm, - draft) != 0; - if (ok) ok = ds4_gpu_end_commands() != 0; - if (!ok) (void)ds4_gpu_synchronize(); - - ds4_gpu_tensor_free(logits); - ds4_gpu_tensor_free(output_norm); - ds4_gpu_tensor_free(output_embd); - ds4_gpu_tensor_free(output_weights); - ds4_gpu_tensor_free(output_pre); - return ok; -} - -static bool metal_graph_eval_dspark_final_hidden( - ds4_gpu_graph *g, - const ds4_model *dspark_model, - const ds4_dspark_weights *dw) { - if (!g || !dspark_model || !dw || - dw->n_stages == 0 || - dw->n_stages > DS4_DSPARK_MAX_STAGES || - dw->block_size == 0 || - dw->block_size > DS4_DSPARK_MAX_BLOCK_SIZE || - !metal_graph_dspark_final_output_hc(g) || - !g->batch_hc_mix || - !g->batch_hc_split || - !g->batch_flat_hc || - !g->batch_ffn_cur || - !g->batch_ffn_norm) { - return false; - } - - const ds4_dspark_stage_weights *final = - &dw->stage[dw->n_stages - 1u]; - const uint32_t draft = dw->block_size; - const uint64_t hc_dim = (uint64_t)DS4_N_HC * DS4_N_EMBD; - if (!final->norm || - !final->hc_head_base || - !final->hc_head_fn || - !final->hc_head_scale || - final->norm->type != DS4_TENSOR_F32 || - final->hc_head_base->type != DS4_TENSOR_F32 || - !dspark_tensor_type_matches(final->hc_head_fn->type, - DS4_DSPARK_LAYOUT_PLAIN) || - final->hc_head_scale->type != DS4_TENSOR_F32 || - final->norm->ndim != 1 || - final->norm->dim[0] != DS4_N_EMBD || - final->hc_head_base->ndim != 1 || - final->hc_head_base->dim[0] != DS4_N_HC || - final->hc_head_fn->ndim != 2 || - final->hc_head_fn->dim[0] != hc_dim || - final->hc_head_fn->dim[1] != DS4_N_HC || - final->hc_head_scale->ndim != 1 || - final->hc_head_scale->dim[0] != 1 || - ds4_gpu_tensor_bytes(metal_graph_dspark_final_output_hc(g)) < - (uint64_t)draft * hc_dim * sizeof(float) || - ds4_gpu_tensor_bytes(g->batch_flat_hc) < - (uint64_t)draft * hc_dim * sizeof(float) || - ds4_gpu_tensor_bytes(g->batch_hc_mix) < - (uint64_t)draft * DS4_N_HC * sizeof(float) || - ds4_gpu_tensor_bytes(g->batch_hc_split) < - (uint64_t)draft * DS4_N_HC * sizeof(float) || - ds4_gpu_tensor_bytes(g->batch_ffn_cur) < - (uint64_t)draft * DS4_N_EMBD * sizeof(float) || - ds4_gpu_tensor_bytes(g->batch_ffn_norm) < - (uint64_t)draft * DS4_N_EMBD * sizeof(float)) { - return false; - } - - ds4_gpu_tensor *output_pre = - ds4_gpu_tensor_view(g->batch_hc_mix, - 0, - (uint64_t)draft * DS4_N_HC * sizeof(float)); - ds4_gpu_tensor *output_weights = - ds4_gpu_tensor_view(g->batch_hc_split, - 0, - (uint64_t)draft * DS4_N_HC * sizeof(float)); - ds4_gpu_tensor *output_embd = - ds4_gpu_tensor_view(g->batch_ffn_cur, - 0, - (uint64_t)draft * DS4_N_EMBD * sizeof(float)); - ds4_gpu_tensor *output_norm = - ds4_gpu_tensor_view(g->batch_ffn_norm, - 0, - (uint64_t)draft * DS4_N_EMBD * sizeof(float)); - ds4_gpu_tensor *stage_output_hc = metal_graph_dspark_final_output_hc(g); - - bool ok = stage_output_hc && output_pre && output_weights && - output_embd && output_norm; - if (ok) ok = ds4_gpu_begin_commands() != 0; - if (ok) ok = ds4_gpu_rms_norm_plain_rows_tensor(g->batch_flat_hc, - stage_output_hc, - (uint32_t)hc_dim, - draft, - DS4_RMS_EPS) != 0; - if (ok) ok = metal_graph_matmul_plain_tensor(output_pre, - dspark_model, - final->hc_head_fn, - hc_dim, - DS4_N_HC, - g->batch_flat_hc, - draft); - if (ok) ok = ds4_gpu_output_hc_weights_tensor(output_weights, - output_pre, - dspark_model->map, - dspark_model->size, - final->hc_head_scale->abs_offset, - final->hc_head_base->abs_offset, - DS4_N_HC, - DS4_HC_EPS) != 0; - if (ok) ok = ds4_gpu_hc_weighted_sum_tensor(output_embd, - stage_output_hc, - output_weights, - DS4_N_EMBD, - DS4_N_HC) != 0; - if (ok) ok = ds4_gpu_rms_norm_weight_rows_tensor(output_norm, - output_embd, - dspark_model->map, - dspark_model->size, - final->norm->abs_offset, - DS4_N_EMBD, - draft, - DS4_RMS_EPS) != 0; - if (ok) ok = ds4_gpu_end_commands() != 0; - if (!ok) (void)ds4_gpu_synchronize(); - - ds4_gpu_tensor_free(output_norm); - ds4_gpu_tensor_free(output_embd); - ds4_gpu_tensor_free(output_weights); - ds4_gpu_tensor_free(output_pre); - return ok; -} - -static bool metal_graph_eval_dspark_base_logits_from_hidden( - ds4_gpu_graph *g, - const ds4_model *base_model, - const ds4_weights *base_weights, - const ds4_dspark_weights *dw) { - if (!g || !base_model || !base_weights || !dw || - dw->block_size == 0 || - dw->block_size > DS4_DSPARK_MAX_BLOCK_SIZE || - !base_weights->output || - base_weights->output->type != DS4_TENSOR_Q8_0 || - base_weights->output->ndim != 2 || - base_weights->output->dim[0] != DS4_N_EMBD || - base_weights->output->dim[1] != DS4_N_VOCAB || - !g->batch_ffn_norm || - !g->spec_logits || - ds4_gpu_tensor_bytes(g->batch_ffn_norm) < - (uint64_t)dw->block_size * DS4_N_EMBD * sizeof(float) || - ds4_gpu_tensor_bytes(g->spec_logits) < - (uint64_t)dw->block_size * DS4_N_VOCAB * sizeof(float)) { - return false; - } - - ds4_gpu_tensor *output_norm = - ds4_gpu_tensor_view(g->batch_ffn_norm, - 0, - (uint64_t)dw->block_size * - DS4_N_EMBD * sizeof(float)); - ds4_gpu_tensor *logits = - ds4_gpu_tensor_view(g->spec_logits, - 0, - (uint64_t)dw->block_size * - DS4_N_VOCAB * sizeof(float)); - bool ok = output_norm && logits; - if (ok) ok = ds4_gpu_begin_commands() != 0; - if (ok) ok = ds4_gpu_matmul_q8_0_tensor(logits, - base_model->map, - base_model->size, - base_weights->output->abs_offset, - DS4_N_EMBD, - DS4_N_VOCAB, - output_norm, - dw->block_size) != 0; - if (ok) ok = ds4_gpu_end_commands() != 0; - if (!ok) (void)ds4_gpu_synchronize(); - - ds4_gpu_tensor_free(logits); - ds4_gpu_tensor_free(output_norm); - return ok; -} - -static bool dspark_markov_probe_ready( - const ds4_dspark_weights *dw) { - if (!dw || - dw->n_stages == 0 || - dw->n_stages > DS4_DSPARK_MAX_STAGES || - dw->block_size == 0 || - dw->block_size > DS4_DSPARK_MAX_BLOCK_SIZE || - dw->markov_rank == 0) { - return false; - } - - const ds4_dspark_stage_weights *final = - &dw->stage[dw->n_stages - 1u]; - if (!final->markov_w1 || - !final->markov_w2 || - !dspark_tensor_type_matches(final->markov_w1->type, - DS4_DSPARK_LAYOUT_DENSE) || - !dspark_tensor_type_matches(final->markov_w2->type, - DS4_DSPARK_LAYOUT_DENSE)) { - return false; - } - - return final->markov_w1->ndim == 2 && - final->markov_w1->dim[0] == dw->markov_rank && - final->markov_w1->dim[1] == DS4_N_VOCAB && - final->markov_w2->ndim == 2 && - final->markov_w2->dim[0] == dw->markov_rank && - final->markov_w2->dim[1] == DS4_N_VOCAB; -} - -static bool dspark_dense_row_to_f32( - float *out, - const ds4_model *model, - const ds4_tensor *t, - uint32_t row) { - if (!out || !model || !t || t->ndim != 2 || row >= t->dim[1]) { - return false; - } - - const uint64_t width = t->dim[0]; - if (t->type == DS4_TENSOR_F32) { - const float *base = tensor_data(model, t); - memcpy(out, base + (uint64_t)row * width, width * sizeof(out[0])); - return true; - } - if (t->type == DS4_TENSOR_F16) { - const uint16_t *base = tensor_data(model, t); - const uint16_t *src = base + (uint64_t)row * width; - for (uint64_t i = 0; i < width; i++) out[i] = f16_to_f32(src[i]); - return true; - } - if (t->type == DS4_TENSOR_Q8_0) { - const uint64_t blocks = (width + 31u) / 32u; - const uint8_t *src = - (const uint8_t *)tensor_data(model, t) + - (uint64_t)row * blocks * 34u; - for (uint64_t b = 0; b < blocks; b++) { - uint16_t scale_bits; - memcpy(&scale_bits, src + b * 34u, sizeof(scale_bits)); - const float scale = f16_to_f32(scale_bits); - const int8_t *qs = (const int8_t *)(src + b * 34u + 2u); - const uint64_t i0 = b * 32u; - const uint64_t n = width - i0 < 32u ? width - i0 : 32u; - for (uint64_t i = 0; i < n; i++) { - out[i0 + i] = scale * (float)qs[i]; - } - } - return true; - } - return false; -} - -static uint32_t dspark_argmax_f32(const float *x, uint32_t n) { - uint32_t best = 0; - float best_v = x[0]; - for (uint32_t i = 1; i < n; i++) { - if (x[i] > best_v) { - best_v = x[i]; - best = i; - } - } - return best; -} - -typedef struct { - const uint8_t *data; - const int8_t *xq; - const float *xscale; - const float *logits; - uint64_t in_dim; - uint64_t blocks; - uint64_t rows_per_slot; - uint32_t best_idx[DS4_MAX_THREADS]; - float best_val[DS4_MAX_THREADS]; -} dspark_markov_q8_0_argmax_ctx; - -static void dspark_markov_q8_0_argmax_worker( - void *vctx, - uint64_t row0, - uint64_t row1) { - dspark_markov_q8_0_argmax_ctx *ctx = vctx; - uint64_t slot = ctx->rows_per_slot ? row0 / ctx->rows_per_slot : 0; - if (slot >= DS4_MAX_THREADS) slot = DS4_MAX_THREADS - 1u; - - float best_v = -FLT_MAX; - uint32_t best = (uint32_t)row0; - for (uint64_t row = row0; row < row1; row++) { - const uint8_t *wrow = ctx->data + row * ctx->blocks * 34u; - const float score = - ctx->logits[row] + - dot_q8_0_row(wrow, ctx->xq, ctx->xscale, ctx->in_dim, ctx->blocks); - if (score > best_v) { - best_v = score; - best = (uint32_t)row; - } - } - - ctx->best_idx[slot] = best; - ctx->best_val[slot] = best_v; -} - -static bool dspark_markov_q8_0_argmax( - uint32_t *token_out, - const ds4_model *model, - const ds4_tensor *w, - const float *state, - const float *logits) { - if (!token_out || - !model || - !w || - !state || - !logits || - w->type != DS4_TENSOR_Q8_0 || - w->ndim != 2 || - w->dim[1] > UINT32_MAX) { - return false; - } - - const uint64_t in_dim = w->dim[0]; - const uint64_t out_dim = w->dim[1]; - const uint64_t blocks = (in_dim + 31u) / 32u; - if (out_dim == 0 || - blocks == 0 || - blocks > (uint64_t)SIZE_MAX / 32u || - blocks > (uint64_t)SIZE_MAX / sizeof(float)) { - return false; - } - - enum { DSPARK_MARKOV_ARGMAX_STACK_BLOCKS = 32 }; - int8_t xq_stack[DSPARK_MARKOV_ARGMAX_STACK_BLOCKS * 32u]; - float xscale_stack[DSPARK_MARKOV_ARGMAX_STACK_BLOCKS]; - const bool use_stack = blocks <= DSPARK_MARKOV_ARGMAX_STACK_BLOCKS; - int8_t *xq = use_stack ? xq_stack : xmalloc((size_t)blocks * 32u); - float *xscale = use_stack ? xscale_stack : - xmalloc((size_t)blocks * sizeof(xscale[0])); - quantize_q8_0_activation(state, xq, xscale, in_dim); - - ds4_threads_init(); - const uint32_t n_slots = - g_pool.n_threads == 0 ? 1u : g_pool.n_threads; - const uint64_t rows_per_slot = (out_dim + n_slots - 1u) / n_slots; - dspark_markov_q8_0_argmax_ctx ctx = { - .data = tensor_data(model, w), - .xq = xq, - .xscale = xscale, - .logits = logits, - .in_dim = in_dim, - .blocks = blocks, - .rows_per_slot = rows_per_slot, - }; - for (uint32_t i = 0; i < DS4_MAX_THREADS; i++) { - ctx.best_idx[i] = 0; - ctx.best_val[i] = -FLT_MAX; - } - - ds4_parallel_for(out_dim, dspark_markov_q8_0_argmax_worker, &ctx); - - uint32_t best = 0; - float best_v = -FLT_MAX; - for (uint32_t slot = 0; slot < n_slots && slot < DS4_MAX_THREADS; slot++) { - const uint64_t row0 = (uint64_t)slot * rows_per_slot; - if (row0 >= out_dim) break; - if (ctx.best_val[slot] > best_v) { - best_v = ctx.best_val[slot]; - best = ctx.best_idx[slot]; - } - } - - if (!use_stack) { - free(xscale); - free(xq); - } - *token_out = best; - return true; -} - -static bool dspark_disable_fused_cpu_markov_argmax(void) { - static int cache = -1; - if (cache < 0) { - const char *env = getenv("DS4_DSPARK_DISABLE_FUSED_CPU_MARKOV_ARGMAX"); - cache = (env && env[0] && strcmp(env, "0") != 0) ? 1 : 0; - } - return cache != 0; -} - -static bool dspark_disable_reuse_confidence0_markov(void) { - static int cache = -1; - if (cache < 0) { - const char *env = getenv("DS4_DSPARK_DISABLE_REUSE_CONFIDENCE0_MARKOV"); - cache = (env && env[0] && strcmp(env, "0") != 0) ? 1 : 0; - } - return cache != 0; -} - -static bool dspark_apply_markov_greedy_probe( - float *logits, - const ds4_model *dspark_model, - const ds4_dspark_weights *dw, - int first_prev_token, - float *markov_state, - float *markov_bias, - int32_t proposal[DS4_DSPARK_MAX_BLOCK_SIZE], - uint32_t *proposal_len) { - if (proposal_len) *proposal_len = 0; - if (!logits || - !dspark_model || - !dw || - !markov_state || - !markov_bias || - !proposal || - first_prev_token < 0 || - (uint32_t)first_prev_token >= DS4_N_VOCAB || - !dspark_markov_probe_ready(dw)) { - return false; - } - - const ds4_dspark_stage_weights *final = - &dw->stage[dw->n_stages - 1u]; - int32_t prev_token = first_prev_token; - for (uint32_t draft = 0; draft < dw->block_size; draft++) { - if (!dspark_dense_row_to_f32(markov_state, - dspark_model, - final->markov_w1, - (uint32_t)prev_token)) { - return false; - } - matvec_any(markov_bias, dspark_model, final->markov_w2, markov_state); - - float *row = logits + (uint64_t)draft * DS4_N_VOCAB; - for (uint32_t i = 0; i < DS4_N_VOCAB; i++) { - row[i] += markov_bias[i]; - } - const uint32_t token = dspark_argmax_f32(row, DS4_N_VOCAB); - proposal[draft] = (int32_t)token; - prev_token = (int32_t)token; - } - - if (proposal_len) *proposal_len = dw->block_size; - return true; -} - -static bool dspark_confidence_probe_ready( - const ds4_dspark_weights *dw) { - if (!dspark_markov_probe_ready(dw)) return false; - const ds4_dspark_stage_weights *final = - &dw->stage[dw->n_stages - 1u]; - if (!final->confidence_proj || - !dspark_tensor_type_matches(final->confidence_proj->type, - DS4_DSPARK_LAYOUT_DENSE)) { - return false; - } - return final->confidence_proj->ndim == 2 && - final->confidence_proj->dim[0] == - (uint64_t)DS4_N_EMBD + dw->markov_rank && - final->confidence_proj->dim[1] == 1; -} - -static bool dspark_eval_confidence_probe( - float *confidence_logits, - const float *hidden_rows, - const ds4_model *dspark_model, - const ds4_dspark_weights *dw, - int first_prev_token, - const int32_t proposal[DS4_DSPARK_MAX_BLOCK_SIZE], - float *markov_state, - float *features, - uint32_t *confidence_len) { - if (confidence_len) *confidence_len = 0; - if (!confidence_logits || - !hidden_rows || - !dspark_model || - !dw || - !proposal || - !markov_state || - !features || - first_prev_token < 0 || - (uint32_t)first_prev_token >= DS4_N_VOCAB || - !dspark_confidence_probe_ready(dw)) { - return false; - } - - const ds4_dspark_stage_weights *final = - &dw->stage[dw->n_stages - 1u]; - int32_t prev_token = first_prev_token; - for (uint32_t draft = 0; draft < dw->block_size; draft++) { - if (prev_token < 0 || (uint32_t)prev_token >= DS4_N_VOCAB) { - return false; - } - if (!dspark_dense_row_to_f32(markov_state, - dspark_model, - final->markov_w1, - (uint32_t)prev_token)) { - return false; - } - memcpy(features, - hidden_rows + (uint64_t)draft * DS4_N_EMBD, - (uint64_t)DS4_N_EMBD * sizeof(features[0])); - memcpy(features + DS4_N_EMBD, - markov_state, - (uint64_t)dw->markov_rank * sizeof(features[0])); - matvec_any(confidence_logits + draft, - dspark_model, - final->confidence_proj, - features); - prev_token = proposal[draft]; - } - - if (confidence_len) *confidence_len = dw->block_size; - return true; -} - -static bool dspark_apply_markov_confidence_lazy_runtime( - ds4_gpu_graph *g, - const ds4_model *dspark_model, - const ds4_dspark_weights *dw, - int first_prev_token, - float confidence_threshold, - float *logits, - float *markov_bias, - float *features, - size_t features_cap, - int32_t proposal[DS4_DSPARK_MAX_BLOCK_SIZE], - uint32_t *proposal_len, - uint32_t *confidence_len, - uint32_t *confidence_prefix_len, - bool reuse_first_confidence, - float *confidence0) { - if (proposal_len) *proposal_len = 0; - if (confidence_len) *confidence_len = 0; - if (confidence_prefix_len) *confidence_prefix_len = 0; - if (confidence0 && !reuse_first_confidence) *confidence0 = 0.0f; - if (!g || - !g->spec_logits || - !g->batch_ffn_norm || - !dspark_model || - !dw || - !logits || - !markov_bias || - !features || - !proposal || - confidence_threshold <= 0.0f || - first_prev_token < 0 || - (uint32_t)first_prev_token >= DS4_N_VOCAB || - (reuse_first_confidence && !confidence0) || - !dspark_markov_probe_ready(dw) || - !dspark_confidence_probe_ready(dw)) { - return false; - } - - const uint64_t logits_bytes = - (uint64_t)DS4_N_VOCAB * sizeof(float); - const uint64_t hidden_bytes = - (uint64_t)DS4_N_EMBD * sizeof(float); - const uint64_t feature_count = - (uint64_t)DS4_N_EMBD + (uint64_t)dw->markov_rank; - if (feature_count > features_cap) return false; - float *markov_state = features + DS4_N_EMBD; - bool ok = true; - - const ds4_dspark_stage_weights *final = - &dw->stage[dw->n_stages - 1u]; - int32_t prev_token = first_prev_token; - uint32_t produced = 0; - uint32_t confident = 0; - for (uint32_t draft = 0; ok && draft < dw->block_size; draft++) { - if (prev_token < 0 || (uint32_t)prev_token >= DS4_N_VOCAB) { - ok = false; - break; - } - float confidence_logit = 0.0f; - if (draft == 0 && reuse_first_confidence) { - confidence_logit = *confidence0; - } else { - ok = dspark_dense_row_to_f32(markov_state, - dspark_model, - final->markov_w1, - (uint32_t)prev_token); - if (!ok) break; - - ok = ds4_gpu_tensor_read(g->batch_ffn_norm, - (uint64_t)draft * hidden_bytes, - features, - hidden_bytes) != 0; - if (!ok) break; - matvec_any(&confidence_logit, - dspark_model, - final->confidence_proj, - features); - } - if (draft == 0 && confidence0) *confidence0 = confidence_logit; - if (confidence_len) *confidence_len = draft + 1u; - if (sigmoid_stable(confidence_logit) < confidence_threshold) { - ok = true; - break; - } - - int32_t token = -1; - if (ok) { - ok = ds4_gpu_tensor_read(g->spec_logits, - (uint64_t)draft * logits_bytes, - logits, - logits_bytes) != 0; - if (ok) { - uint32_t fused_token = 0; - if (!dspark_disable_fused_cpu_markov_argmax() && - dspark_markov_q8_0_argmax(&fused_token, - dspark_model, - final->markov_w2, - markov_state, - logits)) { - token = (int32_t)fused_token; - } else { - matvec_any(markov_bias, dspark_model, final->markov_w2, markov_state); - for (uint32_t i = 0; i < DS4_N_VOCAB; i++) { - logits[i] += markov_bias[i]; - } - token = (int32_t)dspark_argmax_f32(logits, DS4_N_VOCAB); - } - } - } - if (!ok || token < 0 || (uint32_t)token >= DS4_N_VOCAB) { - ok = false; - break; - } - proposal[draft] = token; - produced = draft + 1u; - confident = produced; - prev_token = token; - } - - if (ok) { - if (proposal_len) *proposal_len = produced; - if (confidence_prefix_len) *confidence_prefix_len = confident; - } - return ok; -} - -static bool dspark_eval_confidence0_runtime( - ds4_gpu_graph *g, - const ds4_model *dspark_model, - const ds4_dspark_weights *dw, - int first_prev_token, - float *features, - size_t features_cap, - float *confidence0) { - if (confidence0) *confidence0 = 0.0f; - if (!confidence0 || - !g || - !g->batch_ffn_norm || - !dspark_model || - !dw || - !features || - first_prev_token < 0 || - (uint32_t)first_prev_token >= DS4_N_VOCAB || - !dspark_confidence_probe_ready(dw)) { - return false; - } - - const uint64_t hidden_bytes = - (uint64_t)DS4_N_EMBD * sizeof(float); - const uint64_t feature_count = - (uint64_t)DS4_N_EMBD + (uint64_t)dw->markov_rank; - if (feature_count > features_cap || - ds4_gpu_tensor_bytes(g->batch_ffn_norm) < hidden_bytes) { - return false; - } - - float *markov_state = features + DS4_N_EMBD; - bool ok = true; - - const ds4_dspark_stage_weights *final = - &dw->stage[dw->n_stages - 1u]; - if (ok) { - ok = dspark_dense_row_to_f32(markov_state, - dspark_model, - final->markov_w1, - (uint32_t)first_prev_token); - } - if (ok) { - ok = ds4_gpu_tensor_read(g->batch_ffn_norm, - 0, - features, - hidden_bytes) != 0; - } - if (ok) { - matvec_any(confidence0, dspark_model, final->confidence_proj, features); - } - - return ok; -} - -static bool dspark_stage0_weights_ready( - const ds4_gpu_graph *g, - const ds4_dspark_weights *dw) { - if (!g || !dw || dw->n_stages == 0 || dw->target_layer_count == 0 || - dw->target_layer_count != g->dspark_target_layer_count || - !g->dspark_target_hidden || !g->dspark_stage0_proj || - !g->dspark_main_x) { - return false; - } - - const ds4_dspark_stage_weights *stage0 = &dw->stage[0]; - const ds4_tensor *main_proj = stage0->main_proj; - const ds4_tensor *main_norm = stage0->main_norm; - const uint64_t in_dim = (uint64_t)dw->target_layer_count * DS4_N_EMBD; - return main_proj && - main_norm && - dspark_tensor_type_matches(main_proj->type, DS4_DSPARK_LAYOUT_DENSE) && - main_norm->type == DS4_TENSOR_F32 && - main_proj->ndim == 2 && - main_proj->dim[0] == in_dim && - main_proj->dim[1] == DS4_N_EMBD && - main_norm->ndim == 1 && - main_norm->dim[0] == DS4_N_EMBD; -} - -static bool metal_graph_eval_dspark_stage0( - ds4_gpu_graph *g, - const ds4_model *dspark_model, - const ds4_dspark_weights *dw) { - if (!g || !dspark_model || !dw || !dspark_stage0_weights_ready(g, dw)) { - return false; - } - - const ds4_dspark_stage_weights *stage0 = &dw->stage[0]; - const uint64_t in_dim = (uint64_t)dw->target_layer_count * DS4_N_EMBD; - bool ok = ds4_gpu_begin_commands() != 0; - if (ok) { - ok = metal_graph_matmul_plain_tensor(g->dspark_stage0_proj, - dspark_model, - stage0->main_proj, - in_dim, - DS4_N_EMBD, - g->dspark_target_hidden, - 1); - } - if (ok) { - ok = ds4_gpu_rms_norm_weight_tensor(g->dspark_main_x, - g->dspark_stage0_proj, - dspark_model->map, - dspark_model->size, - stage0->main_norm->abs_offset, - DS4_N_EMBD, - DS4_RMS_EPS) != 0; - } - if (ok) ok = ds4_gpu_end_commands() != 0; - if (!ok) (void)ds4_gpu_synchronize(); - return ok; -} - -static bool dspark_stage0_batch_ready( - const ds4_gpu_graph *g, - const ds4_dspark_weights *dw, - uint32_t n_tokens) { - if (!dspark_stage0_weights_ready(g, dw) || - n_tokens == 0 || - n_tokens > g->prefill_cap || - !g->dspark_target_hidden_batch || - !g->batch_ffn_cur || - !g->batch_ffn_norm || - !g->batch_cur_hc) { - return false; - } - const uint64_t in_dim = (uint64_t)dw->target_layer_count * DS4_N_EMBD; - return ds4_gpu_tensor_bytes(g->batch_ffn_cur) >= - (uint64_t)n_tokens * DS4_N_EMBD * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_ffn_norm) >= - (uint64_t)n_tokens * DS4_N_EMBD * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_cur_hc) >= - (uint64_t)n_tokens * DS4_N_HC * DS4_N_EMBD * sizeof(float) && - in_dim <= SIZE_MAX / sizeof(float); -} - -static bool metal_graph_pack_dspark_target_hidden_batch( - ds4_gpu_graph *g, - const ds4_dspark_weights *dw, - ds4_gpu_tensor *packed, - uint32_t n_tokens) { - if (!g || !dw || !packed || n_tokens == 0 || - n_tokens > g->prefill_cap || - dw->target_layer_count != g->dspark_target_layer_count) { - return false; - } - - const uint64_t in_dim = (uint64_t)dw->target_layer_count * DS4_N_EMBD; - const uint64_t packed_count = (uint64_t)n_tokens * in_dim; - if (packed_count == 0 || - packed_count > (uint64_t)SIZE_MAX / sizeof(float)) { - return false; - } - return ds4_gpu_pack_slot_rows_f32_tensor(packed, - g->dspark_target_hidden_batch, - n_tokens, - DS4_N_EMBD, - dw->target_layer_count, - g->prefill_cap) != 0; -} - -static bool metal_graph_eval_dspark_stage0_batch( - ds4_gpu_graph *g, - const ds4_model *dspark_model, - const ds4_dspark_weights *dw, - uint32_t n_tokens, - bool commands_open) { - if (!g || !dspark_model || !dw || - !dspark_stage0_batch_ready(g, dw, n_tokens)) { - return false; - } - - const ds4_dspark_stage_weights *stage0 = &dw->stage[0]; - const uint64_t in_dim = (uint64_t)dw->target_layer_count * DS4_N_EMBD; - const uint64_t packed_bytes = (uint64_t)n_tokens * in_dim * sizeof(float); - bool packed_owned = false; - ds4_gpu_tensor *packed = NULL; - if (g->dspark_stage0_packed && - ds4_gpu_tensor_bytes(g->dspark_stage0_packed) >= packed_bytes) { - packed = g->dspark_stage0_packed; - } else { - packed = ds4_gpu_tensor_alloc(packed_bytes); - packed_owned = true; - } - if (!packed) return false; - - bool ok = metal_graph_pack_dspark_target_hidden_batch(g, dw, packed, n_tokens); - if (ok && !commands_open) ok = ds4_gpu_begin_commands() != 0; - if (ok) { - ok = metal_graph_matmul_plain_tensor(g->batch_ffn_cur, - dspark_model, - stage0->main_proj, - in_dim, - DS4_N_EMBD, - packed, - n_tokens); - } - if (ok) { - ok = ds4_gpu_rms_norm_weight_rows_tensor(g->batch_ffn_norm, - g->batch_ffn_cur, - dspark_model->map, - dspark_model->size, - stage0->main_norm->abs_offset, - DS4_N_EMBD, - n_tokens, - DS4_RMS_EPS) != 0; - } - if (ok && !commands_open) ok = ds4_gpu_end_commands() != 0; - if (!ok && !commands_open) (void)ds4_gpu_synchronize(); - if (packed_owned) ds4_gpu_tensor_free(packed); - return ok; -} - -static bool dspark_draft_block_ready( - const ds4_gpu_graph *g, - const ds4_weights *base_weights, - const ds4_dspark_weights *dw, - int token) { - if (!g || !base_weights || !dw || !base_weights->token_embd || - !g->dspark_draft_tokens || !g->dspark_draft_hc || - dw->block_size == 0 || - dw->block_size > DS4_DSPARK_MAX_BLOCK_SIZE || - g->dspark_block_size != dw->block_size || - !dw->has_noise_token_id) { - return false; - } - const uint32_t n_vocab = (uint32_t)base_weights->token_embd->dim[1]; - return token >= 0 && - (uint32_t)token < n_vocab && - dw->noise_token_id < n_vocab; -} - -static bool dspark_stage_input_ready( - const ds4_gpu_graph *g, - const ds4_dspark_weights *dw) { - if (!g || !dw || - dw->block_size == 0 || - dw->block_size > DS4_DSPARK_MAX_BLOCK_SIZE || - g->dspark_block_size != dw->block_size || - !g->dspark_main_x || !g->dspark_draft_hc || - !g->dspark_target_hc || !g->dspark_stage_input_hc || - !g->dspark_position_ids) { - return false; - } - if (dw->block_size == UINT32_MAX) return false; - const uint64_t hc_dim = (uint64_t)DS4_N_HC * DS4_N_EMBD; - const uint64_t rows = (uint64_t)dw->block_size + 1u; - return ds4_gpu_tensor_bytes(g->dspark_target_hc) >= - hc_dim * sizeof(float) && - ds4_gpu_tensor_bytes(g->dspark_stage_input_hc) >= - rows * hc_dim * sizeof(float) && - ds4_gpu_tensor_bytes(g->dspark_position_ids) >= - rows * sizeof(int32_t); -} - -static bool dspark_stage_cache_ready( - const ds4_gpu_graph *g, - const ds4_dspark_weights *dw) { - if (!g || !dw || - dw->n_stages == 0 || - dw->n_stages > DS4_DSPARK_MAX_STAGES || - g->dspark_cache_cap == 0 || - !metal_graph_dspark_cache_current_window_valid(g)) { - return false; - } - const uint64_t bytes = - (uint64_t)g->dspark_cache_cap * DS4_N_HEAD_DIM * sizeof(float); - for (uint32_t stage = 0; stage < dw->n_stages; stage++) { - if (!g->dspark_raw_cache[stage] || - ds4_gpu_tensor_bytes(g->dspark_raw_cache[stage]) < bytes) { - return false; - } - } - return true; -} - -static bool dspark_noncausal_attention_probe_ready( - const ds4_gpu_graph *g, - const ds4_dspark_weights *dw) { - if (!g || !dw || - dw->n_stages == 0 || - dw->block_size == 0 || - dw->block_size > DS4_DSPARK_MAX_BLOCK_SIZE || - g->prefill_cap < dw->block_size + 1u || - !g->batch_q || !g->batch_heads || - !g->dspark_raw_cache[0]) { - return false; - } - const ds4_layer_weights *block = &dw->stage[0].block; - if (!block->attn_sinks) return false; - - const uint64_t rows = (uint64_t)dw->block_size + 1u; - const uint64_t q_dim = (uint64_t)DS4_N_HEAD * DS4_N_HEAD_DIM; - return ds4_gpu_tensor_bytes(g->batch_q) >= - rows * q_dim * sizeof(float) && - ds4_gpu_tensor_bytes(g->batch_heads) >= - rows * q_dim * sizeof(float) && - ds4_gpu_tensor_bytes(g->dspark_raw_cache[0]) >= - rows * DS4_N_HEAD_DIM * sizeof(float); -} - -static bool metal_graph_probe_dspark_noncausal_attention( - ds4_gpu_graph *g, - const ds4_model *dspark_model, - const ds4_dspark_weights *dw) { - if (!g || !dspark_model || !dspark_noncausal_attention_probe_ready(g, dw)) { - return false; - } - - const uint32_t rows = dw->block_size + 1u; - const uint64_t q_dim = (uint64_t)DS4_N_HEAD * DS4_N_HEAD_DIM; - const ds4_layer_weights *block = &dw->stage[0].block; - bool ok = ds4_gpu_tensor_fill_f32(g->batch_q, - 0.0f, - (uint64_t)rows * q_dim) != 0 && - ds4_gpu_tensor_fill_f32(g->dspark_raw_cache[0], - 0.0f, - (uint64_t)rows * DS4_N_HEAD_DIM) != 0; - if (ok) ok = ds4_gpu_begin_commands() != 0; - if (ok) { - ok = ds4_gpu_attention_noncausal_raw_batch_heads_tensor( - g->batch_heads, - dspark_model->map, - dspark_model->size, - block->attn_sinks->abs_offset, - g->batch_q, - g->dspark_raw_cache[0], - rows, - rows, - rows, - 0, - DS4_N_HEAD, - DS4_N_HEAD_DIM) != 0; - } - if (ok) ok = ds4_gpu_end_commands() != 0; - if (!ok) (void)ds4_gpu_synchronize(); - return ok; -} - -static bool metal_graph_prepare_dspark_setup_block( - ds4_gpu_graph *g, - const ds4_model *base_model, - const ds4_weights *base_weights, - const ds4_dspark_weights *dw, - int token, - uint32_t pos) { - if (!g || !base_model || - !dspark_draft_block_ready(g, base_weights, dw, token) || - !dspark_stage_input_ready(g, dw)) { - return false; - } - if (pos > (uint32_t)INT32_MAX || - dw->block_size > (uint32_t)INT32_MAX || - pos > (uint32_t)INT32_MAX - dw->block_size) { - return false; - } - - const uint64_t hc_dim = (uint64_t)DS4_N_HC * DS4_N_EMBD; - const uint64_t hc_bytes = hc_dim * sizeof(float); - int32_t positions[DS4_DSPARK_MAX_BLOCK_SIZE + 1u]; - positions[0] = (int32_t)pos; - for (uint32_t i = 0; i < dw->block_size; i++) { - positions[i + 1u] = (int32_t)(pos + i); - } - int32_t ids[DS4_DSPARK_MAX_BLOCK_SIZE]; - ids[0] = (int32_t)token; - for (uint32_t i = 1; i < dw->block_size; i++) { - ids[i] = (int32_t)dw->noise_token_id; - } - - bool ok = ds4_gpu_tensor_write(g->dspark_draft_tokens, - 0, - ids, - (uint64_t)dw->block_size * sizeof(ids[0])) != 0 && - ds4_gpu_tensor_write(g->dspark_position_ids, - 0, - positions, - ((uint64_t)dw->block_size + 1u) * - sizeof(positions[0])) != 0; - if (ok) ok = ds4_gpu_begin_commands() != 0; - if (ok) { - ok = ds4_gpu_embed_tokens_hc_tensor(g->dspark_draft_hc, - g->dspark_draft_tokens, - base_model->map, - base_model->size, - base_weights->token_embd->abs_offset, - (uint32_t)base_weights->token_embd->dim[1], - dw->block_size, - DS4_N_EMBD, - DS4_N_HC) != 0; - } - if (ok) { - ok = ds4_gpu_repeat_hc_tensor(g->dspark_target_hc, - g->dspark_main_x, - DS4_N_EMBD, - DS4_N_HC) != 0; - } - if (ok) { - ok = ds4_gpu_tensor_copy(g->dspark_stage_input_hc, - 0, - g->dspark_target_hc, - 0, - hc_bytes) != 0; - } - if (ok) { - ok = ds4_gpu_tensor_copy(g->dspark_stage_input_hc, - hc_bytes, - g->dspark_draft_hc, - 0, - (uint64_t)dw->block_size * hc_bytes) != 0; - } - if (ok) ok = ds4_gpu_end_commands() != 0; - if (!ok) (void)ds4_gpu_synchronize(); - return ok; -} - static bool metal_graph_prepare_dspark_stage0_setup_block( ds4_gpu_graph *g, const ds4_model *base_model, @@ -24861,6 +25669,18 @@ static bool metal_graph_encode_dspark_next_stage_draft_input_from( (uint64_t)dw->block_size * hc_bytes) != 0; } +static bool metal_graph_profile_layer_env_match(const char *env_name, uint32_t il) { + const char *layer_env = getenv(env_name); + if (!layer_env || !layer_env[0]) return true; + + char *end = NULL; + const unsigned long layer = strtoul(layer_env, &end, 10); + return end != layer_env && + *end == '\0' && + layer <= UINT32_MAX && + (uint32_t)layer == il; +} + static bool metal_graph_dspark_stage_profile_enabled(uint32_t stage) { return getenv("DS4_DSPARK_STAGE_PROFILE") != NULL && metal_graph_profile_layer_env_match("DS4_DSPARK_STAGE_PROFILE_STAGE", @@ -25268,6 +26088,19 @@ static bool metal_graph_eval_dspark_stage_chain( if (!dspark_stage_block_ready(g, dw, stage)) return false; } + /* The support model runs only on the coordinator. Its generic layer + * helpers share the base graph object, so temporarily disarm TP or they + * would encode expert gates that the worker can never reach. The base + * model's later verification restores and uses the normal 50/50 split. */ + const uint32_t saved_tp_world = g->tp_world; + const uint32_t saved_tp_batch_rows = g->tp_batch_rows; + g->tp_world = 0; + g->tp_batch_rows = 0; + const bool suspended_expert_sharding = saved_tp_world == 2; + if (suspended_expert_sharding) { + ds4_gpu_tp_suspend_expert_sharding(1); + } + bool ok = ds4_gpu_begin_commands() != 0; if (ok) { ok = ds4_gpu_tensor_copy(g->prefill_tokens, @@ -25294,6 +26127,11 @@ static bool metal_graph_eval_dspark_stage_chain( if (completed_stages) *completed_stages = stage + 1u; } if (ok) ok = ds4_gpu_end_commands() != 0; + if (suspended_expert_sharding) { + ds4_gpu_tp_suspend_expert_sharding(0); + } + g->tp_world = saved_tp_world; + g->tp_batch_rows = saved_tp_batch_rows; if (!ok) { (void)ds4_gpu_synchronize(); return false; @@ -25344,7 +26182,7 @@ static bool dspark_final_head_ready( !dspark_tensor_type_matches(final->hc_head_fn->type, DS4_DSPARK_LAYOUT_PLAIN) || final->hc_head_scale->type != DS4_TENSOR_F32 || - base_weights->output->type != DS4_TENSOR_Q8_0) { + !tensor_type_is_dense_quant(base_weights->output->type)) { return false; } @@ -25451,14 +26289,13 @@ static bool metal_graph_eval_dspark_base_logits( DS4_N_EMBD, draft, DS4_RMS_EPS) != 0; - if (ok) ok = ds4_gpu_matmul_q8_0_tensor(logits, - base_model->map, - base_model->size, - base_weights->output->abs_offset, - DS4_N_EMBD, - vocab_dim, - output_norm, - draft) != 0; + if (ok) ok = metal_graph_matmul_plain_tensor(logits, + base_model, + base_weights->output, + DS4_N_EMBD, + vocab_dim, + output_norm, + draft); if (ok) ok = ds4_gpu_end_commands() != 0; if (!ok) (void)ds4_gpu_synchronize(); @@ -25598,7 +26435,7 @@ static bool metal_graph_eval_dspark_base_logits_from_hidden( dw->block_size == 0 || dw->block_size > DS4_DSPARK_MAX_BLOCK_SIZE || !base_weights->output || - base_weights->output->type != DS4_TENSOR_Q8_0 || + !tensor_type_is_dense_quant(base_weights->output->type) || base_weights->output->ndim != 2 || base_weights->output->dim[0] != DS4_N_EMBD || base_weights->output->dim[1] != DS4_N_VOCAB || @@ -25623,14 +26460,13 @@ static bool metal_graph_eval_dspark_base_logits_from_hidden( DS4_N_VOCAB * sizeof(float)); bool ok = output_norm && logits; if (ok) ok = ds4_gpu_begin_commands() != 0; - if (ok) ok = ds4_gpu_matmul_q8_0_tensor(logits, - base_model->map, - base_model->size, - base_weights->output->abs_offset, - DS4_N_EMBD, - DS4_N_VOCAB, - output_norm, - dw->block_size) != 0; + if (ok) ok = metal_graph_matmul_plain_tensor(logits, + base_model, + base_weights->output, + DS4_N_EMBD, + DS4_N_VOCAB, + output_norm, + dw->block_size); if (ok) ok = ds4_gpu_end_commands() != 0; if (!ok) (void)ds4_gpu_synchronize(); @@ -26198,6 +27034,14 @@ static bool metal_graph_eval_mtp_draft_from_hc( ds4_gpu_tensor *saved_cur = g->cur_hc; ds4_gpu_tensor *saved_after = g->after_ffn_hc; + const uint32_t saved_tp_world = g->tp_world; + const uint32_t saved_tp_batch_rows = g->tp_batch_rows; + g->tp_world = 0; + g->tp_batch_rows = 0; + const bool suspended_expert_sharding = saved_tp_world == 2; + if (suspended_expert_sharding) { + ds4_gpu_tp_suspend_expert_sharding(1); + } bool ok = ds4_gpu_begin_commands() != 0; if (ok) ok = ds4_gpu_embed_token_hc_tensor(g->mtp_embed, base_model->map, @@ -26273,6 +27117,9 @@ static bool metal_graph_eval_mtp_draft_from_hc( DS4_N_VOCAB) != 0; } if (ok) ok = ds4_gpu_end_commands() != 0; + if (suspended_expert_sharding) { + ds4_gpu_tp_suspend_expert_sharding(0); + } g->cur_hc = saved_cur; g->after_ffn_hc = saved_after; @@ -26283,6 +27130,8 @@ static bool metal_graph_eval_mtp_draft_from_hc( ok = ds4_gpu_tensor_read(g->comp_selected, 0, top_id, sizeof(*top_id)) != 0; } if (ok && g->mtp_n_raw < g->raw_window) g->mtp_n_raw++; + g->tp_world = saved_tp_world; + g->tp_batch_rows = saved_tp_batch_rows; if (!ok) { (void)ds4_gpu_synchronize(); g->cur_hc = saved_cur; @@ -27441,15 +28290,10 @@ static bool metal_graph_verify_suffix_tops_impl( metal_graph_stream_prefill_selected_profile_reset(g); } - /* DS4_TP_SPLIT_VERIFY: expert-split this block's routed MoE with one - * batch gate per layer (both ranks encode identically, so the gate - * seqs agree by construction). Measured on the M5 Max pair: a NET - * LOSS at block size 5 (verify 62->70ms/block) — the block is not - * bandwidth-bound (~9ms of expert reads vs ~9ms of TCP gates plus - * per-row serialization), so replicated verify stays the default. - * Kept for bigger blocks/models where expert bytes dominate. */ - g->tp_batch_rows = (g->tp_world == 2 && !g->tp_null_split && - getenv("DS4_TP_SPLIT_VERIFY") != NULL && + /* Under TP, verify every speculative block against the two resident + * expert halves. Both ranks encode identically, so one batch gate per + * layer reconstructs the routed result while preserving their KV state. */ + g->tp_batch_rows = (g->tp_world == 2 && g->tp_batch_out != NULL && g->tp_batch_in != NULL && n_tokens <= (uint32_t)DS4_TP_BATCH_MAX_ROWS) ? n_tokens : 0; @@ -27805,14 +28649,356 @@ static uint32_t metal_graph_resume_prefill_min_tokens(void) { return 4u; } -ds4_context_memory ds4_context_memory_estimate_with_prefill( +static uint32_t glm_graph_resume_prefill_min_tokens(void) { +#ifndef DS4_ROCM_BUILD + const char *env = getenv("DS4_GLM_RESUME_PREFILL_MIN"); + if (env && env[0]) { + char *endp = NULL; + const long v = strtol(env, &endp, 10); + if (endp != env) { + if (v <= 0) return UINT32_MAX; + return (uint32_t)v; + } + } +#endif + return 4u; +} + +#define DS4_GLM_METAL_FULL_ATTN_DEFAULT_CONTEXT 4096u +#define DS4_GLM_METAL_STREAMING_FULL_ATTN_CONTEXT 8192u +#define DS4_GLM_METAL_FULL_ATTN_LAYER_FLUSH_CONTEXT 2048u +#define DS4_GLM_METAL_DISPLAY_PROGRESS_LAYER_TOKENS 32u +#define DS4_GLM_METAL_SMALL_PREFILL_STAGE_SYNC_TOKENS 0u +#define DS4_GLM_METAL_LONG_CONTEXT_THRESHOLD 65536u +#define DS4_GLM_METAL_LONG_CONTEXT_FULL_ATTN_CONTEXT 4096u +#define DS4_GLM_METAL_INDEXED_PREFILL_CHUNK_TOKENS 4096u +#define DS4_GLM_METAL_INDEXED_PREFILL_SCORE_SCRATCH_MB 256u + +static uint32_t glm_graph_full_attention_cap(uint32_t ctx_size, + bool ssd_streaming); +static uint32_t glm_graph_indexed_prefill_chunk_tokens( + uint32_t full_attention_cap, + uint32_t compact_cap); +static uint32_t glm_graph_indexed_prefill_score_tokens( + uint32_t indexed_prefill_cap, + uint32_t compact_cap); + +static uint64_t glm_graph_compact_cache_elem_bytes(void) { + return DS4_GPU_GLM_COMPACT_CACHE_F16 ? sizeof(uint16_t) : sizeof(float); +} + +static uint32_t glm_graph_compact_cache_is_f16(void) { + return DS4_GPU_GLM_COMPACT_CACHE_F16 ? 1u : 0u; +} + +static bool glm_graph_expanded_kv_cache_enabled(bool ssd_streaming) { + (void)ssd_streaming; + return false; +} + +static bool glm_graph_layer_uses_full_indexer(uint32_t il) { + if (il < DS4_N_LEADING_DENSE) return true; + return il >= 6u && ((il - 6u) % 4u) == 0u; +} + +static uint32_t glm_graph_normal_layer_count(void) { + if (DS4_N_LAYER <= DS4_N_NEXTN_PREDICT || DS4_N_LAYER > DS4_MAX_LAYER) { + return 0; + } + return DS4_N_LAYER - DS4_N_NEXTN_PREDICT; +} + +static uint32_t glm_graph_full_indexer_layer_count_range(uint32_t layer_start, + uint32_t layer_end) { + if (layer_start > layer_end) return 0; + uint32_t n = 0; + for (uint32_t il = layer_start; il <= layer_end; il++) { + if (glm_graph_layer_uses_full_indexer(il)) n++; + } + return n; +} + +static uint32_t glm_graph_full_indexer_layer_count(uint32_t normal_layers) { + return normal_layers ? + glm_graph_full_indexer_layer_count_range(0, normal_layers - 1u) : + 0; +} + +static uint64_t glm_graph_full_kv_cache_elem_bytes(void) { + return sizeof(uint16_t); +} + +static uint32_t glm_graph_indexer_top_k_limit(void) { + return DS4_N_INDEXER_TOP_K; +} + +static uint32_t glm_tp_head_split_min(void) { + static int cached = -1; + if (cached < 0) { + cached = 64; + const char *env = getenv("DS4_GLM_TP_HEAD_SPLIT_MIN"); + if (env && env[0]) cached = atoi(env); + if (cached < 0) cached = 0; + } + return (uint32_t)cached; +} + +/* Correctness isolation: dump a hidden row (pre-output-norm), overwriting + * on each call — run with -n 0 so the file ends as the final prompt row. */ +static void glm_debug_dump_hidden_row(const ds4_gpu_tensor *t, uint32_t row) { + const char *path = getenv("DS4_GLM_HIDDEN_DUMP"); + if (!path || !path[0] || !t) return; + float *buf = malloc((size_t)DS4_N_EMBD * sizeof(float)); + if (!buf) return; + if (ds4_gpu_tensor_read((ds4_gpu_tensor *)t, + (uint64_t)row * DS4_N_EMBD * sizeof(float), + buf, + (uint64_t)DS4_N_EMBD * sizeof(float))) { + FILE *f = fopen(path, "wb"); + if (f) { + fwrite(buf, sizeof(float), (size_t)DS4_N_EMBD, f); + fclose(f); + } + } + free(buf); +} + +/* Layer bisect: which layer's output hidden to dump (-1 = final/off, + * -2 = every layer, one file per layer). */ +static int glm_debug_hidden_dump_layer(void) { + const char *v = getenv("DS4_GLM_HIDDEN_DUMP_LAYER"); + if (!v || !v[0]) return -1; + if (strcmp(v, "all") == 0) return -2; + return atoi(v); +} + +static bool glm_debug_hidden_dump_layer_match(uint32_t il) { + const int dl = glm_debug_hidden_dump_layer(); + return dl == -2 || dl == (int)il; +} + +static void glm_debug_dump_raw_layer(const ds4_gpu_tensor *t, + const char *tag, + uint64_t bytes, + uint32_t il, + int pos) { + const char *path = getenv("DS4_GLM_HIDDEN_DUMP"); + if (!path || !path[0] || !t) return; + char full[1024]; + if (pos >= 0) + snprintf(full, sizeof(full), "%s.%s.L%02u.T%02u", path, tag, il, pos); + else + snprintf(full, sizeof(full), "%s.%s.L%02u", path, tag, il); + void *buf = malloc(bytes); + if (!buf) return; + if (ds4_gpu_tensor_read((ds4_gpu_tensor *)t, 0, buf, bytes)) { + FILE *f = fopen(full, "wb"); + if (f) { fwrite(buf, 1, bytes, f); fclose(f); } + } + free(buf); +} + +static void glm_debug_dump_hidden_layer(const ds4_gpu_tensor *t, + uint32_t row, + uint32_t il, + uint32_t pos) { + const char *path = getenv("DS4_GLM_HIDDEN_DUMP"); + if (!path || !path[0] || !t) return; + char full[1024]; + snprintf(full, sizeof(full), "%s.L%02u.T%02u", path, il, pos); + float *buf = malloc((size_t)DS4_N_EMBD * sizeof(float)); + if (!buf) return; + if (ds4_gpu_tensor_read((ds4_gpu_tensor *)t, + (uint64_t)row * DS4_N_EMBD * sizeof(float), + buf, + (uint64_t)DS4_N_EMBD * sizeof(float))) { + FILE *f = fopen(full, "wb"); + if (f) { + fwrite(buf, sizeof(float), (size_t)DS4_N_EMBD, f); + fclose(f); + } + } + free(buf); +} + +/* Correctness isolation: dump the post-prefill logits vector once. */ +static void glm_debug_dump_prefill_logits(const float *logits) { + static int dumped; + const char *path = getenv("DS4_GLM_LOGIT_DUMP"); + if (!path || !path[0] || dumped || !logits) return; + FILE *f = fopen(path, "wb"); + if (!f) return; + fwrite(logits, sizeof(float), (size_t)DS4_N_VOCAB, f); + fclose(f); + dumped = 1; + fprintf(stderr, "ds4: prefill logits dumped to %s\n", path); +} + +static bool glm_graph_indexed_prefill_trace_enabled(void) { + return false; +} + +static bool glm_graph_indexed_prefill_trace_all(void) { + return false; +} + +static uint32_t glm_graph_indexed_prefill_trace_slow_ms(void) { + return 100u; +} + +static uint32_t glm_graph_indexed_prefill_drain_interval(void) { + return 16u; +} + +static bool glm_graph_full_prefill_trace_enabled(void) { + return false; +} + +static bool glm_graph_full_prefill_trace_all(void) { + return false; +} + +static uint32_t glm_graph_full_prefill_trace_slow_ms(void) { + return 100u; +} + +static uint32_t glm_graph_full_prefill_drain_interval(void) { + return 16u; +} + +static void glm_graph_full_prefill_tracef(const char *fmt, ...) { + va_list ap; + va_start(ap, fmt); + fprintf(stderr, "ds4: GLM full prefill trace "); + vfprintf(stderr, fmt, ap); + fputc('\n', stderr); + fflush(stderr); + va_end(ap); +} + +static void glm_graph_indexed_prefill_tracef(const char *fmt, ...) { + va_list ap; + va_start(ap, fmt); + fprintf(stderr, "ds4: GLM indexed prefill trace "); + vfprintf(stderr, fmt, ap); + fputc('\n', stderr); + fflush(stderr); + va_end(ap); +} + +static uint32_t glm_graph_compact_cache_initial_cap( + uint32_t ctx_size, + uint32_t full_attention_cap) { + if (ctx_size == 0) return 0; + if (ctx_size <= full_attention_cap) return ctx_size; + + uint32_t cap = ctx_size; + if (cap == 0) cap = full_attention_cap ? full_attention_cap : 1u; + if (cap > ctx_size) cap = ctx_size; + return cap; +} + +static uint64_t glm_graph_compact_cache_bytes_for_cap( + uint32_t normal_layers, + uint32_t indexer_layers, + uint32_t compact_cap) { + if (compact_cap == 0) return 0; + const uint64_t elem = glm_graph_compact_cache_elem_bytes(); + uint64_t total = + (uint64_t)normal_layers * + compact_cap * + ((uint64_t)DS4_N_KV_LORA + DS4_N_ROT) * + elem; + total += + (uint64_t)indexer_layers * + compact_cap * + DS4_N_INDEXER_HEAD_DIM * + elem; + return total; +} + +static uint64_t glm_graph_indexed_scratch_bytes_for_cap( + uint32_t full_attention_cap, + uint32_t compact_cap) { + if (compact_cap == 0) return 0; + const uint64_t indexed_rows = + glm_graph_indexed_prefill_chunk_tokens(full_attention_cap, compact_cap); + const uint64_t indexed_score_rows = + glm_graph_indexed_prefill_score_tokens((uint32_t)indexed_rows, + compact_cap); + const uint64_t indexer_q_elems = + (uint64_t)DS4_N_INDEXER_HEAD * DS4_N_INDEXER_HEAD_DIM; + const uint64_t qk_low_elems = + (uint64_t)DS4_N_HEAD * DS4_N_KV_LORA; + uint64_t bytes = (uint64_t)compact_cap * sizeof(float); + const uint64_t indexer_top_k = glm_graph_indexer_top_k_limit(); + bytes += indexed_score_rows * (uint64_t)compact_cap * sizeof(float); + bytes += indexed_rows * indexer_q_elems * sizeof(float); + bytes += indexed_rows * DS4_N_INDEXER_HEAD * sizeof(float); + bytes += indexed_rows * indexer_top_k * sizeof(uint32_t); + bytes += indexed_rows * indexer_top_k * sizeof(uint32_t); + bytes += indexed_rows * qk_low_elems * sizeof(float); + return bytes; +} + +static ds4_context_memory glm_graph_context_memory_estimate_for_compact_cap( + uint32_t ctx, + uint32_t work_ctx, + uint32_t compact_cap, + bool ssd_streaming) { + (void)ssd_streaming; + ds4_context_memory m = {0}; + const uint32_t normal_layers = glm_graph_normal_layer_count(); + if (compact_cap > ctx) compact_cap = ctx; + + m.prefill_cap = work_ctx; + m.raw_cap = glm_graph_expanded_kv_cache_enabled(ssd_streaming) ? work_ctx : 0; + if (glm_graph_expanded_kv_cache_enabled(ssd_streaming)) { + m.raw_bytes = (uint64_t)normal_layers * + work_ctx * + ((uint64_t)DS4_N_HEAD * (DS4_N_KEY_MLA + DS4_N_VALUE_MLA)) * + glm_graph_full_kv_cache_elem_bytes(); + } + m.scratch_bytes = + (uint64_t)work_ctx * + ((uint64_t)DS4_N_EMBD + + (uint64_t)DS4_N_HEAD * DS4_N_KEY_MLA + + (uint64_t)DS4_N_HEAD * DS4_N_VALUE_MLA) * + sizeof(float); + if (compact_cap != 0) { + m.comp_cap = compact_cap; + m.compressed_bytes = + glm_graph_compact_cache_bytes_for_cap( + normal_layers, + glm_graph_full_indexer_layer_count(normal_layers), + compact_cap); + m.scratch_bytes += + glm_graph_indexed_scratch_bytes_for_cap(work_ctx, compact_cap); + } + m.total_bytes = m.raw_bytes + m.compressed_bytes + m.scratch_bytes; + return m; +} + +ds4_context_memory ds4_context_memory_estimate_with_prefill_mode( ds4_backend backend, int ctx_size, - uint32_t prefill_chunk) { + uint32_t prefill_chunk, + bool ssd_streaming) { ds4_context_memory m = {0}; uint32_t ctx = ctx_size > 0 ? (uint32_t)ctx_size : 1u; if (ds4_backend_uses_graph(backend)) { + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + const uint32_t work_ctx = + glm_graph_full_attention_cap(ctx, ssd_streaming); + const uint32_t compact_cap = + glm_graph_compact_cache_initial_cap(ctx, work_ctx); + m = glm_graph_context_memory_estimate_for_compact_cap(ctx, + work_ctx, + compact_cap, + ssd_streaming); + return m; + } m.prefill_cap = metal_graph_prefill_cap_for_prompt((int)ctx, prefill_chunk); m.raw_cap = metal_graph_raw_cap_for_context((int)ctx, m.prefill_cap); @@ -27880,6 +29066,16 @@ ds4_context_memory ds4_context_memory_estimate_with_prefill( return m; } +ds4_context_memory ds4_context_memory_estimate_with_prefill( + ds4_backend backend, + int ctx_size, + uint32_t prefill_chunk) { + return ds4_context_memory_estimate_with_prefill_mode(backend, + ctx_size, + prefill_chunk, + false); +} + ds4_context_memory ds4_context_memory_estimate(ds4_backend backend, int ctx_size) { return ds4_context_memory_estimate_with_prefill(backend, ctx_size, 0); @@ -28075,7 +29271,7 @@ static void embed_prompt( uint32_t n_embd, float * out) { for (int i = 0; i < tokens->len; i++) { - embed_token_f16(model, weights, tokens->v[i], out + (uint64_t)i * n_embd); + embed_token_any(model, weights, tokens->v[i], out + (uint64_t)i * n_embd); } } @@ -28193,10 +29389,21 @@ struct ds4_vocab { int n_vocab; int bos_id; int eos_id; + int system_id; int user_id; int assistant_id; + int observation_id; + int sop_id; int think_start_id; int think_end_id; + int tool_call_start_id; + int tool_call_end_id; + int tool_response_start_id; + int tool_response_end_id; + int arg_key_start_id; + int arg_key_end_id; + int arg_value_start_id; + int arg_value_end_id; int dsml_id; str_i32_table token_to_id; str_i32_table merge_rank; @@ -28215,7 +29422,7 @@ typedef struct { ds4_gpu_tensor *zero_vec; uint64_t eval_seq; /* leader: mirrored eval counter */ int rank; - bool null_split; + bool vocab_split; /* DS4-only: logits halves cross the wire */ bool active; } ds4_engine_tp_state; @@ -28239,17 +29446,104 @@ struct ds4_engine { uint32_t prefill_chunk; uint32_t ssd_streaming_cache_experts; uint64_t ssd_streaming_cache_bytes; + uint64_t ssd_streaming_prefill_headroom_bytes; + uint64_t ssd_streaming_full_layer_bytes; + uint32_t ssd_streaming_full_layers; uint32_t ssd_streaming_preload_experts; + uint64_t startup_model_span_bytes; ds4_ssd_memory_lock simulated_memory; bool quality; bool ssd_streaming; bool ssd_streaming_cold; + bool ssd_streaming_full_layers_set; ds4_distributed_options distributed; ds4_engine_tp_state tp; bool metal_ready; bool mtp_ready; }; +static void ds4_engine_print_startup_memory( + const ds4_engine *e, + int ctx_size) { + if (!e || ctx_size <= 0) return; + + const ds4_context_memory mem = + ds4_context_memory_estimate_with_prefill_mode(e->backend, + ctx_size, + e->prefill_chunk, + e->ssd_streaming); + const uint64_t kv_bytes = + ds4_add_sat_u64(mem.raw_bytes, mem.compressed_bytes); + uint64_t dynamic_expert_cache_bytes = e->ssd_streaming_cache_bytes; + if (dynamic_expert_cache_bytes == 0 && + e->ssd_streaming && + e->ssd_streaming_cache_experts != 0) { + uint64_t per_expert_bytes = 0; + if (ds4_streaming_routed_expert_bytes(&e->weights, &per_expert_bytes)) { + dynamic_expert_cache_bytes = + e->ssd_streaming_cache_experts > + UINT64_MAX / per_expert_bytes ? + UINT64_MAX : + (uint64_t)e->ssd_streaming_cache_experts * + per_expert_bytes; + } + } + const uint64_t expert_reserved_bytes = + e->ssd_streaming_prefill_headroom_bytes; + uint64_t total = kv_bytes; + total = ds4_add_sat_u64(total, mem.scratch_bytes); + total = ds4_add_sat_u64(total, e->startup_model_span_bytes); + total = ds4_add_sat_u64(total, dynamic_expert_cache_bytes); + total = ds4_add_sat_u64(total, e->ssd_streaming_full_layer_bytes); + total = ds4_add_sat_u64(total, expert_reserved_bytes); + + const bool color = ds4_log_is_tty(stderr); + const char *green = color ? "\x1b[32m" : ""; + const char *bright_green = color ? "\x1b[1;32m" : ""; + const char *reset = color ? "\x1b[0m" : ""; + + fprintf(stderr, + "%sds4: memory: KV %.2f GiB (raw %.2f + compressed %.2f) " + "+ buffers %.2f GiB + resident model %.2f GiB", + green, + ds4_bytes_to_gib(kv_bytes), + ds4_bytes_to_gib(mem.raw_bytes), + ds4_bytes_to_gib(mem.compressed_bytes), + ds4_bytes_to_gib(mem.scratch_bytes), + ds4_bytes_to_gib(e->startup_model_span_bytes)); + if (e->ssd_streaming_full_layer_bytes != 0) { + fprintf(stderr, + " + full-layer experts %.2f GiB", + ds4_bytes_to_gib(e->ssd_streaming_full_layer_bytes)); + } + if (dynamic_expert_cache_bytes != 0) { + fprintf(stderr, + " + expert cache %.2f GiB", + ds4_bytes_to_gib(dynamic_expert_cache_bytes)); + } + if (expert_reserved_bytes != 0) { + fprintf(stderr, + " + prefill expert reserve %.2f GiB", + ds4_bytes_to_gib(expert_reserved_bytes)); + } + fprintf(stderr, + " = %s%.2f GiB planned%s\n", + bright_green, + ds4_bytes_to_gib(total), + reset); + + fprintf(stderr, + "%sds4: memory detail: ctx=%d prefill_cap=%u raw_kv_rows=%u " + "compressed_kv_rows=%u backend=%s%s\n", + green, + ctx_size, + mem.prefill_cap, + mem.raw_cap, + mem.comp_cap, + ds4_backend_name(e->backend), + reset); +} + static bool cpu_directional_steering_enabled( const float *dirs, float scale) { @@ -28548,6 +29842,244 @@ static bool joyai_cjk_at(const char *s, uint64_t len, uint64_t pos) { return utf8_is_cjk_hira_kata(cp); } +typedef struct { + uint32_t cp; + uint64_t next; + bool valid; + bool is_letter; + bool is_number; + bool is_whitespace; +} glm4_char_info; + +static bool glm4_unicode_whitespace(uint32_t cp) { + if (cp < 128) return ascii_space((uint8_t)cp); + return cp == 0x0085 || + cp == 0x00a0 || + cp == 0x1680 || + (cp >= 0x2000 && cp <= 0x200a) || + cp == 0x2028 || + cp == 0x2029 || + cp == 0x202f || + cp == 0x205f || + cp == 0x3000; +} + +static bool glm4_unicode_number(uint32_t cp) { + if (cp < 128) return ascii_digit((uint8_t)cp); + return (cp >= 0x0660 && cp <= 0x0669) || + (cp >= 0x06f0 && cp <= 0x06f9) || + (cp >= 0x07c0 && cp <= 0x07c9) || + (cp >= 0x0966 && cp <= 0x096f) || + (cp >= 0x09e6 && cp <= 0x09ef) || + (cp >= 0x0a66 && cp <= 0x0a6f) || + (cp >= 0x0ae6 && cp <= 0x0aef) || + (cp >= 0x0b66 && cp <= 0x0b6f) || + (cp >= 0x0be6 && cp <= 0x0bef) || + (cp >= 0x0c66 && cp <= 0x0c6f) || + (cp >= 0x0ce6 && cp <= 0x0cef) || + (cp >= 0x0d66 && cp <= 0x0d6f) || + (cp >= 0x0de6 && cp <= 0x0def) || + (cp >= 0x0e50 && cp <= 0x0e59) || + (cp >= 0x0ed0 && cp <= 0x0ed9) || + (cp >= 0x0f20 && cp <= 0x0f29) || + (cp >= 0x1040 && cp <= 0x1049) || + (cp >= 0x1090 && cp <= 0x1099) || + (cp >= 0x17e0 && cp <= 0x17e9) || + (cp >= 0x1810 && cp <= 0x1819) || + (cp >= 0xff10 && cp <= 0xff19); +} + +static bool glm4_unicode_punct_symbol(uint32_t cp) { + if (cp < 128) return joyai_ascii_punct_symbol((uint8_t)cp); + return (cp >= 0x00a1 && cp <= 0x00a9) || + (cp >= 0x00ab && cp <= 0x00ac) || + (cp >= 0x00ae && cp <= 0x00b1) || + cp == 0x00b4 || + (cp >= 0x00b6 && cp <= 0x00b8) || + cp == 0x00bb || + cp == 0x00bf || + cp == 0x00d7 || + cp == 0x00f7 || + (cp >= 0x02c2 && cp <= 0x02df) || + (cp >= 0x02e5 && cp <= 0x02eb) || + (cp >= 0x02ed && cp <= 0x02ff) || + (cp >= 0x0375 && cp <= 0x037e) || + (cp >= 0x0384 && cp <= 0x0385) || + cp == 0x0387 || + (cp >= 0x055a && cp <= 0x055f) || + (cp >= 0x0589 && cp <= 0x058a) || + (cp >= 0x05be && cp <= 0x05c0) || + cp == 0x05c3 || + (cp >= 0x05c6 && cp <= 0x05c7) || + (cp >= 0x0609 && cp <= 0x060a) || + (cp >= 0x060c && cp <= 0x060d) || + cp == 0x061b || + (cp >= 0x061e && cp <= 0x061f) || + cp == 0x066a || + cp == 0x066d || + cp == 0x06d4 || + (cp >= 0x2000 && cp <= 0x206f) || + (cp >= 0x20a0 && cp <= 0x20cf) || + (cp >= 0x2100 && cp <= 0x214f) || + (cp >= 0x2190 && cp <= 0x23ff) || + (cp >= 0x2460 && cp <= 0x24ff) || + (cp >= 0x2500 && cp <= 0x2775) || + (cp >= 0x2794 && cp <= 0x2bff) || + (cp >= 0x2e00 && cp <= 0x2e7f) || + (cp >= 0x3000 && cp <= 0x303f) || + (cp >= 0xfd3e && cp <= 0xfd3f) || + (cp >= 0xfe10 && cp <= 0xfe6f) || + (cp >= 0xff01 && cp <= 0xff0f) || + (cp >= 0xff1a && cp <= 0xff20) || + (cp >= 0xff3b && cp <= 0xff40) || + (cp >= 0xff5b && cp <= 0xff65) || + (cp >= 0x1f000 && cp <= 0x1faff); +} + +static glm4_char_info glm4_char_at(const char *s, uint64_t len, uint64_t pos) { + glm4_char_info info; + memset(&info, 0, sizeof(info)); + if (pos >= len) return info; + + info.valid = true; + info.cp = utf8_peek_one(s, len, pos, &info.next); + info.is_whitespace = glm4_unicode_whitespace(info.cp); + info.is_number = glm4_unicode_number(info.cp); + if (info.cp < 128) { + info.is_letter = ascii_alpha((uint8_t)info.cp); + } else { + info.is_letter = + !info.is_whitespace && + !info.is_number && + !glm4_unicode_punct_symbol(info.cp); + } + return info; +} + +static uint32_t ascii_tolower_cp(uint32_t cp) { + if (cp >= 'A' && cp <= 'Z') return cp + ('a' - 'A'); + return cp; +} + +/* ChatGLM4/GLM pre-tokenization. GLM GGUFs use tokenizer.ggml.pre="glm4", + * which shares the llama3-style split shape used by llama.cpp's CHATGLM4 path. */ +static void bpe_tokenize_text_glm4(const ds4_vocab *vocab, const char *text, token_vec *out) { + const uint64_t len = strlen(text); + uint64_t pos = 0; + + while (pos < len) { + uint64_t start = pos; + glm4_char_info cur = glm4_char_at(text, len, pos); + + if (!cur.valid) break; + + if (cur.cp == '\'' && cur.next < len) { + glm4_char_info next = glm4_char_at(text, len, cur.next); + uint32_t n1 = ascii_tolower_cp(next.cp); + if (n1 == 's' || n1 == 't' || n1 == 'm' || n1 == 'd') { + pos = next.next; + bpe_emit_piece(vocab, (ds4_str){ text + start, pos - start }, out); + continue; + } + if (next.valid && next.next < len) { + glm4_char_info next2 = glm4_char_at(text, len, next.next); + uint32_t n2 = ascii_tolower_cp(next2.cp); + if ((n1 == 'r' && n2 == 'e') || + (n1 == 'v' && n2 == 'e') || + (n1 == 'l' && n2 == 'l')) { + pos = next2.next; + bpe_emit_piece(vocab, (ds4_str){ text + start, pos - start }, out); + continue; + } + } + } + + if (!(cur.cp == '\r' || cur.cp == '\n' || cur.is_number)) { + glm4_char_info next = glm4_char_at(text, len, cur.next); + if (cur.is_letter || next.is_letter) { + pos = cur.next; + while (pos < len) { + glm4_char_info scan = glm4_char_at(text, len, pos); + if (!scan.valid || !scan.is_letter) break; + pos = scan.next; + } + bpe_emit_piece(vocab, (ds4_str){ text + start, pos - start }, out); + continue; + } + } + + if (cur.is_number) { + int ndigits = 0; + while (pos < len && ndigits < 3) { + glm4_char_info scan = glm4_char_at(text, len, pos); + if (!scan.valid || !scan.is_number) break; + pos = scan.next; + ndigits++; + } + bpe_emit_piece(vocab, (ds4_str){ text + start, pos - start }, out); + continue; + } + + glm4_char_info punct = cur; + uint64_t punct_pos = pos; + if (cur.cp == ' ') { + punct_pos = cur.next; + punct = glm4_char_at(text, len, punct_pos); + } + if (punct.valid && + !punct.is_whitespace && + !punct.is_letter && + !punct.is_number) { + pos = punct_pos; + while (pos < len) { + glm4_char_info scan = glm4_char_at(text, len, pos); + if (!scan.valid || + scan.is_whitespace || + scan.is_letter || + scan.is_number) { + break; + } + pos = scan.next; + } + while (pos < len) { + glm4_char_info scan = glm4_char_at(text, len, pos); + if (!scan.valid || !(scan.cp == '\r' || scan.cp == '\n')) break; + pos = scan.next; + } + bpe_emit_piece(vocab, (ds4_str){ text + start, pos - start }, out); + continue; + } + + if (cur.is_whitespace) { + uint64_t p = pos; + uint64_t last_newline_end = 0; + uint64_t last_ws_start = pos; + int nspace = 0; + while (p < len) { + glm4_char_info scan = glm4_char_at(text, len, p); + if (!scan.valid || !scan.is_whitespace) break; + last_ws_start = p; + if (scan.cp == '\r' || scan.cp == '\n') last_newline_end = scan.next; + p = scan.next; + nspace++; + } + if (last_newline_end) { + pos = last_newline_end; + } else if (nspace > 1 && p < len) { + pos = last_ws_start; + } else { + pos = p; + } + bpe_emit_piece(vocab, (ds4_str){ text + start, pos - start }, out); + continue; + } + + pos = cur.next; + if (pos == start) pos = next_utf8_char(text, len, pos); + bpe_emit_piece(vocab, (ds4_str){ text + start, pos - start }, out); + } +} + /* * DeepSeek V4 Flash declares tokenizer.ggml.pre = "joyai-llm". The split * below mirrors the JoyAI BPE pre-tokenizer for the cases this model @@ -28569,6 +30101,11 @@ static bool joyai_cjk_at(const char *s, uint64_t len, uint64_t pos) { /* JoyAI/DeepSeek pre-tokenization. The split shape matters: different pieces * lead to different BPE merges even when the final text bytes are identical. */ static void bpe_tokenize_text(const ds4_vocab *vocab, const char *text, token_vec *out) { + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + bpe_tokenize_text_glm4(vocab, text, out); + return; + } + const uint64_t len = strlen(text); uint64_t pos = 0; @@ -28647,6 +30184,12 @@ static int vocab_lookup(const ds4_vocab *vocab, const char *text) { return token; } +static int vocab_lookup_optional(const ds4_vocab *vocab, const char *text) { + int token = -1; + if (!table_get(&vocab->token_to_id, text, strlen(text), &token)) return -1; + return token; +} + /* Load token strings, special token ids, and merge ranks from GGUF metadata. */ static void vocab_load(ds4_vocab *vocab, const ds4_model *model) { memset(vocab, 0, sizeof(*vocab)); @@ -28681,12 +30224,49 @@ static void vocab_load(ds4_vocab *vocab, const ds4_model *model) { table_put(&vocab->merge_rank, merge, (int)i); } + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + if (!model_get_token_id(model, "tokenizer.ggml.bos_token_id", &vocab->bos_id)) { + vocab->bos_id = vocab_lookup_optional(vocab, ""); + } + if (!model_get_token_id(model, "tokenizer.ggml.eos_token_id", &vocab->eos_id)) { + vocab->eos_id = vocab_lookup_optional(vocab, "<|endoftext|>"); + } + vocab->system_id = vocab_lookup_optional(vocab, "<|system|>"); + vocab->user_id = vocab_lookup_optional(vocab, "<|user|>"); + vocab->assistant_id = vocab_lookup_optional(vocab, "<|assistant|>"); + vocab->observation_id = vocab_lookup_optional(vocab, "<|observation|>"); + vocab->sop_id = vocab_lookup_optional(vocab, ""); + vocab->think_start_id = vocab_lookup_optional(vocab, ""); + vocab->think_end_id = vocab_lookup_optional(vocab, ""); + vocab->tool_call_start_id = vocab_lookup_optional(vocab, ""); + vocab->tool_call_end_id = vocab_lookup_optional(vocab, ""); + vocab->tool_response_start_id = vocab_lookup_optional(vocab, ""); + vocab->tool_response_end_id = vocab_lookup_optional(vocab, ""); + vocab->arg_key_start_id = vocab_lookup_optional(vocab, ""); + vocab->arg_key_end_id = vocab_lookup_optional(vocab, ""); + vocab->arg_value_start_id = vocab_lookup_optional(vocab, ""); + vocab->arg_value_end_id = vocab_lookup_optional(vocab, ""); + vocab->dsml_id = -1; + return; + } + vocab->bos_id = vocab_lookup(vocab, "<｜begin▁of▁sentence｜>"); vocab->eos_id = vocab_lookup(vocab, "<｜end▁of▁sentence｜>"); + vocab->system_id = -1; vocab->user_id = vocab_lookup(vocab, "<｜User｜>"); vocab->assistant_id = vocab_lookup(vocab, "<｜Assistant｜>"); + vocab->observation_id = -1; + vocab->sop_id = -1; vocab->think_start_id = vocab_lookup(vocab, ""); vocab->think_end_id = vocab_lookup(vocab, ""); + vocab->tool_call_start_id = -1; + vocab->tool_call_end_id = -1; + vocab->tool_response_start_id = -1; + vocab->tool_response_end_id = -1; + vocab->arg_key_start_id = -1; + vocab->arg_key_end_id = -1; + vocab->arg_value_start_id = -1; + vocab->arg_value_end_id = -1; vocab->dsml_id = vocab_lookup(vocab, "｜DSML｜"); } @@ -28700,17 +30280,58 @@ static void vocab_free(ds4_vocab *vocab) { /* Build the DS4 chat prompt: BOS, optional system text, user prompt, assistant * marker, and either or depending on the requested mode. Max * thinking is only a prompt prefix: the model still enters through . */ +static void chat_push_bos_sequence(const ds4_vocab *vocab, token_vec *out) { + token_vec_push(out, vocab->bos_id); + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA && vocab->sop_id >= 0) + token_vec_push(out, vocab->sop_id); +} + +const char *ds4_glm_reasoning_effort_text(ds4_think_mode mode) { + switch (mode) { + case DS4_THINK_HIGH: return "Reasoning Effort: High"; + case DS4_THINK_MAX: return "Reasoning Effort: Max"; + case DS4_THINK_NONE: return NULL; + } + return NULL; +} + +static void chat_push_think_prefix(const ds4_vocab *vocab, + ds4_think_mode think_mode, + token_vec *out) { + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + const char *effort = ds4_glm_reasoning_effort_text(think_mode); + if (effort) { + token_vec_push(out, vocab->system_id); + bpe_tokenize_text(vocab, effort, out); + } + } else if (think_mode == DS4_THINK_MAX) { + bpe_tokenize_text(vocab, DS4_REASONING_EFFORT_MAX_PREFIX, out); + } +} + static void encode_chat_prompt( const ds4_vocab *vocab, const char *system, const char *prompt, ds4_think_mode think_mode, token_vec *out) { - token_vec_push(out, vocab->bos_id); - if (think_mode == DS4_THINK_MAX) { - bpe_tokenize_text(vocab, DS4_REASONING_EFFORT_MAX_PREFIX, out); + const bool need_think_start = + ds4_think_mode_enabled(think_mode) || + DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA; + if (vocab->bos_id < 0 || + vocab->user_id < 0 || + vocab->assistant_id < 0 || + vocab->think_end_id < 0 || + (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA && vocab->system_id < 0) || + (need_think_start && vocab->think_start_id < 0)) { + ds4_die("this tokenizer does not provide the DeepSeek chat markers; use raw prompt tokenization"); } + + chat_push_bos_sequence(vocab, out); + chat_push_think_prefix(vocab, think_mode, out); if (system && system[0]) { + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) + token_vec_push(out, vocab->system_id); bpe_tokenize_text(vocab, system, out); } token_vec_push(out, vocab->user_id); @@ -28718,6 +30339,9 @@ static void encode_chat_prompt( token_vec_push(out, vocab->assistant_id); if (ds4_think_mode_enabled(think_mode)) { token_vec_push(out, vocab->think_start_id); + } else if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + token_vec_push(out, vocab->think_start_id); + token_vec_push(out, vocab->think_end_id); } else { token_vec_push(out, vocab->think_end_id); } @@ -28734,14 +30358,29 @@ static bool special_token_at(const ds4_vocab *vocab, const char *p, int *token, } specials[] = { {"<｜begin▁of▁sentence｜>", vocab->bos_id}, {"<｜end▁of▁sentence｜>", vocab->eos_id}, + {"[gMASK]", vocab->bos_id}, + {"", vocab->sop_id}, + {"<|system|>", vocab->system_id}, {"<｜User｜>", vocab->user_id}, {"<｜Assistant｜>", vocab->assistant_id}, + {"<|user|>", vocab->user_id}, + {"<|assistant|>", vocab->assistant_id}, + {"<|observation|>", vocab->observation_id}, {"", vocab->think_start_id}, {"", vocab->think_end_id}, + {"", vocab->tool_call_start_id}, + {"", vocab->tool_call_end_id}, + {"", vocab->tool_response_start_id}, + {"", vocab->tool_response_end_id}, + {"", vocab->arg_key_start_id}, + {"", vocab->arg_key_end_id}, + {"", vocab->arg_value_start_id}, + {"", vocab->arg_value_end_id}, {"｜DSML｜", vocab->dsml_id}, }; for (size_t i = 0; i < sizeof(specials) / sizeof(specials[0]); i++) { + if (specials[i].token < 0) continue; size_t n = strlen(specials[i].text); if (!strncmp(p, specials[i].text, n)) { *token = specials[i].token; @@ -28787,7 +30426,7 @@ void ds4_tokenize_rendered_chat(ds4_engine *e, const char *text, ds4_tokens *out } void ds4_chat_begin(ds4_engine *e, ds4_tokens *tokens) { - token_vec_push(tokens, e->vocab.bos_id); + chat_push_bos_sequence(&e->vocab, tokens); } void ds4_encode_chat_prompt( @@ -28803,12 +30442,12 @@ void ds4_chat_append_max_effort_prefix(ds4_engine *e, ds4_tokens *tokens) { bpe_tokenize_text(&e->vocab, DS4_REASONING_EFFORT_MAX_PREFIX, tokens); } -static void bpe_tokenize_tool_result_text(ds4_vocab *vocab, const char *content, token_vec *out) { - /* Tool output is plain data inside .... +static void bpe_tokenize_wrapped_payload_text(ds4_vocab *vocab, const char *content, + const char *end, token_vec *out) { + /* Tool output is plain data inside the model-family wrapper. * Preserve literal '<', '>' and '&' so shell output and file snippets stay * intact, but escape the exact closing sentinel so a malicious or accidental * tool payload cannot terminate the wrapper early. */ - const char *end = ""; const size_t endlen = strlen(end); const char *span = content ? content : ""; const char *p = span; @@ -28825,11 +30464,43 @@ static void bpe_tokenize_tool_result_text(ds4_vocab *vocab, const char *content, tokenize_span(vocab, span, (size_t)(p - span), out); } +static void bpe_tokenize_tool_result_text(ds4_vocab *vocab, const char *content, token_vec *out) { + bpe_tokenize_wrapped_payload_text(vocab, content, "", out); +} + +static void bpe_tokenize_tool_response_text(ds4_vocab *vocab, const char *content, token_vec *out) { + bpe_tokenize_wrapped_payload_text(vocab, content, "", out); +} + void ds4_chat_append_message(ds4_engine *e, ds4_tokens *tokens, const char *role, const char *content) { ds4_vocab *vocab = &e->vocab; if (!role) role = "user"; if (!content) content = ""; + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + if (!strcmp(role, "system") || !strcmp(role, "developer")) { + if (vocab->system_id >= 0) token_vec_push(tokens, vocab->system_id); + tokenize_rendered_chat_vocab(vocab, content, tokens); + } else if (!strcmp(role, "assistant")) { + token_vec_push(tokens, vocab->assistant_id); + if (strncmp(content, "", 7) != 0 && + strncmp(content, "", 8) != 0) { + token_vec_push(tokens, vocab->think_start_id); + token_vec_push(tokens, vocab->think_end_id); + } + tokenize_rendered_chat_vocab(vocab, content, tokens); + } else if (!strcmp(role, "tool") || !strcmp(role, "function")) { + if (vocab->observation_id >= 0) token_vec_push(tokens, vocab->observation_id); + tokenize_rendered_chat_vocab(vocab, "", tokens); + bpe_tokenize_tool_response_text(vocab, content, tokens); + tokenize_rendered_chat_vocab(vocab, "", tokens); + } else { + token_vec_push(tokens, vocab->user_id); + bpe_tokenize_text(vocab, content, tokens); + } + return; + } + if (!strcmp(role, "system") || !strcmp(role, "developer")) { bpe_tokenize_text(vocab, content, tokens); } else if (!strcmp(role, "assistant")) { @@ -28851,6 +30522,12 @@ void ds4_chat_append_message(ds4_engine *e, ds4_tokens *tokens, const char *role void ds4_chat_append_assistant_prefix(ds4_engine *e, ds4_tokens *tokens, ds4_think_mode think_mode) { token_vec_push(tokens, e->vocab.assistant_id); + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA && + !ds4_think_mode_enabled(think_mode)) { + token_vec_push(tokens, e->vocab.think_start_id); + token_vec_push(tokens, e->vocab.think_end_id); + return; + } token_vec_push(tokens, ds4_think_mode_enabled(think_mode) ? e->vocab.think_start_id : e->vocab.think_end_id); } @@ -28960,10 +30637,49 @@ char *ds4_token_text(ds4_engine *e, int token, size_t *len) { return out; } +static bool vocab_token_is_generation_stop(const ds4_vocab *vocab, int token) { + if (!vocab || token < 0) return false; + if (token == vocab->eos_id) return true; + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + return (vocab->system_id >= 0 && token == vocab->system_id) || + (vocab->user_id >= 0 && token == vocab->user_id) || + (vocab->assistant_id >= 0 && token == vocab->assistant_id) || + (vocab->observation_id >= 0 && token == vocab->observation_id); + } + return false; +} + int ds4_token_eos(ds4_engine *e) { return e->vocab.eos_id; } +bool ds4_token_is_stop(ds4_engine *e, int token) { + return e ? vocab_token_is_generation_stop(&e->vocab, token) : false; +} + +bool ds4_token_is_thinking_control(ds4_engine *e, int token) { + if (!e || token < 0) return false; + return (e->vocab.think_start_id >= 0 && + token == e->vocab.think_start_id) || + (e->vocab.think_end_id >= 0 && + token == e->vocab.think_end_id); +} + +bool ds4_token_is_stop_for_think_mode( + ds4_engine *e, + int token, + ds4_think_mode mode) { + if (ds4_token_is_stop(e, token)) return true; + /* In no-thinking mode the prompt already supplied the protocol close tag. + * If the model emits another thinking tag, do not print or feed it back: + * it is a control marker, not assistant content. */ + if (!ds4_think_mode_enabled(mode) && + ds4_token_is_thinking_control(e, token)) { + return true; + } + return false; +} + int ds4_token_user(ds4_engine *e) { return e->vocab.user_id; } @@ -29032,6 +30748,129 @@ static int sample_candidate_cmp_desc(const void *a, const void *b) { return (cb->logit > ca->logit) - (cb->logit < ca->logit); } +static bool sample_candidate_gt(sample_candidate a, sample_candidate b) { + if (a.logit != b.logit) return a.logit > b.logit; + return a.id < b.id; +} + +static void sample_heap_sift_up(sample_candidate *heap, uint32_t idx) { + while (idx > 0) { + const uint32_t parent = (idx - 1u) / 2u; + if (!sample_candidate_gt(heap[parent], heap[idx])) break; + sample_candidate tmp = heap[parent]; + heap[parent] = heap[idx]; + heap[idx] = tmp; + idx = parent; + } +} + +static void sample_heap_sift_down(sample_candidate *heap, uint32_t n, uint32_t idx) { + for (;;) { + const uint32_t left = idx * 2u + 1u; + const uint32_t right = left + 1u; + uint32_t smallest = idx; + if (left < n && sample_candidate_gt(heap[smallest], heap[left])) { + smallest = left; + } + if (right < n && sample_candidate_gt(heap[smallest], heap[right])) { + smallest = right; + } + if (smallest == idx) break; + sample_candidate tmp = heap[idx]; + heap[idx] = heap[smallest]; + heap[smallest] = tmp; + idx = smallest; + } +} + +static bool sample_fast_top_p( + const float *logits, + uint32_t n_vocab, + uint32_t finite, + float max_logit, + int best, + float temperature, + float top_p, + float min_p, + uint64_t *rng, + int *token_out) { + enum { SAMPLE_FAST_TOP_P_CAP = 512 }; + if (!logits || !rng || !token_out || finite == 0) return false; + if (finite > SAMPLE_FAST_TOP_P_CAP && top_p >= 0.999f) return false; + + const uint32_t cap = finite < SAMPLE_FAST_TOP_P_CAP ? + finite : (uint32_t)SAMPLE_FAST_TOP_P_CAP; + sample_candidate heap[SAMPLE_FAST_TOP_P_CAP]; + uint32_t n = 0; + float sum = 0.0f; + float heap_sum = 0.0f; + + for (uint32_t i = 0; i < n_vocab; i++) { + const float v = logits[i]; + if (!isfinite(v)) continue; + const float p = expf((v - max_logit) / temperature); + sum += p; + sample_candidate cand = {.id = (int)i, .logit = v, .prob = p}; + if (n < cap) { + heap[n] = cand; + heap_sum += p; + sample_heap_sift_up(heap, n); + n++; + } else if (sample_candidate_gt(cand, heap[0])) { + heap_sum -= heap[0].prob; + heap[0] = cand; + heap_sum += p; + sample_heap_sift_down(heap, n, 0); + } + } + if (sum <= 0.0f || !isfinite(sum)) { + *token_out = best; + return true; + } + + if (n < finite && heap_sum < top_p * sum) { + return false; + } + + qsort(heap, n, sizeof(heap[0]), sample_candidate_cmp_desc); + const float min_prob = (heap[0].prob / sum) * (min_p > 0.0f ? min_p : 0.0f); + const float min_prob_raw = heap[0].prob * (min_p > 0.0f ? min_p : 0.0f); + float filtered_sum = 0.0f; + uint32_t filtered = 0; + bool stopped_by_min_p = false; + for (uint32_t i = 0; i < n; i++) { + const float p = heap[i].prob / sum; + if (i > 0 && p < min_prob) { + stopped_by_min_p = true; + break; + } + filtered_sum += heap[i].prob; + filtered++; + if (filtered_sum / sum >= top_p) break; + } + if (n < finite && + stopped_by_min_p && + min_p > 0.0f && + heap[n - 1u].prob >= min_prob_raw) { + return false; + } + if (filtered == 0) { + *token_out = best; + return true; + } + + float r = sample_rng_f32(rng) * filtered_sum; + for (uint32_t i = 0; i < filtered; i++) { + r -= heap[i].prob; + if (r <= 0.0f) { + *token_out = heap[i].id; + return true; + } + } + *token_out = heap[filtered - 1u].id; + return true; +} + static int sample_full_vocab( const float *logits, uint32_t n_vocab, @@ -29053,6 +30892,21 @@ static int sample_full_vocab( } if (finite == 0) return sample_argmax(logits, n_vocab); + int fast_token = best; + if (top_p < 1.0f && + sample_fast_top_p(logits, + n_vocab, + finite, + max_logit, + best, + temperature, + top_p, + min_p, + rng, + &fast_token)) { + return fast_token; + } + if (top_p >= 1.0f) { float sum = 0.0f; const float min_rel = min_p > 0.0f ? min_p : 0.0f; @@ -29284,7 +31138,7 @@ static int generate_raw_swa_cpu( } int token = sample_argmax(logits, DS4_N_VOCAB); - if (token == vocab->eos_id) break; + if (vocab_token_is_generation_stop(vocab, token)) break; if (emit) emit(emit_ud, token); n_generated++; @@ -29332,6 +31186,8216 @@ static int generate_raw_swa_cpu( } #ifndef DS4_NO_GPU +typedef struct { + uint32_t ctx_size; + uint32_t ctx_cap; + uint32_t normal_layers; + uint32_t layer_start; + uint32_t layer_end; + uint32_t layer_count; + uint64_t q_dim; + uint64_t q_nope; + uint64_t heads_dim; + uint64_t kv_raw_dim; + uint64_t dense_hidden_max; + uint64_t ffn_mid_elems; + + ds4_gpu_tensor *cur; + ds4_gpu_tensor *next; + ds4_gpu_tensor *attn_norm; + ds4_gpu_tensor *q_rank; + ds4_gpu_tensor *q_rank_norm; + ds4_gpu_tensor *q; + ds4_gpu_tensor *kv_raw; + ds4_gpu_tensor *kv_norm; + ds4_gpu_tensor *k_nope; + ds4_gpu_tensor *value; + ds4_gpu_tensor *heads; + ds4_gpu_tensor *attn_out; + ds4_gpu_tensor *after_attn; + ds4_gpu_tensor *ffn_norm; + ds4_gpu_tensor *ffn_gate; + ds4_gpu_tensor *ffn_up; + ds4_gpu_tensor *ffn_mid; + ds4_gpu_tensor *routed_gate; + ds4_gpu_tensor *routed_up; + ds4_gpu_tensor *routed_down; + ds4_gpu_tensor *ffn_out; + ds4_gpu_tensor *ffn_sum; + ds4_gpu_tensor *router_logits; + ds4_gpu_tensor *router_probs; + ds4_gpu_tensor *router_selected; + ds4_gpu_tensor *router_weights; + ds4_gpu_tensor *output_norm; + ds4_gpu_tensor *logits; + ds4_gpu_tensor *batch_router_logits; + ds4_gpu_tensor *batch_router_probs; + ds4_gpu_tensor *batch_router_selected; + ds4_gpu_tensor *batch_router_weights; + + ds4_gpu_tensor *prefill_tokens; + ds4_gpu_tensor *batch_cur; + ds4_gpu_tensor *batch_next; + ds4_gpu_tensor *batch_attn_norm; + ds4_gpu_tensor *batch_q_rank; + ds4_gpu_tensor *batch_q_rank_norm; + ds4_gpu_tensor *batch_q; + ds4_gpu_tensor *batch_kv_raw; + ds4_gpu_tensor *batch_kv_norm; + ds4_gpu_tensor *batch_k_nope; + ds4_gpu_tensor *batch_value; + ds4_gpu_tensor *batch_heads; + ds4_gpu_tensor *batch_attn_out; + ds4_gpu_tensor *batch_after_attn; + ds4_gpu_tensor *batch_ffn_norm; + ds4_gpu_tensor *batch_ffn_gate; + ds4_gpu_tensor *batch_ffn_up; + ds4_gpu_tensor *batch_shared_mid; + ds4_gpu_tensor *batch_ffn_mid; + ds4_gpu_tensor *batch_routed_gate; + ds4_gpu_tensor *batch_routed_up; + ds4_gpu_tensor *batch_routed_down; + ds4_gpu_tensor *batch_ffn_out; + bool batch_routed_mid_is_f16; + + uint32_t compact_cache_cap; + uint32_t indexed_prefill_cap; + uint32_t indexed_prefill_score_cap; + uint32_t indexer_full_layers; + ds4_gpu_tensor *indexer_k; + ds4_gpu_tensor *indexer_q; + ds4_gpu_tensor *indexer_weights; + ds4_gpu_tensor *indexer_scores; + ds4_gpu_tensor *indexer_selected; + ds4_gpu_tensor *qk_low; + ds4_gpu_tensor *attn_partial_lora; + ds4_gpu_tensor *attn_partial_ms; + ds4_gpu_tensor *batch_indexer_k; + ds4_gpu_tensor *batch_indexer_q; + ds4_gpu_tensor *batch_indexer_weights; + ds4_gpu_tensor *batch_indexer_scores; + ds4_gpu_tensor *batch_indexer_selected; + ds4_gpu_tensor *batch_qk_low; + ds4_gpu_tensor *batch_attn_lora; + ds4_gpu_tensor *layer_kv_lora_cache[DS4_MAX_LAYER]; + ds4_gpu_tensor *layer_k_rope_cache[DS4_MAX_LAYER]; + /* GLM MTP (nextn block) drafting: private compact caches for the nextn + * layer (slot = absolute position; only [mtp_min_pos..pos] is ever + * selected) plus small scratch. Allocated lazily on first draft. */ + ds4_gpu_tensor *mtp_kv_lora_cache; + ds4_gpu_tensor *mtp_k_rope_cache; + ds4_gpu_tensor *mtp_concat; + ds4_gpu_tensor *mtp_selected; + float *mtp_logits_host; + int mtp_ready; + ds4_gpu_tensor *layer_indexer_key_cache[DS4_MAX_LAYER]; + ds4_gpu_tensor *layer_key_cache[DS4_MAX_LAYER]; + ds4_gpu_tensor *layer_value_cache[DS4_MAX_LAYER]; + bool full_kv_cache; + bool has_token_embd; + bool has_output_head; + bool quality; + bool ssd_streaming; + bool ssd_streaming_cold; + bool generic_routed_moe; + bool streaming_static_decode_map_current; + /* Tensor parallelism (50/50 expert sharding): tp_world 2 means + * this rank computes only its contiguous half of the routed experts + * and exchanges the 24KB routed-FFN partial at one gate per sparse + * layer. Views alias the engine's TP slab slots [layer*2 + FFN]. */ + uint32_t tp_world; + uint32_t tp_rank; + ds4_gpu_tensor **tp_out; + ds4_gpu_tensor **tp_in; + /* Prefill batch gate bounce buffers (shared storage; grow on demand). */ + ds4_gpu_tensor *tp_bounce_out; + ds4_gpu_tensor *tp_bounce_in; +} ds4_glm_gpu_graph; + +static uint32_t glm_graph_model_context_limit(void) { + if (DS4_ROPE_ORIG_CTX > UINT32_MAX) return UINT32_MAX; + return (uint32_t)DS4_ROPE_ORIG_CTX; +} + +static double glm_graph_bytes_to_gib(uint64_t bytes) { + return (double)bytes / (1024.0 * 1024.0 * 1024.0); +} + +static uint64_t glm_graph_saturating_add_u64(uint64_t a, uint64_t b) { + return a > UINT64_MAX - b ? UINT64_MAX : a + b; +} + +static bool glm_graph_env_disabled(const char *name) { + const char *env = getenv(name); + if (!env || !env[0]) return false; + return strcmp(env, "0") == 0 || + strcasecmp(env, "false") == 0 || + strcasecmp(env, "off") == 0 || + strcasecmp(env, "no") == 0; +} + +static double glm_graph_env_double( + const char *name, + double fallback, + double min_value, + double max_value) { + const char *env = getenv(name); + if (!env || !env[0]) return fallback; + char *end = NULL; + errno = 0; + const double v = strtod(env, &end); + if (end == env || errno != 0 || !isfinite(v)) return fallback; + if (v < min_value) return min_value; + if (v > max_value) return max_value; + return v; +} + +static uint64_t glm_graph_host_memory_bytes(void) { +#if defined(__APPLE__) + uint64_t mem = 0; + size_t len = sizeof(mem); + if (sysctlbyname("hw.memsize", &mem, &len, NULL, 0) != 0) return 0; + return mem; +#else + return 0; +#endif +} + +static uint64_t glm_graph_streaming_active_model_bytes( + const ds4_weights *weights) { + if (!weights) return 0; + + uint64_t max_bytes = 0; + ds4_model_map_span_vec spans; + + if (weights_model_map_token_spans(weights, &spans)) { + max_bytes = model_map_span_vec_total_bytes(&spans); + free(spans.v); + } + if (weights_model_map_output_spans(weights, &spans)) { + const uint64_t bytes = model_map_span_vec_total_bytes(&spans); + if (bytes > max_bytes) max_bytes = bytes; + free(spans.v); + } + for (uint32_t il = 0; il < DS4_N_LAYER; il++) { + if (!weights_model_map_spans(weights, il, il, false, &spans)) { + continue; + } + const uint64_t bytes = model_map_span_vec_total_bytes(&spans); + if (bytes > max_bytes) max_bytes = bytes; + free(spans.v); + } + + return max_bytes; +} + +/* TP shard bytes: dense weights plus this rank's routed-expert range. + * Zero when not sharding. Set during engine open, before the GLM memory + * guard runs. */ +static uint64_t g_tp_shard_model_bytes; + +/* A user-raised iogpu.wired_limit_mb is an explicit GPU budget grant; + * prefer it over the fraction/reserve heuristics. */ +static uint64_t glm_graph_wired_limit_bytes(void) { + int64_t mb = 0; + size_t len = sizeof(mb); + if (sysctlbyname("iogpu.wired_limit_mb", &mb, &len, NULL, 0) != 0) return 0; + if (mb <= 0) return 0; + return (uint64_t)mb * 1024ull * 1024ull; +} + +static uint64_t glm_graph_model_bytes_for_guard( + const ds4_model *model, + const ds4_weights *weights, + bool ssd_streaming, + bool load_slice, + uint32_t layer_start, + uint32_t layer_end, + bool include_token, + bool include_output) { + if (!model) return 0; + /* Under TP, the sharded map bytes are authoritative regardless of + * how the caller frames the request (TP excludes real layer slicing, + * so any slice request here is the session's full-range accounting). */ + if (!ssd_streaming && g_tp_shard_model_bytes != 0) { + return g_tp_shard_model_bytes; + } + if (load_slice && weights) { + ds4_model_map_span_vec spans; + bool ok = false; + if (ssd_streaming) { + ok = weights_model_map_decode_static_slice_spans(weights, + layer_start, + layer_end, + include_token, + include_output, + &spans); + } else { + ok = weights_model_map_spans(weights, + layer_start, + layer_end, + include_output, + &spans); + } + if (ok) { + const uint64_t bytes = model_map_span_vec_total_bytes(&spans); + free(spans.v); + if (bytes != 0) return bytes; + } + } + if (!ssd_streaming) { + if (g_tp_shard_model_bytes != 0) return g_tp_shard_model_bytes; + return model->size; + } + const uint64_t active_bytes = glm_graph_streaming_active_model_bytes(weights); + return active_bytes != 0 ? active_bytes : model->size; +} + +static double glm_graph_memory_guard_default_reserve_gib( + uint64_t budget_base, + uint64_t model_bytes) { + const double base_gib = glm_graph_bytes_to_gib(budget_base); + const double model_gib = glm_graph_bytes_to_gib(model_bytes); + if (base_gib >= 480.0 && + base_gib <= 640.0 && + model_gib >= base_gib * 0.80) { + return 24.0; + } + return 32.0; +} + +static bool glm_graph_memory_guard_for_compact_cap( + const ds4_model *model, + const ds4_weights *weights, + bool ssd_streaming, + bool load_slice, + uint32_t layer_start, + uint32_t layer_end, + bool include_token, + bool include_output, + uint32_t ctx_size, + uint32_t compact_cap, + uint64_t transient_extra_bytes, + const char *phase) { + if (!model || glm_graph_env_disabled("DS4_GLM_MEMORY_GUARD")) return true; + + const uint64_t host_bytes = glm_graph_host_memory_bytes(); + uint64_t budget_base = host_bytes; + if (budget_base == 0) { + budget_base = ds4_gpu_recommended_working_set_size(); + } + if (budget_base == 0) return true; + const uint64_t wired_limit = glm_graph_wired_limit_bytes(); + + const uint32_t work_ctx = + glm_graph_full_attention_cap(ctx_size, ssd_streaming); + const ds4_context_memory mem = + glm_graph_context_memory_estimate_for_compact_cap(ctx_size, + work_ctx, + compact_cap, + ssd_streaming); + const uint64_t graph_bytes = mem.total_bytes; + const uint64_t model_bytes = + glm_graph_model_bytes_for_guard(model, + weights, + ssd_streaming, + load_slice, + layer_start, + layer_end, + include_token, + include_output); + uint64_t required = glm_graph_saturating_add_u64(model_bytes, graph_bytes); + required = glm_graph_saturating_add_u64(required, transient_extra_bytes); + + const double fraction = + glm_graph_env_double("DS4_GLM_MEMORY_GUARD_FRACTION", 0.99, 0.50, 1.00); + const double default_reserve_gib = + glm_graph_memory_guard_default_reserve_gib(budget_base, model_bytes); + const double reserve_gib = + glm_graph_env_double("DS4_GLM_MEMORY_GUARD_RESERVE_GB", + default_reserve_gib, + 0.0, + 1024.0); + const uint64_t fraction_budget = (uint64_t)((double)budget_base * fraction); + const uint64_t reserve_bytes = + (uint64_t)(reserve_gib * 1024.0 * 1024.0 * 1024.0); + const uint64_t reserve_budget = + reserve_bytes >= budget_base ? 0 : budget_base - reserve_bytes; + uint64_t budget = fraction_budget; + if (reserve_bytes != 0 && reserve_budget < budget) budget = reserve_budget; + if (wired_limit != 0) { + /* An explicitly raised iogpu.wired_limit_mb is the user granting + * the GPU that much wired memory; it overrides the heuristics + * (keep a small margin for non-model GPU allocations). */ + const uint64_t margin = 2ull * 1024ull * 1024ull * 1024ull; + const uint64_t wired_budget = + wired_limit > margin ? wired_limit - margin : wired_limit; + if (wired_budget > budget) budget = wired_budget; + } + + if (required <= budget) { + const char *report = getenv("DS4_GLM_MEMORY_GUARD_REPORT"); + if (report && report[0]) { + fprintf(stderr, + "ds4: GLM memory guard ctx=%u compact_cap=%u required=%.2f GiB " + "budget=%.2f GiB (model %.2f GiB, graph %.2f GiB, transient %.2f GiB)\n", + ctx_size, + mem.comp_cap, + glm_graph_bytes_to_gib(required), + glm_graph_bytes_to_gib(budget), + glm_graph_bytes_to_gib(model_bytes), + glm_graph_bytes_to_gib(graph_bytes), + glm_graph_bytes_to_gib(transient_extra_bytes)); + if (ssd_streaming && model_bytes != model->size) { + fprintf(stderr, + "ds4: GLM streaming guard uses active model span %.2f GiB " + "(full GGUF %.2f GiB)\n", + glm_graph_bytes_to_gib(model_bytes), + glm_graph_bytes_to_gib(model->size)); + } else if (load_slice && model_bytes != model->size) { + fprintf(stderr, + "ds4: GLM memory guard uses sliced model span %.2f GiB " + "(full GGUF %.2f GiB)\n", + glm_graph_bytes_to_gib(model_bytes), + glm_graph_bytes_to_gib(model->size)); + } + } + return true; + } + + fprintf(stderr, + "ds4: GLM memory guard refused ctx=%u compact_cap=%u %s\n", + ctx_size, + mem.comp_cap, + phase ? phase : "before Metal graph allocation"); + if (ssd_streaming && model_bytes != model->size) { + fprintf(stderr, + "ds4: streamed active model map: %.2f GiB " + "(full GGUF %.2f GiB)\n", + glm_graph_bytes_to_gib(model_bytes), + glm_graph_bytes_to_gib(model->size)); + } else if (load_slice && model_bytes != model->size) { + fprintf(stderr, + "ds4: sliced model map: %.2f GiB " + "(full GGUF %.2f GiB)\n", + glm_graph_bytes_to_gib(model_bytes), + glm_graph_bytes_to_gib(model->size)); + } else { + fprintf(stderr, + "ds4: model map: %.2f GiB\n", + glm_graph_bytes_to_gib(model_bytes)); + } + fprintf(stderr, + "ds4: graph cache/scratch: %.2f GiB " + "(full KV %.2f GiB, compact DSA %.2f GiB, scratch %.2f GiB)\n", + glm_graph_bytes_to_gib(graph_bytes), + glm_graph_bytes_to_gib(mem.raw_bytes), + glm_graph_bytes_to_gib(mem.compressed_bytes), + glm_graph_bytes_to_gib(mem.scratch_bytes)); + fprintf(stderr, + "ds4: required model+graph: %.2f GiB; guard budget: %.2f GiB " + "(base %.2f GiB, fraction %.2f, reserve %.2f GiB, transient %.2f GiB)\n", + glm_graph_bytes_to_gib(required), + glm_graph_bytes_to_gib(budget), + glm_graph_bytes_to_gib(budget_base), + fraction, + reserve_gib, + glm_graph_bytes_to_gib(transient_extra_bytes)); + fprintf(stderr, + "ds4: set DS4_GLM_MEMORY_GUARD=0 to bypass, use a smaller --ctx, " + "or use SSD streaming\n"); + return false; +} + +static bool glm_graph_memory_guard( + const ds4_model *model, + const ds4_weights *weights, + bool ssd_streaming, + uint32_t ctx_size) { + const uint32_t work_ctx = + glm_graph_full_attention_cap(ctx_size, ssd_streaming); + const uint32_t compact_cap = + glm_graph_compact_cache_initial_cap(ctx_size, work_ctx); + return glm_graph_memory_guard_for_compact_cap( + model, + weights, + ssd_streaming, + false, + 0, + 0, + true, + true, + ctx_size, + compact_cap, + 0, + "before Metal graph allocation"); +} + +static bool glm_graph_memory_guard_slice( + const ds4_model *model, + const ds4_weights *weights, + bool ssd_streaming, + uint32_t layer_start, + uint32_t layer_end, + bool include_token, + bool include_output, + uint32_t ctx_size) { + const uint32_t work_ctx = + glm_graph_full_attention_cap(ctx_size, ssd_streaming); + const uint32_t compact_cap = + glm_graph_compact_cache_initial_cap(ctx_size, work_ctx); + return glm_graph_memory_guard_for_compact_cap( + model, + weights, + ssd_streaming, + true, + layer_start, + layer_end, + include_token, + include_output, + ctx_size, + compact_cap, + 0, + "before Metal graph allocation"); +} + +static uint32_t glm_graph_full_attention_cap(uint32_t ctx_size, + bool ssd_streaming) { + uint32_t cap = ssd_streaming ? + DS4_GLM_METAL_STREAMING_FULL_ATTN_CONTEXT : + DS4_GLM_METAL_FULL_ATTN_DEFAULT_CONTEXT; + if (ctx_size >= DS4_GLM_METAL_LONG_CONTEXT_THRESHOLD && + cap > DS4_GLM_METAL_LONG_CONTEXT_FULL_ATTN_CONTEXT) { + cap = DS4_GLM_METAL_LONG_CONTEXT_FULL_ATTN_CONTEXT; + } + if (ctx_size > 0 && cap > ctx_size) cap = ctx_size; + if (cap == 0) cap = 1; + return cap; +} + +static uint32_t glm_graph_full_prefill_layer_flush_interval( + uint32_t n_tokens, + uint32_t command_rows, + bool logits_requested) { + /* Tiny logits-bearing passes (MTP verify, short prefills) must NOT + * flush per layer: 76 command-buffer round-trips cost ~35ms while the + * whole pass is ~70ms of GPU work. Real prefill chunks keep the + * interactive per-layer flush. */ + return (n_tokens > DS4_GLM_METAL_FULL_ATTN_LAYER_FLUSH_CONTEXT || + command_rows > DS4_GLM_METAL_FULL_ATTN_LAYER_FLUSH_CONTEXT || + (logits_requested && n_tokens > 8u)) ? 1u : 0u; +} + +static uint32_t glm_graph_prefill_progress_flush_interval( + uint32_t layer_flush_interval, + uint32_t n_tokens, + ds4_session_progress_fn display_progress, + uint32_t work_total) { + if (layer_flush_interval != 0) return layer_flush_interval; + (void)n_tokens; + (void)display_progress; + (void)work_total; + return 0; +} + +static void glm_graph_report_prefill_display_progress( + ds4_session_progress_fn display_progress, + void *display_progress_ud, + uint32_t absolute_base, + uint32_t work_done_base, + uint32_t n_tokens, + uint32_t layer_done, + uint32_t normal_layers, + uint32_t work_total, + bool allow_complete) { + if (!display_progress || work_total == 0) return; + + uint64_t chunk_done = 0; + if (normal_layers == 0 || layer_done >= normal_layers) { + chunk_done = n_tokens; + } else { + chunk_done = (uint64_t)n_tokens * (uint64_t)layer_done / + (uint64_t)normal_layers; + } + + uint64_t done = (uint64_t)work_done_base + chunk_done; + if (done > (uint64_t)work_total) done = work_total; + if (!allow_complete && done >= (uint64_t)work_total) { + done = work_total > 0 ? (uint64_t)work_total - 1u : 0u; + } + display_progress(display_progress_ud, + "prefill_display", + (int)((uint64_t)absolute_base + done), + (int)((uint64_t)absolute_base + (uint64_t)work_total)); +} + +static bool glm_graph_small_prefill_stage_sync( + uint32_t n_tokens, + bool logits_requested) { + return logits_requested && + n_tokens > 0 && + n_tokens <= DS4_GLM_METAL_SMALL_PREFILL_STAGE_SYNC_TOKENS; +} + +static uint32_t glm_graph_indexed_decode_split_min_block_rows(void) { + return 32u; +} + +static uint32_t glm_graph_indexed_decode_split_blocks(void) { + const uint32_t block_rows = glm_graph_indexed_decode_split_min_block_rows(); + const uint32_t top_k = glm_graph_indexer_top_k_limit(); + return (top_k + block_rows - 1u) / block_rows; +} + +static uint32_t glm_graph_indexed_decode_split_block_rows_for(uint32_t n_selected) { + return n_selected <= 1024u ? 32u : 128u; +} + +static bool glm_graph_indexed_decode_split_group8_available(uint32_t n_selected) { + const uint32_t block_rows = glm_graph_indexed_decode_split_block_rows_for(n_selected); + const uint32_t needed_blocks = + block_rows != 0u ? (n_selected + block_rows - 1u) / block_rows : 0u; + return n_selected > 512u && + block_rows > 0 && + needed_blocks > 0 && + needed_blocks <= glm_graph_indexed_decode_split_blocks() && + glm_graph_indexed_decode_split_blocks() <= 64u && + (DS4_N_HEAD % 8u) == 0 && + DS4_N_KV_LORA == 512u && + DS4_N_ROT == 64u && + glm_graph_compact_cache_is_f16(); +} + +static bool glm_graph_prefill_stage_sync_boundary(void) { + if (ds4_gpu_end_commands() == 0) return false; + return ds4_gpu_begin_commands() != 0; +} + +static bool glm_graph_indexed_prefill_batch_available( + const ds4_glm_gpu_graph *g) { + return g && + g->compact_cache_cap != 0 && + g->indexed_prefill_cap != 0 && + g->indexed_prefill_score_cap != 0 && + g->batch_indexer_q && + g->batch_indexer_weights && + g->batch_indexer_scores && + g->batch_indexer_selected && + g->batch_qk_low && + g->batch_attn_lora; +} + +static bool glm_graph_indexed_prefill_batch_ready( + const ds4_glm_gpu_graph *g, + uint32_t pos) { + return glm_graph_indexed_prefill_batch_available(g) && + (!g->full_kv_cache || pos >= g->ctx_cap); +} + +static uint32_t glm_graph_limit_indexed_prefill_chunk( + uint32_t pos, + uint32_t chunk) { + const uint32_t top_k = glm_graph_indexer_top_k_limit(); + if (pos < top_k) { + const uint32_t bridge = top_k - pos; + if (bridge != 0 && chunk > bridge) chunk = bridge; + } + return chunk; +} + +static uint32_t glm_graph_indexed_prefill_chunk_tokens( + uint32_t full_attention_cap, + uint32_t compact_cap) { + (void)full_attention_cap; + uint32_t chunk = DS4_GLM_METAL_INDEXED_PREFILL_CHUNK_TOKENS; + if (compact_cap > 0 && chunk > compact_cap) chunk = compact_cap; + if (chunk == 0) chunk = 1; + return chunk; +} + +static uint32_t glm_graph_indexed_prefill_score_tokens( + uint32_t indexed_prefill_cap, + uint32_t compact_cap) { + if (indexed_prefill_cap == 0 || compact_cap == 0) return 0; + const uint32_t scratch_mb = DS4_GLM_METAL_INDEXED_PREFILL_SCORE_SCRATCH_MB; + const uint64_t budget_bytes = (uint64_t)scratch_mb * 1024ull * 1024ull; + uint64_t budget_rows = budget_bytes / ((uint64_t)compact_cap * sizeof(float)); + if (budget_rows == 0) budget_rows = 1; + if (budget_rows > indexed_prefill_cap) budget_rows = indexed_prefill_cap; + if (budget_rows > UINT32_MAX) budget_rows = UINT32_MAX; + return (uint32_t)budget_rows; +} + +static bool glm_graph_context_request(int ctx_size, uint32_t *ctx_out) { + if (!ctx_out || ctx_size <= 0) return false; + const uint32_t model_ctx = glm_graph_model_context_limit(); + if ((uint64_t)(uint32_t)ctx_size > (uint64_t)model_ctx) { + fprintf(stderr, + "ds4: GLM context %d exceeds model context %u\n", + ctx_size, + model_ctx); + return false; + } + *ctx_out = (uint32_t)ctx_size; + return true; +} + +static bool glm_graph_span_fits_context( + const ds4_glm_gpu_graph *g, + uint32_t pos0, + uint32_t n_tokens) { + return g && n_tokens > 0 && pos0 < g->ctx_size && n_tokens <= g->ctx_size - pos0; +} + +static bool glm_graph_span_fits_full_attention( + const ds4_glm_gpu_graph *g, + uint32_t pos0, + uint32_t n_tokens) { + return g && n_tokens > 0 && pos0 < g->ctx_cap && n_tokens <= g->ctx_cap - pos0; +} + +static void glm_graph_log_full_attention_limit( + const ds4_glm_gpu_graph *g, + uint32_t pos0, + uint32_t n_tokens) { + const uint32_t end = pos0 + n_tokens; + fprintf(stderr, + "ds4: GLM Metal full-attention work cap is %u tokens; " + "requested span [%u,%u) in ctx %u needs compact indexed attention\n", + g ? g->ctx_cap : 0, + pos0, + end, + g ? g->ctx_size : 0); +} + +static bool glm_graph_tensor_layout( + const ds4_tensor *t, + uint32_t type, + uint32_t ndim, + uint64_t dim0, + uint64_t dim1, + uint64_t dim2) { + if (!t || t->type != type || t->ndim != ndim) return false; + if (ndim > 0 && t->dim[0] != dim0) return false; + if (ndim > 1 && t->dim[1] != dim1) return false; + if (ndim > 2 && t->dim[2] != dim2) return false; + return true; +} + +static bool glm_graph_dense_tensor_layout( + const ds4_tensor *t, + uint32_t ndim, + uint64_t dim0, + uint64_t dim1, + uint64_t dim2) { + if (!t || !tensor_type_is_glm_dense_quant(t->type) || t->ndim != ndim) return false; + if (ndim > 0 && t->dim[0] != dim0) return false; + if (ndim > 1 && t->dim[1] != dim1) return false; + if (ndim > 2 && t->dim[2] != dim2) return false; + return true; +} + +static bool glm_graph_gate_pair_type_supported(uint32_t gate_type, uint32_t up_type) { + return gate_type == up_type && + (gate_type == DS4_TENSOR_IQ2_XXS || + gate_type == DS4_TENSOR_Q2_K || + gate_type == DS4_TENSOR_Q4_K || + gate_type == DS4_TENSOR_Q5_K); +} + +static bool glm_graph_down_type_supported(uint32_t down_type) { + return down_type == DS4_TENSOR_IQ2_XXS || + down_type == DS4_TENSOR_Q2_K || + down_type == DS4_TENSOR_Q4_K || + down_type == DS4_TENSOR_Q5_K || + down_type == DS4_TENSOR_Q6_K; +} + +static bool glm_graph_layer_uses_generic_routed_moe( + const ds4_layer_weights *l) { + return l && + l->ffn_gate_exps && + l->ffn_up_exps && + l->ffn_down_exps && + l->ffn_gate_exps->type == DS4_TENSOR_IQ2_XXS; +} + +static bool glm_graph_stream_map_token( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights) { + if (!g || !g->ssd_streaming) return true; + g->streaming_static_decode_map_current = false; + return metal_graph_stream_map_token(model, weights); +} + +static bool glm_graph_stream_layer_expert_cache_supported( + const ds4_weights *weights, + const ds4_layer_weights *l, + uint32_t il) { + if (!weights || !l) return false; + if (il < DS4_N_LEADING_DENSE) return true; + return glm_stream_decode_experts_are_streamed(weights, l, il); +} + +static bool glm_graph_stream_prefill_expert_addr_supported( + const ds4_weights *weights, + const ds4_layer_weights *l, + uint32_t il, + uint32_t n_tokens) { + if (il < DS4_N_LEADING_DENSE) return true; + if (n_tokens <= 1) return false; + return glm_stream_expert_cache_addr_supported(weights, l, il); +} + +static bool glm_graph_stream_map_decode_layer( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + uint32_t il) { + if (!g || !g->ssd_streaming) return true; + g->streaming_static_decode_map_current = false; + if (getenv("DS4_GLM_STREAMING_DECODE_FULL_LAYER_MAP") != NULL) { + return metal_graph_stream_map_layer(model, weights, il); + } + if (weights && il < DS4_N_LAYER && + glm_stream_resident_decode_layer_enabled(&weights->layer[il], il)) { + return metal_graph_stream_map_layer(model, weights, il); + } + if (weights && il < DS4_N_LAYER && + glm_graph_stream_layer_expert_cache_supported(weights, + &weights->layer[il], + il)) { + return metal_graph_stream_map_layer_decode(model, weights, il); + } + return metal_graph_stream_map_layer(model, weights, il); +} + +static bool glm_graph_stream_map_prefill_layer( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + uint32_t il, + uint32_t n_tokens, + bool full_layer_prefill) { + if (!g || !g->ssd_streaming) return true; + g->streaming_static_decode_map_current = false; + if (full_layer_prefill) { + const char *trace = getenv("DS4_METAL_STREAMING_MAP_TRACE"); + if (trace && trace[0] && strcmp(trace, "0") != 0) { + fprintf(stderr, + "ds4: GLM SSD prefill map layer=%u tokens=%u mode=full-prefill\n", + il, + n_tokens); + } + return metal_graph_stream_map_layer(model, weights, il); + } + const bool addr_supported = + weights && il < DS4_N_LAYER && + glm_graph_stream_prefill_expert_addr_supported(weights, + &weights->layer[il], + il, + n_tokens); + const char *trace = getenv("DS4_METAL_STREAMING_MAP_TRACE"); + if (trace && trace[0] && strcmp(trace, "0") != 0) { + fprintf(stderr, + "ds4: GLM SSD prefill map layer=%u tokens=%u mode=%s\n", + il, + n_tokens, + addr_supported ? "decode-expert-cache" : "full-layer"); + } + if (addr_supported) { + return metal_graph_stream_map_layer_decode(model, weights, il); + } + return metal_graph_stream_map_layer(model, weights, il); +} + +enum { DS4_GLM_STREAM_PREFILL_FULL_LAYER_MIN_TOKENS = 64 }; + +static uint32_t glm_graph_stream_prefill_full_layer_min_tokens(void) { + const char *env = + getenv("DS4_METAL_GLM_STREAMING_PREFILL_FULL_LAYER_MIN_TOKENS"); + if (!env || !env[0]) return DS4_GLM_STREAM_PREFILL_FULL_LAYER_MIN_TOKENS; + char *end = NULL; + errno = 0; + unsigned long v = strtoul(env, &end, 10); + if (end == env || errno != 0 || v == 0 || v > UINT32_MAX) { + return DS4_GLM_STREAM_PREFILL_FULL_LAYER_MIN_TOKENS; + } + return (uint32_t)v; +} + +static bool glm_graph_stream_prefill_full_layer_enabled( + const ds4_glm_gpu_graph *g, + uint32_t n_tokens) { + if (!g || !g->ssd_streaming) return false; + if (getenv("DS4_METAL_DISABLE_GLM_STREAMING_PREFILL_FULL_LAYER") != NULL) { + return false; + } + if (getenv("DS4_METAL_GLM_STREAMING_PREFILL_FULL_LAYER") != NULL) { + return true; + } + return n_tokens >= glm_graph_stream_prefill_full_layer_min_tokens(); +} + +static bool glm_graph_stream_prefill_full_layer_prepare_enabled( + const ds4_glm_gpu_graph *g, + bool full_layer_prefill) { + return g && + g->ssd_streaming && + full_layer_prefill && + getenv("DS4_METAL_DISABLE_GLM_STREAMING_PREFILL_FULL_LAYER_PREPARE") == NULL; +} + +static bool glm_graph_stream_map_output( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights) { + if (!g || !g->ssd_streaming) return true; + g->streaming_static_decode_map_current = false; + return metal_graph_stream_map_output(model, weights); +} + +static bool glm_graph_validate_expert_layout( + const ds4_model *model, + const ds4_tensor *gate, + const ds4_tensor *up, + const ds4_tensor *down, + uint64_t *gate_row_bytes, + uint64_t *up_row_bytes, + uint64_t *down_row_bytes) { + if (!gate || !up || !down) return false; + if (!glm_graph_gate_pair_type_supported(gate->type, up->type) || + !glm_graph_down_type_supported(down->type) || + gate->ndim != 3 || up->ndim != 3 || down->ndim != 3 || + gate->dim[0] != DS4_N_EMBD || + gate->dim[1] != DS4_N_FF_EXP || + gate->dim[2] != DS4_N_EXPERT || + up->dim[0] != DS4_N_EMBD || + up->dim[1] != DS4_N_FF_EXP || + up->dim[2] != DS4_N_EXPERT || + down->dim[0] != DS4_N_FF_EXP || + down->dim[1] != DS4_N_EMBD || + down->dim[2] != DS4_N_EXPERT) { + return false; + } + + uint64_t gate_in = 0, gate_out = 0; + uint64_t up_in = 0, up_out = 0; + uint64_t down_in = 0, down_out = 0; + (void)tensor_expert_bytes(model, gate, 0, &gate_in, &gate_out, gate_row_bytes); + (void)tensor_expert_bytes(model, up, 0, &up_in, &up_out, up_row_bytes); + (void)tensor_expert_bytes(model, down, 0, &down_in, &down_out, down_row_bytes); + return gate_in == DS4_N_EMBD && + up_in == DS4_N_EMBD && + down_in == DS4_N_FF_EXP && + gate_out == DS4_N_FF_EXP && + up_out == DS4_N_FF_EXP && + down_out == DS4_N_EMBD; +} + +static bool glm_graph_validate_layer_layout( + const ds4_model *model, + const ds4_layer_weights *l, + uint32_t il, + uint64_t q_dim, + uint64_t q_nope, + uint64_t heads_dim, + uint64_t *kv_raw_dim_out, + uint64_t *dense_hidden_max) { + if (!l) return false; + const uint64_t kv_raw_dim = l->attn_kv_a_mqa ? l->attn_kv_a_mqa->dim[1] : 0; + const uint64_t indexer_q_dim = (uint64_t)DS4_N_INDEXER_HEAD * DS4_N_INDEXER_HEAD_DIM; + if (!glm_graph_tensor_layout(l->attn_norm, DS4_TENSOR_F32, 1, DS4_N_EMBD, 0, 0) || + !glm_graph_dense_tensor_layout(l->attn_q_a, 2, DS4_N_EMBD, DS4_N_LORA_Q, 0) || + !glm_graph_tensor_layout(l->attn_q_a_norm, DS4_TENSOR_F32, 1, DS4_N_LORA_Q, 0, 0) || + !glm_graph_dense_tensor_layout(l->attn_q_b, 2, DS4_N_LORA_Q, q_dim, 0) || + !l->attn_kv_a_mqa || + !tensor_type_is_glm_dense_quant(l->attn_kv_a_mqa->type) || + l->attn_kv_a_mqa->ndim != 2 || + l->attn_kv_a_mqa->dim[0] != DS4_N_EMBD || + kv_raw_dim < (uint64_t)DS4_N_KV_LORA + DS4_N_ROT || + !glm_graph_tensor_layout(l->attn_kv_a_norm, DS4_TENSOR_F32, 1, DS4_N_KV_LORA, 0, 0) || + !glm_graph_dense_tensor_layout(l->attn_k_b, 3, q_nope, DS4_N_KV_LORA, DS4_N_HEAD) || + !glm_graph_dense_tensor_layout(l->attn_v_b, 3, DS4_N_KV_LORA, DS4_N_VALUE_MLA, DS4_N_HEAD) || + !glm_graph_dense_tensor_layout(l->attn_output, 2, heads_dim, DS4_N_EMBD, 0) || + !glm_graph_dense_tensor_layout(l->indexer_attn_q_b, 2, DS4_N_LORA_Q, indexer_q_dim, 0) || + !glm_graph_dense_tensor_layout(l->indexer_attn_k, 2, DS4_N_EMBD, DS4_N_INDEXER_HEAD_DIM, 0) || + !glm_graph_tensor_layout(l->indexer_k_norm, DS4_TENSOR_F32, 1, DS4_N_INDEXER_HEAD_DIM, 0, 0) || + !glm_graph_tensor_layout(l->indexer_k_norm_b, DS4_TENSOR_F32, 1, DS4_N_INDEXER_HEAD_DIM, 0, 0) || + !glm_graph_tensor_layout(l->indexer_proj, DS4_TENSOR_F32, 2, DS4_N_EMBD, DS4_N_INDEXER_HEAD, 0) || + !glm_graph_tensor_layout(l->ffn_norm, DS4_TENSOR_F32, 1, DS4_N_EMBD, 0, 0)) { + fprintf(stderr, "ds4: GLM Metal graph found unexpected attention layout in layer %u\n", il); + return false; + } + if (kv_raw_dim > *kv_raw_dim_out) *kv_raw_dim_out = kv_raw_dim; + + if (il < DS4_N_LEADING_DENSE) { + const uint64_t hidden = l->ffn_gate ? l->ffn_gate->dim[1] : 0; + if (!l->ffn_gate || + !glm_graph_dense_tensor_layout(l->ffn_gate, 2, DS4_N_EMBD, hidden, 0) || + !glm_graph_dense_tensor_layout(l->ffn_up, 2, DS4_N_EMBD, hidden, 0) || + !glm_graph_dense_tensor_layout(l->ffn_down, 2, hidden, DS4_N_EMBD, 0)) { + fprintf(stderr, "ds4: GLM Metal graph found unexpected dense FFN layout in layer %u\n", il); + return false; + } + if (hidden > *dense_hidden_max) *dense_hidden_max = hidden; + } else { + uint64_t gate_row_bytes = 0, up_row_bytes = 0, down_row_bytes = 0; + if (!glm_graph_tensor_layout(l->ffn_gate_inp, DS4_TENSOR_F32, 2, DS4_N_EMBD, DS4_N_EXPERT, 0) || + !glm_graph_tensor_layout(l->ffn_exp_probs_b, DS4_TENSOR_F32, 1, DS4_N_EXPERT, 0, 0) || + !glm_graph_validate_expert_layout(model, + l->ffn_gate_exps, + l->ffn_up_exps, + l->ffn_down_exps, + &gate_row_bytes, + &up_row_bytes, + &down_row_bytes) || + !glm_graph_dense_tensor_layout(l->ffn_gate_shexp, 2, DS4_N_EMBD, DS4_N_FF_EXP, 0) || + !glm_graph_dense_tensor_layout(l->ffn_up_shexp, 2, DS4_N_EMBD, DS4_N_FF_EXP, 0) || + !glm_graph_dense_tensor_layout(l->ffn_down_shexp, 2, DS4_N_FF_EXP, DS4_N_EMBD, 0)) { + fprintf(stderr, "ds4: GLM Metal graph found unexpected sparse FFN layout in layer %u\n", il); + return false; + } + (void)gate_row_bytes; + (void)up_row_bytes; + (void)down_row_bytes; + } + return true; +} + +static bool glm_graph_validate_layout( + const ds4_model *model, + const ds4_weights *weights, + ds4_glm_gpu_graph *g, + uint32_t layer_start, + uint32_t layer_end, + bool require_token_embd, + bool require_output_head) { + if (!model || !weights || !g) return false; + const uint32_t normal_layers = glm_graph_normal_layer_count(); + if (normal_layers == 0 || DS4_N_ROT >= DS4_N_KEY_MLA) { + fprintf(stderr, "ds4: GLM Metal graph found unsupported layer/key dimensions\n"); + return false; + } + if (layer_end == UINT32_MAX) layer_end = normal_layers - 1u; + if (layer_start > layer_end || layer_end >= normal_layers) { + fprintf(stderr, + "ds4: GLM Metal graph found invalid layer slice %u:%u for %u normal layers\n", + layer_start, + layer_end, + normal_layers); + return false; + } + + g->has_token_embd = weights->token_embd != NULL; + g->has_output_head = weights_have_output_head(weights); + if (require_token_embd && !g->has_token_embd) { + fprintf(stderr, "ds4: GLM Metal graph layer slice requires token embeddings\n"); + return false; + } + if (g->has_token_embd && + !glm_graph_dense_tensor_layout(weights->token_embd, 2, + DS4_N_EMBD, DS4_N_VOCAB, 0)) { + fprintf(stderr, "ds4: GLM Metal graph found unexpected token embedding layout\n"); + return false; + } + if (require_output_head && !g->has_output_head) { + fprintf(stderr, "ds4: GLM Metal graph layer slice requires the output head\n"); + return false; + } + if (weights_have_partial_output_head(weights) && !g->has_output_head) { + fprintf(stderr, "ds4: GLM Metal graph found partial output head\n"); + return false; + } + if (g->has_output_head && + (!glm_graph_tensor_layout(weights->output_norm, DS4_TENSOR_F32, 1, DS4_N_EMBD, 0, 0) || + !glm_graph_dense_tensor_layout(weights->output, 2, + DS4_N_EMBD, DS4_N_VOCAB, 0))) { + fprintf(stderr, "ds4: GLM Metal graph found unexpected output head layout\n"); + return false; + } + + g->normal_layers = normal_layers; + g->layer_start = layer_start; + g->layer_end = layer_end; + g->layer_count = layer_end - layer_start + 1u; + g->q_dim = (uint64_t)DS4_N_HEAD * DS4_N_KEY_MLA; + g->q_nope = (uint64_t)DS4_N_KEY_MLA - DS4_N_ROT; + g->heads_dim = (uint64_t)DS4_N_HEAD * DS4_N_VALUE_MLA; + g->dense_hidden_max = DS4_N_FF_EXP; + g->kv_raw_dim = 0; + for (uint32_t il = g->layer_start; il <= g->layer_end; il++) { + if (!glm_graph_validate_layer_layout(model, + &weights->layer[il], + il, + g->q_dim, + g->q_nope, + g->heads_dim, + &g->kv_raw_dim, + &g->dense_hidden_max)) { + return false; + } + if (glm_graph_layer_uses_generic_routed_moe(&weights->layer[il])) { + g->generic_routed_moe = true; + } + } + const uint64_t sparse_mid_elems = (uint64_t)DS4_N_EXPERT_USED * DS4_N_FF_EXP; + g->ffn_mid_elems = + g->dense_hidden_max > sparse_mid_elems ? g->dense_hidden_max : sparse_mid_elems; + return g->layer_count > 0 && + g->kv_raw_dim >= (uint64_t)DS4_N_KV_LORA + DS4_N_ROT; +} + +static void glm_graph_free(ds4_glm_gpu_graph *g) { + if (!g) return; + ds4_gpu_tensor_free(g->mtp_kv_lora_cache); + ds4_gpu_tensor_free(g->mtp_k_rope_cache); + ds4_gpu_tensor_free(g->mtp_concat); + ds4_gpu_tensor_free(g->mtp_selected); + free(g->mtp_logits_host); + g->mtp_kv_lora_cache = NULL; + g->mtp_k_rope_cache = NULL; + g->mtp_concat = NULL; + g->mtp_selected = NULL; + g->mtp_logits_host = NULL; + g->mtp_ready = 0; + for (uint32_t il = 0; il < DS4_MAX_LAYER; il++) { + ds4_gpu_tensor_free(g->layer_indexer_key_cache[il]); + ds4_gpu_tensor_free(g->layer_k_rope_cache[il]); + ds4_gpu_tensor_free(g->layer_kv_lora_cache[il]); + ds4_gpu_tensor_free(g->layer_value_cache[il]); + ds4_gpu_tensor_free(g->layer_key_cache[il]); + } + ds4_gpu_tensor_free(g->logits); + ds4_gpu_tensor_free(g->batch_router_weights); + ds4_gpu_tensor_free(g->batch_router_selected); + ds4_gpu_tensor_free(g->batch_router_probs); + ds4_gpu_tensor_free(g->batch_router_logits); + ds4_gpu_tensor_free(g->batch_routed_down); + ds4_gpu_tensor_free(g->batch_routed_up); + ds4_gpu_tensor_free(g->batch_routed_gate); + ds4_gpu_tensor_free(g->batch_ffn_out); + ds4_gpu_tensor_free(g->batch_ffn_mid); + ds4_gpu_tensor_free(g->batch_shared_mid); + ds4_gpu_tensor_free(g->batch_ffn_up); + ds4_gpu_tensor_free(g->batch_ffn_gate); + ds4_gpu_tensor_free(g->batch_ffn_norm); + ds4_gpu_tensor_free(g->batch_after_attn); + ds4_gpu_tensor_free(g->batch_attn_out); + ds4_gpu_tensor_free(g->batch_heads); + ds4_gpu_tensor_free(g->batch_value); + ds4_gpu_tensor_free(g->batch_k_nope); + ds4_gpu_tensor_free(g->batch_kv_norm); + ds4_gpu_tensor_free(g->batch_kv_raw); + ds4_gpu_tensor_free(g->batch_attn_lora); + ds4_gpu_tensor_free(g->batch_qk_low); + ds4_gpu_tensor_free(g->batch_indexer_selected); + ds4_gpu_tensor_free(g->batch_indexer_scores); + ds4_gpu_tensor_free(g->batch_indexer_weights); + ds4_gpu_tensor_free(g->batch_indexer_q); + ds4_gpu_tensor_free(g->batch_indexer_k); + ds4_gpu_tensor_free(g->batch_q); + ds4_gpu_tensor_free(g->batch_q_rank_norm); + ds4_gpu_tensor_free(g->batch_q_rank); + ds4_gpu_tensor_free(g->batch_attn_norm); + ds4_gpu_tensor_free(g->batch_next); + ds4_gpu_tensor_free(g->batch_cur); + ds4_gpu_tensor_free(g->prefill_tokens); + ds4_gpu_tensor_free(g->output_norm); + ds4_gpu_tensor_free(g->router_weights); + ds4_gpu_tensor_free(g->router_selected); + ds4_gpu_tensor_free(g->router_probs); + ds4_gpu_tensor_free(g->router_logits); + ds4_gpu_tensor_free(g->ffn_sum); + ds4_gpu_tensor_free(g->ffn_out); + ds4_gpu_tensor_free(g->routed_down); + ds4_gpu_tensor_free(g->routed_up); + ds4_gpu_tensor_free(g->tp_bounce_out); + ds4_gpu_tensor_free(g->tp_bounce_in); + ds4_gpu_tensor_free(g->routed_gate); + ds4_gpu_tensor_free(g->ffn_mid); + ds4_gpu_tensor_free(g->ffn_up); + ds4_gpu_tensor_free(g->ffn_gate); + ds4_gpu_tensor_free(g->ffn_norm); + ds4_gpu_tensor_free(g->after_attn); + ds4_gpu_tensor_free(g->attn_out); + ds4_gpu_tensor_free(g->heads); + ds4_gpu_tensor_free(g->value); + ds4_gpu_tensor_free(g->k_nope); + ds4_gpu_tensor_free(g->kv_norm); + ds4_gpu_tensor_free(g->kv_raw); + ds4_gpu_tensor_free(g->attn_partial_ms); + ds4_gpu_tensor_free(g->attn_partial_lora); + ds4_gpu_tensor_free(g->qk_low); + ds4_gpu_tensor_free(g->indexer_selected); + ds4_gpu_tensor_free(g->indexer_scores); + ds4_gpu_tensor_free(g->indexer_weights); + ds4_gpu_tensor_free(g->indexer_q); + ds4_gpu_tensor_free(g->indexer_k); + ds4_gpu_tensor_free(g->q); + ds4_gpu_tensor_free(g->q_rank_norm); + ds4_gpu_tensor_free(g->q_rank); + ds4_gpu_tensor_free(g->attn_norm); + ds4_gpu_tensor_free(g->next); + ds4_gpu_tensor_free(g->cur); + memset(g, 0, sizeof(*g)); +} + +static bool glm_graph_ensure_compact_cache( + const ds4_glm_gpu_graph *g, + uint32_t needed_rows) { + if (!g || needed_rows == 0) return false; + if (needed_rows <= g->ctx_cap && g->compact_cache_cap == 0) return true; + if (needed_rows <= g->compact_cache_cap) return true; + fprintf(stderr, + "ds4: GLM compact DSA cache capacity %u is smaller than required row %u " + "(ctx=%u, full_cap=%u)\n", + g->compact_cache_cap, + needed_rows, + g->ctx_size, + g->ctx_cap); + return false; +} + +static bool glm_graph_warm_compact_indexer_store( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + uint32_t warm_pos) { + if (!g || !model || !weights) return false; + if (g->compact_cache_cap == 0 || g->indexer_full_layers == 0) return true; + if (!g->indexer_k) return false; + if (warm_pos >= g->compact_cache_cap) warm_pos = g->compact_cache_cap - 1u; + + if (ds4_gpu_tensor_fill_f32(g->indexer_k, + 0.0f, + DS4_N_INDEXER_HEAD_DIM) == 0) { + return false; + } + + const bool profile = false; + const double t0 = 0.0; + bool ok = ds4_gpu_begin_commands() != 0; + uint32_t warmed = 0; + for (uint32_t il = g->layer_start; ok && il <= g->layer_end; il++) { + if (!glm_graph_layer_uses_full_indexer(il)) continue; + const ds4_layer_weights *l = &weights->layer[il]; + if (!g->layer_indexer_key_cache[il] || + !l->indexer_k_norm || + !l->indexer_k_norm_b) { + ok = false; + break; + } + const float rope_base = layer_rope_freq_base(il); + const float rope_scale = layer_rope_freq_scale(il); + ok = ds4_gpu_glm_store_indexer_k_tensor( + g->layer_indexer_key_cache[il], + g->indexer_k, + model->map, + model->size, + l->indexer_k_norm->abs_offset, + l->indexer_k_norm_b->abs_offset, + warm_pos, + 1, + g->compact_cache_cap, + DS4_N_INDEXER_HEAD_DIM, + DS4_N_ROT, + 0, + 1.0e-6f, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW, + glm_graph_compact_cache_is_f16()) != 0; + if (ok) warmed++; + } + if (ok) ok = ds4_gpu_end_commands() != 0; + else (void)ds4_gpu_synchronize(); + + if (profile) { + fprintf(stderr, + "ds4: GLM compact indexer warmup pos=%u layers=%u %.3f ms\n", + warm_pos, + warmed, + (now_sec() - t0) * 1000.0); + } + return ok; +} + +static bool glm_graph_alloc_slice( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + int ctx_size, + bool ssd_streaming, + bool ssd_streaming_cold, + uint32_t layer_start, + uint32_t layer_end, + bool require_token_embd, + bool require_output_head) { + if (!g || !model || !weights || ctx_size <= 0) return false; + memset(g, 0, sizeof(*g)); + g->ssd_streaming = ssd_streaming; + g->ssd_streaming_cold = ssd_streaming_cold; + + if (!glm_graph_context_request(ctx_size, &g->ctx_size)) return false; + if (!glm_graph_memory_guard_slice(model, + weights, + g->ssd_streaming, + layer_start, + layer_end, + require_token_embd, + require_output_head, + g->ctx_size)) { + return false; + } + if (!glm_graph_validate_layout(model, + weights, + g, + layer_start, + layer_end, + require_token_embd, + require_output_head)) { + return false; + } + g->ctx_cap = glm_graph_full_attention_cap(g->ctx_size, + g->ssd_streaming); + g->full_kv_cache = glm_graph_expanded_kv_cache_enabled(g->ssd_streaming); + g->compact_cache_cap = + glm_graph_compact_cache_initial_cap(g->ctx_size, g->ctx_cap); + g->indexed_prefill_cap = + g->compact_cache_cap != 0 ? + glm_graph_indexed_prefill_chunk_tokens(g->ctx_cap, g->compact_cache_cap) : + 0; + g->indexed_prefill_score_cap = + glm_graph_indexed_prefill_score_tokens(g->indexed_prefill_cap, + g->compact_cache_cap); + g->indexer_full_layers = + glm_graph_full_indexer_layer_count_range(g->layer_start, + g->layer_end); + if (g->ctx_size > g->ctx_cap) { + fprintf(stderr, + "ds4: GLM Metal session ctx=%u (model max=%u); " + "full-attention prefill/work cap=%u; compact indexed decode is used beyond the cap\n", + g->ctx_size, + glm_graph_model_context_limit(), + g->ctx_cap); + } + + const uint64_t emb_bytes = (uint64_t)DS4_N_EMBD * sizeof(float); + const uint64_t q_rank_bytes = (uint64_t)DS4_N_LORA_Q * sizeof(float); + const uint64_t q_bytes = g->q_dim * sizeof(float); + const uint64_t kv_raw_bytes = g->kv_raw_dim * sizeof(float); + const uint64_t kv_norm_bytes = (uint64_t)DS4_N_KV_LORA * sizeof(float); + const uint64_t k_nope_bytes = (uint64_t)DS4_N_HEAD * g->q_nope * sizeof(float); + const uint64_t heads_bytes = g->heads_dim * sizeof(float); + const uint64_t indexer_k_bytes = (uint64_t)DS4_N_INDEXER_HEAD_DIM * sizeof(float); + const uint64_t indexer_q_bytes = + (uint64_t)DS4_N_INDEXER_HEAD * DS4_N_INDEXER_HEAD_DIM * sizeof(float); + const uint64_t indexer_weights_bytes = + (uint64_t)DS4_N_INDEXER_HEAD * sizeof(float); + const uint64_t indexer_work_cap = + g->compact_cache_cap != 0 ? g->compact_cache_cap : g->ctx_cap; + const uint64_t indexer_scores_bytes = indexer_work_cap * sizeof(float); + const uint32_t indexer_top_k = glm_graph_indexer_top_k_limit(); + const uint64_t indexer_selected_bytes = + (uint64_t)indexer_top_k * sizeof(uint32_t); + const uint64_t qk_low_bytes = + (uint64_t)DS4_N_HEAD * DS4_N_KV_LORA * sizeof(float); + const uint32_t split_attn_blocks = glm_graph_indexed_decode_split_blocks(); + const uint64_t attn_partial_lora_bytes = + (uint64_t)split_attn_blocks * qk_low_bytes; + const uint64_t attn_partial_ms_bytes = + (uint64_t)split_attn_blocks * DS4_N_HEAD * 2u * sizeof(float); + const uint64_t logits_bytes = (uint64_t)DS4_N_VOCAB * sizeof(float); + const uint64_t full_kv_elem_bytes = glm_graph_full_kv_cache_elem_bytes(); + const uint64_t key_cache_bytes = g->full_kv_cache ? + (uint64_t)g->ctx_cap * g->q_dim * full_kv_elem_bytes : 0; + const uint64_t value_cache_bytes = g->full_kv_cache ? + (uint64_t)g->ctx_cap * g->heads_dim * full_kv_elem_bytes : 0; + const uint64_t compact_kv_lora_bytes = + (uint64_t)g->compact_cache_cap * DS4_N_KV_LORA * + glm_graph_compact_cache_elem_bytes(); + const uint64_t compact_k_rope_bytes = + (uint64_t)g->compact_cache_cap * DS4_N_ROT * + glm_graph_compact_cache_elem_bytes(); + const uint64_t compact_indexer_key_bytes = + (uint64_t)g->compact_cache_cap * DS4_N_INDEXER_HEAD_DIM * + glm_graph_compact_cache_elem_bytes(); + const uint64_t batch_rows = g->ctx_cap; + const uint64_t indexed_batch_rows = g->indexed_prefill_cap; + const uint64_t indexed_score_rows = g->indexed_prefill_score_cap; + const uint64_t batch_indexer_q_bytes = indexed_batch_rows * indexer_q_bytes; + const uint64_t batch_indexer_weights_bytes = indexed_batch_rows * indexer_weights_bytes; + const uint64_t batch_indexer_scores_bytes = + indexed_score_rows * indexer_work_cap * sizeof(float); + const uint64_t batch_indexer_selected_bytes = + indexed_batch_rows * indexer_top_k * sizeof(uint32_t); + const uint64_t batch_qk_low_bytes = indexed_batch_rows * qk_low_bytes; + const uint64_t batch_attn_lora_bytes = + indexed_batch_rows * (uint64_t)DS4_N_HEAD * DS4_N_KV_LORA * sizeof(float); + const uint64_t routed_mid_bytes = + (uint64_t)DS4_N_EXPERT_USED * DS4_N_FF_EXP * sizeof(float); + const uint64_t routed_down_bytes = + (uint64_t)DS4_N_EXPERT_USED * DS4_N_EMBD * sizeof(float); + const double cache_gib = + (double)(g->layer_count * (key_cache_bytes + value_cache_bytes)) / + (1024.0 * 1024.0 * 1024.0); + if (g->full_kv_cache) { + fprintf(stderr, + "ds4: GLM Metal graph allocating full-attention KV cache: work_ctx=%u layers=%u:%u (%u) %s %.2f GiB\n", + g->ctx_cap, + g->layer_start, + g->layer_end, + g->layer_count, + "f16", + cache_gib); + } else { + fprintf(stderr, + "ds4: GLM Metal graph using compact DSA KV only; expanded full-attention KV cache is skipped\n"); + } + if (g->compact_cache_cap != 0) { + const uint64_t compact_kv_total = + (uint64_t)g->layer_count * (compact_kv_lora_bytes + compact_k_rope_bytes); + const uint64_t compact_indexer_total = + (uint64_t)g->indexer_full_layers * compact_indexer_key_bytes; + const double compact_gib = + (double)(compact_kv_total + compact_indexer_total) / + (1024.0 * 1024.0 * 1024.0); + fprintf(stderr, + "ds4: GLM Metal graph allocating compact DSA cache: rows=%u logical_ctx=%u kv_layers=%u indexer_layers=%u %s %.2f GiB\n", + g->compact_cache_cap, + g->ctx_size, + g->layer_count, + g->indexer_full_layers, + glm_graph_compact_cache_is_f16() ? "f16" : "f32", + compact_gib); + fprintf(stderr, + "ds4: GLM compact indexed prefill chunk=%u score_rows=%u score_scratch=%.2f MiB\n", + g->indexed_prefill_cap, + g->indexed_prefill_score_cap, + (double)batch_indexer_scores_bytes / (1024.0 * 1024.0)); + } + + bool ok = true; +#define DS4_GLM_GRAPH_ALLOC_TENSOR(var, bytes_) \ + do { \ + (var) = ds4_gpu_tensor_alloc((bytes_)); \ + if (!(var)) { \ + fprintf(stderr, "ds4: GLM Metal graph could not allocate %s\n", #var); \ + ok = false; \ + } \ + } while (0) + + DS4_GLM_GRAPH_ALLOC_TENSOR(g->cur, emb_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->next, emb_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->attn_norm, emb_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->q_rank, q_rank_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->q_rank_norm, q_rank_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->q, q_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->indexer_k, indexer_k_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->indexer_q, indexer_q_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->indexer_weights, indexer_weights_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->indexer_scores, indexer_scores_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->indexer_selected, indexer_selected_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->qk_low, qk_low_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->attn_partial_lora, attn_partial_lora_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->attn_partial_ms, attn_partial_ms_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->kv_raw, kv_raw_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->kv_norm, kv_norm_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->k_nope, k_nope_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->value, heads_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->heads, heads_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->attn_out, emb_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->after_attn, emb_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->ffn_norm, emb_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->ffn_gate, g->dense_hidden_max * sizeof(float)); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->ffn_up, g->dense_hidden_max * sizeof(float)); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->ffn_mid, g->ffn_mid_elems * sizeof(float)); + if (g->generic_routed_moe) { + DS4_GLM_GRAPH_ALLOC_TENSOR(g->routed_gate, routed_mid_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->routed_up, routed_mid_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->routed_down, routed_down_bytes); + } + DS4_GLM_GRAPH_ALLOC_TENSOR(g->ffn_out, emb_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->ffn_sum, emb_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->router_logits, (uint64_t)DS4_N_EXPERT * sizeof(float)); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->router_probs, (uint64_t)DS4_N_EXPERT * sizeof(float)); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->router_selected, (uint64_t)DS4_N_EXPERT_USED * sizeof(int32_t)); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->router_weights, (uint64_t)DS4_N_EXPERT_USED * sizeof(float)); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->output_norm, emb_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->logits, logits_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_router_logits, batch_rows * DS4_N_EXPERT * sizeof(float)); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_router_probs, batch_rows * DS4_N_EXPERT * sizeof(float)); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_router_selected, batch_rows * DS4_N_EXPERT_USED * sizeof(int32_t)); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_router_weights, batch_rows * DS4_N_EXPERT_USED * sizeof(float)); + + DS4_GLM_GRAPH_ALLOC_TENSOR(g->prefill_tokens, batch_rows * sizeof(int32_t)); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_cur, batch_rows * emb_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_next, batch_rows * emb_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_attn_norm, batch_rows * emb_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_q_rank, batch_rows * q_rank_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_q_rank_norm, batch_rows * q_rank_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_q, batch_rows * q_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_indexer_k, batch_rows * indexer_k_bytes); + if (g->compact_cache_cap != 0 && g->indexed_prefill_cap != 0) { + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_indexer_q, batch_indexer_q_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_indexer_weights, batch_indexer_weights_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_indexer_scores, batch_indexer_scores_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_indexer_selected, batch_indexer_selected_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_qk_low, batch_qk_low_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_attn_lora, batch_attn_lora_bytes); + } + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_kv_raw, batch_rows * kv_raw_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_kv_norm, batch_rows * kv_norm_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_k_nope, batch_rows * k_nope_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_value, batch_rows * heads_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_heads, batch_rows * heads_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_attn_out, batch_rows * emb_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_after_attn, batch_rows * emb_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_ffn_norm, batch_rows * emb_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_ffn_gate, batch_rows * g->dense_hidden_max * sizeof(float)); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_ffn_up, batch_rows * g->dense_hidden_max * sizeof(float)); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_shared_mid, batch_rows * DS4_N_FF_EXP * sizeof(float)); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_ffn_mid, batch_rows * g->ffn_mid_elems * sizeof(float)); + if (g->generic_routed_moe) { + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_routed_gate, batch_rows * routed_mid_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_routed_up, batch_rows * routed_mid_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_routed_down, batch_rows * routed_down_bytes); + } + DS4_GLM_GRAPH_ALLOC_TENSOR(g->batch_ffn_out, batch_rows * emb_bytes); + + for (uint32_t il = g->layer_start; ok && il <= g->layer_end; il++) { + if (g->full_kv_cache) { + DS4_GLM_GRAPH_ALLOC_TENSOR(g->layer_key_cache[il], key_cache_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->layer_value_cache[il], value_cache_bytes); + } + if (g->compact_cache_cap != 0) { + DS4_GLM_GRAPH_ALLOC_TENSOR(g->layer_kv_lora_cache[il], compact_kv_lora_bytes); + DS4_GLM_GRAPH_ALLOC_TENSOR(g->layer_k_rope_cache[il], compact_k_rope_bytes); + if (glm_graph_layer_uses_full_indexer(il)) { + DS4_GLM_GRAPH_ALLOC_TENSOR(g->layer_indexer_key_cache[il], + compact_indexer_key_bytes); + } + } + } +#undef DS4_GLM_GRAPH_ALLOC_TENSOR + + if (!ok) { + glm_graph_free(g); + return false; + } + return true; +} + +static bool glm_graph_alloc( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + int ctx_size, + bool ssd_streaming, + bool ssd_streaming_cold) { + const uint32_t normal_layers = glm_graph_normal_layer_count(); + if (normal_layers == 0) { + fprintf(stderr, "ds4: GLM Metal graph found no normal transformer layers\n"); + return false; + } + return glm_graph_alloc_slice(g, + model, + weights, + ctx_size, + ssd_streaming, + ssd_streaming_cold, + 0, + normal_layers - 1u, + true, + true); +} + +static uint32_t glm_graph_weight_type_for_offset( + const ds4_model *model, + uint64_t weight_offset); + +static int glm_graph_matmul_q8_0_decode_tensor( + ds4_gpu_tensor *out, + const ds4_model *model, + uint64_t weight_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + bool ssd_streaming) { + if (!model) return 0; + const uint32_t weight_type = glm_graph_weight_type_for_offset(model, weight_offset); + if (ssd_streaming) { + return ds4_gpu_matmul_quant_tensor(out, + model->map, + model->size, + weight_offset, + weight_type, + in_dim, + out_dim, + x, + 1); + } + return ds4_gpu_matmul_quant_decode_mpp_model_view_tensor(out, + model->map, + model->size, + weight_offset, + weight_type, + in_dim, + out_dim, + x, + 1); +} + +static bool glm_graph_q8_decode_profile_enabled(uint32_t il, const char *label) { + (void)il; + (void)label; + return false; +} + +static uint32_t glm_graph_weight_type_for_offset( + const ds4_model *model, + uint64_t weight_offset) { + if (!model || !model->tensors) return DS4_TENSOR_Q8_0; + for (uint64_t i = 0; i < model->n_tensors; i++) { + const ds4_tensor *t = &model->tensors[i]; + if (t->abs_offset == weight_offset) return t->type; + } + return DS4_TENSOR_Q8_0; +} + +static bool glm_graph_weights_are_q8_0( + const ds4_model *model, + uint64_t offset_a, + uint64_t offset_b) { + return glm_graph_weight_type_for_offset(model, offset_a) == DS4_TENSOR_Q8_0 && + glm_graph_weight_type_for_offset(model, offset_b) == DS4_TENSOR_Q8_0; +} + +static int glm_graph_matmul_q8_0_decode_profiled_tensor( + ds4_gpu_tensor *out, + const ds4_model *model, + uint64_t weight_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint32_t il, + uint32_t pos, + const char *label, + bool ssd_streaming) { + const bool profile = glm_graph_q8_decode_profile_enabled(il, label); + if (profile) { + if (ds4_gpu_end_commands() == 0) return 0; + if (ds4_gpu_begin_commands() == 0) return 0; + } + const double t0 = profile ? now_sec() : 0.0; + int ok = glm_graph_matmul_q8_0_decode_tensor(out, + model, + weight_offset, + in_dim, + out_dim, + x, + ssd_streaming); + if (profile) { + if (ok) ok = ds4_gpu_end_commands() != 0; + else (void)ds4_gpu_synchronize(); + const double now = now_sec(); + fprintf(stderr, + "ds4: GLM Q8 decode profile layer=%u pos=%u label=%s in=%llu out=%llu %.3f ms\n", + il, + pos, + label ? label : "?", + (unsigned long long)in_dim, + (unsigned long long)out_dim, + (now - t0) * 1000.0); + if (ok) ok = ds4_gpu_begin_commands() != 0; + } + return ok; +} + +static bool glm_graph_encode_output_head_from( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + const ds4_gpu_tensor *hidden) { + bool ok = ds4_gpu_rms_norm_weight_tensor(g->output_norm, + hidden, + model->map, + model->size, + weights->output_norm->abs_offset, + DS4_N_EMBD, + DS4_RMS_EPS) != 0; + if (ok) ok = glm_graph_matmul_q8_0_decode_tensor(g->logits, + model, + weights->output->abs_offset, + DS4_N_EMBD, + DS4_N_VOCAB, + g->output_norm, + g->ssd_streaming) != 0; + return ok; +} + +static bool glm_graph_encode_output_head( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights) { + return glm_graph_encode_output_head_from(g, model, weights, g->cur); +} + +static bool glm_graph_forward_output_head( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + const ds4_gpu_tensor *hidden, + float *logits_out) { + if (!g || !model || !weights || !hidden || !logits_out) return false; + bool ok = ds4_gpu_begin_commands() != 0; + if (ok) ok = glm_graph_encode_output_head_from(g, model, weights, hidden); + if (ok) ok = ds4_gpu_end_commands() != 0; + else (void)ds4_gpu_synchronize(); + if (ok && glm_debug_hidden_dump_layer() < 0) + glm_debug_dump_hidden_row(hidden, 0); + if (ok) { + ok = ds4_gpu_tensor_read(g->logits, + 0, + logits_out, + (uint64_t)DS4_N_VOCAB * sizeof(float)) != 0; + } + return ok; +} + +static bool glm_graph_profile_stage( + bool enabled, + const char *part, + const char *stage, + uint32_t il, + uint32_t pos0, + uint32_t n_tokens, + double *stage_t0) { + if (!enabled) return true; + if (!stage_t0) return false; + return metal_graph_layer_stage_profile_boundary(part, stage, il, pos0, n_tokens, stage_t0); +} + +static bool glm_graph_profile_router_selection( + ds4_glm_gpu_graph *g, + const ds4_layer_weights *layer, + uint32_t il, + uint32_t pos) { + if (!g_expert_profile.active) return true; + if (!g || !layer || !g->router_selected || !g->router_weights) return false; + + if (ds4_gpu_end_commands() == 0) { + fprintf(stderr, + "ds4: failed to end GLM Metal command batch for expert profile readback\n"); + return false; + } + + int32_t selected[DS4_MAX_EXPERT_USED] = {0}; + float weights[DS4_MAX_EXPERT_USED] = {0}; + const bool read_ok = + ds4_gpu_tensor_read(g->router_selected, + 0, + selected, + (uint64_t)DS4_N_EXPERT_USED * sizeof(selected[0])) != 0 && + ds4_gpu_tensor_read(g->router_weights, + 0, + weights, + (uint64_t)DS4_N_EXPERT_USED * sizeof(weights[0])) != 0; + + if (ds4_gpu_begin_commands() == 0) { + fprintf(stderr, + "ds4: failed to resume GLM Metal command batch after expert profile readback\n"); + return false; + } + if (!read_ok) { + fprintf(stderr, "ds4: failed to read GLM Metal router tensors for expert profile\n"); + return false; + } + + ds4_expert_profile_record(il, + pos, + selected, + weights, + layer->ffn_gate_tid2eid != NULL); + return true; +} + +static bool glm_graph_profile_router_selection_batch( + ds4_glm_gpu_graph *g, + const ds4_layer_weights *layer, + uint32_t il, + uint32_t pos0, + uint32_t n_tokens) { + if (!g_expert_profile.active) return true; + if (!g || !layer || !g->batch_router_selected || + !g->batch_router_weights || n_tokens == 0) { + return false; + } + + const size_t selected_count = (size_t)n_tokens * DS4_N_EXPERT_USED; + if (n_tokens != 0 && selected_count / n_tokens != DS4_N_EXPERT_USED) { + return false; + } + if (selected_count > SIZE_MAX / sizeof(int32_t) || + selected_count > SIZE_MAX / sizeof(float)) { + return false; + } + + if (ds4_gpu_end_commands() == 0) { + fprintf(stderr, + "ds4: failed to end GLM Metal command batch for batch expert profile readback\n"); + return false; + } + + int32_t *selected = xmalloc(selected_count * sizeof(selected[0])); + float *weights = xmalloc(selected_count * sizeof(weights[0])); + const bool read_ok = + ds4_gpu_tensor_read(g->batch_router_selected, + 0, + selected, + (uint64_t)selected_count * sizeof(selected[0])) != 0 && + ds4_gpu_tensor_read(g->batch_router_weights, + 0, + weights, + (uint64_t)selected_count * sizeof(weights[0])) != 0; + + if (ds4_gpu_begin_commands() == 0) { + free(weights); + free(selected); + fprintf(stderr, + "ds4: failed to resume GLM Metal command batch after batch expert profile readback\n"); + return false; + } + if (!read_ok) { + free(weights); + free(selected); + fprintf(stderr, "ds4: failed to read GLM Metal batch router tensors for expert profile\n"); + return false; + } + + for (uint32_t t = 0; t < n_tokens; t++) { + const size_t off = (size_t)t * DS4_N_EXPERT_USED; + ds4_expert_profile_record(il, + pos0 + t, + selected + off, + weights + off, + layer->ffn_gate_tid2eid != NULL); + } + + free(weights); + free(selected); + return true; +} + +static bool glm_graph_prefill_stage_boundary( + bool stage_profile, + bool stage_sync, + const char *part, + const char *stage, + uint32_t il, + uint32_t pos0, + uint32_t n_tokens, + double *stage_t0) { + if (stage_profile) { + return glm_graph_profile_stage(true, part, stage, il, pos0, n_tokens, stage_t0); + } + if (stage_sync) return glm_graph_prefill_stage_sync_boundary(); + return true; +} + +static int glm_graph_routed_moe_one_dispatch( + const ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_layer_weights *l, + uint32_t il, + ds4_gpu_tensor *out, + ds4_gpu_tensor *mid, + uint64_t gate_expert_bytes, + uint64_t gate_row_bytes, + uint64_t up_expert_bytes, + uint64_t up_row_bytes, + uint64_t down_expert_bytes, + uint64_t down_row_bytes, + const ds4_gpu_tensor *selected, + const ds4_gpu_tensor *weights, + const ds4_gpu_tensor *x, + bool force_resident) { + if (!g || !model || !l) return 0; + /* Under the TP expert split only the ownership-aware kernels may run: + * the generic mul_mv_id family and the GLM q2_K resident pair/down. + * Anything else would silently compute the full expert set. */ + if (g->tp_world == 2 && + !glm_graph_layer_uses_generic_routed_moe(l) && + l->ffn_gate_exps->type != DS4_TENSOR_Q2_K) { + fprintf(stderr, + "ds4: GLM TP split lacks ownership-aware kernels for expert type %u (layer %u)\n", + l->ffn_gate_exps->type, il); + return 0; + } + if (glm_graph_layer_uses_generic_routed_moe(l)) { + if (!g->routed_gate || !g->routed_up || !g->routed_down || + l->ffn_gate_exps->type != l->ffn_up_exps->type) { + if (getenv("DS4_GLM_TP_DEBUG")) { + fprintf(stderr, + "ds4: glm dispatch guard: gate=%p up=%p down=%p types=%u/%u\n", + (void *)g->routed_gate, (void *)g->routed_up, + (void *)g->routed_down, + l->ffn_gate_exps->type, l->ffn_up_exps->type); + } + return 0; + } + return ds4_gpu_routed_moe_one_tensor(out, + g->routed_gate, + g->routed_up, + mid, + g->routed_down, + model->map, + model->size, + l->ffn_gate_exps->abs_offset, + l->ffn_up_exps->abs_offset, + l->ffn_down_exps->abs_offset, + l->ffn_gate_exps->type, + l->ffn_down_exps->type, + gate_expert_bytes, + gate_row_bytes, + down_expert_bytes, + down_row_bytes, + DS4_N_EMBD, + DS4_N_FF_EXP, + DS4_N_EMBD, + selected, + weights, + DS4_N_EXPERT, + DS4_N_EXPERT_USED, + 0.0f, + x, + NULL, + il, + force_resident); + } + + return ds4_gpu_glm_routed_moe_one_tensor(out, + mid, + model->map, + model->size, + l->ffn_gate_exps->abs_offset, + l->ffn_up_exps->abs_offset, + l->ffn_down_exps->abs_offset, + l->ffn_gate_exps->type, + l->ffn_up_exps->type, + l->ffn_down_exps->type, + gate_expert_bytes, + gate_row_bytes, + up_expert_bytes, + up_row_bytes, + down_expert_bytes, + down_row_bytes, + DS4_N_EMBD, + DS4_N_FF_EXP, + DS4_N_EMBD, + selected, + weights, + DS4_N_EXPERT, + DS4_N_EXPERT_USED, + il, + x, + force_resident); +} + +/* Post-compute visibility for GLM TP debugging: the combine stashes the + * selected-ids contents pointer; by exchange time the router kernels have + * completed, so the service thread sees final ids. */ +static const int32_t *g_glm_tp_debug_ids; + +/* After the TP ownership-split batch routed MoE, exchange the + * per-token routed partial rows with the peer through shared bounce + * buffers (one gate per sparse layer per chunk) and rebuild the full + * routed output with a commutative add. */ +/* The routed batch dispatch writes its local partial DIRECTLY into the + * shared bounce buffer (graph scratch may be private/untracked on M5, so + * a blit from it is not reliable); ensure capacity before dispatching. */ +static bool glm_graph_tp_batch_bounce_ready(ds4_glm_gpu_graph *g, + uint32_t n_tokens) { + const uint64_t bytes = (uint64_t)n_tokens * DS4_N_EMBD * sizeof(float); + if (!g->tp_bounce_out || ds4_gpu_tensor_bytes(g->tp_bounce_out) < bytes) { + ds4_gpu_tensor_free(g->tp_bounce_out); + ds4_gpu_tensor_free(g->tp_bounce_in); + g->tp_bounce_out = ds4_gpu_tensor_alloc(bytes); + g->tp_bounce_in = ds4_gpu_tensor_alloc(bytes); + } + return g->tp_bounce_out && g->tp_bounce_in; +} + +static bool glm_graph_tp_batch_ffn_combine( + ds4_glm_gpu_graph *g, + uint32_t il, + ds4_gpu_tensor *ffn_out, + uint32_t n_tokens) { + const uint64_t bytes = (uint64_t)n_tokens * DS4_N_EMBD * sizeof(float); + if (!g->tp_bounce_out || !g->tp_bounce_in) return false; + if (getenv("DS4_GLM_ABLATE_COMBINE")) { + /* Timing probe: local half only, no exchange (garbage output; + * both ranks must set the env or the gates desync). */ + return ds4_gpu_add_tensor(ffn_out, + g->tp_bounce_out, + g->tp_bounce_out, + (uint32_t)((uint64_t)n_tokens * DS4_N_EMBD)) != 0; + } + if (!ds4_gpu_tp_big_gate_encode(il, n_tokens, + g->tp_bounce_out, g->tp_bounce_in, + bytes)) { + return false; + } + return ds4_gpu_add_tensor(ffn_out, + g->tp_bounce_out, + g->tp_bounce_in, + (uint32_t)((uint64_t)n_tokens * DS4_N_EMBD)) != 0; +} + +static int glm_graph_routed_moe_batch_dispatch( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_layer_weights *l, + uint32_t il, + ds4_gpu_tensor *out, + ds4_gpu_tensor *mid, + uint64_t gate_expert_bytes, + uint64_t gate_row_bytes, + uint64_t up_expert_bytes, + uint64_t up_row_bytes, + uint64_t down_expert_bytes, + uint64_t down_row_bytes, + const ds4_gpu_tensor *selected, + const ds4_gpu_tensor *weights, + const ds4_gpu_tensor *x, + uint32_t n_tokens, + uint32_t mid_token_stride, + bool direct_scalar_q4) { + if (!g || !model || !l) return 0; + g->batch_routed_mid_is_f16 = false; + + if (glm_graph_layer_uses_generic_routed_moe(l)) { + if (!g->batch_routed_gate || !g->batch_routed_up || !g->batch_routed_down || + l->ffn_gate_exps->type != l->ffn_up_exps->type) { + return 0; + } + return ds4_gpu_routed_moe_batch_tensor(out, + g->batch_routed_gate, + g->batch_routed_up, + mid, + g->batch_routed_down, + model->map, + model->size, + l->ffn_gate_exps->abs_offset, + l->ffn_up_exps->abs_offset, + l->ffn_down_exps->abs_offset, + l->ffn_gate_exps->type, + l->ffn_down_exps->type, + gate_expert_bytes, + gate_row_bytes, + down_expert_bytes, + down_row_bytes, + DS4_N_EMBD, + DS4_N_FF_EXP, + DS4_N_EMBD, + selected, + weights, + DS4_N_EXPERT, + DS4_N_EXPERT_USED, + 0.0f, + x, + il, + n_tokens, + &g->batch_routed_mid_is_f16); + } + + if (direct_scalar_q4) { + return ds4_gpu_glm_routed_moe_batch_direct_scalar_q4_tensor( + out, + mid, + model->map, + model->size, + l->ffn_gate_exps->abs_offset, + l->ffn_up_exps->abs_offset, + l->ffn_down_exps->abs_offset, + l->ffn_gate_exps->type, + l->ffn_up_exps->type, + l->ffn_down_exps->type, + gate_expert_bytes, + gate_row_bytes, + up_expert_bytes, + up_row_bytes, + down_expert_bytes, + down_row_bytes, + DS4_N_EMBD, + DS4_N_FF_EXP, + DS4_N_EMBD, + selected, + weights, + DS4_N_EXPERT, + DS4_N_EXPERT_USED, + il, + x, + n_tokens, + mid_token_stride); + } + + return ds4_gpu_glm_routed_moe_batch_tensor( + out, + mid, + model->map, + model->size, + l->ffn_gate_exps->abs_offset, + l->ffn_up_exps->abs_offset, + l->ffn_down_exps->abs_offset, + l->ffn_gate_exps->type, + l->ffn_up_exps->type, + l->ffn_down_exps->type, + gate_expert_bytes, + gate_row_bytes, + up_expert_bytes, + up_row_bytes, + down_expert_bytes, + down_row_bytes, + DS4_N_EMBD, + DS4_N_FF_EXP, + DS4_N_EMBD, + selected, + weights, + DS4_N_EXPERT, + DS4_N_EXPERT_USED, + il, + x, + n_tokens, + mid_token_stride); +} + +static bool glm_graph_disable_add3_residual(void); + +static bool glm_graph_use_streaming_selected_async_load( + const ds4_glm_gpu_graph *g) { + return g && + g->ssd_streaming && + getenv("DS4_METAL_ENABLE_GLM_STREAMING_SELECTED_ASYNC_LOAD") != NULL && + getenv("DS4_METAL_DISABLE_STREAMING_SELECTED_ASYNC_LOAD") == NULL && + getenv("DS4_METAL_DISABLE_GLM_STREAMING_SELECTED_ASYNC_LOAD") == NULL; +} + +typedef struct glm_graph_streaming_async_profile { + uint64_t async_calls; + uint64_t sync_calls; + double async_total_ms; + double sync_total_ms; + double async_signal_start_ms; + double async_flush_router_ms; + double async_shared_ms; + double async_flush_shared_ms; + double async_finish_ms; + double async_routed_ms; + double async_post_ms; + double sync_early_load_ms; + double sync_shared_ms; + double sync_routed_ms; + double sync_post_ms; +} glm_graph_streaming_async_profile; + +static glm_graph_streaming_async_profile g_glm_streaming_async_profile; +static bool g_glm_streaming_async_profile_registered; + +static bool glm_graph_streaming_async_profile_enabled(void) { + return getenv("DS4_METAL_GLM_STREAMING_ASYNC_PROFILE") != NULL; +} + +static void glm_graph_streaming_async_profile_print(void) { + const glm_graph_streaming_async_profile *p = + &g_glm_streaming_async_profile; + if (p->async_calls == 0 && p->sync_calls == 0) return; + const double async_calls = p->async_calls ? (double)p->async_calls : 1.0; + const double sync_calls = p->sync_calls ? (double)p->sync_calls : 1.0; + fprintf(stderr, + "ds4: GLM streaming async profile async_calls=%llu " + "total=%.3f ms avg=%.3f ms signal_start=%.3f ms " + "flush_router=%.3f ms shared=%.3f ms flush_shared=%.3f ms " + "finish=%.3f ms routed=%.3f ms post=%.3f ms\n", + (unsigned long long)p->async_calls, + p->async_total_ms, + p->async_total_ms / async_calls, + p->async_signal_start_ms, + p->async_flush_router_ms, + p->async_shared_ms, + p->async_flush_shared_ms, + p->async_finish_ms, + p->async_routed_ms, + p->async_post_ms); + fprintf(stderr, + "ds4: GLM streaming sync profile calls=%llu " + "total=%.3f ms avg=%.3f ms early_load=%.3f ms " + "shared=%.3f ms routed=%.3f ms post=%.3f ms\n", + (unsigned long long)p->sync_calls, + p->sync_total_ms, + p->sync_total_ms / sync_calls, + p->sync_early_load_ms, + p->sync_shared_ms, + p->sync_routed_ms, + p->sync_post_ms); +} + +static void glm_graph_streaming_async_profile_register(void) { + if (g_glm_streaming_async_profile_registered) return; + if (!glm_graph_streaming_async_profile_enabled()) return; + atexit(glm_graph_streaming_async_profile_print); + g_glm_streaming_async_profile_registered = true; +} + +static double glm_graph_streaming_async_profile_ms(void) { + return now_sec() * 1000.0; +} + +/* Timing-only skip-ablation for the GLM decode layer (comma list in + * DS4_GLM_DECODE_ABLATE): the skipped stage's output buffer keeps stale + * contents, so the run produces garbage text but every remaining dispatch + * (and every TP gate) still executes. Whole-token time deltas against a + * baseline run are the only reliable per-stage cost measurement — the + * stage profiler's per-stage command-buffer splits inflate small stages. */ +#define DS4_GLM_ABLATE_ATTN_OUT (1u << 0) +#define DS4_GLM_ABLATE_ATTN_CORE (1u << 1) +#define DS4_GLM_ABLATE_QPATH (1u << 2) +#define DS4_GLM_ABLATE_INDEXER (1u << 3) +#define DS4_GLM_ABLATE_ROUTED (1u << 4) +#define DS4_GLM_ABLATE_SHARED (1u << 5) +#define DS4_GLM_ABLATE_QKLOW (1u << 6) + +static uint32_t glm_decode_ablate_mask(void) { + static int cached = -1; + if (cached < 0) { + uint32_t mask = 0; + const char *env = getenv("DS4_GLM_DECODE_ABLATE"); + if (env) { + if (strstr(env, "attn_out")) mask |= DS4_GLM_ABLATE_ATTN_OUT; + if (strstr(env, "attn_core")) mask |= DS4_GLM_ABLATE_ATTN_CORE; + if (strstr(env, "qpath")) mask |= DS4_GLM_ABLATE_QPATH; + if (strstr(env, "indexer")) mask |= DS4_GLM_ABLATE_INDEXER; + if (strstr(env, "routed")) mask |= DS4_GLM_ABLATE_ROUTED; + if (strstr(env, "shared")) mask |= DS4_GLM_ABLATE_SHARED; + if (strstr(env, "qklow")) mask |= DS4_GLM_ABLATE_QKLOW; + if (mask) { + fprintf(stderr, "ds4: GLM decode ablation active (mask 0x%x) — output is garbage, timing only\n", mask); + } + } + cached = (int)mask; + } + return (uint32_t)cached; +} + +static bool glm_graph_encode_shared_swiglu_one( + ds4_gpu_tensor *mid, + ds4_gpu_tensor *gate, + ds4_gpu_tensor *up, + const ds4_model *model, + const ds4_layer_weights *l, + uint32_t il, + uint32_t pos, + const ds4_gpu_tensor *x, + bool ssd_streaming, + bool stage_profile, + double *stage_t0) { + if (!mid || !gate || !up || !model || !l || !x || + !l->ffn_gate_shexp || !l->ffn_up_shexp) { + return false; + } + + bool ok = true; + if (glm_graph_weights_are_q8_0(model, + l->ffn_gate_shexp->abs_offset, + l->ffn_up_shexp->abs_offset)) { + ok = ds4_gpu_shared_mid_swiglu_q8_0_tensor( + mid, + model->map, + model->size, + l->ffn_gate_shexp->abs_offset, + l->ffn_up_shexp->abs_offset, + DS4_N_EMBD, + DS4_N_FF_EXP, + x, + 0.0f) != 0; + if (ok) ok = glm_graph_profile_stage(stage_profile, + "glm_decode_ffn", + "shared_gate_up_swiglu", + il, + pos, + 1, + stage_t0); + return ok; + } + + ok = glm_graph_matmul_q8_0_decode_profiled_tensor(gate, + model, + l->ffn_gate_shexp->abs_offset, + DS4_N_EMBD, + DS4_N_FF_EXP, + x, + il, + pos, + "shared_gate", + ssd_streaming) != 0; + if (ok) ok = glm_graph_matmul_q8_0_decode_profiled_tensor(up, + model, + l->ffn_up_shexp->abs_offset, + DS4_N_EMBD, + DS4_N_FF_EXP, + x, + il, + pos, + "shared_up", + ssd_streaming) != 0; + if (ok) ok = glm_graph_profile_stage(stage_profile, + "glm_decode_ffn", + "shared_gate_up", + il, + pos, + 1, + stage_t0); + if (ok) ok = ds4_gpu_swiglu_tensor(mid, + gate, + up, + DS4_N_FF_EXP, + 0.0f, + 1.0f) != 0; + if (ok) ok = glm_graph_profile_stage(stage_profile, + "glm_decode_ffn", + "shared_swiglu", + il, + pos, + 1, + stage_t0); + return ok; +} + +static bool glm_graph_encode_sparse_ffn_one( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_layer_weights *l, + uint32_t il, + uint32_t pos, + const ds4_gpu_tensor *ffn_norm, + const ds4_gpu_tensor *after_attn, + ds4_gpu_tensor *next, + ds4_gpu_tensor *ffn_gate, + ds4_gpu_tensor *ffn_up, + ds4_gpu_tensor *ffn_mid, + ds4_gpu_tensor *ffn_out, + ds4_gpu_tensor *ffn_sum, + ds4_gpu_tensor *tmp, + bool stage_profile, + double *stage_t0) { + uint64_t gate_in = 0, gate_out = 0, gate_row_bytes = 0; + uint64_t up_in = 0, up_out = 0, up_row_bytes = 0; + uint64_t down_in = 0, down_out = 0, down_row_bytes = 0; + (void)tensor_expert_bytes(model, l->ffn_gate_exps, 0, &gate_in, &gate_out, &gate_row_bytes); + (void)tensor_expert_bytes(model, l->ffn_up_exps, 0, &up_in, &up_out, &up_row_bytes); + (void)tensor_expert_bytes(model, l->ffn_down_exps, 0, &down_in, &down_out, &down_row_bytes); + (void)gate_in; + (void)up_in; + (void)down_in; + + bool ok = ds4_gpu_matmul_f32_tensor(g->router_logits, + model->map, + model->size, + l->ffn_gate_inp->abs_offset, + DS4_N_EMBD, + DS4_N_EXPERT, + ffn_norm, + 1) != 0; + if (ok) ok = ds4_gpu_glm_router_select_tensor(g->router_selected, + g->router_weights, + g->router_probs, + model->map, + model->size, + l->ffn_exp_probs_b->abs_offset, + g->router_logits, + DS4_N_EXPERT, + DS4_N_EXPERT_USED, + DS4_EXPERT_WEIGHT_SCALE) != 0; + if (ok) ok = glm_graph_profile_stage(stage_profile, + "glm_decode_ffn", + "router", + il, + pos, + 1, + stage_t0); + if (ok) ok = glm_graph_profile_router_selection(g, l, il, pos); + const bool resident_decode_layer = + g->ssd_streaming && glm_stream_resident_decode_layer_enabled(l, il); + const bool generic_streaming_selected_cache = + g->ssd_streaming && + !resident_decode_layer && + glm_graph_layer_uses_generic_routed_moe(l); + const bool uniform_streaming_selected_cache = + g->ssd_streaming && + !resident_decode_layer && + l->ffn_gate_exps->type == l->ffn_up_exps->type && + l->ffn_gate_exps->type == l->ffn_down_exps->type && + (l->ffn_gate_exps->type == DS4_TENSOR_Q2_K || + l->ffn_gate_exps->type == DS4_TENSOR_Q4_K); + const bool streaming_selected_cache = + generic_streaming_selected_cache || + uniform_streaming_selected_cache; + const bool shared_first = streaming_selected_cache; + metal_graph_selected_async_load async_load = {0}; + bool async_load_started = false; + const bool async_profile = + streaming_selected_cache && + glm_graph_streaming_async_profile_enabled(); + if (async_profile) glm_graph_streaming_async_profile_register(); + const double stream_total_t0 = + async_profile ? glm_graph_streaming_async_profile_ms() : 0.0; + double stream_t0 = stream_total_t0; + bool async_path_profiled = false; + if (ok && streaming_selected_cache) { + const ds4_gpu_stream_expert_table table = { + .model_map = model->map, + .model_size = model->size, + .layer = il, + .n_total_expert = DS4_N_EXPERT, + .gate_offset = l->ffn_gate_exps->abs_offset, + .up_offset = l->ffn_up_exps->abs_offset, + .down_offset = l->ffn_down_exps->abs_offset, + .gate_expert_bytes = gate_out * gate_row_bytes, + .down_expert_bytes = down_out * down_row_bytes, + }; + const bool async_selected_load = + glm_graph_layer_uses_generic_routed_moe(l) && + glm_graph_use_streaming_selected_async_load(g); + async_path_profiled = async_profile && async_selected_load; + if (async_selected_load) { + uint64_t selected_event = 0; + ok = ds4_gpu_signal_selected_readback_ready(&selected_event) != 0; + if (ok) { + ok = metal_graph_selected_async_load_start_tensor( + &async_load, + g->router_selected, + model, + l, + il, + selected_event, + gate_out * gate_row_bytes, + down_out * down_row_bytes); + async_load_started = ok; + } + if (async_profile) { + g_glm_streaming_async_profile.async_signal_start_ms += + glm_graph_streaming_async_profile_ms() - stream_t0; + stream_t0 = glm_graph_streaming_async_profile_ms(); + } + if (ok) { + ok = ds4_gpu_flush_commands() != 0; + } + if (async_profile) { + g_glm_streaming_async_profile.async_flush_router_ms += + glm_graph_streaming_async_profile_ms() - stream_t0; + stream_t0 = glm_graph_streaming_async_profile_ms(); + } + } else { + ok = ds4_gpu_glm_stream_expert_cache_begin_selected_load_tensor( + &table, + g->router_selected, + DS4_N_EXPERT_USED) != 0; + if (async_profile) { + g_glm_streaming_async_profile.sync_early_load_ms += + glm_graph_streaming_async_profile_ms() - stream_t0; + stream_t0 = glm_graph_streaming_async_profile_ms(); + } + } + } + if (ok && shared_first) { + ok = glm_graph_encode_shared_swiglu_one(ffn_mid, + ffn_gate, + ffn_up, + model, + l, + il, + pos, + ffn_norm, + g->ssd_streaming, + stage_profile, + stage_t0); + if (ok) ok = glm_graph_matmul_q8_0_decode_profiled_tensor(ffn_sum, + model, + l->ffn_down_shexp->abs_offset, + DS4_N_FF_EXP, + DS4_N_EMBD, + ffn_mid, + il, + pos, + "shared_down", + g->ssd_streaming) != 0; + if (ok) ok = glm_graph_profile_stage(stage_profile, + "glm_decode_ffn", + "shared_down", + il, + pos, + 1, + stage_t0); + } + if (async_profile) { + const double now_ms = glm_graph_streaming_async_profile_ms(); + if (async_path_profiled) { + g_glm_streaming_async_profile.async_shared_ms += + now_ms - stream_t0; + } else { + g_glm_streaming_async_profile.sync_shared_ms += + now_ms - stream_t0; + } + stream_t0 = now_ms; + } + if (async_load_started) { + const bool flush_ok = ds4_gpu_flush_commands() != 0; + if (async_profile) { + g_glm_streaming_async_profile.async_flush_shared_ms += + glm_graph_streaming_async_profile_ms() - stream_t0; + stream_t0 = glm_graph_streaming_async_profile_ms(); + } + const bool finish_ok = metal_graph_selected_async_load_finish(&async_load); + ok = ok && flush_ok && finish_ok; + if (async_profile) { + g_glm_streaming_async_profile.async_finish_ms += + glm_graph_streaming_async_profile_ms() - stream_t0; + stream_t0 = glm_graph_streaming_async_profile_ms(); + } + } + /* 50/50 TP: this rank's routed partial goes straight into the + * slab out slot, the gate exchanges it with the peer's half, and the + * commutative add rebuilds the full routed output on both ranks + * bit-identically. The shared expert and everything else stay + * replicated, so no other exchange is needed. */ + const bool tp_split_ffn = g->tp_world == 2 && g->tp_out && g->tp_in; + const uint32_t tp_ffn_slot = il * DS4_TP_GATES_PER_LAYER + DS4_TP_GATE_FFN; + ds4_gpu_tensor *routed_dst = tp_split_ffn ? g->tp_out[tp_ffn_slot] : ffn_out; + if (ok && tp_split_ffn && g->ssd_streaming) { + fprintf(stderr, "ds4: GLM tensor parallelism requires resident weights\n"); + ok = false; + } + if (!ok && tp_split_ffn && getenv("DS4_GLM_TP_DEBUG")) { + fprintf(stderr, "ds4: glm sparse ffn: failed before routed dispatch (layer %u)\n", il); + } + if (ok && !(glm_decode_ablate_mask() & DS4_GLM_ABLATE_ROUTED)) { + ok = glm_graph_routed_moe_one_dispatch( + g, + model, + l, + il, + routed_dst, + ffn_mid, + gate_out * gate_row_bytes, + gate_row_bytes, + up_out * up_row_bytes, + up_row_bytes, + down_out * down_row_bytes, + down_row_bytes, + g->router_selected, + g->router_weights, + ffn_norm, + resident_decode_layer) != 0; + } + if (ok && tp_split_ffn) { + ok = ds4_gpu_tp_gate_encode(il, DS4_TP_GATE_FFN) != 0; + if (ok) ok = ds4_gpu_add_tensor(ffn_out, + g->tp_out[tp_ffn_slot], + g->tp_in[tp_ffn_slot], + DS4_N_EMBD) != 0; + if (!ok) fprintf(stderr, "ds4: GLM TP gate/combine failed (layer %u)\n", il); + } else if (!ok && tp_split_ffn) { + fprintf(stderr, "ds4: GLM TP routed dispatch failed before the gate (layer %u)\n", il); + } + if (async_profile) { + const double now_ms = glm_graph_streaming_async_profile_ms(); + if (async_path_profiled) { + g_glm_streaming_async_profile.async_routed_ms += + now_ms - stream_t0; + } else { + g_glm_streaming_async_profile.sync_routed_ms += + now_ms - stream_t0; + } + stream_t0 = now_ms; + } + if (ok) ok = glm_graph_profile_stage(stage_profile, + "glm_decode_ffn", + "routed_moe", + il, + pos, + 1, + stage_t0); + if (ok && !shared_first && + !(glm_decode_ablate_mask() & DS4_GLM_ABLATE_SHARED)) { + ok = glm_graph_encode_shared_swiglu_one(ffn_mid, + ffn_gate, + ffn_up, + model, + l, + il, + pos, + ffn_norm, + g->ssd_streaming, + stage_profile, + stage_t0); + if (ok) ok = glm_graph_matmul_q8_0_decode_profiled_tensor(ffn_sum, + model, + l->ffn_down_shexp->abs_offset, + DS4_N_FF_EXP, + DS4_N_EMBD, + ffn_mid, + il, + pos, + "shared_down", + g->ssd_streaming) != 0; + if (ok) ok = glm_graph_profile_stage(stage_profile, + "glm_decode_ffn", + "shared_down", + il, + pos, + 1, + stage_t0); + } + if (ok && !glm_graph_disable_add3_residual()) { + ok = ds4_gpu_add3_tensor(next, + after_attn, + ffn_out, + ffn_sum, + DS4_N_EMBD) != 0; + } else if (ok) { + ok = ds4_gpu_add_tensor(tmp, + ffn_out, + ffn_sum, + DS4_N_EMBD) != 0; + if (ok) ok = ds4_gpu_add_tensor(next, + after_attn, + tmp, + DS4_N_EMBD) != 0; + } + if (ok) ok = glm_graph_profile_stage(stage_profile, + "glm_decode_ffn", + "residual", + il, + pos, + 1, + stage_t0); + if (async_profile) { + const double now_ms = glm_graph_streaming_async_profile_ms(); + if (async_path_profiled) { + g_glm_streaming_async_profile.async_calls++; + g_glm_streaming_async_profile.async_post_ms += now_ms - stream_t0; + g_glm_streaming_async_profile.async_total_ms += + now_ms - stream_total_t0; + } else { + g_glm_streaming_async_profile.sync_calls++; + g_glm_streaming_async_profile.sync_post_ms += now_ms - stream_t0; + g_glm_streaming_async_profile.sync_total_ms += + now_ms - stream_total_t0; + } + } + return ok; +} + +static bool glm_graph_encode_ffn_one_normed_from( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_layer_weights *l, + uint32_t il, + uint32_t pos, + const ds4_gpu_tensor *ffn_norm, + const ds4_gpu_tensor *after_attn, + ds4_gpu_tensor *next, + ds4_gpu_tensor *ffn_gate, + ds4_gpu_tensor *ffn_up, + ds4_gpu_tensor *ffn_mid, + ds4_gpu_tensor *ffn_out, + ds4_gpu_tensor *ffn_sum, + ds4_gpu_tensor *tmp, + bool stage_profile, + double *stage_t0) { + if (!g || !model || !l || !ffn_norm || !after_attn || !next || + !ffn_gate || !ffn_up || !ffn_mid || !ffn_out || + !ffn_sum || !tmp) { + return false; + } + + if (il < DS4_N_LEADING_DENSE) { + const uint64_t hidden = l->ffn_gate->dim[1]; + const bool can_fuse_gate_up = + glm_graph_weights_are_q8_0(model, + l->ffn_gate->abs_offset, + l->ffn_up->abs_offset); + const bool fused_gate_up = can_fuse_gate_up && + ds4_gpu_shared_gate_up_swiglu_q8_0_model_view_tensor( + ffn_gate, + ffn_up, + ffn_mid, + model->map, + model->size, + l->ffn_gate->abs_offset, + l->ffn_up->abs_offset, + DS4_N_EMBD, + hidden, + ffn_norm, + 0.0f) != 0; + bool ok = fused_gate_up; + if (fused_gate_up) { + ok = glm_graph_profile_stage(stage_profile, + "glm_decode_ffn", + "dense_gate_up_swiglu", + il, + pos, + 1, + stage_t0); + } else { + ok = glm_graph_matmul_q8_0_decode_profiled_tensor(ffn_gate, + model, + l->ffn_gate->abs_offset, + DS4_N_EMBD, + hidden, + ffn_norm, + il, + pos, + "dense_gate", + g->ssd_streaming) != 0; + if (ok) ok = glm_graph_matmul_q8_0_decode_profiled_tensor(ffn_up, + model, + l->ffn_up->abs_offset, + DS4_N_EMBD, + hidden, + ffn_norm, + il, + pos, + "dense_up", + g->ssd_streaming) != 0; + if (ok) ok = glm_graph_profile_stage(stage_profile, + "glm_decode_ffn", + "dense_gate_up", + il, + pos, + 1, + stage_t0); + if (ok) ok = ds4_gpu_swiglu_tensor(ffn_mid, + ffn_gate, + ffn_up, + (uint32_t)hidden, + 0.0f, + 1.0f) != 0; + if (ok) ok = glm_graph_profile_stage(stage_profile, + "glm_decode_ffn", + "dense_swiglu", + il, + pos, + 1, + stage_t0); + } + if (ok) ok = glm_graph_matmul_q8_0_decode_profiled_tensor(ffn_out, + model, + l->ffn_down->abs_offset, + hidden, + DS4_N_EMBD, + ffn_mid, + il, + pos, + "dense_down", + g->ssd_streaming) != 0; + if (ok) ok = glm_graph_profile_stage(stage_profile, + "glm_decode_ffn", + "dense_down", + il, + pos, + 1, + stage_t0); + if (ok) ok = ds4_gpu_add_tensor(next, + after_attn, + ffn_out, + DS4_N_EMBD) != 0; + if (ok) ok = glm_graph_profile_stage(stage_profile, + "glm_decode_ffn", + "residual", + il, + pos, + 1, + stage_t0); + return ok; + } + + return glm_graph_encode_sparse_ffn_one(g, + model, + l, + il, + pos, + ffn_norm, + after_attn, + next, + ffn_gate, + ffn_up, + ffn_mid, + ffn_out, + ffn_sum, + tmp, + stage_profile, + stage_t0); +} + +static bool glm_graph_encode_ffn_one_from( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_layer_weights *l, + uint32_t il, + uint32_t pos, + const ds4_gpu_tensor *after_attn, + ds4_gpu_tensor *next, + ds4_gpu_tensor *ffn_norm, + ds4_gpu_tensor *ffn_gate, + ds4_gpu_tensor *ffn_up, + ds4_gpu_tensor *ffn_mid, + ds4_gpu_tensor *ffn_out, + ds4_gpu_tensor *ffn_sum, + ds4_gpu_tensor *tmp, + bool stage_profile, + double *stage_t0) { + if (!g || !model || !l || !after_attn || !next || + !ffn_norm || !ffn_gate || !ffn_up || !ffn_mid || !ffn_out || + !ffn_sum || !tmp) { + return false; + } + + bool ok = ds4_gpu_rms_norm_weight_tensor(ffn_norm, + after_attn, + model->map, + model->size, + l->ffn_norm->abs_offset, + DS4_N_EMBD, + DS4_RMS_EPS) != 0; + if (ok) ok = glm_graph_profile_stage(stage_profile, + "glm_decode_ffn", + "ffn_norm", + il, + pos, + 1, + stage_t0); + if (!ok) return false; + + return glm_graph_encode_ffn_one_normed_from(g, + model, + l, + il, + pos, + ffn_norm, + after_attn, + next, + ffn_gate, + ffn_up, + ffn_mid, + ffn_out, + ffn_sum, + tmp, + stage_profile, + stage_t0); +} + +static ds4_gpu_tensor *glm_graph_tensor_row_view_strided( + ds4_gpu_tensor *base, + uint32_t row, + uint64_t stride_values, + uint64_t row_values) { + return ds4_gpu_tensor_view(base, + (uint64_t)row * stride_values * sizeof(float), + row_values * sizeof(float)); +} + +static uint32_t glm_graph_q8_stripe_tokens(void) { + return 2048u; +} + +static bool glm_graph_flash_attention_prefill_enabled(void) { + return getenv("DS4_GLM_DISABLE_FLASH_PREFILL") == NULL; +} + +static uint32_t glm_graph_flash_attention_prefill_min_tokens(void) { + return 24u; +} + +static bool glm_graph_use_flash_attention_prefill(uint32_t n_tokens) { + return glm_graph_flash_attention_prefill_enabled() && + n_tokens >= glm_graph_flash_attention_prefill_min_tokens(); +} + +static bool glm_graph_use_flash_attention_staged_kv( + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_len) { + return pos0 == 0 && + n_tokens == cache_len; +} + +static bool glm_graph_force_indexed_decode(void) { + return false; +} + +static bool glm_graph_disable_indexed_decode(void) { + return false; +} + +static bool glm_graph_decode_uses_indexed_attention(const ds4_glm_gpu_graph *g, + uint32_t pos, + const float *logits_out) { + return g && g->compact_cache_cap != 0 && + (!g->full_kv_cache || + pos >= g->ctx_cap || + glm_graph_force_indexed_decode() || + (logits_out != NULL && !glm_graph_disable_indexed_decode())); +} + +static bool glm_graph_decode_updates_dense_cache(const ds4_glm_gpu_graph *g, + uint32_t pos, + const float *logits_out) { + return g && pos < g->ctx_cap && + !glm_graph_decode_uses_indexed_attention(g, pos, logits_out); +} + +static bool glm_graph_indexed_prefill_scalar_kernels(void) { + return false; +} + +static bool glm_graph_indexed_prefill_scalar_indexer(void) { + return false; +} + +static bool glm_graph_indexed_prefill_batch_indexer(void) { + return true; +} + +static bool glm_graph_indexed_prefill_scalar_attn(void) { + return false; +} + +static bool glm_graph_indexed_prefill_batch_qk_low(void) { + return true; +} + +static bool glm_graph_indexed_prefill_batch_attn_kernel(void) { + return true; +} + +static uint32_t glm_graph_indexed_prefill_batch_attn_slice_tokens(void) { + return 2048u; +} + +static bool glm_graph_indexer_qat(void) { + return false; +} + +static bool glm_graph_indexed_prefill_batch_ffn(void) { + return true; +} + +static bool glm_graph_indexed_prefill_batch_ffn_norm(void) { + return true; +} + +static bool glm_graph_indexed_prefill_batch_routed_moe(void) { + return true; +} + +static bool glm_graph_indexed_prefill_batch_router_select(void) { + return true; +} + +static bool glm_graph_indexed_prefill_batch_residual(void) { + return true; +} + +static bool glm_graph_indexed_prefill_batch_f32_rows(void) { + return true; +} + +static bool glm_graph_indexed_prefill_batch_q8_rows(void) { + return true; +} + +static bool glm_graph_indexed_prefill_batch_shared_expert(void) { + return true; +} + +static bool glm_graph_matmul_q8_0_tensor( + ds4_gpu_tensor *out, + const ds4_model *model, + uint64_t weight_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint32_t n_tokens) { + if (!out || !model || !x || n_tokens == 0) return false; + + const uint32_t q8_stripe_tokens = glm_graph_q8_stripe_tokens(); + if (n_tokens <= q8_stripe_tokens) { + return ds4_gpu_matmul_quant_tensor(out, + model->map, + model->size, + weight_offset, + glm_graph_weight_type_for_offset(model, weight_offset), + in_dim, + out_dim, + x, + n_tokens) != 0; + } + if (in_dim > UINT64_MAX / sizeof(float) || + out_dim > UINT64_MAX / sizeof(float)) { + return false; + } + + uint32_t done = 0; + while (done < n_tokens) { + uint32_t chunk = n_tokens - done; + if (chunk > q8_stripe_tokens) chunk = q8_stripe_tokens; + /* + * The Q8 prefill TensorOps path needs token counts divisible by 32. + * For a final chunk like 1736 rows, keep the aligned 1728 rows on that + * path and leave only the tiny tail to the small-batch kernel. Avoid + * splitting small batches where the extra launch would dominate. + */ + if (chunk >= 256u && chunk == n_tokens - done) { + const uint32_t tail = chunk & 31u; + if (tail != 0u && tail <= 16u) chunk -= tail; + } + + ds4_gpu_tensor *x_view = ds4_gpu_tensor_view( + x, + (uint64_t)done * in_dim * sizeof(float), + (uint64_t)chunk * in_dim * sizeof(float)); + ds4_gpu_tensor *out_view = ds4_gpu_tensor_view( + out, + (uint64_t)done * out_dim * sizeof(float), + (uint64_t)chunk * out_dim * sizeof(float)); + const bool ok = x_view && out_view && + ds4_gpu_matmul_quant_tensor(out_view, + model->map, + model->size, + weight_offset, + glm_graph_weight_type_for_offset(model, weight_offset), + in_dim, + out_dim, + x_view, + chunk) != 0; + ds4_gpu_tensor_free(out_view); + ds4_gpu_tensor_free(x_view); + if (!ok) return false; + done += chunk; + } + return true; +} + +static bool glm_graph_matmul_q8_0_rows_scalar( + ds4_gpu_tensor *out, + const ds4_model *model, + uint64_t weight_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint32_t n_tokens) { + if (!out || !model || !x || n_tokens == 0) return false; + if (in_dim > UINT64_MAX / sizeof(float) || + out_dim > UINT64_MAX / sizeof(float)) { + return false; + } + + if (glm_graph_indexed_prefill_batch_q8_rows() && + ds4_gpu_matmul_quant_rows_scalar_tensor(out, + model->map, + model->size, + weight_offset, + glm_graph_weight_type_for_offset(model, weight_offset), + in_dim, + out_dim, + x, + n_tokens) != 0) { + return true; + } + + for (uint32_t t = 0; t < n_tokens; t++) { + ds4_gpu_tensor *x_view = ds4_gpu_tensor_view( + (ds4_gpu_tensor *)x, + (uint64_t)t * in_dim * sizeof(float), + in_dim * sizeof(float)); + ds4_gpu_tensor *out_view = ds4_gpu_tensor_view( + out, + (uint64_t)t * out_dim * sizeof(float), + out_dim * sizeof(float)); + const bool ok = x_view && out_view && + ds4_gpu_matmul_quant_tensor(out_view, + model->map, + model->size, + weight_offset, + glm_graph_weight_type_for_offset(model, weight_offset), + in_dim, + out_dim, + x_view, + 1) != 0; + ds4_gpu_tensor_free(out_view); + ds4_gpu_tensor_free(x_view); + if (!ok) return false; + } + return true; +} + +static bool glm_graph_matmul_f32_rows_scalar( + ds4_gpu_tensor *out, + const ds4_model *model, + uint64_t weight_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint32_t n_tokens) { + if (!out || !model || !x || n_tokens == 0) return false; + if (in_dim > UINT64_MAX / sizeof(float) || + out_dim > UINT64_MAX / sizeof(float)) { + return false; + } + + if (glm_graph_indexed_prefill_batch_f32_rows()) { + return ds4_gpu_matmul_f32_tensor(out, + model->map, + model->size, + weight_offset, + in_dim, + out_dim, + x, + n_tokens) != 0; + } + + for (uint32_t t = 0; t < n_tokens; t++) { + ds4_gpu_tensor *x_view = ds4_gpu_tensor_view( + (ds4_gpu_tensor *)x, + (uint64_t)t * in_dim * sizeof(float), + in_dim * sizeof(float)); + ds4_gpu_tensor *out_view = ds4_gpu_tensor_view( + out, + (uint64_t)t * out_dim * sizeof(float), + out_dim * sizeof(float)); + const bool ok = x_view && out_view && + ds4_gpu_matmul_f32_tensor(out_view, + model->map, + model->size, + weight_offset, + in_dim, + out_dim, + x_view, + 1) != 0; + ds4_gpu_tensor_free(out_view); + ds4_gpu_tensor_free(x_view); + if (!ok) return false; + } + return true; +} + +static bool glm_graph_shared_gate_up_swiglu_q8_0_tensor( + ds4_gpu_tensor *gate, + ds4_gpu_tensor *up, + ds4_gpu_tensor *mid, + const ds4_model *model, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint32_t n_tokens, + float clamp) { + if (!gate || !up || !mid || !model || !x || n_tokens == 0) return false; + if (!glm_graph_weights_are_q8_0(model, gate_offset, up_offset)) return false; + + const uint32_t q8_stripe_tokens = glm_graph_q8_stripe_tokens(); + if (n_tokens == 1) { + return ds4_gpu_shared_gate_up_swiglu_q8_0_model_view_tensor(gate, + up, + mid, + model->map, + model->size, + gate_offset, + up_offset, + in_dim, + out_dim, + x, + clamp) != 0; + } + if (n_tokens <= q8_stripe_tokens) { + return ds4_gpu_shared_gate_up_swiglu_q8_0_rows_tensor(gate, + up, + mid, + model->map, + model->size, + gate_offset, + up_offset, + in_dim, + out_dim, + x, + n_tokens, + clamp) != 0; + } + if (in_dim > UINT64_MAX / sizeof(float) || + out_dim > UINT64_MAX / sizeof(float)) { + return false; + } + + uint32_t done = 0; + while (done < n_tokens) { + uint32_t chunk = n_tokens - done; + if (chunk > q8_stripe_tokens) chunk = q8_stripe_tokens; + + ds4_gpu_tensor *x_view = ds4_gpu_tensor_view( + x, + (uint64_t)done * in_dim * sizeof(float), + (uint64_t)chunk * in_dim * sizeof(float)); + ds4_gpu_tensor *gate_view = ds4_gpu_tensor_view( + gate, + (uint64_t)done * out_dim * sizeof(float), + (uint64_t)chunk * out_dim * sizeof(float)); + ds4_gpu_tensor *up_view = ds4_gpu_tensor_view( + up, + (uint64_t)done * out_dim * sizeof(float), + (uint64_t)chunk * out_dim * sizeof(float)); + ds4_gpu_tensor *mid_view = ds4_gpu_tensor_view( + mid, + (uint64_t)done * out_dim * sizeof(float), + (uint64_t)chunk * out_dim * sizeof(float)); + const bool ok = x_view && gate_view && up_view && mid_view && + ds4_gpu_shared_gate_up_swiglu_q8_0_rows_tensor(gate_view, + up_view, + mid_view, + model->map, + model->size, + gate_offset, + up_offset, + in_dim, + out_dim, + x_view, + chunk, + clamp) != 0; + ds4_gpu_tensor_free(mid_view); + ds4_gpu_tensor_free(up_view); + ds4_gpu_tensor_free(gate_view); + ds4_gpu_tensor_free(x_view); + if (!ok) return false; + done += chunk; + } + return true; +} + +static bool glm_graph_indexed_prefill_grouped_moe_default( + const ds4_glm_gpu_graph *g) { + return g && + !g->quality; +} + +static bool glm_graph_disable_add3_residual(void); + +static bool glm_graph_encode_sparse_ffn_indexed_batch_routed_moe( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_layer_weights *l, + uint32_t il, + uint32_t pos0, + const ds4_gpu_tensor *after_attn, + ds4_gpu_tensor *next, + uint32_t n_tokens, + bool stage_profile, + bool stage_sync, + double *stage_t0) { + if (!g || !model || !l || !after_attn || !next || + !g->batch_ffn_norm || + !g->batch_router_logits || + !g->batch_router_probs || + !g->batch_router_selected || + !g->batch_router_weights || + !g->batch_ffn_out || + !g->batch_ffn_mid || + n_tokens <= 1 || + il < DS4_N_LEADING_DENSE || + g->ffn_mid_elems > UINT32_MAX) { + return false; + } + + uint64_t gate_in = 0, gate_out = 0, gate_row_bytes = 0; + uint64_t up_in = 0, up_out = 0, up_row_bytes = 0; + uint64_t down_in = 0, down_out = 0, down_row_bytes = 0; + (void)tensor_expert_bytes(model, l->ffn_gate_exps, 0, &gate_in, &gate_out, &gate_row_bytes); + (void)tensor_expert_bytes(model, l->ffn_up_exps, 0, &up_in, &up_out, &up_row_bytes); + (void)tensor_expert_bytes(model, l->ffn_down_exps, 0, &down_in, &down_out, &down_row_bytes); + (void)gate_in; + (void)up_in; + (void)down_in; + + bool ok = glm_graph_matmul_f32_rows_scalar(g->batch_router_logits, + model, + l->ffn_gate_inp->abs_offset, + DS4_N_EMBD, + DS4_N_EXPERT, + g->batch_ffn_norm, + n_tokens); + const bool use_batch_router_select = + glm_graph_indexed_prefill_batch_router_select(); + if (ok && use_batch_router_select) { + ok = ds4_gpu_glm_router_select_batch_tensor(g->batch_router_selected, + g->batch_router_weights, + g->batch_router_probs, + model->map, + model->size, + l->ffn_exp_probs_b->abs_offset, + g->batch_router_logits, + DS4_N_EXPERT, + DS4_N_EXPERT_USED, + DS4_EXPERT_WEIGHT_SCALE, + n_tokens) != 0; + } + for (uint32_t t = 0; ok && !use_batch_router_select && t < n_tokens; t++) { + ds4_gpu_tensor *logits_view = + glm_graph_tensor_row_view_strided(g->batch_router_logits, + t, + DS4_N_EXPERT, + DS4_N_EXPERT); + ds4_gpu_tensor *probs_view = + glm_graph_tensor_row_view_strided(g->batch_router_probs, + t, + DS4_N_EXPERT, + DS4_N_EXPERT); + ds4_gpu_tensor *selected_view = + ds4_gpu_tensor_view(g->batch_router_selected, + (uint64_t)t * DS4_N_EXPERT_USED * sizeof(int32_t), + (uint64_t)DS4_N_EXPERT_USED * sizeof(int32_t)); + ds4_gpu_tensor *weights_view = + glm_graph_tensor_row_view_strided(g->batch_router_weights, + t, + DS4_N_EXPERT_USED, + DS4_N_EXPERT_USED); + ok = logits_view && probs_view && selected_view && weights_view; + if (ok) { + ok = ds4_gpu_glm_router_select_tensor(selected_view, + weights_view, + probs_view, + model->map, + model->size, + l->ffn_exp_probs_b->abs_offset, + logits_view, + DS4_N_EXPERT, + DS4_N_EXPERT_USED, + DS4_EXPERT_WEIGHT_SCALE) != 0; + } + ds4_gpu_tensor_free(weights_view); + ds4_gpu_tensor_free(selected_view); + ds4_gpu_tensor_free(probs_view); + ds4_gpu_tensor_free(logits_view); + } + if (ok) ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_indexed_ffn", + "router", + il, + pos0, + n_tokens, + stage_t0); + if (ok) ok = glm_graph_profile_router_selection_batch(g, + l, + il, + pos0, + n_tokens); + metal_graph_debug_dump_tensor("glm_indexed_router_logits", + g->batch_router_logits, + (uint64_t)n_tokens * DS4_N_EXPERT, + il, + pos0); + metal_graph_debug_dump_i32_tensor("glm_indexed_router_selected", + g->batch_router_selected, + (uint64_t)n_tokens * DS4_N_EXPERT_USED, + il, + pos0); + metal_graph_debug_dump_tensor("glm_indexed_router_weights", + g->batch_router_weights, + (uint64_t)n_tokens * DS4_N_EXPERT_USED, + il, + pos0); + + const bool tp_batch_split_ffn2 = g->tp_world == 2; + if (ok && tp_batch_split_ffn2) { + ok = glm_graph_tp_batch_bounce_ready(g, n_tokens); + } + if (ok) { + const bool use_grouped_moe = + glm_graph_indexed_prefill_grouped_moe_default(g); + ok = glm_graph_routed_moe_batch_dispatch( + g, + model, + l, + il, + tp_batch_split_ffn2 ? g->tp_bounce_out : g->batch_ffn_out, + g->batch_ffn_mid, + gate_out * gate_row_bytes, + gate_row_bytes, + up_out * up_row_bytes, + up_row_bytes, + down_out * down_row_bytes, + down_row_bytes, + g->batch_router_selected, + g->batch_router_weights, + g->batch_ffn_norm, + n_tokens, + (uint32_t)g->ffn_mid_elems, + !use_grouped_moe) != 0; + } + if (ok) ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_indexed_ffn", + "routed_moe", + il, + pos0, + n_tokens, + stage_t0); + metal_graph_debug_dump_tensor("glm_indexed_routed_out", + g->batch_ffn_out, + (uint64_t)n_tokens * DS4_N_EMBD, + il, + pos0); + + const bool use_batch_residual = + glm_graph_indexed_prefill_batch_residual(); + const uint64_t residual_elems = (uint64_t)n_tokens * DS4_N_EMBD; + if (use_batch_residual && residual_elems > UINT32_MAX) return false; + + bool shared_expert_done = false; + if (ok && + use_batch_residual && + glm_graph_indexed_prefill_batch_shared_expert() && + g->batch_ffn_gate && + g->batch_ffn_up && + g->batch_shared_mid && + glm_graph_weights_are_q8_0(model, + l->ffn_gate_shexp->abs_offset, + l->ffn_up_shexp->abs_offset) && + ds4_gpu_shared_gate_up_swiglu_q8_0_rows_scalar_tensor( + g->batch_ffn_gate, + g->batch_ffn_up, + g->batch_shared_mid, + model->map, + model->size, + l->ffn_gate_shexp->abs_offset, + l->ffn_up_shexp->abs_offset, + DS4_N_EMBD, + DS4_N_FF_EXP, + g->batch_ffn_norm, + n_tokens, + 0.0f) != 0) { + shared_expert_done = + glm_graph_matmul_q8_0_rows_scalar(g->batch_attn_out, + model, + l->ffn_down_shexp->abs_offset, + DS4_N_FF_EXP, + DS4_N_EMBD, + g->batch_shared_mid, + n_tokens); + } + + for (uint32_t t = 0; ok && !shared_expert_done && t < n_tokens; t++) { + ds4_gpu_tensor *ffn_norm_view = + glm_graph_tensor_row_view_strided(g->batch_ffn_norm, + t, + DS4_N_EMBD, + DS4_N_EMBD); + ds4_gpu_tensor *shared_out_view = use_batch_residual ? + glm_graph_tensor_row_view_strided(g->batch_attn_out, + t, + DS4_N_EMBD, + DS4_N_EMBD) : + NULL; + ds4_gpu_tensor *after_attn_view = !use_batch_residual ? + glm_graph_tensor_row_view_strided((ds4_gpu_tensor *)after_attn, + t, + DS4_N_EMBD, + DS4_N_EMBD) : + NULL; + ds4_gpu_tensor *routed_out_view = !use_batch_residual ? + glm_graph_tensor_row_view_strided(g->batch_ffn_out, + t, + DS4_N_EMBD, + DS4_N_EMBD) : + NULL; + ds4_gpu_tensor *next_view = !use_batch_residual ? + glm_graph_tensor_row_view_strided(next, + t, + DS4_N_EMBD, + DS4_N_EMBD) : + NULL; + ok = ffn_norm_view && + (use_batch_residual ? (shared_out_view != NULL) : + (after_attn_view && routed_out_view && next_view)); + if (ok && glm_graph_weights_are_q8_0(model, + l->ffn_gate_shexp->abs_offset, + l->ffn_up_shexp->abs_offset)) { + ok = ds4_gpu_shared_gate_up_swiglu_q8_0_model_view_tensor( + g->ffn_gate, + g->ffn_up, + g->ffn_mid, + model->map, + model->size, + l->ffn_gate_shexp->abs_offset, + l->ffn_up_shexp->abs_offset, + DS4_N_EMBD, + DS4_N_FF_EXP, + ffn_norm_view, + 0.0f) != 0; + } else if (ok) { + ok = glm_graph_matmul_q8_0_tensor(g->ffn_gate, + model, + l->ffn_gate_shexp->abs_offset, + DS4_N_EMBD, + DS4_N_FF_EXP, + ffn_norm_view, + 1); + if (ok) ok = glm_graph_matmul_q8_0_tensor(g->ffn_up, + model, + l->ffn_up_shexp->abs_offset, + DS4_N_EMBD, + DS4_N_FF_EXP, + ffn_norm_view, + 1); + if (ok) ok = ds4_gpu_swiglu_tensor(g->ffn_mid, + g->ffn_gate, + g->ffn_up, + DS4_N_FF_EXP, + 0.0f, + 1.0f) != 0; + } + if (ok) ok = glm_graph_matmul_q8_0_tensor(use_batch_residual ? + shared_out_view : + g->ffn_sum, + model, + l->ffn_down_shexp->abs_offset, + DS4_N_FF_EXP, + DS4_N_EMBD, + g->ffn_mid, + 1); + if (ok && !use_batch_residual) { + ok = ds4_gpu_add_tensor(g->attn_out, + routed_out_view, + g->ffn_sum, + DS4_N_EMBD) != 0; + } + if (ok && !use_batch_residual) { + ok = ds4_gpu_add_tensor(next_view, + after_attn_view, + g->attn_out, + DS4_N_EMBD) != 0; + } + + ds4_gpu_tensor_free(next_view); + ds4_gpu_tensor_free(routed_out_view); + ds4_gpu_tensor_free(shared_out_view); + ds4_gpu_tensor_free(ffn_norm_view); + ds4_gpu_tensor_free(after_attn_view); + } + if (ok) ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_indexed_ffn", + "shared_expert", + il, + pos0, + n_tokens, + stage_t0); + if (ok && use_batch_residual) { + if (!glm_graph_disable_add3_residual()) { + ok = ds4_gpu_add3_tensor(next, + after_attn, + g->batch_ffn_out, + g->batch_attn_out, + (uint32_t)residual_elems) != 0; + } else { + ok = ds4_gpu_add_tensor(g->batch_heads, + g->batch_ffn_out, + g->batch_attn_out, + (uint32_t)residual_elems) != 0; + if (ok) ok = ds4_gpu_add_tensor(next, + after_attn, + g->batch_heads, + (uint32_t)residual_elems) != 0; + } + } + if (ok) ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_indexed_ffn", + "residual", + il, + pos0, + n_tokens, + stage_t0); + metal_graph_debug_dump_tensor("glm_indexed_next", + next, + (uint64_t)n_tokens * DS4_N_EMBD, + il, + pos0); + + (void)pos0; + return ok; +} + +static bool glm_graph_upload_tokens( + ds4_gpu_tensor *out_tokens, + const int *tokens, + uint32_t n_tokens) { + if (!out_tokens || !tokens || n_tokens == 0) return false; + + int32_t *ids = xmalloc((size_t)n_tokens * sizeof(ids[0])); + for (uint32_t i = 0; i < n_tokens; i++) ids[i] = (int32_t)tokens[i]; + const bool ok = ds4_gpu_tensor_write(out_tokens, + 0, + ids, + (uint64_t)n_tokens * sizeof(ids[0])) != 0; + free(ids); + return ok; +} + +static bool glm_graph_disable_add3_residual(void) { + return false; +} + +static bool glm_graph_encode_ffn_batch( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_layer_weights *l, + uint32_t il, + uint32_t pos0, + ds4_gpu_tensor *after_attn, + ds4_gpu_tensor *next, + uint32_t n_tokens, + bool stage_profile, + bool stage_sync, + double *stage_t0) { + if (!g || !model || !l || !after_attn || !next || n_tokens == 0) return false; + + bool ok = ds4_gpu_rms_norm_weight_rows_tensor(g->batch_ffn_norm, + after_attn, + model->map, + model->size, + l->ffn_norm->abs_offset, + DS4_N_EMBD, + n_tokens, + DS4_RMS_EPS) != 0; + if (ok) ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_ffn", + "ffn_norm", + il, + pos0, + n_tokens, + stage_t0); + if (!ok) return false; + + if (il < DS4_N_LEADING_DENSE) { + const uint64_t hidden = l->ffn_gate->dim[1]; + if (hidden == 0 || hidden > UINT32_MAX / n_tokens) return false; + const uint32_t mid_elems = (uint32_t)(hidden * n_tokens); + const uint64_t residual_elems = (uint64_t)n_tokens * DS4_N_EMBD; + if (residual_elems > UINT32_MAX) return false; + + const bool fused_gate_up = glm_graph_shared_gate_up_swiglu_q8_0_tensor( + g->batch_ffn_gate, + g->batch_ffn_up, + g->batch_ffn_mid, + model, + l->ffn_gate->abs_offset, + l->ffn_up->abs_offset, + DS4_N_EMBD, + hidden, + g->batch_ffn_norm, + n_tokens, + 0.0f); + if (fused_gate_up) { + ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_ffn", + "dense_gate_up_swiglu", + il, + pos0, + n_tokens, + stage_t0); + } else { + ok = glm_graph_matmul_q8_0_tensor(g->batch_ffn_gate, + model, + l->ffn_gate->abs_offset, + DS4_N_EMBD, + hidden, + g->batch_ffn_norm, + n_tokens); + if (ok) ok = glm_graph_matmul_q8_0_tensor(g->batch_ffn_up, + model, + l->ffn_up->abs_offset, + DS4_N_EMBD, + hidden, + g->batch_ffn_norm, + n_tokens); + if (ok) ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_ffn", + "dense_gate_up", + il, + pos0, + n_tokens, + stage_t0); + if (ok) ok = ds4_gpu_swiglu_tensor(g->batch_ffn_mid, + g->batch_ffn_gate, + g->batch_ffn_up, + mid_elems, + 0.0f, + 1.0f) != 0; + if (ok) ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_ffn", + "dense_swiglu", + il, + pos0, + n_tokens, + stage_t0); + } + if (ok) ok = glm_graph_matmul_q8_0_tensor(g->batch_ffn_out, + model, + l->ffn_down->abs_offset, + hidden, + DS4_N_EMBD, + g->batch_ffn_mid, + n_tokens); + if (ok) ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_ffn", + "dense_down", + il, + pos0, + n_tokens, + stage_t0); + if (ok) ok = ds4_gpu_add_tensor(next, + after_attn, + g->batch_ffn_out, + (uint32_t)residual_elems) != 0; + if (ok) ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_ffn", + "residual", + il, + pos0, + n_tokens, + stage_t0); + return ok; + } + + if (g->ffn_mid_elems > UINT32_MAX || + g->dense_hidden_max < DS4_N_FF_EXP || + (uint64_t)n_tokens > UINT32_MAX / DS4_N_FF_EXP) { + return false; + } + const uint64_t residual_elems = (uint64_t)n_tokens * DS4_N_EMBD; + if (residual_elems > UINT32_MAX) return false; + + uint64_t gate_in = 0, gate_out = 0, gate_row_bytes = 0; + uint64_t up_in = 0, up_out = 0, up_row_bytes = 0; + uint64_t down_in = 0, down_out = 0, down_row_bytes = 0; + (void)tensor_expert_bytes(model, l->ffn_gate_exps, 0, &gate_in, &gate_out, &gate_row_bytes); + (void)tensor_expert_bytes(model, l->ffn_up_exps, 0, &up_in, &up_out, &up_row_bytes); + (void)tensor_expert_bytes(model, l->ffn_down_exps, 0, &down_in, &down_out, &down_row_bytes); + (void)gate_in; + (void)up_in; + (void)down_in; + + ok = ds4_gpu_matmul_f32_tensor(g->batch_router_logits, + model->map, + model->size, + l->ffn_gate_inp->abs_offset, + DS4_N_EMBD, + DS4_N_EXPERT, + g->batch_ffn_norm, + n_tokens) != 0; + if (ok) ok = ds4_gpu_glm_router_select_batch_tensor(g->batch_router_selected, + g->batch_router_weights, + g->batch_router_probs, + model->map, + model->size, + l->ffn_exp_probs_b->abs_offset, + g->batch_router_logits, + DS4_N_EXPERT, + DS4_N_EXPERT_USED, + DS4_EXPERT_WEIGHT_SCALE, + n_tokens) != 0; + if (ok) ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_ffn", + "router", + il, + pos0, + n_tokens, + stage_t0); + if (ok) ok = glm_graph_profile_router_selection_batch(g, + l, + il, + pos0, + n_tokens); + const bool tp_batch_split_ffn = g->tp_world == 2; + if (ok && tp_batch_split_ffn) { + ok = glm_graph_tp_batch_bounce_ready(g, n_tokens); + } + if (n_tokens <= 8u && (glm_decode_ablate_mask() & DS4_GLM_ABLATE_ROUTED)) { /* ablate: keep the gate */ } else + if (ok) ok = glm_graph_routed_moe_batch_dispatch( + g, + model, + l, + il, + tp_batch_split_ffn ? g->tp_bounce_out : g->batch_ffn_out, + g->batch_ffn_mid, + gate_out * gate_row_bytes, + gate_row_bytes, + up_out * up_row_bytes, + up_row_bytes, + down_out * down_row_bytes, + down_row_bytes, + g->batch_router_selected, + g->batch_router_weights, + g->batch_ffn_norm, + n_tokens, + (uint32_t)g->ffn_mid_elems, + false) != 0; + if (ok && g->tp_world == 2) { + ok = glm_graph_tp_batch_ffn_combine(g, il, g->batch_ffn_out, n_tokens); + if (!ok) fprintf(stderr, "ds4: GLM TP batch gate failed (layer %u)\n", il); + } + if (ok) ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_ffn", + "routed_moe", + il, + pos0, + n_tokens, + stage_t0); + if (ok) { + const bool fused_shared = glm_graph_shared_gate_up_swiglu_q8_0_tensor( + g->batch_ffn_gate, + g->batch_ffn_up, + g->batch_shared_mid, + model, + l->ffn_gate_shexp->abs_offset, + l->ffn_up_shexp->abs_offset, + DS4_N_EMBD, + DS4_N_FF_EXP, + g->batch_ffn_norm, + n_tokens, + 0.0f); + if (fused_shared) { + ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_ffn", + "shared_gate_up_swiglu", + il, + pos0, + n_tokens, + stage_t0); + } else { + ok = glm_graph_matmul_q8_0_tensor(g->batch_ffn_gate, + model, + l->ffn_gate_shexp->abs_offset, + DS4_N_EMBD, + DS4_N_FF_EXP, + g->batch_ffn_norm, + n_tokens); + if (ok) ok = glm_graph_matmul_q8_0_tensor(g->batch_ffn_up, + model, + l->ffn_up_shexp->abs_offset, + DS4_N_EMBD, + DS4_N_FF_EXP, + g->batch_ffn_norm, + n_tokens); + if (ok) ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_ffn", + "shared_gate_up", + il, + pos0, + n_tokens, + stage_t0); + if (ok) ok = ds4_gpu_swiglu_tensor(g->batch_shared_mid, + g->batch_ffn_gate, + g->batch_ffn_up, + n_tokens * DS4_N_FF_EXP, + 0.0f, + 1.0f) != 0; + if (ok) ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_ffn", + "shared_swiglu", + il, + pos0, + n_tokens, + stage_t0); + } + } + if (ok) ok = glm_graph_matmul_q8_0_tensor(g->batch_attn_out, + model, + l->ffn_down_shexp->abs_offset, + DS4_N_FF_EXP, + DS4_N_EMBD, + g->batch_shared_mid, + n_tokens); + if (ok) ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_ffn", + "shared_down", + il, + pos0, + n_tokens, + stage_t0); + if (ok && !glm_graph_disable_add3_residual()) { + ok = ds4_gpu_add3_tensor(next, + after_attn, + g->batch_ffn_out, + g->batch_attn_out, + (uint32_t)residual_elems) != 0; + } else if (ok) { + ok = ds4_gpu_add_tensor(g->batch_heads, + g->batch_ffn_out, + g->batch_attn_out, + (uint32_t)residual_elems) != 0; + if (ok) ok = ds4_gpu_add_tensor(next, + after_attn, + g->batch_heads, + (uint32_t)residual_elems) != 0; + } + if (ok) ok = glm_graph_prefill_stage_boundary(stage_profile, + stage_sync, + "glm_ffn", + "residual", + il, + pos0, + n_tokens, + stage_t0); + return ok; +} + + +static bool glm_graph_begin_commands_if_needed(void); + +/* ------------------------------------------------------------------------ + * GLM MTP (nextn block) drafting. + * + * blk.(N_LAYER-1) is GLM 5.2's multi-token-prediction block: a full + * attention+MoE layer fed with eh_proj(concat(enorm(embed(token[p+1])), + * hnorm(h[p]))), predicting token[p+2] through the shared output head. + * It keeps a private compact KV cache (slot = absolute position; only + * positions >= mtp_min_pos are ever selected, so the unwritten prompt + * range is never read). Under TP the routed experts are combined over + * the BIG-gate exchange, never the decode row gate, so the RDMA row-gate + * schedule stays intact. + * --------------------------------------------------------------------- */ +static bool glm_graph_mtp_ensure(ds4_glm_gpu_graph *g) { + if (g->mtp_ready) return true; + if (g->compact_cache_cap == 0) return false; + const uint64_t elem = glm_graph_compact_cache_elem_bytes(); + const uint64_t kv_bytes = (uint64_t)g->compact_cache_cap * DS4_N_KV_LORA * elem; + const uint64_t rope_bytes = (uint64_t)g->compact_cache_cap * DS4_N_ROT * elem; + g->mtp_kv_lora_cache = ds4_gpu_tensor_alloc(kv_bytes); + g->mtp_k_rope_cache = ds4_gpu_tensor_alloc(rope_bytes); + g->mtp_concat = ds4_gpu_tensor_alloc(2ull * DS4_N_EMBD * sizeof(float)); + g->mtp_selected = ds4_gpu_tensor_alloc((uint64_t)g->compact_cache_cap * sizeof(int32_t)); + g->mtp_logits_host = malloc((size_t)DS4_N_VOCAB * sizeof(float)); + if (!g->mtp_kv_lora_cache || !g->mtp_k_rope_cache || !g->mtp_concat || + !g->mtp_selected || !g->mtp_logits_host) { + return false; + } + g->mtp_ready = 1; + return true; +} + +/* One MTP step at (absolute) position pos: consumes the main model's last + * hidden h[pos] (expected in g->cur, pre output-norm) and next_token + * (= token[pos+1]), writes the nextn KV at slot pos, and returns the + * drafted token[pos+2] by greedy argmax. Clobbers the decode scratch. */ +static bool glm_graph_mtp_step( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + int next_token, + uint32_t pos, + uint32_t min_pos, + int *draft_out) { + if (!g || !model || !weights || !draft_out) return false; + if (DS4_N_NEXTN_PREDICT == 0) return false; + if (!glm_graph_mtp_ensure(g)) { + fprintf(stderr, "ds4: glm mtp: ensure failed (cap %u)\n", g->compact_cache_cap); + return false; + } + if (pos >= g->compact_cache_cap || min_pos > pos) { + fprintf(stderr, "ds4: glm mtp: pos %u/min %u out of range (cap %u)\n", + pos, min_pos, g->compact_cache_cap); + return false; + } + const uint32_t il = DS4_N_LAYER - DS4_N_NEXTN_PREDICT; + const ds4_layer_weights *l = &weights->layer[il]; + if (!l->nextn_eh_proj || !l->nextn_enorm || !l->nextn_hnorm || + !l->nextn_shared_head_norm || !l->ffn_gate_exps) { + fprintf(stderr, "ds4: glm mtp: nextn weights missing at layer %u\n", il); + return false; + } + const uint32_t kv_raw_dim = (uint32_t)l->attn_kv_a_mqa->dim[1]; + const float rope_base = layer_rope_freq_base(il); + const float rope_scale = layer_rope_freq_scale(il); + const uint32_t n_selected = pos - min_pos + 1u; + + /* Draft attention window: absolute cache slots [min_pos..pos]. */ + { + int32_t *sel = malloc((size_t)n_selected * sizeof(int32_t)); + if (!sel) return false; + for (uint32_t i = 0; i < n_selected; i++) sel[i] = (int32_t)(min_pos + i); + const int wr = ds4_gpu_tensor_write(g->mtp_selected, 0, sel, + (uint64_t)n_selected * sizeof(int32_t)); + free(sel); + if (!wr) { + fprintf(stderr, "ds4: glm mtp: selected write failed (%u)\n", n_selected); + return false; + } + } + + ds4_gpu_tensor *enorm_view = + ds4_gpu_tensor_view(g->mtp_concat, 0, (uint64_t)DS4_N_EMBD * sizeof(float)); + ds4_gpu_tensor *hnorm_view = + ds4_gpu_tensor_view(g->mtp_concat, + (uint64_t)DS4_N_EMBD * sizeof(float), + (uint64_t)DS4_N_EMBD * sizeof(float)); + if (!enorm_view || !hnorm_view) { + ds4_gpu_tensor_free(enorm_view); + ds4_gpu_tensor_free(hnorm_view); + fprintf(stderr, "ds4: glm mtp: concat views failed\n"); + return false; + } + + const char *mtp_stage = "begin"; +#define DS4_GLM_MTP_STAGE(name_) do { if (ok) mtp_stage = (name_); } while (0) + bool ok = glm_graph_begin_commands_if_needed(); + /* MTP input: concat(enorm(embed(next_token)), hnorm(h)) -> eh_proj. */ + if (ok) ok = ds4_gpu_embed_token_quant_tensor(g->next, + model->map, + model->size, + weights->token_embd->abs_offset, + weights->token_embd->type, + DS4_N_VOCAB, + (uint32_t)next_token, + DS4_N_EMBD) != 0; + DS4_GLM_MTP_STAGE("enorm"); + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(enorm_view, + g->next, + model->map, + model->size, + l->nextn_enorm->abs_offset, + DS4_N_EMBD, + DS4_RMS_EPS) != 0; + DS4_GLM_MTP_STAGE("hnorm"); + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(hnorm_view, + g->cur, + model->map, + model->size, + l->nextn_hnorm->abs_offset, + DS4_N_EMBD, + DS4_RMS_EPS) != 0; + DS4_GLM_MTP_STAGE("eh_proj"); + if (ok) ok = glm_graph_matmul_q8_0_decode_tensor(g->cur, + model, + l->nextn_eh_proj->abs_offset, + 2ull * DS4_N_EMBD, + DS4_N_EMBD, + g->mtp_concat, + false); + /* nextn attention (full causal over the MTP window, no indexer). */ + DS4_GLM_MTP_STAGE("attn_norm"); + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(g->attn_norm, + g->cur, + model->map, + model->size, + l->attn_norm->abs_offset, + DS4_N_EMBD, + DS4_RMS_EPS) != 0; + DS4_GLM_MTP_STAGE("q_a"); + if (ok) ok = glm_graph_matmul_q8_0_decode_tensor(g->q_rank, + model, + l->attn_q_a->abs_offset, + DS4_N_EMBD, + DS4_N_LORA_Q, + g->attn_norm, + false); + DS4_GLM_MTP_STAGE("q_a_norm"); + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(g->q_rank_norm, + g->q_rank, + model->map, + model->size, + l->attn_q_a_norm->abs_offset, + DS4_N_LORA_Q, + DS4_RMS_EPS) != 0; + DS4_GLM_MTP_STAGE("q_b"); + if (ok) ok = glm_graph_matmul_q8_0_decode_tensor(g->q, + model, + l->attn_q_b->abs_offset, + DS4_N_LORA_Q, + g->q_dim, + g->q_rank_norm, + false); + DS4_GLM_MTP_STAGE("rope"); + if (ok) ok = ds4_gpu_glm_rope_tail_tensor(g->q, + 1, + DS4_N_HEAD, + DS4_N_KEY_MLA, + DS4_N_ROT, + pos, + 0, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW) != 0; + DS4_GLM_MTP_STAGE("kv_a"); + if (ok) ok = glm_graph_matmul_q8_0_decode_tensor(g->kv_raw, + model, + l->attn_kv_a_mqa->abs_offset, + DS4_N_EMBD, + kv_raw_dim, + g->attn_norm, + false); + DS4_GLM_MTP_STAGE("kv_norm"); + if (ok) ok = ds4_gpu_glm_kv_lora_rms_norm_tensor(g->kv_norm, + g->kv_raw, + model->map, + model->size, + l->attn_kv_a_norm->abs_offset, + 1, + kv_raw_dim, + DS4_N_KV_LORA, + DS4_RMS_EPS) != 0; + DS4_GLM_MTP_STAGE("kv_store"); + if (ok) ok = ds4_gpu_glm_store_compact_kv_tensor(g->mtp_kv_lora_cache, + g->mtp_k_rope_cache, + g->kv_norm, + g->kv_raw, + pos, + 1, + g->compact_cache_cap, + kv_raw_dim, + DS4_N_KV_LORA, + DS4_N_ROT, + glm_graph_compact_cache_is_f16()) != 0; + DS4_GLM_MTP_STAGE("qk_low"); + if (ok) ok = ds4_gpu_glm_qk_lowrank_typed_tensor(g->qk_low, + g->q, + model->map, + model->size, + l->attn_k_b->abs_offset, + l->attn_k_b->type, + DS4_N_HEAD, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_KEY_MLA) != 0; + DS4_GLM_MTP_STAGE("attention"); + if (ok) ok = ds4_gpu_glm_attention_indexed_decode_typed_tensor(g->heads, + g->q, + g->qk_low, + g->mtp_kv_lora_cache, + g->mtp_k_rope_cache, + model->map, + model->size, + l->attn_v_b->abs_offset, + l->attn_v_b->type, + g->mtp_selected, + n_selected, + g->compact_cache_cap, + glm_graph_compact_cache_is_f16(), + DS4_N_HEAD, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_ROT, + DS4_N_VALUE_MLA, + 0, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW) != 0; + DS4_GLM_MTP_STAGE("attn_out"); + if (ok) ok = glm_graph_matmul_q8_0_decode_tensor(g->attn_out, + model, + l->attn_output->abs_offset, + g->heads_dim, + DS4_N_EMBD, + g->heads, + false); + DS4_GLM_MTP_STAGE("ffn_norm"); + if (ok) ok = ds4_gpu_add_rms_norm_weight_tensor(g->ffn_norm, + g->after_attn, + g->cur, + g->attn_out, + model->map, + model->size, + l->ffn_norm->abs_offset, + DS4_N_EMBD, + DS4_RMS_EPS) != 0; + /* nextn sparse FFN: router + split routed experts (BIG-gate combine + * under TP) + shared expert. */ + DS4_GLM_MTP_STAGE("router"); + if (ok) ok = ds4_gpu_matmul_f32_tensor(g->router_logits, + model->map, + model->size, + l->ffn_gate_inp->abs_offset, + DS4_N_EMBD, + DS4_N_EXPERT, + g->ffn_norm, + 1) != 0; + DS4_GLM_MTP_STAGE("router_select"); + if (ok) ok = ds4_gpu_glm_router_select_tensor(g->router_selected, + g->router_weights, + g->router_probs, + model->map, + model->size, + l->ffn_exp_probs_b->abs_offset, + g->router_logits, + DS4_N_EXPERT, + DS4_N_EXPERT_USED, + DS4_EXPERT_WEIGHT_SCALE) != 0; + DS4_GLM_MTP_STAGE("routed"); + if (ok) { + uint64_t gate_in = 0, gate_out = 0, gate_row_bytes = 0; + uint64_t up_in = 0, up_out = 0, up_row_bytes = 0; + uint64_t down_in = 0, down_out = 0, down_row_bytes = 0; + (void)tensor_expert_bytes(model, l->ffn_gate_exps, 0, &gate_in, &gate_out, &gate_row_bytes); + (void)tensor_expert_bytes(model, l->ffn_up_exps, 0, &up_in, &up_out, &up_row_bytes); + (void)tensor_expert_bytes(model, l->ffn_down_exps, 0, &down_in, &down_out, &down_row_bytes); + const bool tp_split = g->tp_world == 2 && g->tp_out && g->tp_in; + ds4_gpu_tensor *routed_dst = g->ffn_out; + if (tp_split) { + ok = glm_graph_tp_batch_bounce_ready(g, 1); + routed_dst = g->tp_bounce_out; + } + if (ok) ok = glm_graph_routed_moe_one_dispatch(g, + model, + l, + il, + routed_dst, + g->ffn_mid, + gate_out * gate_row_bytes, + gate_row_bytes, + up_out * up_row_bytes, + up_row_bytes, + down_out * down_row_bytes, + down_row_bytes, + g->router_selected, + g->router_weights, + g->ffn_norm, + false) != 0; + if (ok && tp_split) { + ok = glm_graph_tp_batch_ffn_combine(g, il, g->ffn_out, 1); + } + } + DS4_GLM_MTP_STAGE("shared"); + if (ok) ok = glm_graph_encode_shared_swiglu_one(g->ffn_mid, + g->ffn_gate, + g->ffn_up, + model, + l, + il, + pos, + g->ffn_norm, + false, + false, + NULL); + DS4_GLM_MTP_STAGE("shared_down"); + if (ok) ok = glm_graph_matmul_q8_0_decode_tensor(g->ffn_sum, + model, + l->ffn_down_shexp->abs_offset, + DS4_N_FF_EXP, + DS4_N_EMBD, + g->ffn_mid, + false); + DS4_GLM_MTP_STAGE("residual"); + if (ok) ok = ds4_gpu_add3_tensor(g->next, + g->after_attn, + g->ffn_out, + g->ffn_sum, + DS4_N_EMBD) != 0; + /* Shared output head behind the nextn head norm. */ + DS4_GLM_MTP_STAGE("head_norm"); + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(g->output_norm, + g->next, + model->map, + model->size, + l->nextn_shared_head_norm->abs_offset, + DS4_N_EMBD, + DS4_RMS_EPS) != 0; + DS4_GLM_MTP_STAGE("head"); + if (ok) ok = glm_graph_matmul_q8_0_decode_tensor(g->logits, + model, + weights->output->abs_offset, + DS4_N_EMBD, + DS4_N_VOCAB, + g->output_norm, + false); + DS4_GLM_MTP_STAGE("end"); + if (ok) ok = ds4_gpu_end_commands() != 0; + else (void)ds4_gpu_synchronize(); + if (ok) { + ok = ds4_gpu_tensor_read(g->logits, + 0, + g->mtp_logits_host, + (uint64_t)DS4_N_VOCAB * sizeof(float)) != 0; + } + ds4_gpu_tensor_free(enorm_view); + ds4_gpu_tensor_free(hnorm_view); + if (!ok) { + fprintf(stderr, "ds4: glm mtp step failed at stage '%s' (pos %u)\n", + mtp_stage, pos); + return false; + } +#undef DS4_GLM_MTP_STAGE + int best = 0; + float best_v = g->mtp_logits_host[0]; + for (uint32_t i = 1; i < DS4_N_VOCAB; i++) { + if (g->mtp_logits_host[i] > best_v) { + best_v = g->mtp_logits_host[i]; + best = (int)i; + } + } + *draft_out = best; + return true; +} + +static bool glm_graph_forward_token( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + int token, + const float *input_hc, + uint32_t pos, + float *output_hc, + float *logits_out); + + +/* Decode-style verify pass for tiny row counts (MTP): the indexed batch + * fn measures ~1.4ms/layer at n=2 (gate-profile: gpu-wait 1.22ms/layer) + * while decode does the same math in 0.79ms. This pass mirrors the + * decode encoders at n rows over the batch scratch, attends causally + * over the compact caches (valid while pos+n fits the indexer window), + * and reuses the batch FFN encoder (routed split + big-gate combine). + * KV/indexer caches are updated exactly like the indexed batch path. */ +static bool glm_graph_verify_rows( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + const int *tokens, + uint32_t pos, + uint32_t n, + float *output_hc, + float *logits_out) { + if (!g || !model || !weights || !tokens || n == 0 || + g->compact_cache_cap == 0 || + pos + n > g->compact_cache_cap || + !g->batch_cur || !g->batch_next || !g->prefill_tokens) { + return false; + } + const uint32_t executable = glm_graph_normal_layer_count(); + ds4_gpu_tensor *cur = g->batch_cur; + ds4_gpu_tensor *nxt = g->batch_next; + if (!ds4_gpu_tensor_write(g->prefill_tokens, 0, tokens, + (uint64_t)n * sizeof(int32_t))) { + return false; + } + bool ok = glm_graph_begin_commands_if_needed(); + if (ok) ok = ds4_gpu_embed_tokens_quant_tensor(cur, + g->prefill_tokens, + model->map, + model->size, + weights->token_embd->abs_offset, + weights->token_embd->type, + DS4_N_VOCAB, + n, + DS4_N_EMBD) != 0; + for (uint32_t il = 0; ok && il < executable; il++) { + const ds4_layer_weights *l = &weights->layer[il]; + const uint32_t kv_raw_dim = (uint32_t)l->attn_kv_a_mqa->dim[1]; + const float rope_base = layer_rope_freq_base(il); + const float rope_scale = layer_rope_freq_scale(il); + ok = ds4_gpu_rms_norm_weight_rows_tensor(g->batch_attn_norm, + cur, + model->map, + model->size, + l->attn_norm->abs_offset, + DS4_N_EMBD, + n, + DS4_RMS_EPS) != 0; + if (ok) ok = glm_graph_matmul_q8_0_tensor(g->batch_q_rank, + model, + l->attn_q_a->abs_offset, + DS4_N_EMBD, + DS4_N_LORA_Q, + g->batch_attn_norm, + n); + if (ok) ok = ds4_gpu_rms_norm_weight_rows_tensor(g->batch_q_rank_norm, + g->batch_q_rank, + model->map, + model->size, + l->attn_q_a_norm->abs_offset, + DS4_N_LORA_Q, + n, + DS4_RMS_EPS) != 0; + if (ok) ok = glm_graph_matmul_q8_0_tensor(g->batch_q, + model, + l->attn_q_b->abs_offset, + DS4_N_LORA_Q, + g->q_dim, + g->batch_q_rank_norm, + n); + if (ok) ok = ds4_gpu_glm_rope_tail_tensor(g->batch_q, + n, + DS4_N_HEAD, + DS4_N_KEY_MLA, + DS4_N_ROT, + pos, + 0, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW) != 0; + if (ok && glm_graph_layer_uses_full_indexer(il)) { + ok = glm_graph_matmul_q8_0_tensor(g->batch_indexer_k, + model, + l->indexer_attn_k->abs_offset, + DS4_N_EMBD, + DS4_N_INDEXER_HEAD_DIM, + cur, + n); + if (ok) ok = ds4_gpu_glm_store_indexer_k_tensor( + g->layer_indexer_key_cache[il], + g->batch_indexer_k, + model->map, + model->size, + l->indexer_k_norm->abs_offset, + l->indexer_k_norm_b->abs_offset, + pos, + n, + g->compact_cache_cap, + DS4_N_INDEXER_HEAD_DIM, + DS4_N_ROT, + 0, + 1.0e-6f, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW, + glm_graph_compact_cache_is_f16()) != 0; + } + if (ok) ok = glm_graph_matmul_q8_0_tensor(g->batch_kv_raw, + model, + l->attn_kv_a_mqa->abs_offset, + DS4_N_EMBD, + kv_raw_dim, + g->batch_attn_norm, + n); + if (ok) ok = ds4_gpu_glm_kv_lora_rms_norm_tensor(g->batch_kv_norm, + g->batch_kv_raw, + model->map, + model->size, + l->attn_kv_a_norm->abs_offset, + n, + kv_raw_dim, + DS4_N_KV_LORA, + DS4_RMS_EPS) != 0; + if (ok) ok = ds4_gpu_glm_store_compact_kv_tensor(g->layer_kv_lora_cache[il], + g->layer_k_rope_cache[il], + g->batch_kv_norm, + g->batch_kv_raw, + pos, + n, + g->compact_cache_cap, + kv_raw_dim, + DS4_N_KV_LORA, + DS4_N_ROT, + glm_graph_compact_cache_is_f16()) != 0; + if (ok) ok = ds4_gpu_glm_qk_lowrank_typed_batch_tensor(g->batch_qk_low, + g->batch_q, + model->map, + model->size, + l->attn_k_b->abs_offset, + l->attn_k_b->type, + n, + DS4_N_HEAD, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_KEY_MLA) != 0; + if (ok) ok = ds4_gpu_glm_attention_indexed_batch_lora_causal_tensor( + g->batch_attn_lora, + g->batch_q, + g->batch_qk_low, + g->layer_kv_lora_cache[il], + g->layer_k_rope_cache[il], + n, + pos, + pos + n, + g->compact_cache_cap, + glm_graph_compact_cache_is_f16(), + DS4_N_HEAD, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_ROT, + 0, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW) != 0; + if (ok) ok = ds4_gpu_glm_value_project_typed_batch_heads_tensor( + g->batch_heads, + g->batch_attn_lora, + model->map, + model->size, + l->attn_v_b->abs_offset, + l->attn_v_b->type, + n, + DS4_N_HEAD, + DS4_N_KV_LORA, + DS4_N_VALUE_MLA) != 0; + if (ok) ok = glm_graph_matmul_q8_0_tensor(g->batch_attn_out, + model, + l->attn_output->abs_offset, + g->heads_dim, + DS4_N_EMBD, + g->batch_heads, + n); + if (ok) ok = ds4_gpu_add_tensor(g->batch_after_attn, + cur, + g->batch_attn_out, + (uint32_t)((uint64_t)n * DS4_N_EMBD)) != 0; + if (ok) ok = glm_graph_encode_ffn_batch(g, + model, + l, + il, + pos, + g->batch_after_attn, + nxt, + n, + false, + false, + NULL); + if (ok) { + ds4_gpu_tensor *tmp = cur; + cur = nxt; + nxt = tmp; + } + } + if (ok) ok = ds4_gpu_end_commands() != 0; + else (void)ds4_gpu_synchronize(); + if (ok && output_hc) { + ok = ds4_gpu_tensor_read(cur, + 0, + output_hc, + (uint64_t)n * DS4_N_EMBD * sizeof(float)) != 0; + } + if (ok && logits_out) { + ds4_gpu_tensor *last = glm_graph_tensor_row_view_strided(cur, + n - 1u, + DS4_N_EMBD, + DS4_N_EMBD); + ok = last != NULL && + glm_graph_forward_output_head(g, model, weights, last, logits_out); + ds4_gpu_tensor_free(last); + } + return ok; +} + +static bool glm_graph_forward_tokens( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + const int *tokens, + const float *input_hc, + uint32_t pos0, + uint32_t n_tokens, + float *output_hc, + float *logits_out, + ds4_session_progress_fn display_progress, + void *display_progress_ud, + uint32_t display_absolute_base, + uint32_t work_done_base, + uint32_t work_total) { + if (!g || !model || !weights || !tokens || + n_tokens == 0 || + g->layer_count == 0 || + !glm_graph_span_fits_context(g, pos0, n_tokens)) { + return false; + } + if (!glm_graph_span_fits_full_attention(g, pos0, n_tokens)) { + glm_graph_log_full_attention_limit(g, pos0, n_tokens); + return false; + } + if (!g->full_kv_cache) { + fprintf(stderr, + "ds4: GLM full-attention prefill was requested without an expanded KV cache\n"); + return false; + } + for (uint32_t i = 0; i < n_tokens; i++) { + if (tokens[i] < 0 || tokens[i] >= (int)DS4_N_VOCAB) return false; + } + if (!input_hc && !g->has_token_embd) return false; + if (logits_out && !g->has_output_head) return false; + const uint32_t n_rows = pos0 + n_tokens; + const bool trace = glm_graph_full_prefill_trace_enabled(); + const bool trace_all = trace && glm_graph_full_prefill_trace_all(); + const double trace_slow_ms = trace ? + (double)glm_graph_full_prefill_trace_slow_ms() : 0.0; + const double trace_chunk_t0 = trace ? now_sec() : 0.0; + if (trace) { + glm_graph_full_prefill_tracef( + "chunk begin pos=%u tokens=%u rows=%u compact_cap=%u work_base=%u work_total=%u", + pos0, + n_tokens, + n_rows, + g->compact_cache_cap, + work_done_base, + work_total); + } + if (g->compact_cache_cap != 0) { + const double trace_cache_t0 = trace ? now_sec() : 0.0; + if (!glm_graph_ensure_compact_cache(g, n_rows)) { + if (trace) { + glm_graph_full_prefill_tracef( + "ensure_cache failed pos=%u tokens=%u rows=%u compact_cap=%u", + pos0, + n_tokens, + n_rows, + g->compact_cache_cap); + } + return false; + } + if (trace) { + const double ms = (now_sec() - trace_cache_t0) * 1000.0; + if (trace_all || ms >= trace_slow_ms) { + glm_graph_full_prefill_tracef( + "ensure_cache done pos=%u tokens=%u rows=%u compact_cap=%u %.3f ms", + pos0, + n_tokens, + n_rows, + g->compact_cache_cap, + ms); + } + } + } + + const double trace_upload_t0 = trace ? now_sec() : 0.0; + bool ok = glm_graph_upload_tokens(g->prefill_tokens, tokens, n_tokens); + if (trace) { + const double ms = (now_sec() - trace_upload_t0) * 1000.0; + if (trace_all || ms >= trace_slow_ms || !ok) { + glm_graph_full_prefill_tracef( + "upload_tokens %s pos=%u tokens=%u %.3f ms", + ok ? "done" : "failed", + pos0, + n_tokens, + ms); + } + } + ds4_gpu_tensor *cur = g->batch_cur; + ds4_gpu_tensor *next = g->batch_next; + ds4_gpu_tensor *last_hidden = NULL; + + glm_graph_report_prefill_display_progress(display_progress, + display_progress_ud, + display_absolute_base, + work_done_base, + n_tokens, + 0, + g->layer_count, + work_total, + true); + + const bool stage_sync = + glm_graph_small_prefill_stage_sync(n_tokens, logits_out != NULL); + const uint32_t layer_flush_interval = stage_sync ? 0u : + glm_graph_full_prefill_layer_flush_interval(n_tokens, + n_rows, + logits_out != NULL); + const uint32_t progress_flush_interval = + glm_graph_prefill_progress_flush_interval(layer_flush_interval, + n_tokens, + display_progress, + work_total); + const bool progress_requested = display_progress && work_total > 0; + const uint32_t drain_interval = + (progress_requested && progress_flush_interval != 0) ? + glm_graph_full_prefill_drain_interval() : 0u; + metal_graph_stream_prepare_slot layer_prepare_slots[DS4_STREAM_PREFILL_MAX_PREPARE_AHEAD]; + memset(layer_prepare_slots, 0, sizeof(layer_prepare_slots)); + const bool full_layer_prefill = + glm_graph_stream_prefill_full_layer_enabled(g, n_tokens); + ds4_gpu_set_glm_streaming_prefill_full_layer(full_layer_prefill); + const bool full_layer_prepare_base = + glm_graph_stream_prefill_full_layer_prepare_enabled(g, + full_layer_prefill); + const bool layer_pagein = + full_layer_prepare_base && + getenv("DS4_METAL_ENABLE_STREAMING_PREFILL_LAYER_PAGEIN") != NULL && + getenv("DS4_METAL_DISABLE_STREAMING_PREFILL_LAYER_PAGEIN") == NULL; + const bool layer_readahead = + full_layer_prepare_base && + !layer_pagein && + getenv("DS4_METAL_ENABLE_STREAMING_PREFILL_LAYER_READAHEAD") != NULL && + getenv("DS4_METAL_DISABLE_STREAMING_PREFILL_LAYER_READAHEAD") == NULL && + getenv("DS4_METAL_DISABLE_STREAMING_PREFILL_LAYER_PREPARE") == NULL; + const bool layer_pread = + full_layer_prepare_base && + !layer_pagein && + !layer_readahead && + getenv("DS4_METAL_DISABLE_STREAMING_PREFILL_LAYER_PREAD") == NULL && + getenv("DS4_METAL_DISABLE_STREAMING_PREFILL_LAYER_PREPARE") == NULL; + const bool layer_madvise = + full_layer_prepare_base && + !layer_pagein && + !layer_pread && + !layer_readahead && + getenv("DS4_METAL_DISABLE_STREAMING_PREFILL_LAYER_PREPARE") == NULL && + getenv("DS4_METAL_DISABLE_STREAMING_PREFILL_LAYER_MADVISE") == NULL; + const bool layer_prepare = + layer_pagein || layer_pread || layer_readahead || layer_madvise; + const bool layer_prepare_overlap = + layer_prepare && + metal_graph_stream_prefill_layer_pagein_overlap_enabled(); + const bool full_layer_flush_intermediate = full_layer_prefill; + const uint32_t layer_prepare_ahead = + layer_prepare && layer_prepare_overlap ? + metal_graph_stream_prefill_layer_prepare_ahead() : 1u; + if (trace) { + glm_graph_full_prefill_tracef( + "mode pos=%u tokens=%u stage_sync=%u layer_flush_interval=%u progress_flush_interval=%u drain_interval=%u", + pos0, + n_tokens, + stage_sync ? 1u : 0u, + layer_flush_interval, + progress_flush_interval, + drain_interval); + } + if (ok && layer_prepare && g->layer_count > 0 && + !metal_graph_stream_prepare_start_if_needed(NULL, + model, + weights, + g->layer_start, + n_tokens, + layer_madvise, + layer_pread, + layer_readahead, + false, + layer_prepare_slots, + layer_prepare_ahead)) { + ok = false; + } + if (ok) { + const double t0 = trace ? now_sec() : 0.0; + if (input_hc) { + ok = ds4_gpu_tensor_write(cur, + 0, + input_hc, + (uint64_t)n_tokens * DS4_N_EMBD * sizeof(float)) != 0; + } else { + ok = glm_graph_stream_map_token(g, model, weights); + } + if (ok) ok = ds4_gpu_begin_commands() != 0; + if (trace) { + const double ms = (now_sec() - t0) * 1000.0; + if (trace_all || ms >= trace_slow_ms || !ok) { + glm_graph_full_prefill_tracef( + "begin_commands%s %s pos=%u tokens=%u %.3f ms", + input_hc ? "_from_hidden" : "", + ok ? "done" : "failed", + pos0, + n_tokens, + ms); + } + } + } + if (ok && !input_hc) { + const double t0 = trace ? now_sec() : 0.0; + ok = ds4_gpu_embed_tokens_quant_tensor(cur, + g->prefill_tokens, + model->map, + model->size, + weights->token_embd->abs_offset, + weights->token_embd->type, + DS4_N_VOCAB, + n_tokens, + DS4_N_EMBD) != 0; + if (trace) { + const double ms = (now_sec() - t0) * 1000.0; + if (trace_all || ms >= trace_slow_ms || !ok) { + glm_graph_full_prefill_tracef( + "embed %s pos=%u tokens=%u %.3f ms", + ok ? "done" : "failed", + pos0, + n_tokens, + ms); + } + } + } + if (ok && g->ssd_streaming) ok = ds4_gpu_end_commands() != 0; +#define DS4_GLM_PROFILE_PREFILL_STAGE(part_, name_) do { \ + if (ok && layer_stage_profile) { \ + ok = metal_graph_layer_stage_profile_boundary((part_), (name_), il, pos0, n_tokens, &layer_stage_t0); \ + } else if (ok && stage_sync) { \ + ok = glm_graph_prefill_stage_sync_boundary(); \ + } \ + } while (0) + for (uint32_t il = g->layer_start; ok && il <= g->layer_end; il++) { + const uint32_t slice_layer_done = il - g->layer_start + 1u; + if (layer_prepare && + !metal_graph_stream_prepare_join_layer(NULL, + model, + weights, + il, + n_tokens, + layer_madvise, + layer_pread, + layer_readahead, + false, + layer_prepare_slots, + layer_prepare_ahead)) { + ok = false; + break; + } + if (g->ssd_streaming) { + ok = glm_graph_stream_map_prefill_layer(g, + model, + weights, + il, + n_tokens, + full_layer_prefill); + if (ok && layer_prepare && layer_prepare_overlap) { + bool started_future = false; + for (uint32_t ahead = 1; ahead <= layer_prepare_ahead; ahead++) { + if (il + ahead > g->layer_end) break; + started_future = true; + if (!metal_graph_stream_prepare_start_if_needed(NULL, + model, + weights, + il + ahead, + n_tokens, + layer_madvise, + layer_pread, + layer_readahead, + false, + layer_prepare_slots, + layer_prepare_ahead)) { + ok = false; + break; + } + } + if (ok && !started_future && logits_out) { + metal_graph_stream_readahead_output(model, weights); + } + } + if (ok && !ds4_gpu_commands_active()) { + ok = ds4_gpu_begin_commands() != 0; + } + } + const ds4_layer_weights *l = &weights->layer[il]; + const uint32_t kv_raw_dim = (uint32_t)l->attn_kv_a_mqa->dim[1]; + const float rope_base = layer_rope_freq_base(il); + const float rope_scale = layer_rope_freq_scale(il); + const uint32_t cache_len = pos0 + n_tokens; + const uint64_t residual_elems = (uint64_t)n_tokens * DS4_N_EMBD; + const bool layer_stage_profile = metal_graph_layer_stage_profile_enabled(il); + double layer_stage_t0 = layer_stage_profile ? now_sec() : 0.0; + const double trace_layer_t0 = trace ? now_sec() : 0.0; + bool trace_layer_flushed = false; + if (trace && trace_all) { + glm_graph_full_prefill_tracef( + "layer begin layer=%u pos=%u tokens=%u rows=%u", + il, + pos0, + n_tokens, + n_rows); + } + if (residual_elems > UINT32_MAX) { + ok = false; + break; + } + if (layer_stage_profile) { + ok = metal_graph_layer_stage_profile_boundary("glm_attn", + NULL, + il, + pos0, + n_tokens, + &layer_stage_t0); + } + + if (ok) ok = ds4_gpu_rms_norm_weight_rows_tensor(g->batch_attn_norm, + cur, + model->map, + model->size, + l->attn_norm->abs_offset, + DS4_N_EMBD, + n_tokens, + DS4_RMS_EPS) != 0; + DS4_GLM_PROFILE_PREFILL_STAGE("glm_attn", "attn_norm"); + if (ok) ok = glm_graph_matmul_q8_0_tensor(g->batch_q_rank, + model, + l->attn_q_a->abs_offset, + DS4_N_EMBD, + DS4_N_LORA_Q, + g->batch_attn_norm, + n_tokens); + if (ok) ok = ds4_gpu_rms_norm_weight_rows_tensor(g->batch_q_rank_norm, + g->batch_q_rank, + model->map, + model->size, + l->attn_q_a_norm->abs_offset, + DS4_N_LORA_Q, + n_tokens, + DS4_RMS_EPS) != 0; + if (ok) ok = glm_graph_matmul_q8_0_tensor(g->batch_q, + model, + l->attn_q_b->abs_offset, + DS4_N_LORA_Q, + g->q_dim, + g->batch_q_rank_norm, + n_tokens); + if (ok) ok = ds4_gpu_rope_tail_tensor(g->batch_q, + n_tokens, + DS4_N_HEAD, + DS4_N_KEY_MLA, + DS4_N_ROT, + pos0, + 0, + false, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW) != 0; + DS4_GLM_PROFILE_PREFILL_STAGE("glm_attn", "q_path"); + if (ok && g->compact_cache_cap != 0 && glm_graph_layer_uses_full_indexer(il)) { + ok = glm_graph_matmul_q8_0_tensor(g->batch_indexer_k, + model, + l->indexer_attn_k->abs_offset, + DS4_N_EMBD, + DS4_N_INDEXER_HEAD_DIM, + cur, + n_tokens); + if (ok) { + ok = ds4_gpu_glm_store_indexer_k_tensor( + g->layer_indexer_key_cache[il], + g->batch_indexer_k, + model->map, + model->size, + l->indexer_k_norm->abs_offset, + l->indexer_k_norm_b->abs_offset, + pos0, + n_tokens, + g->compact_cache_cap, + DS4_N_INDEXER_HEAD_DIM, + DS4_N_ROT, + 0, + 1.0e-6f, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW, + glm_graph_compact_cache_is_f16()) != 0; + } + } + DS4_GLM_PROFILE_PREFILL_STAGE("glm_attn", "indexer_k"); + if (ok) ok = glm_graph_matmul_q8_0_tensor(g->batch_kv_raw, + model, + l->attn_kv_a_mqa->abs_offset, + DS4_N_EMBD, + kv_raw_dim, + g->batch_attn_norm, + n_tokens); + if (ok) ok = ds4_gpu_glm_kv_lora_rms_norm_tensor(g->batch_kv_norm, + g->batch_kv_raw, + model->map, + model->size, + l->attn_kv_a_norm->abs_offset, + n_tokens, + kv_raw_dim, + DS4_N_KV_LORA, + DS4_RMS_EPS) != 0; + if (ok && g->compact_cache_cap != 0) { + ok = ds4_gpu_glm_store_compact_kv_tensor(g->layer_kv_lora_cache[il], + g->layer_k_rope_cache[il], + g->batch_kv_norm, + g->batch_kv_raw, + pos0, + n_tokens, + g->compact_cache_cap, + kv_raw_dim, + DS4_N_KV_LORA, + DS4_N_ROT, + glm_graph_compact_cache_is_f16()) != 0; + } + if (ok) ok = ds4_gpu_glm_k_b_project_typed_tensor(g->batch_k_nope, + g->batch_kv_norm, + model->map, + model->size, + l->attn_k_b->abs_offset, + l->attn_k_b->type, + n_tokens, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_HEAD) != 0; + if (ok) ok = glm_graph_matmul_q8_0_tensor(g->batch_value, + model, + l->attn_v_b->abs_offset, + DS4_N_KV_LORA, + g->heads_dim, + g->batch_kv_norm, + n_tokens); + DS4_GLM_PROFILE_PREFILL_STAGE("glm_attn", "kv_path"); + const bool flash_requested = glm_graph_use_flash_attention_prefill(n_tokens); + const bool use_staged_flash_kv = + flash_requested && glm_graph_use_flash_attention_staged_kv(pos0, n_tokens, cache_len); + const bool use_flash_attn = flash_requested; + if (ok) { + if (use_staged_flash_kv) { + ok = ds4_gpu_glm_build_kv_cache_flash_tensor(g->layer_key_cache[il], + g->layer_value_cache[il], + g->batch_kv_raw, + g->batch_k_nope, + g->batch_value, + pos0, + n_tokens, + g->ctx_cap, + DS4_N_HEAD, + kv_raw_dim, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_ROT, + DS4_N_VALUE_MLA, + 0, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW, + true) != 0; + } else { + ok = ds4_gpu_glm_build_kv_cache_tensor(g->layer_key_cache[il], + g->layer_value_cache[il], + g->batch_kv_raw, + g->batch_k_nope, + g->batch_value, + pos0, + n_tokens, + g->ctx_cap, + DS4_N_HEAD, + kv_raw_dim, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_ROT, + DS4_N_VALUE_MLA, + 0, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW, + true) != 0; + } + } + DS4_GLM_PROFILE_PREFILL_STAGE("glm_attn", "kv_cache"); + if (ok) { + if (use_flash_attn) { + if (use_staged_flash_kv) { + ok = ds4_gpu_glm_attention_flash_staged_tensor(g->batch_heads, + g->batch_q, + g->layer_key_cache[il], + g->layer_value_cache[il], + pos0, + n_tokens, + cache_len, + g->ctx_cap, + DS4_N_HEAD, + DS4_N_KEY_MLA, + DS4_N_VALUE_MLA, + true) != 0; + } else { + ok = ds4_gpu_glm_attention_flash_tensor(g->batch_heads, + g->batch_q, + g->layer_key_cache[il], + g->layer_value_cache[il], + pos0, + n_tokens, + cache_len, + g->ctx_cap, + DS4_N_HEAD, + DS4_N_KEY_MLA, + DS4_N_VALUE_MLA, + true) != 0; + } + } else { + ok = ds4_gpu_glm_attention_full_tensor(g->batch_heads, + g->batch_q, + g->layer_key_cache[il], + g->layer_value_cache[il], + pos0, + n_tokens, + cache_len, + g->ctx_cap, + DS4_N_HEAD, + DS4_N_KEY_MLA, + DS4_N_VALUE_MLA, + true) != 0; + } + } + DS4_GLM_PROFILE_PREFILL_STAGE("glm_attn", "attention"); + if (ok) ok = glm_graph_matmul_q8_0_tensor(g->batch_attn_out, + model, + l->attn_output->abs_offset, + g->heads_dim, + DS4_N_EMBD, + g->batch_heads, + n_tokens); + if (ok) ok = ds4_gpu_add_tensor(g->batch_after_attn, + cur, + g->batch_attn_out, + (uint32_t)residual_elems) != 0; + DS4_GLM_PROFILE_PREFILL_STAGE("glm_attn", "attn_output"); + if (ok) ok = glm_graph_encode_ffn_batch(g, + model, + l, + il, + pos0, + g->batch_after_attn, + next, + n_tokens, + layer_stage_profile, + stage_sync, + layer_stage_profile ? &layer_stage_t0 : NULL); + if (ok) { + ds4_gpu_tensor *tmp = cur; + cur = next; + next = tmp; + } + if (ok && glm_debug_hidden_dump_layer_match(il)) { + ok = ds4_gpu_end_commands() != 0; + if (ok) { + for (uint32_t r = 0; r < n_tokens; r++) + glm_debug_dump_hidden_layer(cur, r, il, pos0 + r); + glm_debug_dump_raw_layer(g->batch_router_selected, "sel", + (uint64_t)n_tokens * DS4_N_EXPERT_USED * sizeof(int32_t), + il, -1); + glm_debug_dump_raw_layer(g->batch_router_weights, "selw", + (uint64_t)n_tokens * DS4_N_EXPERT_USED * sizeof(float), + il, -1); + ok = ds4_gpu_begin_commands() != 0; + } + } + if (ok && + !g->ssd_streaming && + progress_flush_interval != 0 && + (il < g->layer_end || progress_requested) && + (slice_layer_done % progress_flush_interval) == 0) { + const uint32_t work_done = + work_done_base + (uint32_t)(((uint64_t)n_tokens * slice_layer_done) / g->layer_count); + const bool drain_now = + drain_interval != 0 && + il < g->layer_end && + (slice_layer_done % drain_interval) == 0; + const char *command_action = drain_now ? "drain" : "flush"; + const double trace_command_t0 = trace ? now_sec() : 0.0; + if (trace && (trace_all || drain_now)) { + glm_graph_full_prefill_tracef( + "layer %s begin layer=%u pos=%u tokens=%u work=%u/%u", + command_action, + il, + pos0, + n_tokens, + work_done, + work_total); + } + if (drain_now) { + ok = ds4_gpu_end_commands() != 0; + if (ok) ok = ds4_gpu_begin_commands() != 0; + } else { + ok = ds4_gpu_flush_commands() != 0; + } + if (trace) { + const double trace_command_done = now_sec(); + const double command_ms = (trace_command_done - trace_command_t0) * 1000.0; + const double layer_ms = (trace_command_done - trace_layer_t0) * 1000.0; + trace_layer_flushed = true; + if (trace_all || drain_now || + command_ms >= trace_slow_ms || layer_ms >= trace_slow_ms || !ok) { + glm_graph_full_prefill_tracef( + "layer %s %s layer=%u pos=%u tokens=%u command=%.3f ms layer_total=%.3f ms work=%u/%u", + command_action, + ok ? "done" : "failed", + il, + pos0, + n_tokens, + command_ms, + layer_ms, + work_done, + work_total); + } + } + if (ok) { + const bool progress_completed = + drain_interval == 0 || drain_now; + if (progress_completed) { + glm_graph_report_prefill_display_progress(display_progress, + display_progress_ud, + display_absolute_base, + work_done_base, + n_tokens, + slice_layer_done, + g->layer_count, + work_total, + logits_out == NULL && output_hc == NULL); + } + } + } + if (g->ssd_streaming) { + if (ok && full_layer_flush_intermediate && + il < g->layer_end) { + ok = ds4_gpu_flush_commands() != 0; + } else if (ok) { + ok = ds4_gpu_end_commands() != 0; + } + else (void)ds4_gpu_synchronize(); + if (ok) { + glm_graph_report_prefill_display_progress(display_progress, + display_progress_ud, + display_absolute_base, + work_done_base, + n_tokens, + slice_layer_done, + g->layer_count, + work_total, + logits_out == NULL && output_hc == NULL); + } + } + if (ok && + g->ssd_streaming && + layer_prepare && + !layer_prepare_overlap) { + if (il < g->layer_end) { + if (!metal_graph_stream_prepare_start_if_needed(NULL, + model, + weights, + il + 1u, + n_tokens, + layer_madvise, + layer_pread, + layer_readahead, + false, + layer_prepare_slots, + layer_prepare_ahead)) { + ok = false; + } + } else if (logits_out) { + metal_graph_stream_readahead_output(model, weights); + } + } + if (trace && ok) { + const double layer_ms = (now_sec() - trace_layer_t0) * 1000.0; + if (trace_all || (!trace_layer_flushed && layer_ms >= trace_slow_ms)) { + glm_graph_full_prefill_tracef( + "layer end layer=%u pos=%u tokens=%u flushed=%u layer_total=%.3f ms", + il, + pos0, + n_tokens, + trace_layer_flushed ? 1u : 0u, + layer_ms); + } + } + } +#undef DS4_GLM_PROFILE_PREFILL_STAGE + if (ok && !g->ssd_streaming) { + const double trace_end_t0 = trace ? now_sec() : 0.0; + if (trace) { + glm_graph_full_prefill_tracef( + "chunk end_commands begin pos=%u tokens=%u", + pos0, + n_tokens); + } + ok = ds4_gpu_end_commands() != 0; + if (trace) { + const double end_ms = (now_sec() - trace_end_t0) * 1000.0; + const double chunk_ms = (now_sec() - trace_chunk_t0) * 1000.0; + glm_graph_full_prefill_tracef( + "chunk end_commands %s pos=%u tokens=%u end=%.3f ms chunk_total=%.3f ms", + ok ? "done" : "failed", + pos0, + n_tokens, + end_ms, + chunk_ms); + } + } else if (!ok) { + if (trace) { + glm_graph_full_prefill_tracef( + "chunk failed before end pos=%u tokens=%u elapsed=%.3f ms", + pos0, + n_tokens, + (now_sec() - trace_chunk_t0) * 1000.0); + } + if (layer_prepare) { + (void)metal_graph_stream_prepare_join_all(layer_prepare_slots, + layer_prepare_ahead); + } + (void)ds4_gpu_synchronize(); + } + if (ok && layer_prepare && + !metal_graph_stream_prepare_join_all(layer_prepare_slots, + layer_prepare_ahead)) { + ok = false; + } + if (ok) { + glm_graph_report_prefill_display_progress(display_progress, + display_progress_ud, + display_absolute_base, + work_done_base, + n_tokens, + g->layer_count, + g->layer_count, + work_total, + logits_out == NULL && output_hc == NULL); + } + if (ok && output_hc) { + ok = ds4_gpu_tensor_read(cur, + 0, + output_hc, + (uint64_t)n_tokens * DS4_N_EMBD * sizeof(float)) != 0; + } + if (ok && logits_out) { + last_hidden = glm_graph_tensor_row_view_strided(cur, + n_tokens - 1u, + DS4_N_EMBD, + DS4_N_EMBD); + ok = last_hidden != NULL; + if (ok && g->ssd_streaming) ok = glm_graph_stream_map_output(g, model, weights); + if (ok) ok = glm_graph_forward_output_head(g, model, weights, last_hidden, logits_out); + if (ok) { + glm_graph_report_prefill_display_progress(display_progress, + display_progress_ud, + display_absolute_base, + work_done_base, + n_tokens, + g->layer_count, + g->layer_count, + work_total, + true); + } + } + ds4_gpu_tensor_free(last_hidden); + ds4_gpu_set_glm_streaming_prefill_full_layer(false); + return ok; +} + +static uint32_t glm_graph_prefill_chunk_tokens(uint32_t full_attention_cap) { + return full_attention_cap ? full_attention_cap : DS4_GLM_METAL_FULL_ATTN_DEFAULT_CONTEXT; +} + +static bool glm_graph_forward_indexed_tokens( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + const int *tokens, + const float *input_hc, + uint32_t pos0, + uint32_t n_tokens, + float *output_hc, + float *logits_out, + ds4_session_progress_fn display_progress, + void *display_progress_ud, + uint32_t display_absolute_base, + uint32_t work_done_base, + uint32_t work_total) { + if (!g || !model || !weights || !tokens || + g->compact_cache_cap == 0 || + g->indexed_prefill_cap == 0 || + g->indexed_prefill_score_cap == 0 || + !g->batch_indexer_q || + !g->batch_indexer_weights || + !g->batch_indexer_scores || + !g->batch_indexer_selected || + !g->batch_qk_low || + n_tokens == 0 || + g->layer_count == 0 || + n_tokens > g->indexed_prefill_cap || + !glm_graph_span_fits_context(g, pos0, n_tokens)) { + return false; + } + const uint32_t n_rows = pos0 + n_tokens; + const uint32_t indexer_top_k = glm_graph_indexer_top_k_limit(); + if (pos0 < indexer_top_k && n_rows > indexer_top_k) { + return false; + } + const uint32_t indexed_selected_count = + n_rows <= indexer_top_k ? n_rows : indexer_top_k; + const bool use_causal_range_select = n_rows <= indexer_top_k; + const bool trace = glm_graph_indexed_prefill_trace_enabled(); + const bool trace_all = trace && glm_graph_indexed_prefill_trace_all(); + const double trace_slow_ms = trace ? + (double)glm_graph_indexed_prefill_trace_slow_ms() : 0.0; + const double trace_chunk_t0 = trace ? now_sec() : 0.0; + if (trace) { + glm_graph_indexed_prefill_tracef( + "chunk begin pos=%u tokens=%u rows=%u selected=%u compact_cap=%u score_cap=%u work_base=%u work_total=%u", + pos0, + n_tokens, + n_rows, + indexed_selected_count, + g->compact_cache_cap, + g->indexed_prefill_score_cap, + work_done_base, + work_total); + } + const double trace_cache_t0 = trace ? now_sec() : 0.0; + if (!glm_graph_ensure_compact_cache(g, n_rows)) { + if (trace) { + glm_graph_indexed_prefill_tracef( + "ensure_cache failed pos=%u tokens=%u rows=%u compact_cap=%u", + pos0, + n_tokens, + n_rows, + g->compact_cache_cap); + } + return false; + } + if (trace) { + const double ms = (now_sec() - trace_cache_t0) * 1000.0; + if (trace_all || ms >= trace_slow_ms) { + glm_graph_indexed_prefill_tracef( + "ensure_cache done pos=%u tokens=%u rows=%u compact_cap=%u %.3f ms", + pos0, + n_tokens, + n_rows, + g->compact_cache_cap, + ms); + } + } + for (uint32_t i = 0; i < n_tokens; i++) { + if (tokens[i] < 0 || tokens[i] >= (int)DS4_N_VOCAB) return false; + } + if (!input_hc && !g->has_token_embd) return false; + if (logits_out && !g->has_output_head) return false; + + const double trace_upload_t0 = trace ? now_sec() : 0.0; + bool ok = glm_graph_upload_tokens(g->prefill_tokens, tokens, n_tokens); + if (trace) { + const double ms = (now_sec() - trace_upload_t0) * 1000.0; + if (trace_all || ms >= trace_slow_ms || !ok) { + glm_graph_indexed_prefill_tracef( + "upload_tokens %s pos=%u tokens=%u %.3f ms", + ok ? "done" : "failed", + pos0, + n_tokens, + ms); + } + } + ds4_gpu_tensor *cur = g->batch_cur; + ds4_gpu_tensor *next = g->batch_next; + ds4_gpu_tensor *last_hidden = NULL; + + glm_graph_report_prefill_display_progress(display_progress, + display_progress_ud, + display_absolute_base, + work_done_base, + n_tokens, + 0, + g->layer_count, + work_total, + true); + + const bool use_all_scalar_kernels = + n_tokens == 1u && glm_graph_indexed_prefill_scalar_kernels(); + const bool use_scalar_indexer = + use_all_scalar_kernels || + glm_graph_indexed_prefill_scalar_indexer() || + !glm_graph_indexed_prefill_batch_indexer(); + const bool force_scalar_attn = + use_all_scalar_kernels || glm_graph_indexed_prefill_scalar_attn(); + const bool use_batch_qk_low = + !force_scalar_attn && glm_graph_indexed_prefill_batch_qk_low(); + const bool use_batch_attn_kernel = + !force_scalar_attn && glm_graph_indexed_prefill_batch_attn_kernel(); + const bool use_split_value_proj = + use_batch_attn_kernel && + g->batch_attn_lora; + /* Tensor-parallel attention head split: each rank computes half the + * heads in the qk-low / attention-lora / value-project kernels, the + * unowned half of batch_heads stays zero, and the full-width attn + * output projection yields partials combined over the big-gate + * exchange (same commutative add as the routed-FFN combine). Only the + * split-value-proj batch chain has head ownership. */ + const bool tp_attn_head_split = + g->tp_world == 2 && + use_batch_attn_kernel && + use_split_value_proj && + (DS4_N_HEAD % 16u) == 0u && + n_tokens >= glm_tp_head_split_min(); /* small batches replicate; + * the floor is env-tunable for correctness + * isolation (DS4_GLM_TP_HEAD_SPLIT_MIN). */ + const bool use_batch_q_rank_proj = true; + const bool use_batch_q_proj = true; + const bool use_batch_indexer_k_proj = true; + const bool use_batch_kv_proj = true; + const bool use_batch_indexer_q_proj = true; + const bool use_batch_indexer_weights_proj = true; + const bool use_batch_attn_out_proj = true; + const bool use_batch_ffn = glm_graph_indexed_prefill_batch_ffn(); + const bool stage_sync = + glm_graph_small_prefill_stage_sync(n_tokens, logits_out != NULL); + const uint32_t layer_flush_interval = stage_sync ? 0u : + glm_graph_full_prefill_layer_flush_interval(n_tokens, + n_tokens, + logits_out != NULL); + const uint32_t progress_flush_interval = + glm_graph_prefill_progress_flush_interval(layer_flush_interval, + n_tokens, + display_progress, + work_total); + const uint32_t drain_interval = + progress_flush_interval != 0 ? glm_graph_indexed_prefill_drain_interval() : 0u; + const bool progress_requested = display_progress && work_total > 0; + ds4_gpu_set_glm_streaming_prefill_full_layer(false); + + if (trace) { + glm_graph_indexed_prefill_tracef( + "mode pos=%u tokens=%u scalar_indexer=%u batch_qk_low=%u batch_attn=%u split_value=%u batch_ffn=%u progress_flush_interval=%u drain_interval=%u", + pos0, + n_tokens, + use_scalar_indexer ? 1u : 0u, + use_batch_qk_low ? 1u : 0u, + use_batch_attn_kernel ? 1u : 0u, + use_split_value_proj ? 1u : 0u, + use_batch_ffn ? 1u : 0u, + progress_flush_interval, + drain_interval); + } + + if (ok) { + const double t0 = trace ? now_sec() : 0.0; + if (input_hc) { + ok = ds4_gpu_tensor_write(cur, + 0, + input_hc, + (uint64_t)n_tokens * DS4_N_EMBD * sizeof(float)) != 0; + } else { + ok = glm_graph_stream_map_token(g, model, weights); + } + if (ok) ok = ds4_gpu_begin_commands() != 0; + if (trace) { + const double ms = (now_sec() - t0) * 1000.0; + if (trace_all || ms >= trace_slow_ms || !ok) { + glm_graph_indexed_prefill_tracef( + "begin_commands%s %s pos=%u tokens=%u %.3f ms", + input_hc ? "_from_hidden" : "", + ok ? "done" : "failed", + pos0, + n_tokens, + ms); + } + } + } + if (ok && !input_hc) { + const double t0 = trace ? now_sec() : 0.0; + ok = ds4_gpu_embed_tokens_quant_tensor(cur, + g->prefill_tokens, + model->map, + model->size, + weights->token_embd->abs_offset, + weights->token_embd->type, + DS4_N_VOCAB, + n_tokens, + DS4_N_EMBD) != 0; + if (trace) { + const double ms = (now_sec() - t0) * 1000.0; + if (trace_all || ms >= trace_slow_ms || !ok) { + glm_graph_indexed_prefill_tracef( + "embed %s pos=%u tokens=%u %.3f ms", + ok ? "done" : "failed", + pos0, + n_tokens, + ms); + } + } + } + if (ok && g->ssd_streaming) ok = ds4_gpu_end_commands() != 0; + +#define DS4_GLM_PROFILE_INDEXED_STAGE(part_, name_) do { \ + if (ok && trace) { \ + const double _trace_stage_now = now_sec(); \ + const double _trace_stage_ms = (_trace_stage_now - trace_stage_t0) * 1000.0; \ + if (trace_all || _trace_stage_ms >= trace_slow_ms) { \ + glm_graph_indexed_prefill_tracef( \ + "stage layer=%u pos=%u tokens=%u %s.%s encode %.3f ms", \ + il, \ + pos0, \ + n_tokens, \ + (part_), \ + (name_), \ + _trace_stage_ms); \ + } \ + trace_stage_t0 = _trace_stage_now; \ + } \ + if (ok && layer_stage_profile) { \ + ok = metal_graph_layer_stage_profile_boundary((part_), (name_), il, pos0, n_tokens, &layer_stage_t0); \ + } else if (ok && stage_sync) { \ + ok = glm_graph_prefill_stage_sync_boundary(); \ + } \ + } while (0) + ds4_gpu_tensor *last_indexer_selected = NULL; + uint32_t last_indexer_selected_count = 0; + if (ok && tp_attn_head_split) { + /* The unowned head range of batch_heads must be exactly zero so the + * full-width attn-output matmul produces partial sums. Owned heads + * are rewritten every layer, so one fill per chunk suffices. */ + ok = ds4_gpu_tensor_fill_f32(g->batch_heads, 0.0f, + (uint64_t)n_tokens * g->heads_dim) != 0; + } + ds4_gpu_tp_set_attn_head_split(tp_attn_head_split ? 1 : 0); + for (uint32_t il = g->layer_start; ok && il <= g->layer_end; il++) { + const uint32_t slice_layer_done = il - g->layer_start + 1u; + if (g->ssd_streaming) { + ok = glm_graph_stream_map_prefill_layer(g, + model, + weights, + il, + n_tokens, + false); + if (ok) ok = ds4_gpu_begin_commands() != 0; + } + const ds4_layer_weights *l = &weights->layer[il]; + const uint32_t kv_raw_dim = (uint32_t)l->attn_kv_a_mqa->dim[1]; + const float rope_base = layer_rope_freq_base(il); + const float rope_scale = layer_rope_freq_scale(il); + const uint64_t residual_elems = (uint64_t)n_tokens * DS4_N_EMBD; + const bool layer_stage_profile = metal_graph_layer_stage_profile_enabled(il); + double layer_stage_t0 = layer_stage_profile ? now_sec() : 0.0; + double trace_stage_t0 = trace ? now_sec() : 0.0; + const double trace_layer_t0 = trace_stage_t0; + const bool trace_full_indexer = glm_graph_layer_uses_full_indexer(il); + bool trace_layer_flushed = false; + if (trace && (trace_all || trace_full_indexer)) { + glm_graph_indexed_prefill_tracef( + "layer begin layer=%u pos=%u tokens=%u rows=%u selected=%u full_indexer=%u", + il, + pos0, + n_tokens, + n_rows, + indexed_selected_count, + trace_full_indexer ? 1u : 0u); + } + if (residual_elems > UINT32_MAX) { + ok = false; + break; + } + if (layer_stage_profile) { + ok = metal_graph_layer_stage_profile_boundary("glm_indexed_attn", + NULL, + il, + pos0, + n_tokens, + &layer_stage_t0); + } + + if (ok) ok = ds4_gpu_rms_norm_weight_rows_tensor(g->batch_attn_norm, + cur, + model->map, + model->size, + l->attn_norm->abs_offset, + DS4_N_EMBD, + n_tokens, + DS4_RMS_EPS) != 0; + DS4_GLM_PROFILE_INDEXED_STAGE("glm_indexed_attn", "attn_norm"); + if (ok) { + if (n_tokens <= 8u && (glm_decode_ablate_mask() & DS4_GLM_ABLATE_QPATH)) { /* ablate */ } else + ok = (use_batch_q_rank_proj ? + glm_graph_matmul_q8_0_tensor(g->batch_q_rank, + model, + l->attn_q_a->abs_offset, + DS4_N_EMBD, + DS4_N_LORA_Q, + g->batch_attn_norm, + n_tokens) : + glm_graph_matmul_q8_0_rows_scalar(g->batch_q_rank, + model, + l->attn_q_a->abs_offset, + DS4_N_EMBD, + DS4_N_LORA_Q, + g->batch_attn_norm, + n_tokens)); + } + if (ok) ok = ds4_gpu_rms_norm_weight_rows_tensor(g->batch_q_rank_norm, + g->batch_q_rank, + model->map, + model->size, + l->attn_q_a_norm->abs_offset, + DS4_N_LORA_Q, + n_tokens, + DS4_RMS_EPS) != 0; + if (ok) { + ok = (use_batch_q_proj ? + glm_graph_matmul_q8_0_tensor(g->batch_q, + model, + l->attn_q_b->abs_offset, + DS4_N_LORA_Q, + g->q_dim, + g->batch_q_rank_norm, + n_tokens) : + glm_graph_matmul_q8_0_rows_scalar(g->batch_q, + model, + l->attn_q_b->abs_offset, + DS4_N_LORA_Q, + g->q_dim, + g->batch_q_rank_norm, + n_tokens)); + } + if (ok) ok = ds4_gpu_rope_tail_tensor(g->batch_q, + n_tokens, + DS4_N_HEAD, + DS4_N_KEY_MLA, + DS4_N_ROT, + pos0, + 0, + false, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW) != 0; + DS4_GLM_PROFILE_INDEXED_STAGE("glm_indexed_attn", "q_path"); + + if (ok && glm_graph_layer_uses_full_indexer(il)) { + ok = (use_batch_indexer_k_proj ? + glm_graph_matmul_q8_0_tensor(g->batch_indexer_k, + model, + l->indexer_attn_k->abs_offset, + DS4_N_EMBD, + DS4_N_INDEXER_HEAD_DIM, + cur, + n_tokens) : + glm_graph_matmul_q8_0_rows_scalar(g->batch_indexer_k, + model, + l->indexer_attn_k->abs_offset, + DS4_N_EMBD, + DS4_N_INDEXER_HEAD_DIM, + cur, + n_tokens)); + if (ok) { + ok = ds4_gpu_glm_store_indexer_k_tensor( + g->layer_indexer_key_cache[il], + g->batch_indexer_k, + model->map, + model->size, + l->indexer_k_norm->abs_offset, + l->indexer_k_norm_b->abs_offset, + pos0, + n_tokens, + g->compact_cache_cap, + DS4_N_INDEXER_HEAD_DIM, + DS4_N_ROT, + 0, + 1.0e-6f, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW, + glm_graph_compact_cache_is_f16()) != 0; + } + } + DS4_GLM_PROFILE_INDEXED_STAGE("glm_indexed_attn", "indexer_k"); + + if (ok) { + ok = (use_batch_kv_proj ? + glm_graph_matmul_q8_0_tensor(g->batch_kv_raw, + model, + l->attn_kv_a_mqa->abs_offset, + DS4_N_EMBD, + kv_raw_dim, + g->batch_attn_norm, + n_tokens) : + glm_graph_matmul_q8_0_rows_scalar(g->batch_kv_raw, + model, + l->attn_kv_a_mqa->abs_offset, + DS4_N_EMBD, + kv_raw_dim, + g->batch_attn_norm, + n_tokens)); + } + if (ok) ok = ds4_gpu_glm_kv_lora_rms_norm_tensor(g->batch_kv_norm, + g->batch_kv_raw, + model->map, + model->size, + l->attn_kv_a_norm->abs_offset, + n_tokens, + kv_raw_dim, + DS4_N_KV_LORA, + DS4_RMS_EPS) != 0; + if (ok) { + ok = ds4_gpu_glm_store_compact_kv_tensor(g->layer_kv_lora_cache[il], + g->layer_k_rope_cache[il], + g->batch_kv_norm, + g->batch_kv_raw, + pos0, + n_tokens, + g->compact_cache_cap, + kv_raw_dim, + DS4_N_KV_LORA, + DS4_N_ROT, + glm_graph_compact_cache_is_f16()) != 0; + } + DS4_GLM_PROFILE_INDEXED_STAGE("glm_indexed_attn", "kv_path"); + + if (ok && glm_graph_layer_uses_full_indexer(il)) { + if (ok && !use_causal_range_select) { + ok = (use_batch_indexer_q_proj ? + glm_graph_matmul_q8_0_tensor(g->batch_indexer_q, + model, + l->indexer_attn_q_b->abs_offset, + DS4_N_LORA_Q, + (uint64_t)DS4_N_INDEXER_HEAD * DS4_N_INDEXER_HEAD_DIM, + g->batch_q_rank_norm, + n_tokens) : + glm_graph_matmul_q8_0_rows_scalar(g->batch_indexer_q, + model, + l->indexer_attn_q_b->abs_offset, + DS4_N_LORA_Q, + (uint64_t)DS4_N_INDEXER_HEAD * DS4_N_INDEXER_HEAD_DIM, + g->batch_q_rank_norm, + n_tokens)); + if (ok) ok = ds4_gpu_glm_indexer_rope_tail_tensor(g->batch_indexer_q, + n_tokens, + DS4_N_INDEXER_HEAD, + DS4_N_INDEXER_HEAD_DIM, + DS4_N_ROT, + pos0, + 0, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW) != 0; + if (ok && glm_graph_indexer_qat()) { + ok = ds4_gpu_dsv4_indexer_qat_tensor(g->batch_indexer_q, + n_tokens * DS4_N_INDEXER_HEAD, + DS4_N_INDEXER_HEAD_DIM) != 0; + } + if (ok) { + ok = (use_batch_indexer_weights_proj ? + ds4_gpu_matmul_f32_tensor(g->batch_indexer_weights, + model->map, + model->size, + l->indexer_proj->abs_offset, + DS4_N_EMBD, + DS4_N_INDEXER_HEAD, + cur, + n_tokens) != 0 : + glm_graph_matmul_f32_rows_scalar(g->batch_indexer_weights, + model, + l->indexer_proj->abs_offset, + DS4_N_EMBD, + DS4_N_INDEXER_HEAD, + cur, + n_tokens)); + } + DS4_GLM_PROFILE_INDEXED_STAGE("glm_indexed_attn", "indexer_q_weights"); + } + if (ok) { + if (use_causal_range_select) { + ok = ds4_gpu_glm_fill_selected_range_batch_tensor( + g->batch_indexer_selected, + n_tokens, + pos0, + indexed_selected_count, + g->compact_cache_cap) != 0; + DS4_GLM_PROFILE_INDEXED_STAGE("glm_indexed_attn", "indexer_range"); + } else if (use_scalar_indexer) { + const float indexer_scale = + 1.0f / sqrtf((float)(DS4_N_INDEXER_HEAD_DIM * DS4_N_INDEXER_HEAD)); + for (uint32_t t = 0; ok && t < n_tokens; t++) { + const uint32_t visible = pos0 + t + 1u; + ds4_gpu_tensor *indexer_q_view = + glm_graph_tensor_row_view_strided( + g->batch_indexer_q, + t, + (uint64_t)DS4_N_INDEXER_HEAD * DS4_N_INDEXER_HEAD_DIM, + (uint64_t)DS4_N_INDEXER_HEAD * DS4_N_INDEXER_HEAD_DIM); + ds4_gpu_tensor *indexer_weights_view = + glm_graph_tensor_row_view_strided(g->batch_indexer_weights, + t, + DS4_N_INDEXER_HEAD, + DS4_N_INDEXER_HEAD); + ds4_gpu_tensor *scores_view = + ds4_gpu_tensor_view(g->batch_indexer_scores, + 0, + (uint64_t)visible * sizeof(float)); + ds4_gpu_tensor *selected_view = + ds4_gpu_tensor_view(g->batch_indexer_selected, + (uint64_t)t * indexed_selected_count * sizeof(uint32_t), + (uint64_t)indexed_selected_count * sizeof(uint32_t)); + ok = indexer_q_view && indexer_weights_view && scores_view && selected_view; + if (!ok) fprintf(stderr, "ds4: GLM scalar indexed prefill failed to create indexer row views at layer %u token %u\n", il, t); + if (ok) { + int rc = ds4_gpu_glm_indexer_score_one_tensor( + scores_view, + indexer_q_view, + indexer_weights_view, + g->layer_indexer_key_cache[il], + visible, + DS4_N_INDEXER_HEAD, + DS4_N_INDEXER_HEAD_DIM, + indexer_scale, + glm_graph_compact_cache_is_f16()); + ok = rc != 0; + if (!ok) fprintf(stderr, "ds4: GLM scalar indexed prefill indexer scores failed at layer %u token %u\n", il, t); + } + DS4_GLM_PROFILE_INDEXED_STAGE("glm_indexed_attn", "indexer_score_scalar"); + if (ok) { + int rc = ds4_gpu_indexer_topk_tensor(selected_view, + scores_view, + visible, + 1, + indexed_selected_count); + ok = rc != 0; + if (!ok) fprintf(stderr, "ds4: GLM scalar indexed prefill topk failed at layer %u token %u\n", il, t); + } + DS4_GLM_PROFILE_INDEXED_STAGE("glm_indexed_attn", "indexer_topk_scalar"); + ds4_gpu_tensor_free(selected_view); + ds4_gpu_tensor_free(scores_view); + ds4_gpu_tensor_free(indexer_weights_view); + ds4_gpu_tensor_free(indexer_q_view); + } + } else { + const float indexer_scale = + 1.0f / sqrtf((float)(DS4_N_INDEXER_HEAD_DIM * DS4_N_INDEXER_HEAD)); + const uint32_t score_cap = + g->indexed_prefill_score_cap != 0 ? + g->indexed_prefill_score_cap : + g->indexed_prefill_cap; + const uint64_t indexer_q_row_bytes = + (uint64_t)DS4_N_INDEXER_HEAD * + DS4_N_INDEXER_HEAD_DIM * + sizeof(float); + const uint64_t indexer_weights_row_bytes = + (uint64_t)DS4_N_INDEXER_HEAD * sizeof(float); + const uint64_t selected_row_bytes = + (uint64_t)indexed_selected_count * sizeof(uint32_t); + for (uint32_t t0 = 0; ok && t0 < n_tokens; ) { + uint32_t slice = n_tokens - t0; + if (slice > score_cap) slice = score_cap; + if (slice == 0) { + ok = false; + break; + } + + ds4_gpu_tensor *indexer_q_view = + ds4_gpu_tensor_view(g->batch_indexer_q, + (uint64_t)t0 * indexer_q_row_bytes, + (uint64_t)slice * indexer_q_row_bytes); + ds4_gpu_tensor *indexer_weights_view = + ds4_gpu_tensor_view(g->batch_indexer_weights, + (uint64_t)t0 * indexer_weights_row_bytes, + (uint64_t)slice * indexer_weights_row_bytes); + ds4_gpu_tensor *selected_view = + ds4_gpu_tensor_view(g->batch_indexer_selected, + (uint64_t)t0 * selected_row_bytes, + (uint64_t)slice * selected_row_bytes); + ok = indexer_q_view && indexer_weights_view && selected_view; + if (!ok) { + fprintf(stderr, + "ds4: GLM indexed prefill failed to create indexer score slice views at layer %u token %u\n", + il, + t0); + } + if (ok) { + ok = ds4_gpu_glm_indexer_scores_batch_tensor( + g->batch_indexer_scores, + indexer_q_view, + indexer_weights_view, + g->layer_indexer_key_cache[il], + n_rows, + slice, + pos0 + t0, + DS4_N_INDEXER_HEAD, + DS4_N_INDEXER_HEAD_DIM, + indexer_scale, + glm_graph_compact_cache_is_f16()) != 0; + } + DS4_GLM_PROFILE_INDEXED_STAGE("glm_indexed_attn", "indexer_score"); + if (ok) { + ok = ds4_gpu_indexer_topk_tensor(selected_view, + g->batch_indexer_scores, + n_rows, + slice, + indexed_selected_count) != 0; + } + DS4_GLM_PROFILE_INDEXED_STAGE("glm_indexed_attn", "indexer_topk"); + ds4_gpu_tensor_free(selected_view); + ds4_gpu_tensor_free(indexer_weights_view); + ds4_gpu_tensor_free(indexer_q_view); + t0 += slice; + } + } + } + if (ok) { + last_indexer_selected = g->batch_indexer_selected; + last_indexer_selected_count = indexed_selected_count; + } + } else if (ok && (!last_indexer_selected || last_indexer_selected_count == 0)) { + ok = false; + } + DS4_GLM_PROFILE_INDEXED_STAGE("glm_indexed_attn", "indexer_select"); + metal_graph_debug_dump_tensor("glm_indexed_q", + g->batch_q, + (uint64_t)n_tokens * DS4_N_HEAD * DS4_N_KEY_MLA, + il, + pos0); + if (use_batch_qk_low) { + if (n_tokens <= 8u && (glm_decode_ablate_mask() & DS4_GLM_ABLATE_ATTN_CORE)) { /* ablate */ } else + if (ok) ok = ds4_gpu_glm_qk_lowrank_typed_batch_tensor(g->batch_qk_low, + g->batch_q, + model->map, + model->size, + l->attn_k_b->abs_offset, + l->attn_k_b->type, + n_tokens, + DS4_N_HEAD, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_KEY_MLA) != 0; + } else { + for (uint32_t t = 0; ok && t < n_tokens; t++) { + ds4_gpu_tensor *q_view = + glm_graph_tensor_row_view_strided(g->batch_q, + t, + g->q_dim, + g->q_dim); + ds4_gpu_tensor *qk_low_view = + glm_graph_tensor_row_view_strided( + g->batch_qk_low, + t, + (uint64_t)DS4_N_HEAD * DS4_N_KV_LORA, + (uint64_t)DS4_N_HEAD * DS4_N_KV_LORA); + ok = q_view && qk_low_view; + if (!ok) fprintf(stderr, "ds4: GLM scalar indexed prefill failed to create qk-low row views at layer %u token %u\n", il, t); + if (ok) { + int rc = ds4_gpu_glm_qk_lowrank_typed_tensor(qk_low_view, + q_view, + model->map, + model->size, + l->attn_k_b->abs_offset, + l->attn_k_b->type, + DS4_N_HEAD, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_KEY_MLA); + ok = rc != 0; + if (!ok) fprintf(stderr, "ds4: GLM scalar indexed prefill qk-low failed at layer %u token %u\n", il, t); + } + ds4_gpu_tensor_free(qk_low_view); + ds4_gpu_tensor_free(q_view); + } + } + DS4_GLM_PROFILE_INDEXED_STAGE("glm_indexed_attn", "qk_low"); + metal_graph_debug_dump_tensor("glm_indexed_qk_low", + g->batch_qk_low, + (uint64_t)n_tokens * DS4_N_HEAD * DS4_N_KV_LORA, + il, + pos0); + if (ok && use_batch_attn_kernel) ok = ds4_gpu_flush_encoder() != 0; + + if (use_batch_attn_kernel) { + const uint32_t attn_slice_cap = + glm_graph_indexed_prefill_batch_attn_slice_tokens(); + for (uint32_t t0 = 0; ok && t0 < n_tokens; ) { + uint32_t slice = n_tokens - t0; + if (slice > attn_slice_cap) slice = attn_slice_cap; + + ds4_gpu_tensor *q_view = + ds4_gpu_tensor_view(g->batch_q, + (uint64_t)t0 * g->q_dim * sizeof(float), + (uint64_t)slice * g->q_dim * sizeof(float)); + ds4_gpu_tensor *qk_low_view = + ds4_gpu_tensor_view(g->batch_qk_low, + (uint64_t)t0 * DS4_N_HEAD * DS4_N_KV_LORA * sizeof(float), + (uint64_t)slice * DS4_N_HEAD * DS4_N_KV_LORA * sizeof(float)); + ds4_gpu_tensor *heads_view = + ds4_gpu_tensor_view(g->batch_heads, + (uint64_t)t0 * g->heads_dim * sizeof(float), + (uint64_t)slice * g->heads_dim * sizeof(float)); + ds4_gpu_tensor *attn_lora_view = use_split_value_proj ? + ds4_gpu_tensor_view(g->batch_attn_lora, + (uint64_t)t0 * DS4_N_HEAD * DS4_N_KV_LORA * sizeof(float), + (uint64_t)slice * DS4_N_HEAD * DS4_N_KV_LORA * sizeof(float)) : + NULL; + ds4_gpu_tensor *selected_view = + ds4_gpu_tensor_view(last_indexer_selected, + (uint64_t)t0 * last_indexer_selected_count * sizeof(uint32_t), + (uint64_t)slice * last_indexer_selected_count * sizeof(uint32_t)); + ok = q_view && qk_low_view && heads_view && selected_view && + (!use_split_value_proj || attn_lora_view); + if (!ok) { + fprintf(stderr, "ds4: GLM sliced indexed prefill failed to create attention views at layer %u token %u\n", il, t0); + } + if (n_tokens <= 8u && (glm_decode_ablate_mask() & DS4_GLM_ABLATE_ATTN_CORE)) { /* ablate */ } else if (ok && use_split_value_proj) { + int rc = 0; + if (use_causal_range_select) { + rc = ds4_gpu_glm_attention_indexed_batch_lora_causal_tensor( + attn_lora_view, + q_view, + qk_low_view, + g->layer_kv_lora_cache[il], + g->layer_k_rope_cache[il], + slice, + pos0 + t0, + last_indexer_selected_count, + g->compact_cache_cap, + glm_graph_compact_cache_is_f16(), + DS4_N_HEAD, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_ROT, + 0, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW); + } else { + rc = ds4_gpu_glm_attention_indexed_batch_lora_valid_tensor( + attn_lora_view, + q_view, + qk_low_view, + g->layer_kv_lora_cache[il], + g->layer_k_rope_cache[il], + selected_view, + slice, + last_indexer_selected_count, + g->compact_cache_cap, + glm_graph_compact_cache_is_f16(), + DS4_N_HEAD, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_ROT, + 0, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW); + } + ok = rc != 0; + if (!ok) fprintf(stderr, "ds4: GLM sliced indexed prefill attention-lora failed at layer %u token %u\n", il, t0); + if (ok && layer_stage_profile) { + ok = metal_graph_layer_stage_profile_boundary("glm_indexed_attn", + "attention_lora", + il, + pos0 + t0, + slice, + &layer_stage_t0); + } + if (ok) { + rc = ds4_gpu_glm_value_project_typed_batch_heads_tensor( + heads_view, + attn_lora_view, + model->map, + model->size, + l->attn_v_b->abs_offset, + l->attn_v_b->type, + slice, + DS4_N_HEAD, + DS4_N_KV_LORA, + DS4_N_VALUE_MLA); + ok = rc != 0; + if (!ok) fprintf(stderr, "ds4: GLM sliced indexed prefill value project failed at layer %u token %u\n", il, t0); + } + if (ok && layer_stage_profile) { + ok = metal_graph_layer_stage_profile_boundary("glm_indexed_attn", + "value_project", + il, + pos0 + t0, + slice, + &layer_stage_t0); + } + } else if (ok) { + int rc = ds4_gpu_glm_attention_indexed_batch_typed_tensor(heads_view, + q_view, + qk_low_view, + g->layer_kv_lora_cache[il], + g->layer_k_rope_cache[il], + model->map, + model->size, + l->attn_v_b->abs_offset, + l->attn_v_b->type, + selected_view, + slice, + last_indexer_selected_count, + g->compact_cache_cap, + glm_graph_compact_cache_is_f16(), + DS4_N_HEAD, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_ROT, + DS4_N_VALUE_MLA, + 0, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW); + ok = rc != 0; + if (!ok) fprintf(stderr, "ds4: GLM sliced indexed prefill indexed attention failed at layer %u token %u\n", il, t0); + if (ok && layer_stage_profile) { + ok = metal_graph_layer_stage_profile_boundary("glm_indexed_attn", + "attention_fused", + il, + pos0 + t0, + slice, + &layer_stage_t0); + } + } + ds4_gpu_tensor_free(selected_view); + ds4_gpu_tensor_free(attn_lora_view); + ds4_gpu_tensor_free(heads_view); + ds4_gpu_tensor_free(qk_low_view); + ds4_gpu_tensor_free(q_view); + t0 += slice; + } + if (ok) ok = ds4_gpu_flush_encoder() != 0; + } else { + for (uint32_t t = 0; ok && t < n_tokens; t++) { + ds4_gpu_tensor *q_view = + glm_graph_tensor_row_view_strided(g->batch_q, + t, + g->q_dim, + g->q_dim); + ds4_gpu_tensor *qk_low_view = + glm_graph_tensor_row_view_strided( + g->batch_qk_low, + t, + (uint64_t)DS4_N_HEAD * DS4_N_KV_LORA, + (uint64_t)DS4_N_HEAD * DS4_N_KV_LORA); + ds4_gpu_tensor *heads_view = + glm_graph_tensor_row_view_strided(g->batch_heads, + t, + g->heads_dim, + g->heads_dim); + ds4_gpu_tensor *selected_view = + ds4_gpu_tensor_view(last_indexer_selected, + (uint64_t)t * last_indexer_selected_count * sizeof(uint32_t), + (uint64_t)last_indexer_selected_count * sizeof(uint32_t)); + ok = q_view && qk_low_view && heads_view && selected_view; + if (!ok) fprintf(stderr, "ds4: GLM scalar indexed prefill failed to create attention row views at layer %u token %u\n", il, t); + if (ok) { + int rc = ds4_gpu_glm_attention_indexed_decode_typed_tensor(heads_view, + q_view, + qk_low_view, + g->layer_kv_lora_cache[il], + g->layer_k_rope_cache[il], + model->map, + model->size, + l->attn_v_b->abs_offset, + l->attn_v_b->type, + selected_view, + last_indexer_selected_count, + g->compact_cache_cap, + glm_graph_compact_cache_is_f16(), + DS4_N_HEAD, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_ROT, + DS4_N_VALUE_MLA, + 0, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW); + ok = rc != 0; + if (!ok) fprintf(stderr, "ds4: GLM scalar indexed prefill indexed attention failed at layer %u token %u\n", il, t); + } + ds4_gpu_tensor_free(selected_view); + ds4_gpu_tensor_free(heads_view); + ds4_gpu_tensor_free(qk_low_view); + ds4_gpu_tensor_free(q_view); + } + } + DS4_GLM_PROFILE_INDEXED_STAGE("glm_indexed_attn", "attention"); + metal_graph_debug_dump_tensor("glm_indexed_heads", + g->batch_heads, + (uint64_t)n_tokens * g->heads_dim, + il, + pos0); + if (ok && tp_attn_head_split) { + ok = glm_graph_tp_batch_bounce_ready(g, n_tokens); + } + if (ok) { + /* Under the head split the projection input has zeros in the + * unowned head columns, so the result is this rank's partial; + * it must land in the shared bounce tensor for the exchange. */ + ds4_gpu_tensor *attn_out_dst = + tp_attn_head_split ? g->tp_bounce_out : g->batch_attn_out; + if (n_tokens <= 8u && (glm_decode_ablate_mask() & DS4_GLM_ABLATE_ATTN_OUT)) { /* ablate */ } else + ok = (use_batch_attn_out_proj ? + glm_graph_matmul_q8_0_tensor(attn_out_dst, + model, + l->attn_output->abs_offset, + g->heads_dim, + DS4_N_EMBD, + g->batch_heads, + n_tokens) : + glm_graph_matmul_q8_0_rows_scalar(attn_out_dst, + model, + l->attn_output->abs_offset, + g->heads_dim, + DS4_N_EMBD, + g->batch_heads, + n_tokens)); + } + if (ok && tp_attn_head_split) { + ok = glm_graph_tp_batch_ffn_combine(g, il, g->batch_attn_out, n_tokens); + } + if (ok) ok = ds4_gpu_add_tensor(g->batch_after_attn, + cur, + g->batch_attn_out, + (uint32_t)residual_elems) != 0; + DS4_GLM_PROFILE_INDEXED_STAGE("glm_indexed_attn", "attn_output"); + metal_graph_debug_dump_tensor("glm_indexed_after_attn", + g->batch_after_attn, + (uint64_t)n_tokens * DS4_N_EMBD, + il, + pos0); + metal_graph_debug_dump_tensor("glm_indexed_attn_out", + g->batch_attn_out, + (uint64_t)n_tokens * DS4_N_EMBD, + il, + pos0); + if (ok && use_batch_ffn) { + ok = glm_graph_encode_ffn_batch(g, + model, + l, + il, + pos0, + g->batch_after_attn, + next, + n_tokens, + layer_stage_profile, + stage_sync, + layer_stage_profile ? &layer_stage_t0 : NULL); + } else if (ok) { + const bool use_batch_ffn_norm = + n_tokens > 1 && glm_graph_indexed_prefill_batch_ffn_norm(); + if (use_batch_ffn_norm) { + ok = ds4_gpu_rms_norm_weight_rows_tensor(g->batch_ffn_norm, + g->batch_after_attn, + model->map, + model->size, + l->ffn_norm->abs_offset, + DS4_N_EMBD, + n_tokens, + DS4_RMS_EPS) != 0; + } + if (use_batch_ffn_norm) { + DS4_GLM_PROFILE_INDEXED_STAGE("glm_indexed_ffn", "ffn_norm"); + } + if (ok && + use_batch_ffn_norm && + il >= DS4_N_LEADING_DENSE && + glm_graph_indexed_prefill_batch_routed_moe()) { + ok = glm_graph_encode_sparse_ffn_indexed_batch_routed_moe( + g, + model, + l, + il, + pos0, + g->batch_after_attn, + next, + n_tokens, + layer_stage_profile, + stage_sync, + layer_stage_profile ? &layer_stage_t0 : NULL); + } else for (uint32_t t = 0; ok && t < n_tokens; t++) { + ds4_gpu_tensor *after_attn_view = + glm_graph_tensor_row_view_strided(g->batch_after_attn, + t, + DS4_N_EMBD, + DS4_N_EMBD); + ds4_gpu_tensor *ffn_norm_view = use_batch_ffn_norm ? + glm_graph_tensor_row_view_strided(g->batch_ffn_norm, + t, + DS4_N_EMBD, + DS4_N_EMBD) : + NULL; + ds4_gpu_tensor *next_view = + glm_graph_tensor_row_view_strided(next, + t, + DS4_N_EMBD, + DS4_N_EMBD); + ok = after_attn_view && next_view && + (!use_batch_ffn_norm || ffn_norm_view); + if (ok && use_batch_ffn_norm) { + ok = glm_graph_encode_ffn_one_normed_from(g, + model, + l, + il, + pos0 + t, + ffn_norm_view, + after_attn_view, + next_view, + g->ffn_gate, + g->ffn_up, + g->ffn_mid, + g->ffn_out, + g->ffn_sum, + g->attn_out, + false, + NULL); + } else if (ok) { + ok = glm_graph_encode_ffn_one_from(g, + model, + l, + il, + pos0 + t, + after_attn_view, + next_view, + g->ffn_norm, + g->ffn_gate, + g->ffn_up, + g->ffn_mid, + g->ffn_out, + g->ffn_sum, + g->attn_out, + false, + NULL); + } + ds4_gpu_tensor_free(next_view); + ds4_gpu_tensor_free(ffn_norm_view); + ds4_gpu_tensor_free(after_attn_view); + } + } + if (ok) { + ds4_gpu_tensor *tmp = cur; + cur = next; + next = tmp; + } + if (ok && glm_debug_hidden_dump_layer_match(il)) { + ok = ds4_gpu_end_commands() != 0; + if (ok) { + for (uint32_t r = 0; r < n_tokens; r++) + glm_debug_dump_hidden_layer(cur, r, il, pos0 + r); + glm_debug_dump_raw_layer(g->batch_router_selected, "sel", + (uint64_t)n_tokens * DS4_N_EXPERT_USED * sizeof(int32_t), + il, -1); + glm_debug_dump_raw_layer(g->batch_router_weights, "selw", + (uint64_t)n_tokens * DS4_N_EXPERT_USED * sizeof(float), + il, -1); + ok = ds4_gpu_begin_commands() != 0; + } + } + if (ok && + !g->ssd_streaming && + progress_flush_interval != 0 && + (il < g->layer_end || progress_requested) && + (slice_layer_done % progress_flush_interval) == 0) { + const uint32_t work_done = + work_done_base + (uint32_t)(((uint64_t)n_tokens * slice_layer_done) / g->layer_count); + const bool drain_now = + drain_interval != 0 && + il < g->layer_end && + (slice_layer_done % drain_interval) == 0; + const char *command_action = drain_now ? "drain" : "flush"; + const double trace_command_t0 = trace ? now_sec() : 0.0; + if (trace && (trace_all || trace_full_indexer || drain_now)) { + glm_graph_indexed_prefill_tracef( + "layer %s begin layer=%u pos=%u tokens=%u work=%u/%u", + command_action, + il, + pos0, + n_tokens, + work_done, + work_total); + } + if (drain_now) { + ok = ds4_gpu_end_commands() != 0; + if (ok) ok = ds4_gpu_begin_commands() != 0; + } else { + ok = ds4_gpu_flush_commands() != 0; + } + if (trace) { + const double trace_command_done = now_sec(); + const double command_ms = (trace_command_done - trace_command_t0) * 1000.0; + const double layer_ms = (trace_command_done - trace_layer_t0) * 1000.0; + trace_layer_flushed = true; + if (trace_all || trace_full_indexer || drain_now || + command_ms >= trace_slow_ms || layer_ms >= trace_slow_ms || !ok) { + glm_graph_indexed_prefill_tracef( + "layer %s %s layer=%u pos=%u tokens=%u command=%.3f ms layer_total=%.3f ms work=%u/%u", + command_action, + ok ? "done" : "failed", + il, + pos0, + n_tokens, + command_ms, + layer_ms, + work_done, + work_total); + } + } + if (ok) { + const bool progress_completed = + drain_interval == 0 || drain_now; + if (progress_completed) { + glm_graph_report_prefill_display_progress(display_progress, + display_progress_ud, + display_absolute_base, + work_done_base, + n_tokens, + slice_layer_done, + g->layer_count, + work_total, + logits_out == NULL && output_hc == NULL); + } + } + } + if (g->ssd_streaming) { + if (ok) ok = ds4_gpu_end_commands() != 0; + else (void)ds4_gpu_synchronize(); + if (ok) { + glm_graph_report_prefill_display_progress(display_progress, + display_progress_ud, + display_absolute_base, + work_done_base, + n_tokens, + slice_layer_done, + g->layer_count, + work_total, + logits_out == NULL && output_hc == NULL); + } + } + if (trace && ok) { + const double layer_ms = (now_sec() - trace_layer_t0) * 1000.0; + if (trace_all || (!trace_layer_flushed && layer_ms >= trace_slow_ms)) { + glm_graph_indexed_prefill_tracef( + "layer end layer=%u pos=%u tokens=%u flushed=%u layer_total=%.3f ms", + il, + pos0, + n_tokens, + trace_layer_flushed ? 1u : 0u, + layer_ms); + } + } + } + ds4_gpu_tp_set_attn_head_split(0); +#undef DS4_GLM_PROFILE_INDEXED_STAGE + if (ok && !g->ssd_streaming) { + const double trace_end_t0 = trace ? now_sec() : 0.0; + if (trace) { + glm_graph_indexed_prefill_tracef( + "chunk end_commands begin pos=%u tokens=%u", + pos0, + n_tokens); + } + ok = ds4_gpu_end_commands() != 0; + if (trace) { + const double end_ms = (now_sec() - trace_end_t0) * 1000.0; + const double chunk_ms = (now_sec() - trace_chunk_t0) * 1000.0; + glm_graph_indexed_prefill_tracef( + "chunk end_commands %s pos=%u tokens=%u end=%.3f ms chunk_total=%.3f ms", + ok ? "done" : "failed", + pos0, + n_tokens, + end_ms, + chunk_ms); + } + } else if (!ok) { + if (trace) { + glm_graph_indexed_prefill_tracef( + "chunk failed before end pos=%u tokens=%u elapsed=%.3f ms", + pos0, + n_tokens, + (now_sec() - trace_chunk_t0) * 1000.0); + } + (void)ds4_gpu_synchronize(); + } + if (ok) { + glm_graph_report_prefill_display_progress(display_progress, + display_progress_ud, + display_absolute_base, + work_done_base, + n_tokens, + g->layer_count, + g->layer_count, + work_total, + logits_out == NULL && output_hc == NULL); + } + if (ok && output_hc) { + ok = ds4_gpu_tensor_read(cur, + 0, + output_hc, + (uint64_t)n_tokens * DS4_N_EMBD * sizeof(float)) != 0; + } + if (ok && logits_out) { + last_hidden = glm_graph_tensor_row_view_strided(cur, + n_tokens - 1u, + DS4_N_EMBD, + DS4_N_EMBD); + ok = last_hidden != NULL; + if (ok && g->ssd_streaming) ok = glm_graph_stream_map_output(g, model, weights); + if (ok) ok = glm_graph_forward_output_head(g, model, weights, last_hidden, logits_out); + if (ok) { + glm_graph_report_prefill_display_progress(display_progress, + display_progress_ud, + display_absolute_base, + work_done_base, + n_tokens, + g->layer_count, + g->layer_count, + work_total, + true); + } + } + ds4_gpu_tensor_free(last_hidden); + ds4_gpu_set_glm_streaming_prefill_full_layer(false); + return ok; +} + +static bool glm_graph_use_streaming_token_prefill( + const ds4_glm_gpu_graph *g, + uint32_t pos0, + uint32_t n_tokens); +static bool glm_graph_prefill_token_major( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + const int *tokens, + uint32_t pos0, + uint32_t n_tokens, + float *logits_out, + ds4_session_progress_fn display_progress, + void *display_progress_ud, + uint32_t display_absolute_base, + uint32_t work_done_base, + uint32_t work_total); + +static bool glm_graph_prefill_range( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + const int *tokens, + uint32_t pos0, + uint32_t n_tokens, + float *logits_out, + ds4_session_progress_fn progress, + void *progress_ud, + uint32_t progress_total) { + if (n_tokens == 0) return true; + if (!glm_graph_span_fits_context(g, pos0, n_tokens)) return false; + const uint32_t chunk_max = glm_graph_prefill_chunk_tokens(g->ctx_cap); + uint32_t done = 0; + while (done < n_tokens) { + const uint32_t pos = pos0 + done; + if (!g->full_kv_cache) { + uint32_t chunk = n_tokens - done; + if (chunk > g->indexed_prefill_cap) chunk = g->indexed_prefill_cap; + if (glm_graph_use_streaming_token_prefill(g, pos, chunk)) { + float *dst_logits = (done + chunk == n_tokens) ? logits_out : NULL; + if (!glm_graph_prefill_token_major(g, + model, + weights, + tokens + done, + pos, + chunk, + dst_logits, + progress, + progress_ud, + pos0, + done, + n_tokens)) { + return false; + } + } else if (glm_graph_indexed_prefill_batch_ready(g, pos)) { + chunk = glm_graph_limit_indexed_prefill_chunk(pos, chunk); + if (chunk == 0) chunk = 1; + float *dst_logits = (done + chunk == n_tokens) ? logits_out : NULL; + if (!glm_graph_forward_indexed_tokens(g, + model, + weights, + tokens + done, + NULL, + pos, + chunk, + NULL, + dst_logits, + progress, + progress_ud, + pos0, + done, + n_tokens)) { + return false; + } + } else { + return false; + } + done += chunk; + if (progress) { + const uint32_t current = pos0 + done; + progress(progress_ud, + "prefill_chunk", + current, + progress_total ? progress_total : pos0 + n_tokens); + } + continue; + } + if (pos >= g->ctx_cap) { + if (g->compact_cache_cap == 0) { + glm_graph_log_full_attention_limit(g, pos, n_tokens - done); + return false; + } + while (done < n_tokens) { + const uint32_t cur_pos = pos0 + done; + const bool use_indexed_batch = + glm_graph_indexed_prefill_batch_ready(g, cur_pos); + if (use_indexed_batch) { + uint32_t chunk = n_tokens - done; + if (chunk > g->indexed_prefill_cap) chunk = g->indexed_prefill_cap; + chunk = glm_graph_limit_indexed_prefill_chunk(cur_pos, chunk); + float *dst_logits = (done + chunk == n_tokens) ? logits_out : NULL; + if (!glm_graph_forward_indexed_tokens(g, + model, + weights, + tokens + done, + NULL, + cur_pos, + chunk, + NULL, + dst_logits, + progress, + progress_ud, + pos0, + done, + n_tokens)) { + return false; + } + done += chunk; + } else { + float *dst_logits = (done + 1u == n_tokens) ? logits_out : NULL; + if (!glm_graph_forward_token(g, + model, + weights, + tokens[done], + NULL, + cur_pos, + NULL, + dst_logits)) { + return false; + } + done++; + } + if (progress) { + const uint32_t current = pos0 + done; + progress(progress_ud, + "prefill_chunk", + current, + progress_total ? progress_total : pos0 + n_tokens); + } + } + return true; + } + uint32_t chunk = n_tokens - done; + const uint32_t full_remaining = g->ctx_cap - pos; + if (chunk > full_remaining) chunk = full_remaining; + if (chunk > chunk_max) chunk = chunk_max; + float *dst_logits = (done + chunk == n_tokens) ? logits_out : NULL; + if (glm_graph_use_streaming_token_prefill(g, pos, chunk)) { + if (!glm_graph_prefill_token_major(g, + model, + weights, + tokens + done, + pos, + chunk, + dst_logits, + progress, + progress_ud, + pos0, + done, + n_tokens)) { + return false; + } + } else if (!glm_graph_forward_tokens(g, + model, + weights, + tokens + done, + NULL, + pos, + chunk, + NULL, + dst_logits, + progress, + progress_ud, + pos0, + done, + n_tokens)) { + return false; + } + done += chunk; + if (progress) { + const uint32_t current = pos0 + done; + progress(progress_ud, + "prefill_chunk", + current, + progress_total ? progress_total : pos0 + n_tokens); + } + } + return true; +} + +/* + * For very short GLM SSD-streaming prefills, the canonical batch path pays the + * full streamed-prefill setup cost and leaves the decode expert cache cold for + * the first generated token. The token-major path reuses the normal decode + * graph, which is not strict batch-equivalent but is the latency/throughput + * path users expect for interactive prompts. --quality and the env escape hatch + * keep canonical prefill available for strict-vector diagnostics. + */ +enum { DS4_GLM_STREAM_PREFILL_TOKEN_MAJOR_MAX_TOKENS = 64 }; + +static bool glm_graph_use_streaming_token_prefill( + const ds4_glm_gpu_graph *g, + uint32_t pos0, + uint32_t n_tokens) { + if (!g || !g->ssd_streaming || g->quality || n_tokens == 0) return false; + if (getenv("DS4_GLM_DISABLE_STREAMING_TOKEN_PREFILL") != NULL || + getenv("DS4_METAL_GLM_DISABLE_STREAMING_TOKEN_PREFILL") != NULL) { + return false; + } + if (!glm_graph_span_fits_full_attention(g, pos0, n_tokens)) return false; + return n_tokens <= DS4_GLM_STREAM_PREFILL_TOKEN_MAJOR_MAX_TOKENS; +} + +static bool glm_graph_prefill_token_major( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + const int *tokens, + uint32_t pos0, + uint32_t n_tokens, + float *logits_out, + ds4_session_progress_fn display_progress, + void *display_progress_ud, + uint32_t display_absolute_base, + uint32_t work_done_base, + uint32_t work_total) { + if (!g || !model || !weights || !tokens || n_tokens == 0) return false; + for (uint32_t i = 0; i < n_tokens; i++) { + const bool last = i + 1u == n_tokens; + float *dst_logits = (last && logits_out) ? logits_out : NULL; + if (!glm_graph_forward_token(g, + model, + weights, + tokens[i], + NULL, + pos0 + i, + NULL, + dst_logits)) { + return false; + } + glm_graph_report_prefill_display_progress(display_progress, + display_progress_ud, + display_absolute_base, + work_done_base + i + 1u, + n_tokens, + 0, + 1, + work_total, + false); + } + return true; +} + +static bool glm_graph_maybe_warm_compact_indexer_after_prefill( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + uint32_t next_pos) { + if (!g || !model || !weights) return false; + if (g->compact_cache_cap == 0 || + g->indexer_full_layers == 0 || + next_pos < g->ctx_cap) { + return true; + } + if (next_pos >= g->ctx_size) return true; + return glm_graph_warm_compact_indexer_store(g, model, weights, next_pos); +} + +static bool glm_graph_begin_commands_if_needed(void) { + return ds4_gpu_commands_active() || ds4_gpu_begin_commands() != 0; +} + +static bool glm_graph_end_commands_if_active(void) { + return !ds4_gpu_commands_active() || ds4_gpu_end_commands() != 0; +} + +static bool glm_graph_forward_token( + ds4_glm_gpu_graph *g, + const ds4_model *model, + const ds4_weights *weights, + int token, + const float *input_hc, + uint32_t pos, + float *output_hc, + float *logits_out) { +#define DS4_GLM_FT_FAIL(why) do { \ + if (getenv("DS4_GLM_TP_DEBUG")) \ + fprintf(stderr, "ds4: glm forward_token fail pos=%u: %s\n", pos, why); \ + } while (0) + if (!g || !model || !weights || + token < 0 || token >= (int)DS4_N_VOCAB || + g->layer_count == 0 || + pos >= g->ctx_size) { + DS4_GLM_FT_FAIL("arg guard"); + return false; + } + if (!input_hc && !g->has_token_embd) { DS4_GLM_FT_FAIL("no token embd"); return false; } + if (logits_out && !g->has_output_head) { DS4_GLM_FT_FAIL("no output head"); return false; } + const bool use_indexed_attention = + glm_graph_decode_uses_indexed_attention(g, pos, logits_out); + uint32_t decode_layer_flush_interval = 0; + if (logits_out != NULL) { + decode_layer_flush_interval = use_indexed_attention ? 4u : 32u; + const char *dfi = getenv("DS4_GLM_DECODE_FLUSH_INTERVAL"); + if (dfi && dfi[0]) { + int v = atoi(dfi); + decode_layer_flush_interval = v <= 0 ? 0u : (uint32_t)v; + } + if (decode_layer_flush_interval > g->layer_count) { + decode_layer_flush_interval = g->layer_count; + } + } + if (pos >= g->ctx_cap && !use_indexed_attention) { + glm_graph_log_full_attention_limit(g, pos, 1); + DS4_GLM_FT_FAIL("full attention limit"); + return false; + } + if (g->compact_cache_cap != 0 && + !glm_graph_ensure_compact_cache(g, pos + 1u)) { + DS4_GLM_FT_FAIL("compact cache ensure"); + return false; + } + + const bool decode_output_profile = false; + const bool merge_indexed_output = + logits_out != NULL && use_indexed_attention && !decode_output_profile; + double decode_output_stage_t0 = decode_output_profile ? now_sec() : 0.0; + const bool decode_flush_profile = false; + uint32_t decode_flush_layer0 = 0; + double decode_flush_stage_t0 = decode_flush_profile ? now_sec() : 0.0; + + const bool static_decode_map = + !input_hc && + g->has_token_embd && + g->ssd_streaming && + metal_graph_stream_decode_static_map_enabled(); + const bool static_map_state_cache = + static_decode_map && metal_graph_stream_decode_static_map_state_cache_enabled(); + bool ok = true; + if (input_hc) { + ok = ds4_gpu_tensor_write(g->cur, + 0, + input_hc, + (uint64_t)DS4_N_EMBD * sizeof(float)) != 0; + } else if (static_decode_map) { + if (!static_map_state_cache || !g->streaming_static_decode_map_current) { + ok = metal_graph_stream_map_decode_static_all(model, weights); + if (ok) g->streaming_static_decode_map_current = static_map_state_cache; + } + } else { + ok = glm_graph_stream_map_token(g, model, weights); + } + if (ok) ok = glm_graph_begin_commands_if_needed(); + if (ok && !input_hc) { + ok = ds4_gpu_embed_token_quant_tensor(g->cur, + model->map, + model->size, + weights->token_embd->abs_offset, + weights->token_embd->type, + DS4_N_VOCAB, + (uint32_t)token, + DS4_N_EMBD) != 0; + } + if (ok && g->ssd_streaming && !static_decode_map) { + ok = ds4_gpu_end_commands() != 0; + } + const uint32_t indexer_top_k = glm_graph_indexer_top_k_limit(); + ds4_gpu_tensor *last_indexer_selected = NULL; + uint32_t last_indexer_selected_count = 0; +#define DS4_GLM_PROFILE_DECODE_STAGE(part_, name_) do { \ + if (ok && decode_stage_profile) { \ + ok = metal_graph_layer_stage_profile_boundary((part_), (name_), il, pos, 1, &decode_stage_t0); \ + } \ + } while (0) + uint32_t glm_ft_fail_il = UINT32_MAX; + for (uint32_t il = g->layer_start; ok && il <= g->layer_end; il++) { + glm_ft_fail_il = il; + const uint32_t slice_layer_done = il - g->layer_start + 1u; + if (g->ssd_streaming) { + if (!static_decode_map) { + ok = glm_graph_stream_map_decode_layer(g, model, weights, il); + } + if (ok) ok = glm_graph_begin_commands_if_needed(); + } + const ds4_layer_weights *l = &weights->layer[il]; + const uint32_t kv_raw_dim = (uint32_t)l->attn_kv_a_mqa->dim[1]; + const float rope_base = layer_rope_freq_base(il); + const float rope_scale = layer_rope_freq_scale(il); + const bool decode_stage_profile = metal_graph_decode_stage_profile_enabled(il); + double decode_stage_t0 = decode_stage_profile ? now_sec() : 0.0; + if (decode_stage_profile) { + ok = metal_graph_layer_stage_profile_boundary("glm_decode_attn", + NULL, + il, + pos, + 1, + &decode_stage_t0); + } + + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(g->attn_norm, + g->cur, + model->map, + model->size, + l->attn_norm->abs_offset, + DS4_N_EMBD, + DS4_RMS_EPS) != 0; + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_attn", "attn_norm"); + const uint32_t decode_ablate = glm_decode_ablate_mask(); + if (ok && !(decode_ablate & DS4_GLM_ABLATE_QPATH)) { + ok = glm_graph_matmul_q8_0_decode_profiled_tensor(g->q_rank, + model, + l->attn_q_a->abs_offset, + DS4_N_EMBD, + DS4_N_LORA_Q, + g->attn_norm, + il, + pos, + "attn_q_a", + g->ssd_streaming) != 0; + } + const bool fuse_qkv_norm_store = use_indexed_attention && + !decode_stage_profile && + g->compact_cache_cap != 0; + const bool fuse_qkv_norm = !decode_stage_profile && !fuse_qkv_norm_store; + if (ok && fuse_qkv_norm_store) { + ok = glm_graph_matmul_q8_0_decode_profiled_tensor(g->kv_raw, + model, + l->attn_kv_a_mqa->abs_offset, + DS4_N_EMBD, + kv_raw_dim, + g->attn_norm, + il, + pos, + "attn_kv_a_store", + g->ssd_streaming) != 0; + if (ok) { + ok = ds4_gpu_glm_qkv_norm_store_compact_kv_tensor( + g->q_rank_norm, + g->q_rank, + model->map, + model->size, + l->attn_q_a_norm->abs_offset, + DS4_N_LORA_Q, + g->layer_kv_lora_cache[il], + g->layer_k_rope_cache[il], + g->kv_raw, + l->attn_kv_a_norm->abs_offset, + pos, + 1, + g->compact_cache_cap, + kv_raw_dim, + DS4_N_KV_LORA, + DS4_N_ROT, + glm_graph_compact_cache_is_f16(), + DS4_RMS_EPS) != 0; + } + } else if (ok && fuse_qkv_norm) { + ok = glm_graph_matmul_q8_0_decode_profiled_tensor(g->kv_raw, + model, + l->attn_kv_a_mqa->abs_offset, + DS4_N_EMBD, + kv_raw_dim, + g->attn_norm, + il, + pos, + "attn_kv_a_norm", + g->ssd_streaming) != 0; + if (ok) { + ok = ds4_gpu_dsv4_qkv_rms_norm_rows_tensor(g->q_rank_norm, + g->q_rank, + model->map, + model->size, + l->attn_q_a_norm->abs_offset, + DS4_N_LORA_Q, + g->kv_norm, + g->kv_raw, + l->attn_kv_a_norm->abs_offset, + DS4_N_KV_LORA, + 1, + DS4_RMS_EPS) != 0; + } + } else if (ok) { + ok = ds4_gpu_rms_norm_weight_tensor(g->q_rank_norm, + g->q_rank, + model->map, + model->size, + l->attn_q_a_norm->abs_offset, + DS4_N_LORA_Q, + DS4_RMS_EPS) != 0; + } + if (ok && !(decode_ablate & DS4_GLM_ABLATE_QPATH)) { + ok = glm_graph_matmul_q8_0_decode_profiled_tensor(g->q, + model, + l->attn_q_b->abs_offset, + DS4_N_LORA_Q, + g->q_dim, + g->q_rank_norm, + il, + pos, + "attn_q_b", + g->ssd_streaming) != 0; + if (ok) ok = ds4_gpu_glm_rope_tail_tensor(g->q, + 1, + DS4_N_HEAD, + DS4_N_KEY_MLA, + DS4_N_ROT, + pos, + 0, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW) != 0; + } + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_attn", "q_path"); + if (ok) metal_graph_debug_dump_tensor("glm_decode_q", + g->q, + (uint64_t)DS4_N_HEAD * DS4_N_KEY_MLA, + il, + pos); + if (ok && g->compact_cache_cap != 0 && glm_graph_layer_uses_full_indexer(il) && + !(decode_ablate & DS4_GLM_ABLATE_INDEXER)) { + ok = glm_graph_matmul_q8_0_decode_profiled_tensor(g->indexer_k, + model, + l->indexer_attn_k->abs_offset, + DS4_N_EMBD, + DS4_N_INDEXER_HEAD_DIM, + g->cur, + il, + pos, + "indexer_k", + g->ssd_streaming) != 0; + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_attn", "indexer_k_proj"); + if (ok) { + ok = ds4_gpu_glm_store_indexer_k_tensor( + g->layer_indexer_key_cache[il], + g->indexer_k, + model->map, + model->size, + l->indexer_k_norm->abs_offset, + l->indexer_k_norm_b->abs_offset, + pos, + 1, + g->compact_cache_cap, + DS4_N_INDEXER_HEAD_DIM, + DS4_N_ROT, + 0, + 1.0e-6f, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW, + glm_graph_compact_cache_is_f16()) != 0; + } + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_attn", "indexer_k_store"); + } + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_attn", "indexer_k"); + if (ok && !fuse_qkv_norm && !fuse_qkv_norm_store) { + ok = glm_graph_matmul_q8_0_decode_profiled_tensor(g->kv_raw, + model, + l->attn_kv_a_mqa->abs_offset, + DS4_N_EMBD, + kv_raw_dim, + g->attn_norm, + il, + pos, + "attn_kv_a", + g->ssd_streaming) != 0; + if (ok) ok = ds4_gpu_glm_kv_lora_rms_norm_tensor(g->kv_norm, + g->kv_raw, + model->map, + model->size, + l->attn_kv_a_norm->abs_offset, + 1, + kv_raw_dim, + DS4_N_KV_LORA, + DS4_RMS_EPS) != 0; + } + if (ok && g->compact_cache_cap != 0 && !fuse_qkv_norm_store) { + ok = ds4_gpu_glm_store_compact_kv_tensor(g->layer_kv_lora_cache[il], + g->layer_k_rope_cache[il], + g->kv_norm, + g->kv_raw, + pos, + 1, + g->compact_cache_cap, + kv_raw_dim, + DS4_N_KV_LORA, + DS4_N_ROT, + glm_graph_compact_cache_is_f16()) != 0; + } + if (use_indexed_attention) { + if (ok && glm_graph_layer_uses_full_indexer(il)) { + const uint32_t visible = pos + 1u; + if (ok && visible <= indexer_top_k) { + ok = ds4_gpu_glm_fill_selected_range_tensor(g->indexer_selected, + visible) != 0; + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_attn", "indexer_fill"); + last_indexer_selected_count = visible; + } else if (ok && (decode_ablate & DS4_GLM_ABLATE_INDEXER)) { + /* Ablation: valid selected ids without the score/topk + * chain, so downstream attention timing stays real. */ + ok = ds4_gpu_glm_fill_selected_range_tensor(g->indexer_selected, + indexer_top_k) != 0; + last_indexer_selected_count = indexer_top_k; + } else if (ok) { + ok = glm_graph_matmul_q8_0_decode_profiled_tensor(g->indexer_q, + model, + l->indexer_attn_q_b->abs_offset, + DS4_N_LORA_Q, + (uint64_t)DS4_N_INDEXER_HEAD * DS4_N_INDEXER_HEAD_DIM, + g->q_rank_norm, + il, + pos, + "indexer_q", + g->ssd_streaming) != 0; + if (ok) ok = ds4_gpu_glm_indexer_rope_tail_tensor(g->indexer_q, + 1, + DS4_N_INDEXER_HEAD, + DS4_N_INDEXER_HEAD_DIM, + DS4_N_ROT, + pos, + 0, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW) != 0; + if (ok && glm_graph_indexer_qat()) { + ok = ds4_gpu_dsv4_indexer_qat_tensor(g->indexer_q, + DS4_N_INDEXER_HEAD, + DS4_N_INDEXER_HEAD_DIM) != 0; + } + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_attn", "indexer_q"); + if (ok) ok = ds4_gpu_matmul_f32_tensor(g->indexer_weights, + model->map, + model->size, + l->indexer_proj->abs_offset, + DS4_N_EMBD, + DS4_N_INDEXER_HEAD, + g->cur, + 1) != 0; + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_attn", "indexer_weights"); + const float indexer_scale = + 1.0f / sqrtf((float)(DS4_N_INDEXER_HEAD_DIM * DS4_N_INDEXER_HEAD)); + ok = ds4_gpu_glm_indexer_score_one_tensor(g->indexer_scores, + g->indexer_q, + g->indexer_weights, + g->layer_indexer_key_cache[il], + visible, + DS4_N_INDEXER_HEAD, + DS4_N_INDEXER_HEAD_DIM, + indexer_scale, + glm_graph_compact_cache_is_f16()) != 0; + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_attn", "indexer_scores"); + if (ok) ok = ds4_gpu_indexer_topk_tensor(g->indexer_selected, + g->indexer_scores, + visible, + 1, + indexer_top_k) != 0; + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_attn", "indexer_topk"); + last_indexer_selected_count = indexer_top_k; + } + if (ok) last_indexer_selected = g->indexer_selected; + } else if (ok && (!last_indexer_selected || last_indexer_selected_count == 0)) { + ok = false; + } + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_attn", "indexer_select"); + if (ok && !(decode_ablate & (DS4_GLM_ABLATE_ATTN_CORE | DS4_GLM_ABLATE_QKLOW))) { + ok = ds4_gpu_glm_qk_lowrank_typed_tensor(g->qk_low, + g->q, + model->map, + model->size, + l->attn_k_b->abs_offset, + l->attn_k_b->type, + DS4_N_HEAD, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_KEY_MLA) != 0; + if (ok) metal_graph_debug_dump_tensor("glm_decode_qk_low", + g->qk_low, + (uint64_t)DS4_N_HEAD * DS4_N_KV_LORA, + il, + pos); + } + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_attn", "kv_path"); + if (ok && (decode_ablate & DS4_GLM_ABLATE_ATTN_CORE)) { + /* Skip the indexed attention kernels; zero heads so the + * rest of the layer stays finite (timing-only). */ + ok = ds4_gpu_tensor_fill_f32(g->heads, 0.0f, + (uint64_t)g->heads_dim) != 0; + } else if (ok && glm_graph_indexed_decode_split_group8_available(last_indexer_selected_count)) { + const uint32_t split_block_rows = + glm_graph_indexed_decode_split_block_rows_for(last_indexer_selected_count); + const uint32_t split_blocks = + (last_indexer_selected_count + split_block_rows - 1u) / split_block_rows; + ok = ds4_gpu_glm_attention_indexed_decode_split_group8_typed_tensor(g->heads, + g->attn_partial_lora, + g->attn_partial_ms, + g->q, + g->qk_low, + g->layer_kv_lora_cache[il], + g->layer_k_rope_cache[il], + model->map, + model->size, + l->attn_v_b->abs_offset, + l->attn_v_b->type, + last_indexer_selected, + last_indexer_selected_count, + true, + g->compact_cache_cap, + glm_graph_compact_cache_is_f16(), + DS4_N_HEAD, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_ROT, + DS4_N_VALUE_MLA, + 0, + split_block_rows, + split_blocks, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW) != 0; + } else if (ok) { + ok = ds4_gpu_glm_attention_indexed_decode_typed_tensor(g->heads, + g->q, + g->qk_low, + g->layer_kv_lora_cache[il], + g->layer_k_rope_cache[il], + model->map, + model->size, + l->attn_v_b->abs_offset, + l->attn_v_b->type, + last_indexer_selected, + last_indexer_selected_count, + g->compact_cache_cap, + glm_graph_compact_cache_is_f16(), + DS4_N_HEAD, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_ROT, + DS4_N_VALUE_MLA, + 0, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW) != 0; + } + } else { + if (ok) ok = ds4_gpu_glm_k_b_project_typed_tensor(g->k_nope, + g->kv_norm, + model->map, + model->size, + l->attn_k_b->abs_offset, + l->attn_k_b->type, + 1, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_HEAD) != 0; + if (ok) ok = glm_graph_matmul_q8_0_decode_profiled_tensor(g->value, + model, + l->attn_v_b->abs_offset, + DS4_N_KV_LORA, + g->heads_dim, + g->kv_norm, + il, + pos, + "attn_v_b", + g->ssd_streaming) != 0; + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_attn", "kv_path"); + if (ok) ok = ds4_gpu_glm_build_kv_cache_tensor(g->layer_key_cache[il], + g->layer_value_cache[il], + g->kv_raw, + g->k_nope, + g->value, + pos, + 1, + g->ctx_cap, + DS4_N_HEAD, + kv_raw_dim, + DS4_N_KV_LORA, + (uint32_t)g->q_nope, + DS4_N_ROT, + DS4_N_VALUE_MLA, + 0, + rope_base, + rope_scale, + 0.0f, + 1.0f, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW, + true) != 0; + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_attn", "kv_cache"); + if (ok) ok = ds4_gpu_glm_attention_full_tensor(g->heads, + g->q, + g->layer_key_cache[il], + g->layer_value_cache[il], + pos, + 1, + pos + 1u, + g->ctx_cap, + DS4_N_HEAD, + DS4_N_KEY_MLA, + DS4_N_VALUE_MLA, + true) != 0; + } + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_attn", "attention"); + if (ok) metal_graph_debug_dump_tensor("glm_decode_heads", + g->heads, + g->heads_dim, + il, + pos); + if (ok && !(decode_ablate & DS4_GLM_ABLATE_ATTN_OUT)) { + ok = glm_graph_matmul_q8_0_decode_profiled_tensor(g->attn_out, + model, + l->attn_output->abs_offset, + g->heads_dim, + DS4_N_EMBD, + g->heads, + il, + pos, + "attn_o", + g->ssd_streaming) != 0; + } + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_attn", "attn_output"); + if (ok) ok = ds4_gpu_add_rms_norm_weight_tensor(g->ffn_norm, + g->after_attn, + g->cur, + g->attn_out, + model->map, + model->size, + l->ffn_norm->abs_offset, + DS4_N_EMBD, + DS4_RMS_EPS) != 0; + DS4_GLM_PROFILE_DECODE_STAGE("glm_decode_ffn", "ffn_norm"); + if (ok) ok = glm_graph_encode_ffn_one_normed_from(g, + model, + l, + il, + pos, + g->ffn_norm, + g->after_attn, + g->next, + g->ffn_gate, + g->ffn_up, + g->ffn_mid, + g->ffn_out, + g->ffn_sum, + g->attn_out, + decode_stage_profile, + decode_stage_profile ? &decode_stage_t0 : NULL); + if (ok) { + ds4_gpu_tensor *tmp = g->cur; + g->cur = g->next; + g->next = tmp; + } + if (ok && glm_debug_hidden_dump_layer_match(il)) { + ok = ds4_gpu_end_commands() != 0; + if (ok) { + glm_debug_dump_hidden_layer(g->cur, 0, il, pos); + glm_debug_dump_raw_layer(g->router_selected, "sel", + (uint64_t)DS4_N_EXPERT_USED * sizeof(int32_t), + il, (int)pos); + glm_debug_dump_raw_layer(g->router_weights, "selw", + (uint64_t)DS4_N_EXPERT_USED * sizeof(float), + il, (int)pos); + ok = ds4_gpu_begin_commands() != 0; + } + } + if (ok && + !g->ssd_streaming && + decode_layer_flush_interval != 0 && + il < g->layer_end && + (slice_layer_done % decode_layer_flush_interval) == 0) { + if (decode_flush_profile) { + ok = ds4_gpu_flush_commands() != 0; + if (ok) ok = ds4_gpu_synchronize() != 0; + if (ok) { + const double now = now_sec(); + fprintf(stderr, + "ds4: GLM decode layer flush pos=%u layers=%u..%u %.3f ms\n", + pos, + decode_flush_layer0, + il, + (now - decode_flush_stage_t0) * 1000.0); + decode_flush_layer0 = il + 1u; + decode_flush_stage_t0 = now; + ok = ds4_gpu_begin_commands() != 0; + } + } else { + ok = ds4_gpu_flush_commands() != 0; + } + } + if (g->ssd_streaming && !static_decode_map) { + if (ok) ok = ds4_gpu_end_commands() != 0; + else (void)ds4_gpu_synchronize(); + } + } +#undef DS4_GLM_PROFILE_DECODE_STAGE + if (ok && merge_indexed_output) { + if (g->ssd_streaming) { + if (!static_decode_map) { + ok = glm_graph_stream_map_output(g, model, weights); + } + if (ok) ok = glm_graph_begin_commands_if_needed(); + } + ok = glm_graph_encode_output_head(g, model, weights); + if (g->ssd_streaming) { + if (ok) ok = glm_graph_end_commands_if_active(); + else (void)ds4_gpu_synchronize(); + } + } + if (!g->ssd_streaming) { + if (ok) ok = ds4_gpu_end_commands() != 0; + else (void)ds4_gpu_synchronize(); + } else if (!ok) { + (void)ds4_gpu_synchronize(); + } + if (decode_output_profile) { + const double now = now_sec(); + fprintf(stderr, + "ds4: GLM decode output profile pos=%u layers=%.3f ms\n", + pos, + (now - decode_output_stage_t0) * 1000.0); + decode_output_stage_t0 = now; + } + if (ok && output_hc) { + ok = ds4_gpu_tensor_read(g->cur, + 0, + output_hc, + (uint64_t)DS4_N_EMBD * sizeof(float)) != 0; + } + if (ok && logits_out) { + if (use_indexed_attention) { + if (!merge_indexed_output) { + if (g->ssd_streaming && !static_decode_map) { + ok = glm_graph_stream_map_output(g, model, weights); + } + if (ok) ok = glm_graph_begin_commands_if_needed(); + if (ok) ok = glm_graph_encode_output_head(g, model, weights); + if (ok) ok = glm_graph_end_commands_if_active(); + else (void)ds4_gpu_synchronize(); + if (decode_output_profile) { + const double now = now_sec(); + fprintf(stderr, + "ds4: GLM decode output profile pos=%u output_head=%.3f ms\n", + pos, + (now - decode_output_stage_t0) * 1000.0); + decode_output_stage_t0 = now; + } + } + if (ok) { + if (glm_debug_hidden_dump_layer() < 0) + glm_debug_dump_hidden_row(g->cur, 0); + ok = ds4_gpu_tensor_read(g->logits, + 0, + logits_out, + (uint64_t)DS4_N_VOCAB * sizeof(float)) != 0; + if (decode_output_profile) { + const double now = now_sec(); + fprintf(stderr, + "ds4: GLM decode output profile pos=%u logits_read=%.3f ms\n", + pos, + (now - decode_output_stage_t0) * 1000.0); + } + } + } else { + if (g->ssd_streaming && !static_decode_map) { + ok = glm_graph_stream_map_output(g, model, weights); + } + if (ok && ds4_gpu_commands_active()) { + ok = ds4_gpu_end_commands() != 0; + } + if (ok) ok = glm_graph_forward_output_head(g, model, weights, g->cur, logits_out); + if (decode_output_profile) { + const double now = now_sec(); + fprintf(stderr, + "ds4: GLM decode output profile pos=%u fallback_output=%.3f ms\n", + pos, + (now - decode_output_stage_t0) * 1000.0); + } + } + } + if (ok && !logits_out && g->ssd_streaming) { + ok = glm_graph_end_commands_if_active(); + } else if (!ok) { + (void)ds4_gpu_synchronize(); + } + if (!ok && getenv("DS4_GLM_TP_DEBUG")) { + fprintf(stderr, + "ds4: glm forward_token fail pos=%u around layer %u\n", + pos, glm_ft_fail_il); + } + (void)glm_ft_fail_il; + return ok; +#undef DS4_GLM_FT_FAIL +} + +static int glm_metal_first_token_logits( + const ds4_model *model, + const ds4_weights *weights, + int token, + float *logits_out) { + if (!model || !weights || !logits_out) return 1; + if (token < 0 || token >= (int)DS4_N_VOCAB) { + fprintf(stderr, "ds4: GLM token %d is outside vocab\n", token); + return 1; + } + if (!weights->token_embd || weights->token_embd->type != DS4_TENSOR_Q8_0 || + !weights->output_norm || weights->output_norm->type != DS4_TENSOR_F32 || + !weights->output || weights->output->type != DS4_TENSOR_Q8_0 || + weights->output_norm->dim[0] != DS4_N_EMBD || + weights->output->dim[0] != DS4_N_EMBD || + weights->output->dim[1] != DS4_N_VOCAB) { + fprintf(stderr, "ds4: GLM Metal first-token path found unexpected embedding/output layout\n"); + return 1; + } + if (DS4_N_LAYER <= DS4_N_NEXTN_PREDICT) { + fprintf(stderr, "ds4: GLM Metal first-token path has no normal transformer layers\n"); + return 1; + } + + const uint32_t normal_layers = DS4_N_LAYER - DS4_N_NEXTN_PREDICT; + const uint64_t heads_dim = (uint64_t)DS4_N_HEAD * DS4_N_VALUE_MLA; + uint64_t kv_raw_dim = 0; + uint64_t dense_hidden_max = DS4_N_FF_EXP; + bool generic_routed_moe = false; + for (uint32_t il = 0; il < normal_layers; il++) { + const ds4_layer_weights *l = &weights->layer[il]; + if (l->attn_kv_a_mqa && l->attn_kv_a_mqa->dim[1] > kv_raw_dim) { + kv_raw_dim = l->attn_kv_a_mqa->dim[1]; + } + if (il < DS4_N_LEADING_DENSE && l->ffn_gate && + l->ffn_gate->dim[1] > dense_hidden_max) { + dense_hidden_max = l->ffn_gate->dim[1]; + } + if (glm_graph_layer_uses_generic_routed_moe(l)) generic_routed_moe = true; + } + if (kv_raw_dim < DS4_N_KV_LORA) { + fprintf(stderr, "ds4: GLM Metal first-token path found no valid KV projection\n"); + return 1; + } + + const uint64_t emb_bytes = (uint64_t)DS4_N_EMBD * sizeof(float); + const uint64_t sparse_mid_elems = (uint64_t)DS4_N_EXPERT_USED * DS4_N_FF_EXP; + const uint64_t ffn_mid_elems = + dense_hidden_max > sparse_mid_elems ? dense_hidden_max : sparse_mid_elems; + const uint64_t routed_mid_bytes = + (uint64_t)DS4_N_EXPERT_USED * DS4_N_FF_EXP * sizeof(float); + const uint64_t routed_down_bytes = + (uint64_t)DS4_N_EXPERT_USED * DS4_N_EMBD * sizeof(float); + const uint64_t logits_bytes = (uint64_t)DS4_N_VOCAB * sizeof(float); + + ds4_gpu_tensor *cur = NULL; + ds4_gpu_tensor *attn_norm = NULL; + ds4_gpu_tensor *kv_raw = NULL; + ds4_gpu_tensor *kv_norm = NULL; + ds4_gpu_tensor *heads = NULL; + ds4_gpu_tensor *attn_out = NULL; + ds4_gpu_tensor *after_attn = NULL; + ds4_gpu_tensor *ffn_norm = NULL; + ds4_gpu_tensor *ffn_gate = NULL; + ds4_gpu_tensor *ffn_up = NULL; + ds4_gpu_tensor *ffn_mid = NULL; + ds4_gpu_tensor *routed_gate = NULL; + ds4_gpu_tensor *routed_up = NULL; + ds4_gpu_tensor *routed_down = NULL; + ds4_gpu_tensor *ffn_out = NULL; + ds4_gpu_tensor *ffn_sum = NULL; + ds4_gpu_tensor *next = NULL; + ds4_gpu_tensor *router_logits = NULL; + ds4_gpu_tensor *router_probs = NULL; + ds4_gpu_tensor *router_selected = NULL; + ds4_gpu_tensor *router_weights = NULL; + ds4_gpu_tensor *logits = NULL; + + int ok = 1; +#define DS4_GLM_FIRST_ALLOC_TENSOR(var, bytes_) \ + do { \ + (var) = ds4_gpu_tensor_alloc((bytes_)); \ + if (!(var)) { \ + fprintf(stderr, "ds4: GLM Metal first-token path could not allocate %s\n", #var); \ + ok = 0; \ + } \ + } while (0) + + DS4_GLM_FIRST_ALLOC_TENSOR(cur, emb_bytes); + DS4_GLM_FIRST_ALLOC_TENSOR(attn_norm, emb_bytes); + DS4_GLM_FIRST_ALLOC_TENSOR(kv_raw, kv_raw_dim * sizeof(float)); + DS4_GLM_FIRST_ALLOC_TENSOR(kv_norm, (uint64_t)DS4_N_KV_LORA * sizeof(float)); + DS4_GLM_FIRST_ALLOC_TENSOR(heads, heads_dim * sizeof(float)); + DS4_GLM_FIRST_ALLOC_TENSOR(attn_out, emb_bytes); + DS4_GLM_FIRST_ALLOC_TENSOR(after_attn, emb_bytes); + DS4_GLM_FIRST_ALLOC_TENSOR(ffn_norm, emb_bytes); + DS4_GLM_FIRST_ALLOC_TENSOR(ffn_gate, dense_hidden_max * sizeof(float)); + DS4_GLM_FIRST_ALLOC_TENSOR(ffn_up, dense_hidden_max * sizeof(float)); + DS4_GLM_FIRST_ALLOC_TENSOR(ffn_mid, ffn_mid_elems * sizeof(float)); + if (generic_routed_moe) { + DS4_GLM_FIRST_ALLOC_TENSOR(routed_gate, routed_mid_bytes); + DS4_GLM_FIRST_ALLOC_TENSOR(routed_up, routed_mid_bytes); + DS4_GLM_FIRST_ALLOC_TENSOR(routed_down, routed_down_bytes); + } + DS4_GLM_FIRST_ALLOC_TENSOR(ffn_out, emb_bytes); + DS4_GLM_FIRST_ALLOC_TENSOR(ffn_sum, emb_bytes); + DS4_GLM_FIRST_ALLOC_TENSOR(next, emb_bytes); + DS4_GLM_FIRST_ALLOC_TENSOR(router_logits, (uint64_t)DS4_N_EXPERT * sizeof(float)); + DS4_GLM_FIRST_ALLOC_TENSOR(router_probs, (uint64_t)DS4_N_EXPERT * sizeof(float)); + DS4_GLM_FIRST_ALLOC_TENSOR(router_selected, (uint64_t)DS4_N_EXPERT_USED * sizeof(int32_t)); + DS4_GLM_FIRST_ALLOC_TENSOR(router_weights, (uint64_t)DS4_N_EXPERT_USED * sizeof(float)); + DS4_GLM_FIRST_ALLOC_TENSOR(logits, logits_bytes); +#undef DS4_GLM_FIRST_ALLOC_TENSOR + + if (ok) { + ok = ds4_gpu_embed_token_q8_0_tensor(cur, + model->map, + model->size, + weights->token_embd->abs_offset, + DS4_N_VOCAB, + (uint32_t)token, + DS4_N_EMBD); + } + for (uint32_t il = 0; ok && il < normal_layers; il++) { + const ds4_layer_weights *gl = &weights->layer[il]; + const uint64_t gl_kv_raw_dim = gl->attn_kv_a_mqa ? gl->attn_kv_a_mqa->dim[1] : 0; + if (!gl->attn_norm || + !gl->attn_kv_a_mqa || + !gl->attn_kv_a_norm || + !gl->attn_v_b || + !gl->attn_output || + !gl->ffn_norm || + gl_kv_raw_dim < DS4_N_KV_LORA || + gl_kv_raw_dim > kv_raw_dim || + gl->attn_kv_a_mqa->type != DS4_TENSOR_Q8_0 || + gl->attn_kv_a_mqa->dim[0] != DS4_N_EMBD || + gl->attn_v_b->type != DS4_TENSOR_Q8_0 || + gl->attn_v_b->dim[0] != DS4_N_KV_LORA || + gl->attn_v_b->dim[1] != DS4_N_VALUE_MLA || + gl->attn_v_b->dim[2] != DS4_N_HEAD || + gl->attn_output->type != DS4_TENSOR_Q8_0 || + gl->attn_output->dim[0] != heads_dim || + gl->attn_output->dim[1] != DS4_N_EMBD) { + fprintf(stderr, + "ds4: GLM Metal first-token path found unexpected attention layout in layer %u\n", + il); + ok = 0; + break; + } + + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(attn_norm, cur, + model->map, model->size, + gl->attn_norm->abs_offset, + DS4_N_EMBD, DS4_RMS_EPS); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(kv_raw, + model->map, + model->size, + gl->attn_kv_a_mqa->abs_offset, + DS4_N_EMBD, + gl_kv_raw_dim, + attn_norm, + 1); + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(kv_norm, kv_raw, + model->map, model->size, + gl->attn_kv_a_norm->abs_offset, + DS4_N_KV_LORA, DS4_RMS_EPS); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(heads, + model->map, + model->size, + gl->attn_v_b->abs_offset, + DS4_N_KV_LORA, + heads_dim, + kv_norm, + 1); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(attn_out, + model->map, + model->size, + gl->attn_output->abs_offset, + heads_dim, + DS4_N_EMBD, + heads, + 1); + if (ok) ok = ds4_gpu_add_tensor(after_attn, cur, attn_out, DS4_N_EMBD); + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(ffn_norm, after_attn, + model->map, model->size, + gl->ffn_norm->abs_offset, + DS4_N_EMBD, DS4_RMS_EPS); + if (il < DS4_N_LEADING_DENSE) { + const uint64_t gl_ffn_hidden = gl->ffn_gate ? gl->ffn_gate->dim[1] : 0; + if (!gl->ffn_gate || + !gl->ffn_up || + !gl->ffn_down || + gl->ffn_gate->type != DS4_TENSOR_Q8_0 || + gl->ffn_up->type != DS4_TENSOR_Q8_0 || + gl->ffn_down->type != DS4_TENSOR_Q8_0 || + gl->ffn_gate->dim[0] != DS4_N_EMBD || + gl->ffn_up->dim[0] != DS4_N_EMBD || + gl->ffn_up->dim[1] != gl_ffn_hidden || + gl->ffn_down->dim[0] != gl_ffn_hidden || + gl->ffn_down->dim[1] != DS4_N_EMBD || + gl_ffn_hidden > dense_hidden_max) { + fprintf(stderr, + "ds4: GLM Metal first-token path found unexpected dense FFN layout in layer %u\n", + il); + ok = 0; + break; + } + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(ffn_gate, + model->map, + model->size, + gl->ffn_gate->abs_offset, + DS4_N_EMBD, + gl_ffn_hidden, + ffn_norm, + 1); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(ffn_up, + model->map, + model->size, + gl->ffn_up->abs_offset, + DS4_N_EMBD, + gl_ffn_hidden, + ffn_norm, + 1); + if (ok) ok = ds4_gpu_swiglu_tensor(ffn_mid, ffn_gate, ffn_up, + (uint32_t)gl_ffn_hidden, 0.0f, 1.0f); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(ffn_out, + model->map, + model->size, + gl->ffn_down->abs_offset, + gl_ffn_hidden, + DS4_N_EMBD, + ffn_mid, + 1); + if (ok) ok = ds4_gpu_add_tensor(next, after_attn, ffn_out, DS4_N_EMBD); + } else { + const uint32_t gl_gate_type = gl->ffn_gate_exps ? gl->ffn_gate_exps->type : 0; + const uint32_t gl_up_type = gl->ffn_up_exps ? gl->ffn_up_exps->type : 0; + const bool gl_gate_pair_supported = + glm_graph_gate_pair_type_supported(gl_gate_type, gl_up_type); + uint64_t gate_in = 0, gate_out = 0, gate_row_bytes = 0; + uint64_t up_in = 0, up_out = 0, up_row_bytes = 0; + uint64_t down_in = 0, down_out = 0, down_row_bytes = 0; + + if (!gl->ffn_gate_inp || + !gl->ffn_exp_probs_b || + !gl->ffn_gate_exps || + !gl->ffn_up_exps || + !gl->ffn_down_exps || + !gl->ffn_gate_shexp || + !gl->ffn_up_shexp || + !gl->ffn_down_shexp || + gl->ffn_gate_inp->type != DS4_TENSOR_F32 || + gl->ffn_gate_inp->dim[0] != DS4_N_EMBD || + gl->ffn_gate_inp->dim[1] != DS4_N_EXPERT || + gl->ffn_exp_probs_b->type != DS4_TENSOR_F32 || + gl->ffn_exp_probs_b->dim[0] != DS4_N_EXPERT || + !gl_gate_pair_supported || + !glm_graph_down_type_supported(gl->ffn_down_exps->type) || + gl->ffn_gate_shexp->type != DS4_TENSOR_Q8_0 || + gl->ffn_up_shexp->type != DS4_TENSOR_Q8_0 || + gl->ffn_down_shexp->type != DS4_TENSOR_Q8_0 || + gl->ffn_gate_shexp->dim[0] != DS4_N_EMBD || + gl->ffn_gate_shexp->dim[1] != DS4_N_FF_EXP || + gl->ffn_up_shexp->dim[0] != DS4_N_EMBD || + gl->ffn_up_shexp->dim[1] != DS4_N_FF_EXP || + gl->ffn_down_shexp->dim[0] != DS4_N_FF_EXP || + gl->ffn_down_shexp->dim[1] != DS4_N_EMBD || + sparse_mid_elems > ffn_mid_elems) { + fprintf(stderr, + "ds4: GLM Metal first-token path found unexpected sparse FFN layout in layer %u\n", + il); + ok = 0; + break; + } + + (void)tensor_expert_bytes(model, gl->ffn_gate_exps, 0, + &gate_in, &gate_out, &gate_row_bytes); + (void)tensor_expert_bytes(model, gl->ffn_up_exps, 0, + &up_in, &up_out, &up_row_bytes); + (void)tensor_expert_bytes(model, gl->ffn_down_exps, 0, + &down_in, &down_out, &down_row_bytes); + if (gate_in != DS4_N_EMBD || + up_in != DS4_N_EMBD || + down_in != DS4_N_FF_EXP || + gate_out != DS4_N_FF_EXP || + up_out != DS4_N_FF_EXP || + down_out != DS4_N_EMBD) { + fprintf(stderr, + "ds4: GLM Metal first-token path found unexpected expert strides in layer %u\n", + il); + ok = 0; + break; + } + + if (ok) ok = ds4_gpu_matmul_f32_tensor(router_logits, + model->map, + model->size, + gl->ffn_gate_inp->abs_offset, + DS4_N_EMBD, + DS4_N_EXPERT, + ffn_norm, + 1); + if (ok) ok = ds4_gpu_glm_router_select_tensor(router_selected, + router_weights, + router_probs, + model->map, + model->size, + gl->ffn_exp_probs_b->abs_offset, + router_logits, + DS4_N_EXPERT, + DS4_N_EXPERT_USED, + DS4_EXPERT_WEIGHT_SCALE); + ds4_glm_gpu_graph route_g = { + .routed_gate = routed_gate, + .routed_up = routed_up, + .routed_down = routed_down, + }; + if (ok) ok = glm_graph_routed_moe_one_dispatch( + &route_g, + model, + gl, + il, + ffn_out, + ffn_mid, + gate_out * gate_row_bytes, + gate_row_bytes, + up_out * up_row_bytes, + up_row_bytes, + down_out * down_row_bytes, + down_row_bytes, + router_selected, + router_weights, + ffn_norm, + false); + if (ok) ok = ds4_gpu_shared_gate_up_swiglu_q8_0_tensor( + ffn_gate, + ffn_up, + ffn_mid, + model->map, + model->size, + gl->ffn_gate_shexp->abs_offset, + gl->ffn_up_shexp->abs_offset, + DS4_N_EMBD, + DS4_N_FF_EXP, + ffn_norm, + 0.0f); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(ffn_sum, + model->map, + model->size, + gl->ffn_down_shexp->abs_offset, + DS4_N_FF_EXP, + DS4_N_EMBD, + ffn_mid, + 1); + if (ok) ok = ds4_gpu_add_tensor(attn_out, ffn_out, ffn_sum, DS4_N_EMBD); + if (ok) ok = ds4_gpu_add_tensor(next, after_attn, attn_out, DS4_N_EMBD); + } + + if (ok) { + ds4_gpu_tensor *tmp = cur; + cur = next; + next = tmp; + } + } + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(ffn_norm, cur, + model->map, model->size, + weights->output_norm->abs_offset, + DS4_N_EMBD, DS4_RMS_EPS); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(logits, + model->map, + model->size, + weights->output->abs_offset, + DS4_N_EMBD, + DS4_N_VOCAB, + ffn_norm, + 1); + if (ok) ok = ds4_gpu_tensor_read(logits, 0, logits_out, logits_bytes) != 0; + + ds4_gpu_tensor_free(router_weights); + ds4_gpu_tensor_free(router_selected); + ds4_gpu_tensor_free(router_probs); + ds4_gpu_tensor_free(router_logits); + ds4_gpu_tensor_free(logits); + ds4_gpu_tensor_free(next); + ds4_gpu_tensor_free(ffn_sum); + ds4_gpu_tensor_free(ffn_out); + ds4_gpu_tensor_free(routed_down); + ds4_gpu_tensor_free(routed_up); + ds4_gpu_tensor_free(routed_gate); + ds4_gpu_tensor_free(ffn_mid); + ds4_gpu_tensor_free(ffn_up); + ds4_gpu_tensor_free(ffn_gate); + ds4_gpu_tensor_free(ffn_norm); + ds4_gpu_tensor_free(after_attn); + ds4_gpu_tensor_free(attn_out); + ds4_gpu_tensor_free(heads); + ds4_gpu_tensor_free(kv_norm); + ds4_gpu_tensor_free(kv_raw); + ds4_gpu_tensor_free(attn_norm); + ds4_gpu_tensor_free(cur); + return ok ? 0 : 1; +} + +static DS4_MAYBE_UNUSED int generate_glm_metal_first_token( + const ds4_model * model, + const ds4_vocab * vocab, + const ds4_weights * weights, + const token_vec * prompt, + int n_predict, + int ctx_size, + ds4_token_emit_fn emit, + ds4_generation_done_fn done, + void * emit_ud) { + fprintf(stderr, "ds4: using GLM Metal first-token generation path\n"); + + if (prompt->len != 1 || prompt->len > ctx_size) { + fprintf(stderr, + "ds4: GLM Metal generation currently supports exactly one prompt token; " + "multi-token prefill needs the GLM KV/DSA graph\n"); + return 1; + } + if (n_predict <= 0) { + if (done) done(emit_ud); + return 0; + } + if (n_predict > 1) { + fprintf(stderr, + "ds4: GLM Metal generation currently emits only the first generated token; " + "stopping after one token\n"); + } + + float *logits = xmalloc((size_t)DS4_N_VOCAB * sizeof(logits[0])); + const double t0 = now_sec(); + const int rc = glm_metal_first_token_logits(model, weights, prompt->v[0], logits); + const double t1 = now_sec(); + if (rc != 0) { + free(logits); + return 1; + } + + if (getenv("DS4_TRACE_TOP") != NULL) { + print_top_logits(stderr, "GLM first-token", vocab, logits, DS4_N_VOCAB, 10); + } + const int token = sample_argmax(logits, DS4_N_VOCAB); + if (!vocab_token_is_generation_stop(vocab, token) && emit) emit(emit_ud, token); + if (done) done(emit_ud); + + const double eval_s = t1 - t0; + ds4_log(stderr, + DS4_LOG_TIMING, + "ds4: GLM first-token eval: %.2f t/s\n", + eval_s > 0.0 ? 1.0 / eval_s : 0.0); + + free(logits); + return 0; +} + +static int generate_glm_metal_argmax( + const ds4_model * model, + const ds4_vocab * vocab, + const ds4_weights * weights, + const token_vec * prompt, + int n_predict, + int ctx_size, + bool quality, + bool ssd_streaming, + bool ssd_streaming_cold, + uint32_t ssd_streaming_preload_experts, + ds4_token_emit_fn emit, + ds4_generation_done_fn done, + void * emit_ud, + ds4_session_progress_fn progress, + void * progress_ud) { + fprintf(stderr, "ds4: using GLM Metal full-attention argmax generation path\n"); + + if (!prompt || prompt->len <= 0 || prompt->len > ctx_size) { + fprintf(stderr, "ds4: prompt is empty or exceeds context size\n"); + return 1; + } + if (n_predict <= 0) { + if (done) done(emit_ud); + return 0; + } + + ds4_glm_gpu_graph g; + if (!glm_graph_alloc(&g, + model, + weights, + ctx_size, + ssd_streaming, + ssd_streaming_cold)) { + fprintf(stderr, "ds4: failed to allocate GLM Metal graph runtime\n"); + return 1; + } + g.quality = quality; + if ((uint32_t)prompt->len >= g.ctx_size) { + fprintf(stderr, + "ds4: prompt length %d leaves no GLM Metal context room (ctx %u)\n", + prompt->len, + g.ctx_size); + glm_graph_free(&g); + return 1; + } + const bool memory_report = getenv("DS4_METAL_MEMORY_REPORT") != NULL; + if (memory_report) ds4_gpu_print_memory_report("after GLM graph alloc"); + + float *logits = xmalloc((size_t)DS4_N_VOCAB * sizeof(logits[0])); + bool ok = true; + const char *hotlist_path = getenv("DS4_METAL_STREAMING_EXPERT_HOTLIST"); + const bool seed_before_prefill = + ssd_streaming && + getenv("DS4_METAL_GLM_DISABLE_STREAMING_SEED_BEFORE_PREFILL") == NULL && + (ssd_streaming_preload_experts != 0 || + (hotlist_path && hotlist_path[0])); + const double t_prefill0 = now_sec(); + if (seed_before_prefill) { + ds4_gpu_graph seed_graph; + memset(&seed_graph, 0, sizeof(seed_graph)); + seed_graph.quality = quality; + seed_graph.ssd_streaming = ssd_streaming; + seed_graph.ssd_streaming_cold = ssd_streaming_cold; + seed_graph.streaming_preload_experts = ssd_streaming_preload_experts; + ok = metal_graph_seed_streaming_expert_cache_from_hotlist(&seed_graph, + model, + weights); + } + if (ok) { + ok = glm_graph_prefill_range(&g, + model, + weights, + prompt->v, + 0, + (uint32_t)prompt->len, + logits, + progress, + progress_ud, + (uint32_t)prompt->len); + } + const double t_prefill1 = now_sec(); + if (memory_report) ds4_gpu_print_memory_report("after GLM prefill"); + if (!ok) { + fprintf(stderr, "ds4: GLM Metal prefill failed\n"); + free(logits); + glm_graph_free(&g); + return 1; + } + + int n_generated = 0; + int n_decode_eval = 0; + uint32_t pos = (uint32_t)prompt->len; + const bool token_timing = getenv("DS4_TOKEN_TIMING") != NULL; + const double t_decode0 = now_sec(); + for (int i = 0; i < n_predict && pos < g.ctx_size; i++) { + if (getenv("DS4_TRACE_TOP") != NULL) { + char label[64]; + snprintf(label, sizeof(label), "GLM step %d", i); + print_top_logits(stderr, label, vocab, logits, DS4_N_VOCAB, 10); + } + const int token = sample_argmax(logits, DS4_N_VOCAB); + if (vocab_token_is_generation_stop(vocab, token)) break; + if (emit) emit(emit_ud, token); + n_generated++; + + if (i == n_predict - 1 || pos + 1u >= g.ctx_size) { + pos++; + break; + } + + const double t_eval0 = token_timing ? now_sec() : 0.0; + ok = glm_graph_forward_token(&g, model, weights, token, NULL, pos, NULL, logits); + if (!ok) { + fprintf(stderr, "ds4: GLM Metal decode failed at position %u\n", pos); + free(logits); + glm_graph_free(&g); + return 1; + } + if (token_timing) { + const double t_eval1 = now_sec(); + fprintf(stderr, + "ds4: GLM decode eval %d took %.3f ms\n", + n_decode_eval + 1, + (t_eval1 - t_eval0) * 1000.0); + } + n_decode_eval++; + pos++; + } + const double t_decode1 = now_sec(); + if (done) done(emit_ud); + + const double prefill_s = t_prefill1 - t_prefill0; + const double decode_s = t_decode1 - t_decode0; + ds4_log(stderr, + DS4_LOG_TIMING, + "ds4: GLM prefill: %.2f t/s, generation: %.2f t/s\n", + prefill_s > 0.0 ? (double)prompt->len / prefill_s : 0.0, + decode_s > 0.0 ? (double)n_generated / decode_s : 0.0); + + if (memory_report) ds4_gpu_print_memory_report("before GLM graph free"); + free(logits); + glm_graph_free(&g); + return 0; +} + /* Metal generation entry point. The model runs as one local whole-graph * pipeline: graph prefill followed by graph decode steps. Streaming PRO may * use decode-style prefill for short prompts. */ @@ -29362,6 +39426,40 @@ static int generate_metal_graph_raw_swa( fprintf(stderr, "ds4: prompt is empty or exceeds context size\n"); return 1; } + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + if (power_percent > 0 && power_percent < 100) { + fprintf(stderr, "ds4: --power is not supported by the GLM Metal path yet\n"); + return 1; + } + if (prefill_chunk != 0) { + fprintf(stderr, + "ds4: --prefill-chunk is not supported by the GLM Metal path; " + "GLM uses graph-selected prefill chunks\n"); + return 1; + } + if ((directional_steering_file && directional_steering_file[0]) || + directional_steering_attn != 0.0f || + directional_steering_ffn != 0.0f) { + fprintf(stderr, + "ds4: directional steering is not supported by the GLM Metal path yet\n"); + return 1; + } + return generate_glm_metal_argmax(model, + vocab, + weights, + prompt, + n_predict, + ctx_size, + quality, + ssd_streaming, + ssd_streaming_cold, + ssd_streaming_preload_experts, + emit, + done, + emit_ud, + progress, + progress_ud); + } const uint32_t prefill_cap = metal_graph_prefill_cap_for_prompt(prompt->len, prefill_chunk); @@ -29441,7 +39539,7 @@ static int generate_metal_graph_raw_swa( } int token = sample_argmax(logits, DS4_N_VOCAB); - if (token == vocab->eos_id) break; + if (vocab_token_is_generation_stop(vocab, token)) break; if (emit) emit(emit_ud, token); n_generated++; @@ -29485,12 +39583,14 @@ static int generate_metal_graph_raw_swa( #endif #ifdef DS4_NO_GPU -ds4_context_memory ds4_context_memory_estimate_with_prefill( +ds4_context_memory ds4_context_memory_estimate_with_prefill_mode( ds4_backend backend, int ctx_size, - uint32_t prefill_chunk) { + uint32_t prefill_chunk, + bool ssd_streaming) { (void)backend; (void)prefill_chunk; + (void)ssd_streaming; ds4_context_memory m = {0}; uint32_t ctx = ctx_size > 0 ? (uint32_t)ctx_size : 1u; @@ -29521,6 +39621,16 @@ ds4_context_memory ds4_context_memory_estimate_with_prefill( return m; } +ds4_context_memory ds4_context_memory_estimate_with_prefill( + ds4_backend backend, + int ctx_size, + uint32_t prefill_chunk) { + return ds4_context_memory_estimate_with_prefill_mode(backend, + ctx_size, + prefill_chunk, + false); +} + ds4_context_memory ds4_context_memory_estimate(ds4_backend backend, int ctx_size) { return ds4_context_memory_estimate_with_prefill(backend, ctx_size, 0); @@ -29722,6 +39832,16 @@ struct ds4_session { ds4_dist_session *distributed; #ifndef DS4_NO_GPU ds4_gpu_graph graph; + ds4_glm_gpu_graph glm_graph; + bool glm_graph_ready; + uint32_t glm_dense_cache_len; + /* GLM MTP speculative state (DS4_GLM_MTP=1, greedy only). */ + int glm_mtp_draft; + int glm_mtp_have; + int glm_spec_inside; + uint32_t glm_mtp_min_pos; + float *glm_mtp_hc; + float *glm_mtp_logits0; #endif ds4_kv_cache cpu_cache; ds4_cpu_decode_scratch cpu_scratch; @@ -30090,6 +40210,31 @@ static DS4_MAYBE_UNUSED int payload_read_bytes(FILE *fp, void *ptr, uint64_t byt return 0; } +static DS4_MAYBE_UNUSED int payload_skip_bytes(FILE *fp, uint64_t bytes, + uint8_t *buf, size_t cap, + uint64_t *remaining, + char *err, size_t errlen) { + if (remaining && *remaining < bytes) { + payload_set_err(err, errlen, "truncated session payload"); + return 1; + } + if (!buf || cap == 0) { + payload_set_err(err, errlen, "session payload skip buffer is missing"); + return 1; + } + const uint64_t original = bytes; + while (bytes != 0) { + const size_t n = bytes > (uint64_t)cap ? cap : (size_t)bytes; + if (fread(buf, 1, n, fp) != n) { + payload_set_err(err, errlen, "failed to skip session payload"); + return 1; + } + bytes -= n; + } + if (remaining) *remaining -= original; + return 0; +} + static DS4_MAYBE_UNUSED int payload_write_u32(FILE *fp, uint32_t v, char *err, size_t errlen) { uint8_t b[4]; payload_put_u32(b, v); @@ -30178,6 +40323,99 @@ static uint64_t session_payload_live_tensor_bytes(const ds4_gpu_graph *g, uint32 return bytes; } +static uint32_t session_glm_full_live_rows(const ds4_glm_gpu_graph *g, + uint32_t checkpoint_len, + uint32_t dense_cache_len) { + if (!g) return 0; + if (!g->full_kv_cache) return 0; + uint32_t rows = g->ctx_cap; + if (rows > checkpoint_len) rows = checkpoint_len; + if (rows > dense_cache_len) rows = dense_cache_len; + return rows; +} + +static uint32_t session_glm_compact_live_rows(const ds4_glm_gpu_graph *g, uint32_t checkpoint_len) { + if (!g || g->compact_cache_cap == 0) return 0; + uint32_t rows = g->compact_cache_cap; + if (rows > checkpoint_len) rows = checkpoint_len; + return rows; +} + +static uint64_t session_glm_payload_live_tensor_bytes(const ds4_glm_gpu_graph *g, + uint32_t full_live, + uint32_t compact_live) { + if (!g) return 0; + uint64_t bytes = 0; + for (uint32_t il = 0; il < g->normal_layers; il++) { + bytes += (uint64_t)full_live * g->q_dim * sizeof(float); + bytes += (uint64_t)full_live * g->heads_dim * sizeof(float); + if (compact_live == 0) continue; + bytes += (uint64_t)compact_live * DS4_N_KV_LORA * sizeof(float); + bytes += (uint64_t)compact_live * DS4_N_ROT * sizeof(float); + if (glm_graph_layer_uses_full_indexer(il)) { + bytes += (uint64_t)compact_live * DS4_N_INDEXER_HEAD_DIM * sizeof(float); + } + } + return bytes; +} + +static bool payload_u64_add(uint64_t *acc, uint64_t value) { + if (!acc || *acc > UINT64_MAX - value) return false; + *acc += value; + return true; +} + +static bool payload_u64_mul(uint64_t a, uint64_t b, uint64_t *out) { + if (!out) return false; + if (a != 0 && b > UINT64_MAX / a) return false; + *out = a * b; + return true; +} + +static bool payload_u64_add_tensor_bytes(uint64_t *acc, uint64_t rows, uint64_t cols) { + uint64_t elems = 0; + uint64_t bytes = 0; + return payload_u64_mul(rows, cols, &elems) && + payload_u64_mul(elems, sizeof(float), &bytes) && + payload_u64_add(acc, bytes); +} + +static bool glm_layer_payload_tensor_bytes(uint32_t layer, + uint32_t full_live, + uint32_t key_dim, + uint32_t value_dim, + uint32_t compact_live, + uint32_t index_live, + uint64_t *out) { + if (!out || layer >= glm_graph_normal_layer_count() || + key_dim != DS4_N_KEY_MLA || + value_dim != DS4_N_VALUE_MLA) + return false; + + const bool has_indexer = glm_graph_layer_uses_full_indexer(layer); + const uint32_t expected_index_live = + compact_live != 0 && has_indexer ? compact_live : 0; + if (index_live != expected_index_live) return false; + + uint64_t bytes = 0; + if (!payload_u64_add_tensor_bytes(&bytes, full_live, + (uint64_t)DS4_N_HEAD * DS4_N_KEY_MLA) || + !payload_u64_add_tensor_bytes(&bytes, full_live, + (uint64_t)DS4_N_HEAD * DS4_N_VALUE_MLA)) + return false; + if (compact_live != 0) { + if (!payload_u64_add_tensor_bytes(&bytes, compact_live, DS4_N_KV_LORA) || + !payload_u64_add_tensor_bytes(&bytes, compact_live, DS4_N_ROT)) + return false; + if (has_indexer && + !payload_u64_add_tensor_bytes(&bytes, index_live, DS4_N_INDEXER_HEAD_DIM)) + return false; + } + + *out = bytes; + return true; +} + /* Accelerator tensors are copied through a fixed-size CPU buffer. We do not mmap the * cache file and we do not allocate a second graph-sized blob just to serialize * it; both would be poor fits for this very large model. */ @@ -30304,6 +40542,67 @@ static DS4_MAYBE_UNUSED int payload_read_tensor_span_f32_as_f16(FILE *fp, ds4_gp } return 0; } + +static int payload_write_glm_compact_span(FILE *fp, const ds4_gpu_tensor *tensor, + uint64_t count, uint8_t *buf, size_t cap, + char *err, size_t errlen) { + if (glm_graph_compact_cache_is_f16()) { + return payload_write_tensor_span_f16_as_f32(fp, tensor, 0, count, buf, cap, err, errlen); + } + return payload_write_tensor_span(fp, tensor, 0, count * sizeof(float), buf, cap, err, errlen); +} + +static int payload_read_glm_compact_span(FILE *fp, ds4_gpu_tensor *tensor, + uint64_t count, uint8_t *buf, size_t cap, + uint64_t *remaining, char *err, size_t errlen) { + if (glm_graph_compact_cache_is_f16()) { + return payload_read_tensor_span_f32_as_f16(fp, tensor, 0, count, buf, cap, remaining, err, errlen); + } + return payload_read_tensor_span(fp, tensor, 0, count * sizeof(float), buf, cap, remaining, err, errlen); +} + +static int payload_write_glm_full_kv_span(FILE *fp, + const ds4_gpu_tensor *tensor, + uint64_t count, + uint8_t *buf, size_t cap, + char *err, size_t errlen) { + if (count == 0) return 0; + return payload_write_tensor_span_f16_as_f32(fp, tensor, 0, count, buf, cap, err, errlen); +} + +static int payload_read_glm_full_kv_span(FILE *fp, + ds4_gpu_tensor *tensor, + uint64_t count, + uint8_t *buf, size_t cap, + uint64_t *remaining, + char *err, size_t errlen) { + if (count == 0) return 0; + return payload_read_tensor_span_f32_as_f16(fp, tensor, 0, count, buf, cap, remaining, err, errlen); +} + +static int payload_read_or_skip_glm_full_kv_span(FILE *fp, + ds4_gpu_tensor *tensor, + uint64_t count, + uint8_t *buf, size_t cap, + uint64_t *remaining, + char *err, size_t errlen) { + if (count == 0) return 0; + if (tensor) { + return payload_read_glm_full_kv_span(fp, + tensor, + count, + buf, + cap, + remaining, + err, + errlen); + } + if (count > UINT64_MAX / sizeof(float)) { + payload_set_err(err, errlen, "GLM full KV payload is too large"); + return 1; + } + return payload_skip_bytes(fp, count * sizeof(float), buf, cap, remaining, err, errlen); +} #endif static bool ds4_session_is_cpu(const ds4_session *s) { @@ -30337,6 +40636,40 @@ static void ds4_session_dspark_capture_note_checkpoint(ds4_session *s) { #endif } +static bool ds4_session_is_glm(const ds4_session *s) { + return s && s->engine && DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA; +} + +#ifndef DS4_NO_GPU +static void ds4_session_glm_reset_dense_cache(ds4_session *s) { + if (s) s->glm_dense_cache_len = 0; +} + +static void ds4_session_glm_cap_dense_cache(ds4_session *s) { + if (!s) return; + if (s->glm_graph_ready && !s->glm_graph.full_kv_cache) { + s->glm_dense_cache_len = 0; + return; + } + uint32_t cap = s->checkpoint.len > 0 ? (uint32_t)s->checkpoint.len : 0; + if (s->glm_graph_ready && cap > s->glm_graph.ctx_cap) cap = s->glm_graph.ctx_cap; + if (s->glm_dense_cache_len > cap) s->glm_dense_cache_len = cap; +} + +static void ds4_session_glm_note_dense_cache(ds4_session *s, + uint32_t pos0, + uint32_t n_tokens) { + if (!s || n_tokens == 0) return; + if (s->glm_graph_ready && !s->glm_graph.full_kv_cache) return; + if (pos0 > s->glm_dense_cache_len) return; + uint32_t end = pos0 + n_tokens; + if (end < pos0) end = UINT32_MAX; + if (s->glm_graph_ready && end > s->glm_graph.ctx_cap) end = s->glm_graph.ctx_cap; + s->glm_dense_cache_len = end; + ds4_session_glm_cap_dense_cache(s); +} +#endif + static uint32_t session_cpu_raw_live_rows(const ds4_session *s) { if (!s || !s->checkpoint_valid) return 0; uint32_t rows = ds4_default_raw_cap((uint32_t)s->ctx_size); @@ -30383,7 +40716,11 @@ static void session_cpu_reset_cache(ds4_session *s) { } static bool ds4_layer_payload_range_valid(uint32_t layer_start, uint32_t layer_end) { - return layer_start <= layer_end && layer_end < (uint32_t)DS4_N_LAYER; + uint32_t n_layers = (uint32_t)DS4_N_LAYER; + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + n_layers = glm_graph_normal_layer_count(); + } + return n_layers != 0 && layer_start <= layer_end && layer_end < n_layers; } uint64_t ds4_session_layer_payload_bytes(ds4_session *s, @@ -30393,6 +40730,42 @@ uint64_t ds4_session_layer_payload_bytes(ds4_session *s, !ds4_layer_payload_range_valid(layer_start, layer_end)) return 0; if (ds4_session_is_cpu(s)) return 0; + if (ds4_session_is_glm(s)) { +#ifdef DS4_NO_GPU + (void)layer_start; + (void)layer_end; + return 0; +#else + if (!s->glm_graph_ready) return 0; + const ds4_glm_gpu_graph *g = &s->glm_graph; + if (layer_start != g->layer_start || layer_end != g->layer_end) return 0; + const uint32_t checkpoint_len = (uint32_t)s->checkpoint.len; + const uint32_t full_live = + session_glm_full_live_rows(g, checkpoint_len, s->glm_dense_cache_len); + const uint32_t compact_live = session_glm_compact_live_rows(g, checkpoint_len); + uint64_t bytes = (uint64_t)DS4_SESSION_LAYER_PAYLOAD_U32_FIELDS * sizeof(uint32_t); + const uint32_t n_layers = layer_end - layer_start + 1u; + bytes += (uint64_t)n_layers * sizeof(uint32_t); + bytes += (uint64_t)n_layers * sizeof(uint32_t); + for (uint32_t il = layer_start; il <= layer_end; il++) { + const uint32_t index_live = + compact_live != 0 && glm_graph_layer_uses_full_indexer(il) + ? compact_live + : 0; + uint64_t layer_bytes = 0; + if (!glm_layer_payload_tensor_bytes(il, + full_live, + DS4_N_KEY_MLA, + DS4_N_VALUE_MLA, + compact_live, + index_live, + &layer_bytes) || + !payload_u64_add(&bytes, layer_bytes)) + return 0; + } + return bytes; +#endif + } #ifdef DS4_NO_GPU (void)layer_start; (void)layer_end; @@ -30433,6 +40806,107 @@ int ds4_session_save_layer_payload(ds4_session *s, FILE *fp, payload_set_err(err, errlen, "distributed layer payloads require the graph backend"); return 1; } + if (ds4_session_is_glm(s)) { +#ifdef DS4_NO_GPU + payload_set_err(err, errlen, "graph backend support is not compiled in"); + return 1; +#else + if (!s->glm_graph_ready) { + payload_set_err(err, errlen, "GLM graph is not ready for layer snapshot"); + return 1; + } + ds4_glm_gpu_graph *g = &s->glm_graph; + if (layer_start != g->layer_start || layer_end != g->layer_end) { + payload_set_err(err, errlen, "requested GLM layer snapshot does not match loaded slice"); + return 1; + } + if (ds4_gpu_synchronize() == 0) { + payload_set_err(err, errlen, "failed to synchronize accelerator before GLM layer snapshot"); + return 1; + } + + const uint32_t checkpoint_len = (uint32_t)s->checkpoint.len; + const uint32_t full_live = + session_glm_full_live_rows(g, checkpoint_len, s->glm_dense_cache_len); + const uint32_t compact_live = session_glm_compact_live_rows(g, checkpoint_len); + uint32_t header[DS4_SESSION_LAYER_PAYLOAD_U32_FIELDS] = { + DS4_SESSION_LAYER_PAYLOAD_MAGIC, + DS4_SESSION_LAYER_PAYLOAD_VERSION, + (uint32_t)s->ctx_size, + s->prefill_cap, + g->ctx_cap, + g->ctx_cap, + g->compact_cache_cap, + checkpoint_len, + g->normal_layers, + DS4_N_KEY_MLA, + DS4_N_VALUE_MLA, + layer_start, + layer_end, + full_live, + }; + for (uint32_t i = 0; i < DS4_SESSION_LAYER_PAYLOAD_U32_FIELDS; i++) { + if (payload_write_u32(fp, header[i], err, errlen) != 0) return 1; + } + for (uint32_t il = layer_start; il <= layer_end; il++) { + if (payload_write_u32(fp, compact_live, err, errlen) != 0) return 1; + } + for (uint32_t il = layer_start; il <= layer_end; il++) { + const uint32_t index_rows = + compact_live != 0 && glm_graph_layer_uses_full_indexer(il) ? compact_live : 0; + if (payload_write_u32(fp, index_rows, err, errlen) != 0) return 1; + } + + uint8_t *buf = xmalloc(DS4_SESSION_IO_CHUNK); + int rc = 0; + for (uint32_t il = layer_start; rc == 0 && il <= layer_end; il++) { + rc = payload_write_glm_full_kv_span(fp, + g->layer_key_cache[il], + (uint64_t)full_live * g->q_dim, + buf, + DS4_SESSION_IO_CHUNK, + err, + errlen); + if (rc == 0) { + rc = payload_write_glm_full_kv_span(fp, + g->layer_value_cache[il], + (uint64_t)full_live * g->heads_dim, + buf, + DS4_SESSION_IO_CHUNK, + err, + errlen); + } + if (rc != 0 || compact_live == 0) continue; + rc = payload_write_glm_compact_span(fp, + g->layer_kv_lora_cache[il], + (uint64_t)compact_live * DS4_N_KV_LORA, + buf, + DS4_SESSION_IO_CHUNK, + err, + errlen); + if (rc == 0) { + rc = payload_write_glm_compact_span(fp, + g->layer_k_rope_cache[il], + (uint64_t)compact_live * DS4_N_ROT, + buf, + DS4_SESSION_IO_CHUNK, + err, + errlen); + } + if (rc == 0 && glm_graph_layer_uses_full_indexer(il)) { + rc = payload_write_glm_compact_span(fp, + g->layer_indexer_key_cache[il], + (uint64_t)compact_live * DS4_N_INDEXER_HEAD_DIM, + buf, + DS4_SESSION_IO_CHUNK, + err, + errlen); + } + } + free(buf); + return rc; +#endif + } #ifdef DS4_NO_GPU payload_set_err(err, errlen, "graph backend support is not compiled in"); return 1; @@ -30569,6 +41043,217 @@ int ds4_session_load_layer_payload(ds4_session *s, FILE *fp, payload_set_err(err, errlen, "distributed layer payloads require the graph backend"); return 1; } + if (ds4_session_is_glm(s)) { +#ifdef DS4_NO_GPU + (void)payload_bytes; + (void)n_tokens; + payload_set_err(err, errlen, "graph backend support is not compiled in"); + return 1; +#else + if (!s->glm_graph_ready) { + payload_set_err(err, errlen, "GLM graph is not ready for KV shard restore"); + return 1; + } + ds4_glm_gpu_graph *g = &s->glm_graph; + if (layer_start != g->layer_start || layer_end != g->layer_end) { + payload_set_err(err, errlen, "requested GLM KV shard does not match loaded slice"); + return 1; + } + + uint64_t remaining = payload_bytes; + uint32_t h[DS4_SESSION_LAYER_PAYLOAD_U32_FIELDS]; + for (uint32_t i = 0; i < DS4_SESSION_LAYER_PAYLOAD_U32_FIELDS; i++) { + if (payload_read_u32(fp, &h[i], &remaining, err, errlen) != 0) return 1; + } + if (h[0] != DS4_SESSION_LAYER_PAYLOAD_MAGIC || + h[1] != DS4_SESSION_LAYER_PAYLOAD_VERSION) { + payload_set_err(err, errlen, "unsupported session layer payload version"); + return 1; + } + + const uint32_t saved_ctx = h[2]; + const uint32_t saved_prefill_cap = h[3]; + const uint32_t saved_full_cap = h[4]; + const uint32_t saved_full_window = h[5]; + const uint32_t saved_compact_cap = h[6]; + const uint32_t saved_tokens = h[7]; + const uint32_t saved_layer_start = h[11]; + const uint32_t saved_layer_end = h[12]; + const uint32_t saved_full_live = h[13]; + (void)saved_prefill_cap; + if (saved_layer_start != layer_start || saved_layer_end != layer_end) { + payload_set_err(err, errlen, "KV shard layer range does not match requested worker"); + return 1; + } + if (saved_ctx > (uint32_t)s->ctx_size || + saved_tokens != n_tokens || + saved_tokens >= (uint32_t)s->ctx_size) { + payload_set_err(err, errlen, "KV shard does not fit current context"); + return 1; + } + for (uint32_t i = 0; i < n_tokens; i++) { + if (tokens[i] < 0 || (uint32_t)tokens[i] >= DS4_N_VOCAB) { + payload_set_err(err, errlen, "KV shard token is outside vocabulary"); + return 1; + } + } + if (h[8] != g->normal_layers || h[9] != DS4_N_KEY_MLA || + h[10] != DS4_N_VALUE_MLA) { + payload_set_err(err, errlen, "KV shard was written for a different GLM layout"); + return 1; + } + if (saved_full_cap == 0 || saved_full_cap > g->ctx_cap || + saved_full_window != saved_full_cap) { + payload_set_err(err, errlen, "KV shard GLM full-cache layout does not match current runtime"); + return 1; + } + const uint32_t max_full_live = + saved_tokens < saved_full_cap ? saved_tokens : saved_full_cap; + if (saved_full_live > max_full_live || saved_full_live > g->ctx_cap) { + payload_set_err(err, errlen, "KV shard GLM full-cache row count is invalid"); + return 1; + } + if (saved_compact_cap > g->ctx_size) { + payload_set_err(err, errlen, "KV shard GLM compact cache is larger than current context"); + return 1; + } + if (g->compact_cache_cap != 0 && saved_tokens != 0 && saved_compact_cap == 0) { + payload_set_err(err, errlen, "KV shard lacks the GLM compact cache required by this context"); + return 1; + } + const uint32_t expected_compact_live = + saved_compact_cap != 0 + ? (saved_tokens < saved_compact_cap ? saved_tokens : saved_compact_cap) + : 0; + if (expected_compact_live != 0 && + (!s->engine || !glm_graph_ensure_compact_cache(g, expected_compact_live))) { + payload_set_err(err, errlen, "KV shard GLM compact cache could not be allocated"); + return 1; + } + if (expected_compact_live > g->compact_cache_cap) { + payload_set_err(err, errlen, "KV shard GLM compact row count is invalid"); + return 1; + } + + const uint32_t n_layers = layer_end - layer_start + 1u; + uint32_t *n_comp = xcalloc(n_layers, sizeof(n_comp[0])); + uint32_t *n_index_comp = xcalloc(n_layers, sizeof(n_index_comp[0])); + for (uint32_t i = 0; i < n_layers; i++) { + if (payload_read_u32(fp, &n_comp[i], &remaining, err, errlen) != 0) { + free(n_comp); + free(n_index_comp); + return 1; + } + if (n_comp[i] != expected_compact_live) { + free(n_comp); + free(n_index_comp); + payload_set_err(err, errlen, "KV shard GLM compact row count does not match token count"); + return 1; + } + } + for (uint32_t i = 0; i < n_layers; i++) { + const uint32_t il = layer_start + i; + if (payload_read_u32(fp, &n_index_comp[i], &remaining, err, errlen) != 0) { + free(n_comp); + free(n_index_comp); + return 1; + } + const uint32_t expected_index_rows = + expected_compact_live != 0 && glm_graph_layer_uses_full_indexer(il) + ? expected_compact_live + : 0; + if (n_index_comp[i] != expected_index_rows) { + free(n_comp); + free(n_index_comp); + payload_set_err(err, errlen, "KV shard GLM indexer row count does not match token count"); + return 1; + } + } + + if (ds4_gpu_synchronize() == 0) { + free(n_comp); + free(n_index_comp); + payload_set_err(err, errlen, "failed to synchronize accelerator before GLM KV shard restore"); + return 1; + } + s->checkpoint_valid = false; + s->mtp_draft_valid = false; + ds4_session_glm_reset_dense_cache(s); + + uint8_t *buf = xmalloc(DS4_SESSION_IO_CHUNK); + int rc = 0; + for (uint32_t i = 0; rc == 0 && i < n_layers; i++) { + const uint32_t il = layer_start + i; + rc = payload_read_or_skip_glm_full_kv_span(fp, + g->layer_key_cache[il], + (uint64_t)saved_full_live * g->q_dim, + buf, + DS4_SESSION_IO_CHUNK, + &remaining, + err, + errlen); + if (rc == 0) { + rc = payload_read_or_skip_glm_full_kv_span(fp, + g->layer_value_cache[il], + (uint64_t)saved_full_live * g->heads_dim, + buf, + DS4_SESSION_IO_CHUNK, + &remaining, + err, + errlen); + } + if (rc != 0 || expected_compact_live == 0) continue; + rc = payload_read_glm_compact_span(fp, + g->layer_kv_lora_cache[il], + (uint64_t)n_comp[i] * DS4_N_KV_LORA, + buf, + DS4_SESSION_IO_CHUNK, + &remaining, + err, + errlen); + if (rc == 0) { + rc = payload_read_glm_compact_span(fp, + g->layer_k_rope_cache[il], + (uint64_t)n_comp[i] * DS4_N_ROT, + buf, + DS4_SESSION_IO_CHUNK, + &remaining, + err, + errlen); + } + if (rc == 0 && glm_graph_layer_uses_full_indexer(il)) { + rc = payload_read_glm_compact_span(fp, + g->layer_indexer_key_cache[il], + (uint64_t)n_index_comp[i] * DS4_N_INDEXER_HEAD_DIM, + buf, + DS4_SESSION_IO_CHUNK, + &remaining, + err, + errlen); + } + } + free(buf); + if (rc == 0 && remaining != 0) { + payload_set_err(err, errlen, "KV shard has trailing payload bytes"); + rc = 1; + } + if (rc == 0 && ds4_gpu_synchronize() == 0) { + payload_set_err(err, errlen, "failed to synchronize accelerator after GLM KV shard restore"); + rc = 1; + } + if (rc == 0) { + token_vec_free(&s->checkpoint); + memset(&s->checkpoint, 0, sizeof(s->checkpoint)); + for (uint32_t i = 0; i < n_tokens; i++) token_vec_push(&s->checkpoint, tokens[i]); + s->checkpoint_valid = true; + s->mtp_draft_valid = false; + s->glm_dense_cache_len = g->full_kv_cache ? saved_full_live : 0; + } + free(n_comp); + free(n_index_comp); + return rc; +#endif + } #ifdef DS4_NO_GPU (void)payload_bytes; (void)n_tokens; @@ -30811,6 +41496,9 @@ bool ds4_engine_has_mtp(ds4_engine *e) { } int ds4_engine_mtp_draft_tokens(ds4_engine *e) { + if (e && DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + return getenv("DS4_GLM_MTP") != NULL && DS4_N_NEXTN_PREDICT != 0 ? 2 : 0; + } if (ds4_engine_has_mtp(e)) return e->mtp_draft_tokens; #ifndef DS4_NO_GPU const char *dspark_enable = getenv("DS4_DSPARK_ENABLE"); @@ -30970,6 +41658,25 @@ uint64_t ds4_session_payload_bytes(ds4_session *s) { bytes += session_cpu_payload_live_tensor_bytes(s); return bytes; } + if (ds4_session_is_glm(s)) { +#ifdef DS4_NO_GPU + return 0; +#else + if (!s->glm_graph_ready) return 0; + const ds4_glm_gpu_graph *g = &s->glm_graph; + const uint32_t checkpoint_len = (uint32_t)s->checkpoint.len; + const uint32_t full_live = + session_glm_full_live_rows(g, checkpoint_len, s->glm_dense_cache_len); + const uint32_t compact_live = session_glm_compact_live_rows(g, checkpoint_len); + uint64_t bytes = (uint64_t)DS4_SESSION_PAYLOAD_U32_FIELDS * sizeof(uint32_t); + bytes += (uint64_t)s->checkpoint.len * sizeof(uint32_t); + bytes += (uint64_t)DS4_N_VOCAB * sizeof(float); + bytes += (uint64_t)g->normal_layers * sizeof(uint32_t); + bytes += (uint64_t)g->normal_layers * sizeof(uint32_t); + bytes += session_glm_payload_live_tensor_bytes(g, full_live, compact_live); + return bytes; +#endif + } #ifdef DS4_NO_GPU return 0; #else @@ -31074,6 +41781,106 @@ int ds4_session_save_payload(ds4_session *s, FILE *fp, char *err, size_t errlen) if (s->distributed) { return ds4_dist_session_save_payload(s->distributed, s, fp, err, errlen); } + if (ds4_session_is_glm(s)) { +#ifdef DS4_NO_GPU + payload_set_err(err, errlen, "graph backend support is not compiled in"); + return 1; +#else + if (!s->glm_graph_ready) { + payload_set_err(err, errlen, "GLM graph is not ready for snapshot"); + return 1; + } + if (ds4_gpu_synchronize() == 0) { + payload_set_err(err, errlen, "failed to synchronize accelerator before GLM snapshot"); + return 1; + } + + ds4_glm_gpu_graph *g = &s->glm_graph; + const uint32_t checkpoint_len = (uint32_t)s->checkpoint.len; + const uint32_t full_live = + session_glm_full_live_rows(g, checkpoint_len, s->glm_dense_cache_len); + const uint32_t compact_live = session_glm_compact_live_rows(g, checkpoint_len); + uint32_t header[DS4_SESSION_PAYLOAD_U32_FIELDS] = { + DS4_SESSION_PAYLOAD_MAGIC, + DS4_SESSION_PAYLOAD_VERSION, + (uint32_t)s->ctx_size, + s->prefill_cap, + g->ctx_cap, + g->ctx_cap, + g->compact_cache_cap, + checkpoint_len, + g->normal_layers, + DS4_N_KEY_MLA, + DS4_N_VALUE_MLA, + DS4_N_VOCAB, + full_live, + }; + for (uint32_t i = 0; i < DS4_SESSION_PAYLOAD_U32_FIELDS; i++) { + if (payload_write_u32(fp, header[i], err, errlen) != 0) return 1; + } + for (int i = 0; i < s->checkpoint.len; i++) { + if (payload_write_u32(fp, (uint32_t)s->checkpoint.v[i], err, errlen) != 0) return 1; + } + if (payload_write_bytes(fp, s->logits, (uint64_t)DS4_N_VOCAB * sizeof(float), err, errlen) != 0) return 1; + for (uint32_t il = 0; il < g->normal_layers; il++) { + if (payload_write_u32(fp, compact_live, err, errlen) != 0) return 1; + } + for (uint32_t il = 0; il < g->normal_layers; il++) { + const uint32_t index_rows = + compact_live != 0 && glm_graph_layer_uses_full_indexer(il) ? compact_live : 0; + if (payload_write_u32(fp, index_rows, err, errlen) != 0) return 1; + } + + uint8_t *buf = xmalloc(DS4_SESSION_IO_CHUNK); + int rc = 0; + for (uint32_t il = 0; rc == 0 && il < g->normal_layers; il++) { + rc = payload_write_glm_full_kv_span(fp, + g->layer_key_cache[il], + (uint64_t)full_live * g->q_dim, + buf, + DS4_SESSION_IO_CHUNK, + err, + errlen); + if (rc == 0) { + rc = payload_write_glm_full_kv_span(fp, + g->layer_value_cache[il], + (uint64_t)full_live * g->heads_dim, + buf, + DS4_SESSION_IO_CHUNK, + err, + errlen); + } + if (rc != 0 || compact_live == 0) continue; + rc = payload_write_glm_compact_span(fp, + g->layer_kv_lora_cache[il], + (uint64_t)compact_live * DS4_N_KV_LORA, + buf, + DS4_SESSION_IO_CHUNK, + err, + errlen); + if (rc == 0) { + rc = payload_write_glm_compact_span(fp, + g->layer_k_rope_cache[il], + (uint64_t)compact_live * DS4_N_ROT, + buf, + DS4_SESSION_IO_CHUNK, + err, + errlen); + } + if (rc == 0 && glm_graph_layer_uses_full_indexer(il)) { + rc = payload_write_glm_compact_span(fp, + g->layer_indexer_key_cache[il], + (uint64_t)compact_live * DS4_N_INDEXER_HEAD_DIM, + buf, + DS4_SESSION_IO_CHUNK, + err, + errlen); + } + } + free(buf); + return rc; +#endif + } if (ds4_session_is_cpu(s)) { const uint32_t raw_live = session_cpu_raw_live_rows(s); const uint32_t raw_cap = ds4_default_raw_cap((uint32_t)s->ctx_size); @@ -31292,6 +42099,198 @@ int ds4_session_load_payload(ds4_session *s, FILE *fp, uint64_t payload_bytes, c payload_set_err(err, errlen, "unsupported session payload version"); return 1; } + if (ds4_session_is_glm(s)) { +#ifdef DS4_NO_GPU + payload_set_err(err, errlen, "graph backend support is not compiled in"); + return 1; +#else + if (!s->glm_graph_ready) { + payload_set_err(err, errlen, "GLM graph is not ready for KV restore"); + return 1; + } + ds4_glm_gpu_graph *g = &s->glm_graph; + const uint32_t saved_ctx = h[2]; + const uint32_t saved_prefill_cap = h[3]; + const uint32_t saved_full_cap = h[4]; + const uint32_t saved_full_window = h[5]; + const uint32_t saved_compact_cap = h[6]; + const uint32_t saved_tokens = h[7]; + const uint32_t saved_full_live = h[12]; + if (saved_ctx > (uint32_t)s->ctx_size || saved_tokens >= (uint32_t)s->ctx_size) { + payload_set_err(err, errlen, "KV checkpoint does not fit current context"); + return 1; + } + if (h[8] != g->normal_layers || h[9] != DS4_N_KEY_MLA || + h[10] != DS4_N_VALUE_MLA || h[11] != DS4_N_VOCAB) + { + payload_set_err(err, errlen, "KV checkpoint was written for a different GLM layout"); + return 1; + } + (void)saved_prefill_cap; + if (saved_full_cap == 0 || saved_full_cap > g->ctx_cap || + saved_full_window != saved_full_cap) + { + payload_set_err(err, errlen, "KV checkpoint GLM full-cache layout does not match current runtime"); + return 1; + } + const uint32_t max_full_live = + saved_tokens < saved_full_cap ? saved_tokens : saved_full_cap; + if (saved_full_live > max_full_live || saved_full_live > g->ctx_cap) { + payload_set_err(err, errlen, "KV checkpoint GLM full-cache row count is invalid"); + return 1; + } + if (saved_compact_cap > g->ctx_size) { + payload_set_err(err, errlen, "KV checkpoint GLM compact cache is larger than current context"); + return 1; + } + if (g->compact_cache_cap != 0 && saved_tokens != 0 && saved_compact_cap == 0) { + payload_set_err(err, errlen, "KV checkpoint lacks the GLM compact cache required by this context"); + return 1; + } + const uint32_t expected_compact_live = + saved_compact_cap != 0 + ? (saved_tokens < saved_compact_cap ? saved_tokens : saved_compact_cap) + : 0; + if (expected_compact_live != 0) { + if (!s->engine || + !glm_graph_ensure_compact_cache(g, expected_compact_live)) { + payload_set_err(err, errlen, "KV checkpoint GLM compact cache could not be allocated"); + return 1; + } + } + if (expected_compact_live > g->compact_cache_cap) { + payload_set_err(err, errlen, "KV checkpoint GLM compact row count is invalid"); + return 1; + } + + token_vec new_checkpoint = {0}; + for (uint32_t i = 0; i < saved_tokens; i++) { + uint32_t tok = 0; + if (payload_read_u32(fp, &tok, &remaining, err, errlen) != 0) { + token_vec_free(&new_checkpoint); + return 1; + } + token_vec_push(&new_checkpoint, (int)tok); + } + if (payload_read_bytes(fp, s->logits, (uint64_t)DS4_N_VOCAB * sizeof(float), + &remaining, err, errlen) != 0) + { + token_vec_free(&new_checkpoint); + return 1; + } + uint32_t n_comp[DS4_MAX_LAYER]; + uint32_t n_index_comp[DS4_MAX_LAYER]; + for (uint32_t il = 0; il < g->normal_layers; il++) { + if (payload_read_u32(fp, &n_comp[il], &remaining, err, errlen) != 0) { + token_vec_free(&new_checkpoint); + return 1; + } + if (n_comp[il] != expected_compact_live) { + token_vec_free(&new_checkpoint); + payload_set_err(err, errlen, "KV checkpoint GLM compact row count does not match token count"); + return 1; + } + } + for (uint32_t il = 0; il < g->normal_layers; il++) { + if (payload_read_u32(fp, &n_index_comp[il], &remaining, err, errlen) != 0) { + token_vec_free(&new_checkpoint); + return 1; + } + const uint32_t expected_index_rows = + expected_compact_live != 0 && glm_graph_layer_uses_full_indexer(il) + ? expected_compact_live + : 0; + if (n_index_comp[il] != expected_index_rows) { + token_vec_free(&new_checkpoint); + payload_set_err(err, errlen, "KV checkpoint GLM indexer row count does not match token count"); + return 1; + } + } + + if (ds4_gpu_synchronize() == 0) { + token_vec_free(&new_checkpoint); + payload_set_err(err, errlen, "failed to synchronize accelerator before GLM KV restore"); + return 1; + } + s->checkpoint_valid = false; + s->mtp_draft_valid = false; + ds4_session_glm_reset_dense_cache(s); + + uint8_t *buf = xmalloc(DS4_SESSION_IO_CHUNK); + int rc = 0; + for (uint32_t il = 0; rc == 0 && il < g->normal_layers; il++) { + rc = payload_read_or_skip_glm_full_kv_span(fp, + g->layer_key_cache[il], + (uint64_t)saved_full_live * g->q_dim, + buf, + DS4_SESSION_IO_CHUNK, + &remaining, + err, + errlen); + if (rc == 0) { + rc = payload_read_or_skip_glm_full_kv_span(fp, + g->layer_value_cache[il], + (uint64_t)saved_full_live * g->heads_dim, + buf, + DS4_SESSION_IO_CHUNK, + &remaining, + err, + errlen); + } + if (rc != 0 || expected_compact_live == 0) continue; + rc = payload_read_glm_compact_span(fp, + g->layer_kv_lora_cache[il], + (uint64_t)expected_compact_live * DS4_N_KV_LORA, + buf, + DS4_SESSION_IO_CHUNK, + &remaining, + err, + errlen); + if (rc == 0) { + rc = payload_read_glm_compact_span(fp, + g->layer_k_rope_cache[il], + (uint64_t)expected_compact_live * DS4_N_ROT, + buf, + DS4_SESSION_IO_CHUNK, + &remaining, + err, + errlen); + } + if (rc == 0 && glm_graph_layer_uses_full_indexer(il)) { + rc = payload_read_glm_compact_span(fp, + g->layer_indexer_key_cache[il], + (uint64_t)expected_compact_live * DS4_N_INDEXER_HEAD_DIM, + buf, + DS4_SESSION_IO_CHUNK, + &remaining, + err, + errlen); + } + } + free(buf); + if (rc != 0) { + token_vec_free(&new_checkpoint); + return 1; + } + if (remaining != 0) { + token_vec_free(&new_checkpoint); + payload_set_err(err, errlen, "KV checkpoint has trailing payload bytes"); + return 1; + } + if (ds4_gpu_synchronize() == 0) { + token_vec_free(&new_checkpoint); + payload_set_err(err, errlen, "failed to synchronize accelerator after GLM KV restore"); + return 1; + } + + token_vec_free(&s->checkpoint); + s->checkpoint = new_checkpoint; + s->checkpoint_valid = true; + s->mtp_draft_valid = false; + s->glm_dense_cache_len = g->full_kv_cache ? saved_full_live : 0; + return 0; +#endif + } if (ds4_session_is_cpu(s)) { const uint32_t saved_ctx = h[2]; const uint32_t saved_prefill_cap = h[3]; @@ -31735,6 +42734,7 @@ int ds4_dump_text_tokenization(const char *model_path, const char *text, FILE *f if (!fp) fp = stdout; model_open(&model, model_path, false, false); + config_validate_model(&model); vocab_load(&vocab, &model); tokenize_rendered_chat_vocab(&vocab, text ? text : "", &tokens); @@ -31990,6 +42990,1343 @@ int ds4_engine_generate_argmax( emit, done, emit_ud, progress, progress_ud); } +static int glm_metal_compare_f32( + const char *name, + const float *cpu, + const float *gpu, + uint32_t n, + float tol) { + float max_abs = 0.0f; + uint32_t max_i = 0; + double ss = 0.0; + for (uint32_t i = 0; i < n; i++) { + const float d = fabsf(gpu[i] - cpu[i]); + if (d > max_abs) { + max_abs = d; + max_i = i; + } + ss += (double)d * (double)d; + } + const double rms = sqrt(ss / (double)n); + printf(" %s: max_abs=%.9g at %u cpu=%.9g gpu=%.9g rms_abs=%.9g\n", + name, max_abs, max_i, cpu[max_i], gpu[max_i], rms); + if (max_abs > tol) { + fprintf(stderr, "ds4: GLM Metal %s mismatch, max_abs %.9g > %.9g\n", + name, max_abs, tol); + return 0; + } + return 1; +} + +static int glm_metal_compare_i32_list( + const char *name, + const int *cpu, + const int32_t *gpu, + uint32_t n) { + int ok = 1; + printf(" %s: cpu=[", name); + for (uint32_t i = 0; i < n; i++) { + printf("%s%d", i ? "," : "", cpu[i]); + } + printf("] gpu=["); + for (uint32_t i = 0; i < n; i++) { + printf("%s%d", i ? "," : "", (int)gpu[i]); + if (cpu[i] != (int)gpu[i]) ok = 0; + } + printf("]\n"); + if (!ok) { + fprintf(stderr, "ds4: GLM Metal %s mismatch\n", name); + return 0; + } + return 1; +} + +#ifndef DS4_NO_GPU +static void glm_metal_q8_diag_fill_input(float *x, uint64_t n_tok, uint64_t in_dim) { + for (uint64_t t = 0; t < n_tok; t++) { + for (uint64_t i = 0; i < in_dim; i++) { + uint32_t s = (uint32_t)(0x9e3779b9u ^ (uint32_t)(t * 0x85ebca6bu) ^ + (uint32_t)(i * 0xc2b2ae35u)); + s ^= s >> 16; + s *= 0x7feb352du; + s ^= s >> 15; + s *= 0x846ca68bu; + s ^= s >> 16; + const float centered = ((float)(int32_t)(s & 0xffffu) - 32768.0f) / 32768.0f; + const float scale = 0.25f + 0.015625f * (float)((i + 3u * t) & 31u); + x[t * in_dim + i] = centered * scale; + } + } +} + +static void glm_metal_q8_diag_reference( + float *out, + const ds4_model *model, + const ds4_tensor *w, + const float *x, + uint64_t n_tok) { + const uint64_t out_dim = w->elements / w->dim[0]; + for (uint64_t t = 0; t < n_tok; t++) { + matvec_q8_0_f32_ref(out + t * out_dim, + model, + w, + x + t * w->dim[0]); + } +} + +static int glm_metal_graph_test_q8_prefill_one( + ds4_engine *e, + const char *name, + const ds4_tensor *w, + int strict) { + if (!w) return 1; + if (w->type != DS4_TENSOR_Q8_0 || w->ndim < 2 || w->dim[0] == 0) { + fprintf(stderr, "ds4: GLM Q8 prefill diagnostic found unexpected %s layout\n", + name); + return 0; + } + + const ds4_model *model = &e->model; + const uint64_t in_dim = w->dim[0]; + const uint64_t out_dim = w->elements / in_dim; + const uint32_t cases[] = { 16u, 17u, 31u, 32u }; + int ok = 1; + + printf(" q8_prefill_diag: %s ndim=%u in=%llu out=%llu strict=%d\n", + name, + w->ndim, + (unsigned long long)in_dim, + (unsigned long long)out_dim, + strict); + + for (uint32_t ci = 0; ci < sizeof(cases) / sizeof(cases[0]); ci++) { + const uint32_t n_tok = cases[ci]; + if (in_dim > UINT64_MAX / n_tok / sizeof(float) || + out_dim > UINT64_MAX / n_tok / sizeof(float) || + out_dim > UINT32_MAX / n_tok) { + fprintf(stderr, "ds4: GLM Q8 prefill diagnostic size overflow in %s token case %u\n", + name, + n_tok); + ok = 0; + if (strict) break; + continue; + } + + const uint64_t x_bytes = (uint64_t)n_tok * in_dim * sizeof(float); + const uint64_t out_bytes = (uint64_t)n_tok * out_dim * sizeof(float); + if (x_bytes > SIZE_MAX || out_bytes > SIZE_MAX) { + fprintf(stderr, "ds4: GLM Q8 prefill diagnostic host allocation is too large in %s token case %u\n", + name, + n_tok); + ok = 0; + if (strict) break; + continue; + } + + char label[128]; + snprintf(label, sizeof(label), "q8_prefill_diag_%s_tok%u", name, n_tok); + + float *x_host = xmalloc((size_t)x_bytes); + float *cpu_out = xmalloc((size_t)out_bytes); + float *gpu_out = xmalloc((size_t)out_bytes); + ds4_gpu_tensor *x_gpu = ds4_gpu_tensor_alloc(x_bytes); + ds4_gpu_tensor *out_gpu = ds4_gpu_tensor_alloc(out_bytes); + int case_ok = x_gpu && out_gpu; + + if (!case_ok) { + fprintf(stderr, "ds4: GLM Q8 prefill diagnostic could not allocate %s token case %u\n", + name, + n_tok); + } + if (case_ok) { + glm_metal_q8_diag_fill_input(x_host, n_tok, in_dim); + glm_metal_q8_diag_reference(cpu_out, model, w, x_host, n_tok); + case_ok = ds4_gpu_tensor_write(x_gpu, 0, x_host, x_bytes) != 0; + } + if (case_ok) { + case_ok = ds4_gpu_matmul_q8_0_tensor(out_gpu, + model->map, + model->size, + w->abs_offset, + in_dim, + out_dim, + x_gpu, + n_tok); + } + if (case_ok) { + case_ok = ds4_gpu_tensor_read(out_gpu, 0, gpu_out, out_bytes) != 0; + } + if (case_ok) { + case_ok = glm_metal_compare_f32(label, + cpu_out, + gpu_out, + (uint32_t)((uint64_t)n_tok * out_dim), + strict ? 5.0e-2f : 3.0e38f); + } + + ds4_gpu_tensor_free(out_gpu); + ds4_gpu_tensor_free(x_gpu); + free(gpu_out); + free(cpu_out); + free(x_host); + + if (!case_ok) { + ok = 0; + if (strict) break; + } + } + + return ok || !strict; +} + +static int glm_metal_graph_test_q8_prefill( + ds4_engine *e, + const ds4_layer_weights *layer) { + return 1; + + if (!layer) { + fprintf(stderr, "ds4: GLM Q8 prefill diagnostic requires layer weights\n"); + return 0; + } + + const int strict = 0; + int ok = 1; + const ds4_layer_weights *sparse = + DS4_N_LEADING_DENSE < DS4_N_LAYER ? &e->weights.layer[DS4_N_LEADING_DENSE] : NULL; + +#define DS4_GLM_Q8_DIAG_ONE(label, tensor) \ + do { \ + if (!glm_metal_graph_test_q8_prefill_one(e, label, tensor, strict)) { \ + ok = 0; \ + if (strict) goto done; \ + } \ + } while (0) + + DS4_GLM_Q8_DIAG_ONE("layer0.attn_q_a", layer->attn_q_a); + DS4_GLM_Q8_DIAG_ONE("layer0.attn_q_b", layer->attn_q_b); + DS4_GLM_Q8_DIAG_ONE("layer0.attn_kv_a_mqa", layer->attn_kv_a_mqa); + DS4_GLM_Q8_DIAG_ONE("layer0.attn_k_b", layer->attn_k_b); + DS4_GLM_Q8_DIAG_ONE("layer0.attn_v_b", layer->attn_v_b); + DS4_GLM_Q8_DIAG_ONE("layer0.attn_output", layer->attn_output); + DS4_GLM_Q8_DIAG_ONE("layer0.ffn_gate", layer->ffn_gate); + DS4_GLM_Q8_DIAG_ONE("layer0.ffn_up", layer->ffn_up); + DS4_GLM_Q8_DIAG_ONE("layer0.ffn_down", layer->ffn_down); + + if (sparse) { + DS4_GLM_Q8_DIAG_ONE("layer3.ffn_gate_shexp", sparse->ffn_gate_shexp); + DS4_GLM_Q8_DIAG_ONE("layer3.ffn_up_shexp", sparse->ffn_up_shexp); + DS4_GLM_Q8_DIAG_ONE("layer3.ffn_down_shexp", sparse->ffn_down_shexp); + } + +done: +#undef DS4_GLM_Q8_DIAG_ONE + return strict ? ok : 1; +} + +static int glm_metal_graph_test_multitok_attention( + ds4_engine *e, + const ds4_tokens *prompt, + const ds4_layer_weights *layer) { + if (!prompt || prompt->len < 2) { + printf(" layer0_multitok_attention: skipped (prompt has fewer than 2 tokens)\n"); + return 1; + } + + const ds4_model *model = &e->model; + const ds4_weights *weights = &e->weights; + const uint32_t n_tok = prompt->len < 4 ? (uint32_t)prompt->len : 4u; + const uint32_t qk_dim = DS4_N_KEY_MLA; + const uint32_t q_nope = qk_dim - DS4_N_ROT; + const uint64_t q_dim = (uint64_t)DS4_N_HEAD * qk_dim; + const uint64_t heads_dim = (uint64_t)DS4_N_HEAD * DS4_N_VALUE_MLA; + const uint64_t kv_raw_dim = layer->attn_kv_a_mqa ? layer->attn_kv_a_mqa->dim[1] : 0; + + if (!weights->token_embd || + !layer->attn_norm || + !layer->attn_q_a || + !layer->attn_q_a_norm || + !layer->attn_q_b || + !layer->attn_kv_a_mqa || + !layer->attn_kv_a_norm || + !layer->attn_k_b || + !layer->attn_v_b || + !layer->attn_output || + weights->token_embd->type != DS4_TENSOR_Q8_0 || + layer->attn_q_a->type != DS4_TENSOR_Q8_0 || + layer->attn_q_b->type != DS4_TENSOR_Q8_0 || + layer->attn_kv_a_mqa->type != DS4_TENSOR_Q8_0 || + layer->attn_k_b->type != DS4_TENSOR_Q8_0 || + layer->attn_v_b->type != DS4_TENSOR_Q8_0 || + layer->attn_output->type != DS4_TENSOR_Q8_0 || + layer->attn_norm->type != DS4_TENSOR_F32 || + layer->attn_q_a_norm->type != DS4_TENSOR_F32 || + layer->attn_kv_a_norm->type != DS4_TENSOR_F32 || + layer->attn_q_a->dim[0] != DS4_N_EMBD || + layer->attn_q_a->dim[1] != DS4_N_LORA_Q || + layer->attn_q_a_norm->dim[0] != DS4_N_LORA_Q || + layer->attn_q_b->dim[0] != DS4_N_LORA_Q || + layer->attn_q_b->dim[1] != q_dim || + layer->attn_kv_a_mqa->dim[0] != DS4_N_EMBD || + kv_raw_dim < (uint64_t)DS4_N_KV_LORA + DS4_N_ROT || + layer->attn_kv_a_norm->dim[0] != DS4_N_KV_LORA || + layer->attn_k_b->dim[0] != q_nope || + layer->attn_k_b->dim[1] != DS4_N_KV_LORA || + layer->attn_k_b->dim[2] != DS4_N_HEAD || + layer->attn_v_b->dim[0] != DS4_N_KV_LORA || + layer->attn_v_b->dim[1] != DS4_N_VALUE_MLA || + layer->attn_v_b->dim[2] != DS4_N_HEAD || + layer->attn_output->dim[0] != heads_dim || + layer->attn_output->dim[1] != DS4_N_EMBD) { + fprintf(stderr, "ds4: GLM multi-token attention diagnostic found unexpected layer-0 layout\n"); + return 0; + } + + for (uint32_t t = 0; t < n_tok; t++) { + if (prompt->v[t] < 0 || prompt->v[t] >= (int)DS4_N_VOCAB) { + fprintf(stderr, "ds4: GLM multi-token attention token %d is outside vocab\n", + prompt->v[t]); + return 0; + } + } + + const uint64_t token_bytes = (uint64_t)n_tok * sizeof(int32_t); + const uint64_t emb_bytes = (uint64_t)n_tok * DS4_N_EMBD * sizeof(float); + const uint64_t q_rank_bytes = (uint64_t)n_tok * DS4_N_LORA_Q * sizeof(float); + const uint64_t q_bytes = (uint64_t)n_tok * q_dim * sizeof(float); + const uint64_t kv_raw_bytes = (uint64_t)n_tok * kv_raw_dim * sizeof(float); + const uint64_t kv_norm_bytes = (uint64_t)n_tok * DS4_N_KV_LORA * sizeof(float); + const uint64_t k_nope_bytes = (uint64_t)n_tok * DS4_N_HEAD * q_nope * sizeof(float); + const uint64_t heads_bytes = (uint64_t)n_tok * heads_dim * sizeof(float); + + int32_t *tok_host = xmalloc((size_t)token_bytes); + float *cpu_emb = xmalloc((size_t)emb_bytes); + float *cpu_attn = xmalloc((size_t)emb_bytes); + float *gpu_attn = xmalloc((size_t)emb_bytes); + + for (uint32_t t = 0; t < n_tok; t++) { + tok_host[t] = (int32_t)prompt->v[t]; + embed_token_any(model, weights, prompt->v[t], + cpu_emb + (uint64_t)t * DS4_N_EMBD); + } + layer_glm_attention_prefill_f32_ref(cpu_attn, model, layer, cpu_emb, n_tok, 0, 0); + + ds4_gpu_tensor *tok = NULL; + ds4_gpu_tensor *cur = NULL; + ds4_gpu_tensor *attn_norm = NULL; + ds4_gpu_tensor *q_rank = NULL; + ds4_gpu_tensor *q_rank_norm = NULL; + ds4_gpu_tensor *q = NULL; + ds4_gpu_tensor *kv_raw = NULL; + ds4_gpu_tensor *kv_norm = NULL; + ds4_gpu_tensor *k_nope = NULL; + ds4_gpu_tensor *value = NULL; + ds4_gpu_tensor *key_cache = NULL; + ds4_gpu_tensor *value_cache = NULL; + ds4_gpu_tensor *heads = NULL; + ds4_gpu_tensor *attn_out = NULL; + + int ok = 1; +#define DS4_GLM_MT_ALLOC_TENSOR(var, bytes_) \ + do { \ + (var) = ds4_gpu_tensor_alloc((bytes_)); \ + if (!(var)) { \ + fprintf(stderr, "ds4: GLM multi-token attention diagnostic could not allocate %s\n", #var); \ + ok = 0; \ + } \ + } while (0) + + DS4_GLM_MT_ALLOC_TENSOR(tok, token_bytes); + DS4_GLM_MT_ALLOC_TENSOR(cur, emb_bytes); + DS4_GLM_MT_ALLOC_TENSOR(attn_norm, emb_bytes); + DS4_GLM_MT_ALLOC_TENSOR(q_rank, q_rank_bytes); + DS4_GLM_MT_ALLOC_TENSOR(q_rank_norm, q_rank_bytes); + DS4_GLM_MT_ALLOC_TENSOR(q, q_bytes); + DS4_GLM_MT_ALLOC_TENSOR(kv_raw, kv_raw_bytes); + DS4_GLM_MT_ALLOC_TENSOR(kv_norm, kv_norm_bytes); + DS4_GLM_MT_ALLOC_TENSOR(k_nope, k_nope_bytes); + DS4_GLM_MT_ALLOC_TENSOR(value, heads_bytes); + DS4_GLM_MT_ALLOC_TENSOR(key_cache, q_bytes); + DS4_GLM_MT_ALLOC_TENSOR(value_cache, heads_bytes); + DS4_GLM_MT_ALLOC_TENSOR(heads, heads_bytes); + DS4_GLM_MT_ALLOC_TENSOR(attn_out, emb_bytes); +#undef DS4_GLM_MT_ALLOC_TENSOR + + const uint32_t rope_ctx = 0; + const float rope_base = layer_rope_freq_base(0); + const float rope_scale = layer_rope_freq_scale(0); + const float rope_ext = 0.0f; + const float rope_attn = 1.0f; + + if (ok) ok = ds4_gpu_tensor_write(tok, 0, tok_host, token_bytes) != 0; + if (ok) ok = ds4_gpu_embed_tokens_q8_0_tensor(cur, + tok, + model->map, + model->size, + weights->token_embd->abs_offset, + DS4_N_VOCAB, + n_tok, + DS4_N_EMBD); + if (ok) ok = ds4_gpu_rms_norm_weight_rows_tensor(attn_norm, + cur, + model->map, + model->size, + layer->attn_norm->abs_offset, + DS4_N_EMBD, + n_tok, + DS4_RMS_EPS); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(q_rank, + model->map, + model->size, + layer->attn_q_a->abs_offset, + DS4_N_EMBD, + DS4_N_LORA_Q, + attn_norm, + n_tok); + if (ok) ok = ds4_gpu_rms_norm_weight_rows_tensor(q_rank_norm, + q_rank, + model->map, + model->size, + layer->attn_q_a_norm->abs_offset, + DS4_N_LORA_Q, + n_tok, + DS4_RMS_EPS); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(q, + model->map, + model->size, + layer->attn_q_b->abs_offset, + DS4_N_LORA_Q, + q_dim, + q_rank_norm, + n_tok); + if (ok) ok = ds4_gpu_rope_tail_tensor(q, + n_tok, + DS4_N_HEAD, + qk_dim, + DS4_N_ROT, + 0, + rope_ctx, + false, + rope_base, + rope_scale, + rope_ext, + rope_attn, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(kv_raw, + model->map, + model->size, + layer->attn_kv_a_mqa->abs_offset, + DS4_N_EMBD, + kv_raw_dim, + attn_norm, + n_tok); + if (ok) ok = ds4_gpu_glm_kv_lora_rms_norm_tensor(kv_norm, + kv_raw, + model->map, + model->size, + layer->attn_kv_a_norm->abs_offset, + n_tok, + (uint32_t)kv_raw_dim, + DS4_N_KV_LORA, + DS4_RMS_EPS); + if (ok) ok = ds4_gpu_glm_k_b_project_tensor(k_nope, + kv_norm, + model->map, + model->size, + layer->attn_k_b->abs_offset, + n_tok, + DS4_N_KV_LORA, + q_nope, + DS4_N_HEAD); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(value, + model->map, + model->size, + layer->attn_v_b->abs_offset, + DS4_N_KV_LORA, + heads_dim, + kv_norm, + n_tok); + if (ok) ok = ds4_gpu_glm_build_kv_cache_tensor(key_cache, + value_cache, + kv_raw, + k_nope, + value, + 0, + n_tok, + n_tok, + DS4_N_HEAD, + (uint32_t)kv_raw_dim, + DS4_N_KV_LORA, + q_nope, + DS4_N_ROT, + DS4_N_VALUE_MLA, + rope_ctx, + rope_base, + rope_scale, + rope_ext, + rope_attn, + DS4_ROPE_YARN_BETA_FAST, + DS4_ROPE_YARN_BETA_SLOW, + false); + if (ok) { + if (glm_graph_flash_attention_prefill_enabled()) { + ok = ds4_gpu_glm_attention_flash_tensor(heads, + q, + key_cache, + value_cache, + 0, + n_tok, + n_tok, + n_tok, + DS4_N_HEAD, + qk_dim, + DS4_N_VALUE_MLA, + false); + } else { + ok = ds4_gpu_glm_attention_full_tensor(heads, + q, + key_cache, + value_cache, + 0, + n_tok, + n_tok, + n_tok, + DS4_N_HEAD, + qk_dim, + DS4_N_VALUE_MLA, + false); + } + } + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(attn_out, + model->map, + model->size, + layer->attn_output->abs_offset, + heads_dim, + DS4_N_EMBD, + heads, + n_tok); + if (ok) ok = ds4_gpu_tensor_read(attn_out, 0, gpu_attn, emb_bytes) != 0; + if (ok) { + printf(" layer0_multitok_attention: tokens=%u\n", n_tok); + ok = glm_metal_compare_f32("layer0_multitok_attention", + cpu_attn, + gpu_attn, + (uint32_t)((uint64_t)n_tok * DS4_N_EMBD), + 5.0e-1f); + } + + ds4_gpu_tensor_free(attn_out); + ds4_gpu_tensor_free(heads); + ds4_gpu_tensor_free(value_cache); + ds4_gpu_tensor_free(key_cache); + ds4_gpu_tensor_free(value); + ds4_gpu_tensor_free(k_nope); + ds4_gpu_tensor_free(kv_norm); + ds4_gpu_tensor_free(kv_raw); + ds4_gpu_tensor_free(q); + ds4_gpu_tensor_free(q_rank_norm); + ds4_gpu_tensor_free(q_rank); + ds4_gpu_tensor_free(attn_norm); + ds4_gpu_tensor_free(cur); + ds4_gpu_tensor_free(tok); + free(gpu_attn); + free(cpu_attn); + free(cpu_emb); + free(tok_host); + return ok; +} + +static int glm_metal_graph_test(ds4_engine *e, const ds4_tokens *prompt) { + if (!prompt || prompt->len <= 0) { + fprintf(stderr, "ds4: GLM Metal graph test requires a non-empty prompt\n"); + return 1; + } + const int token = prompt->v[0]; + if (token < 0 || token >= (int)DS4_N_VOCAB) { + fprintf(stderr, "ds4: GLM Metal graph test token %d is outside vocab\n", token); + return 1; + } + if (!e->weights.token_embd || e->weights.token_embd->type != DS4_TENSOR_Q8_0) { + fprintf(stderr, "ds4: GLM Metal graph test requires Q8_0 token embeddings\n"); + return 1; + } + if (DS4_N_LAYER <= DS4_N_NEXTN_PREDICT) { + fprintf(stderr, "ds4: GLM Metal graph test has no normal transformer layers\n"); + return 1; + } + + const uint32_t normal_layers = DS4_N_LAYER - DS4_N_NEXTN_PREDICT; + const uint32_t sparse_il = normal_layers > 8u ? 8u : DS4_N_LEADING_DENSE; + if (sparse_il >= normal_layers) { + fprintf(stderr, "ds4: GLM Metal graph test found no sparse GLM layer\n"); + return 1; + } + + const ds4_model *model = &e->model; + const ds4_weights *weights = &e->weights; + const ds4_layer_weights *layer = &weights->layer[0]; + const ds4_layer_weights *sparse_layer = &weights->layer[sparse_il]; + const uint64_t heads_dim = (uint64_t)DS4_N_HEAD * DS4_N_VALUE_MLA; + const uint64_t kv_raw_dim = layer->attn_kv_a_mqa ? layer->attn_kv_a_mqa->dim[1] : 0; + const uint64_t ffn_hidden = layer->ffn_gate ? layer->ffn_gate->dim[1] : 0; + const uint64_t sparse_mid_dim = + sparse_layer->ffn_gate_exps ? sparse_layer->ffn_gate_exps->dim[1] : 0; + const uint32_t sparse_gate_type = + sparse_layer->ffn_gate_exps ? sparse_layer->ffn_gate_exps->type : 0; + const uint32_t sparse_up_type = + sparse_layer->ffn_up_exps ? sparse_layer->ffn_up_exps->type : 0; + const bool sparse_gate_pair_supported = + glm_graph_gate_pair_type_supported(sparse_gate_type, sparse_up_type); + if (!layer->attn_norm || + !layer->attn_kv_a_mqa || + !layer->attn_kv_a_norm || + !layer->attn_v_b || + !layer->attn_output || + !layer->ffn_norm || + !layer->ffn_gate || + !layer->ffn_up || + !layer->ffn_down || + kv_raw_dim < DS4_N_KV_LORA || + layer->attn_v_b->dim[0] != DS4_N_KV_LORA || + layer->attn_v_b->dim[1] != DS4_N_VALUE_MLA || + layer->attn_v_b->dim[2] != DS4_N_HEAD || + layer->attn_output->dim[0] != heads_dim || + layer->attn_output->dim[1] != DS4_N_EMBD || + layer->ffn_gate->dim[0] != DS4_N_EMBD || + layer->ffn_up->dim[0] != DS4_N_EMBD || + layer->ffn_up->dim[1] != ffn_hidden || + layer->ffn_down->dim[0] != ffn_hidden || + layer->ffn_down->dim[1] != DS4_N_EMBD) { + fprintf(stderr, "ds4: GLM Metal graph test found unexpected layer-0 tensor layout\n"); + return 1; + } + if (!sparse_layer->ffn_gate_inp || + !sparse_layer->ffn_exp_probs_b || + !sparse_layer->ffn_norm || + sparse_layer->ffn_gate_inp->type != DS4_TENSOR_F32 || + sparse_layer->ffn_gate_inp->dim[0] != DS4_N_EMBD || + sparse_layer->ffn_gate_inp->dim[1] != DS4_N_EXPERT || + sparse_layer->ffn_exp_probs_b->type != DS4_TENSOR_F32 || + sparse_layer->ffn_exp_probs_b->dim[0] != DS4_N_EXPERT || + sparse_layer->ffn_norm->type != DS4_TENSOR_F32 || + sparse_layer->ffn_norm->dim[0] != DS4_N_EMBD || + !sparse_layer->ffn_gate_exps || + !sparse_layer->ffn_up_exps || + !sparse_layer->ffn_down_exps || + !sparse_layer->ffn_gate_shexp || + !sparse_layer->ffn_up_shexp || + !sparse_layer->ffn_down_shexp || + !sparse_gate_pair_supported || + !glm_graph_down_type_supported(sparse_layer->ffn_down_exps->type) || + sparse_layer->ffn_gate_shexp->type != DS4_TENSOR_Q8_0 || + sparse_layer->ffn_up_shexp->type != DS4_TENSOR_Q8_0 || + sparse_layer->ffn_down_shexp->type != DS4_TENSOR_Q8_0 || + sparse_layer->ffn_gate_exps->dim[0] != DS4_N_EMBD || + sparse_layer->ffn_gate_exps->dim[1] != DS4_N_FF_EXP || + sparse_layer->ffn_gate_exps->dim[2] != DS4_N_EXPERT || + sparse_layer->ffn_up_exps->dim[0] != DS4_N_EMBD || + sparse_layer->ffn_up_exps->dim[1] != DS4_N_FF_EXP || + sparse_layer->ffn_up_exps->dim[2] != DS4_N_EXPERT || + sparse_layer->ffn_down_exps->dim[0] != DS4_N_FF_EXP || + sparse_layer->ffn_down_exps->dim[1] != DS4_N_EMBD || + sparse_layer->ffn_down_exps->dim[2] != DS4_N_EXPERT || + sparse_layer->ffn_gate_shexp->dim[0] != DS4_N_EMBD || + sparse_layer->ffn_gate_shexp->dim[1] != DS4_N_FF_EXP || + sparse_layer->ffn_up_shexp->dim[0] != DS4_N_EMBD || + sparse_layer->ffn_up_shexp->dim[1] != DS4_N_FF_EXP || + sparse_layer->ffn_down_shexp->dim[0] != DS4_N_FF_EXP || + sparse_layer->ffn_down_shexp->dim[1] != DS4_N_EMBD || + sparse_mid_dim != DS4_N_FF_EXP) { + fprintf(stderr, "ds4: GLM Metal graph test found unexpected layer-%u router layout\n", + sparse_il); + return 1; + } + + const uint64_t emb_bytes = (uint64_t)DS4_N_EMBD * sizeof(float); + const uint64_t sparse_mid_elems = (uint64_t)DS4_N_EXPERT_USED * sparse_mid_dim; + const uint64_t ffn_mid_elems = + ffn_hidden > sparse_mid_elems ? ffn_hidden : sparse_mid_elems; + const uint64_t routed_mid_bytes = + (uint64_t)DS4_N_EXPERT_USED * DS4_N_FF_EXP * sizeof(float); + const uint64_t routed_down_bytes = + (uint64_t)DS4_N_EXPERT_USED * DS4_N_EMBD * sizeof(float); + const uint64_t max_read_elems = + ffn_hidden > DS4_N_EMBD ? ffn_hidden : (uint64_t)DS4_N_EMBD; + const uint64_t logits_bytes = (uint64_t)DS4_N_VOCAB * sizeof(float); + float *cpu_emb = xmalloc(emb_bytes); + float *cpu_layer = xmalloc(emb_bytes); + float *cpu_cur = xmalloc(emb_bytes); + float *cpu_next = xmalloc(emb_bytes); + float *cpu_sparse_attn = xmalloc(emb_bytes); + float *cpu_sparse_after_attn = xmalloc(emb_bytes); + float *cpu_sparse_norm = xmalloc(emb_bytes); + float *cpu_sparse_mid = + xmalloc((size_t)sparse_mid_elems * sizeof(cpu_sparse_mid[0])); + float *cpu_sparse_moe = xmalloc(emb_bytes); + float *cpu_sparse_shared = xmalloc(emb_bytes); + float *cpu_sparse_ffn = xmalloc(emb_bytes); + float *cpu_full_hidden = xmalloc(emb_bytes); + float *gpu_full_hidden = xmalloc(emb_bytes); + float *cpu_logits = xmalloc((size_t)logits_bytes); + float *gpu_logits = xmalloc((size_t)logits_bytes); + float *cpu_router_logits = xmalloc((size_t)DS4_N_EXPERT * sizeof(cpu_router_logits[0])); + float *gpu_router_logits = xmalloc((size_t)DS4_N_EXPERT * sizeof(gpu_router_logits[0])); + float *gpu_read = xmalloc((size_t)max_read_elems * sizeof(gpu_read[0])); + int cpu_router_selected[DS4_MAX_EXPERT_USED] = {0}; + int32_t gpu_router_selected[DS4_MAX_EXPERT_USED] = {0}; + float cpu_router_weights[DS4_MAX_EXPERT_USED] = {0}; + float gpu_router_weights[DS4_MAX_EXPERT_USED] = {0}; + char label_router_logits[64]; + char label_router_selected[64]; + char label_router_weights[64]; + char label_routed_moe[64]; + char label_shared_expert[64]; + char label_sparse_ffn[64]; + snprintf(label_router_logits, sizeof(label_router_logits), + "layer%u_router_logits", sparse_il); + snprintf(label_router_selected, sizeof(label_router_selected), + "layer%u_router_selected", sparse_il); + snprintf(label_router_weights, sizeof(label_router_weights), + "layer%u_router_weights", sparse_il); + snprintf(label_routed_moe, sizeof(label_routed_moe), + "layer%u_routed_moe", sparse_il); + snprintf(label_shared_expert, sizeof(label_shared_expert), + "layer%u_shared_expert", sparse_il); + snprintf(label_sparse_ffn, sizeof(label_sparse_ffn), + "layer%u_sparse_ffn", sparse_il); + + ds4_gpu_tensor *cur = NULL; + ds4_gpu_tensor *attn_norm = NULL; + ds4_gpu_tensor *kv_raw = NULL; + ds4_gpu_tensor *kv_norm = NULL; + ds4_gpu_tensor *heads = NULL; + ds4_gpu_tensor *attn_out = NULL; + ds4_gpu_tensor *after_attn = NULL; + ds4_gpu_tensor *ffn_norm = NULL; + ds4_gpu_tensor *ffn_gate = NULL; + ds4_gpu_tensor *ffn_up = NULL; + ds4_gpu_tensor *ffn_mid = NULL; + ds4_gpu_tensor *routed_gate = NULL; + ds4_gpu_tensor *routed_up = NULL; + ds4_gpu_tensor *routed_down = NULL; + ds4_gpu_tensor *ffn_out = NULL; + ds4_gpu_tensor *ffn_sum = NULL; + ds4_gpu_tensor *next = NULL; + ds4_gpu_tensor *router_logits = NULL; + ds4_gpu_tensor *router_probs = NULL; + ds4_gpu_tensor *router_selected = NULL; + ds4_gpu_tensor *router_weights = NULL; + ds4_gpu_tensor *logits = NULL; + + int ok = 1; +#define DS4_GLM_ALLOC_TENSOR(var, bytes_) \ + do { \ + (var) = ds4_gpu_tensor_alloc((bytes_)); \ + if (!(var)) { \ + fprintf(stderr, "ds4: GLM Metal graph test could not allocate %s\n", #var); \ + ok = 0; \ + } \ + } while (0) + + DS4_GLM_ALLOC_TENSOR(cur, emb_bytes); + DS4_GLM_ALLOC_TENSOR(attn_norm, emb_bytes); + DS4_GLM_ALLOC_TENSOR(kv_raw, kv_raw_dim * sizeof(float)); + DS4_GLM_ALLOC_TENSOR(kv_norm, (uint64_t)DS4_N_KV_LORA * sizeof(float)); + DS4_GLM_ALLOC_TENSOR(heads, heads_dim * sizeof(float)); + DS4_GLM_ALLOC_TENSOR(attn_out, emb_bytes); + DS4_GLM_ALLOC_TENSOR(after_attn, emb_bytes); + DS4_GLM_ALLOC_TENSOR(ffn_norm, emb_bytes); + DS4_GLM_ALLOC_TENSOR(ffn_gate, ffn_hidden * sizeof(float)); + DS4_GLM_ALLOC_TENSOR(ffn_up, ffn_hidden * sizeof(float)); + DS4_GLM_ALLOC_TENSOR(ffn_mid, ffn_mid_elems * sizeof(float)); + if (glm_graph_layer_uses_generic_routed_moe(sparse_layer)) { + DS4_GLM_ALLOC_TENSOR(routed_gate, routed_mid_bytes); + DS4_GLM_ALLOC_TENSOR(routed_up, routed_mid_bytes); + DS4_GLM_ALLOC_TENSOR(routed_down, routed_down_bytes); + } + DS4_GLM_ALLOC_TENSOR(ffn_out, emb_bytes); + DS4_GLM_ALLOC_TENSOR(ffn_sum, emb_bytes); + DS4_GLM_ALLOC_TENSOR(next, emb_bytes); + DS4_GLM_ALLOC_TENSOR(router_logits, (uint64_t)DS4_N_EXPERT * sizeof(float)); + DS4_GLM_ALLOC_TENSOR(router_probs, (uint64_t)DS4_N_EXPERT * sizeof(float)); + DS4_GLM_ALLOC_TENSOR(router_selected, (uint64_t)DS4_N_EXPERT_USED * sizeof(int32_t)); + DS4_GLM_ALLOC_TENSOR(router_weights, (uint64_t)DS4_N_EXPERT_USED * sizeof(float)); + DS4_GLM_ALLOC_TENSOR(logits, logits_bytes); +#undef DS4_GLM_ALLOC_TENSOR + + if (ok) { + embed_token_any(model, weights, token, cpu_emb); + layer_glm_first_token_one(cpu_layer, model, layer, cpu_emb, 0); + + ok = ds4_gpu_embed_token_q8_0_tensor(cur, + model->map, + model->size, + weights->token_embd->abs_offset, + DS4_N_VOCAB, + (uint32_t)token, + DS4_N_EMBD); + } + if (ok) ok = ds4_gpu_tensor_read(cur, 0, gpu_read, emb_bytes); + if (ok) { + printf("GLM Metal graph test token=%d", token); + if (e->vocab.token && token < e->vocab.n_vocab) { + const ds4_str s = e->vocab.token[token]; + printf(" text=%.*s", (int)s.len, s.ptr); + } + printf("\n"); + ok = glm_metal_compare_f32("embedding_q8_0", cpu_emb, gpu_read, + DS4_N_EMBD, 1.0e-3f); + } + + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(attn_norm, cur, + model->map, model->size, + layer->attn_norm->abs_offset, + DS4_N_EMBD, DS4_RMS_EPS); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(kv_raw, model->map, model->size, + layer->attn_kv_a_mqa->abs_offset, + DS4_N_EMBD, kv_raw_dim, attn_norm, 1); + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(kv_norm, kv_raw, + model->map, model->size, + layer->attn_kv_a_norm->abs_offset, + DS4_N_KV_LORA, DS4_RMS_EPS); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(heads, model->map, model->size, + layer->attn_v_b->abs_offset, + DS4_N_KV_LORA, heads_dim, kv_norm, 1); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(attn_out, model->map, model->size, + layer->attn_output->abs_offset, + heads_dim, DS4_N_EMBD, heads, 1); + if (ok) ok = ds4_gpu_add_tensor(after_attn, cur, attn_out, DS4_N_EMBD); + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(ffn_norm, after_attn, + model->map, model->size, + layer->ffn_norm->abs_offset, + DS4_N_EMBD, DS4_RMS_EPS); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(ffn_gate, model->map, model->size, + layer->ffn_gate->abs_offset, + DS4_N_EMBD, ffn_hidden, ffn_norm, 1); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(ffn_up, model->map, model->size, + layer->ffn_up->abs_offset, + DS4_N_EMBD, ffn_hidden, ffn_norm, 1); + if (ok) ok = ds4_gpu_swiglu_tensor(ffn_mid, ffn_gate, ffn_up, + (uint32_t)ffn_hidden, 0.0f, 1.0f); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(ffn_out, model->map, model->size, + layer->ffn_down->abs_offset, + ffn_hidden, DS4_N_EMBD, ffn_mid, 1); + if (ok) ok = ds4_gpu_add_tensor(next, after_attn, ffn_out, DS4_N_EMBD); + if (ok) ok = ds4_gpu_tensor_read(next, 0, gpu_read, emb_bytes); + if (ok) { + ok = glm_metal_compare_f32("layer0_hidden", cpu_layer, gpu_read, + DS4_N_EMBD, 5.0e-2f); + } + if (ok) ok = glm_metal_graph_test_multitok_attention(e, prompt, layer); + if (ok) ok = glm_metal_graph_test_q8_prefill(e, layer); + + if (ok) { + memcpy(cpu_cur, cpu_emb, emb_bytes); + for (uint32_t il = 0; il < sparse_il; il++) { + layer_glm_first_token_one(cpu_next, model, &weights->layer[il], cpu_cur, il); + float *tmp = cpu_cur; + cpu_cur = cpu_next; + cpu_next = tmp; + } + + layer_glm_first_token_attention_one(cpu_sparse_attn, model, sparse_layer, cpu_cur); + for (uint32_t i = 0; i < DS4_N_EMBD; i++) { + cpu_sparse_after_attn[i] = cpu_cur[i] + cpu_sparse_attn[i]; + } + rms_norm_weight(cpu_sparse_norm, + cpu_sparse_after_attn, + tensor_data(model, sparse_layer->ffn_norm), + DS4_N_EMBD, + DS4_RMS_EPS); + matvec_any(cpu_router_logits, model, sparse_layer->ffn_gate_inp, cpu_sparse_norm); + layer_glm_router_selected_experts(cpu_router_selected, + cpu_router_weights, + model, + sparse_layer, + cpu_sparse_norm); + + ok = ds4_gpu_tensor_write(ffn_norm, 0, cpu_sparse_norm, emb_bytes) != 0; + } + if (ok) ok = ds4_gpu_matmul_f32_tensor(router_logits, + model->map, + model->size, + sparse_layer->ffn_gate_inp->abs_offset, + DS4_N_EMBD, + DS4_N_EXPERT, + ffn_norm, + 1); + if (ok) ok = ds4_gpu_tensor_read(router_logits, + 0, + gpu_router_logits, + (uint64_t)DS4_N_EXPERT * sizeof(gpu_router_logits[0])) != 0; + if (ok) { + ok = glm_metal_compare_f32(label_router_logits, + cpu_router_logits, + gpu_router_logits, + DS4_N_EXPERT, + 2.0e-3f); + } + if (ok) ok = ds4_gpu_glm_router_select_tensor(router_selected, + router_weights, + router_probs, + model->map, + model->size, + sparse_layer->ffn_exp_probs_b->abs_offset, + router_logits, + DS4_N_EXPERT, + DS4_N_EXPERT_USED, + DS4_EXPERT_WEIGHT_SCALE); + if (ok) ok = ds4_gpu_tensor_read(router_selected, + 0, + gpu_router_selected, + (uint64_t)DS4_N_EXPERT_USED * sizeof(gpu_router_selected[0])) != 0; + if (ok) ok = ds4_gpu_tensor_read(router_weights, + 0, + gpu_router_weights, + (uint64_t)DS4_N_EXPERT_USED * sizeof(gpu_router_weights[0])) != 0; + if (ok) { + ok = glm_metal_compare_i32_list(label_router_selected, + cpu_router_selected, + gpu_router_selected, + DS4_N_EXPERT_USED); + } + if (ok) { + ok = glm_metal_compare_f32(label_router_weights, + cpu_router_weights, + gpu_router_weights, + DS4_N_EXPERT_USED, + 1.0e-4f); + } + if (ok) { + uint64_t gate_in = 0, gate_out = 0, gate_row_bytes = 0; + uint64_t up_in = 0, up_out = 0, up_row_bytes = 0; + uint64_t down_in = 0, down_out = 0, down_row_bytes = 0; + (void)tensor_expert_bytes(model, sparse_layer->ffn_gate_exps, 0, + &gate_in, &gate_out, &gate_row_bytes); + (void)tensor_expert_bytes(model, sparse_layer->ffn_up_exps, 0, + &up_in, &up_out, &up_row_bytes); + (void)tensor_expert_bytes(model, sparse_layer->ffn_down_exps, 0, + &down_in, &down_out, &down_row_bytes); + if (gate_in != DS4_N_EMBD || + up_in != DS4_N_EMBD || + down_in != DS4_N_FF_EXP || + gate_out != DS4_N_FF_EXP || + up_out != DS4_N_FF_EXP || + down_out != DS4_N_EMBD) { + fprintf(stderr, "ds4: GLM Metal graph test found unexpected layer-%u expert strides\n", + sparse_il); + ok = 0; + } else { + layer_glm_routed_moe_one_f32_ref(cpu_sparse_moe, + cpu_sparse_mid, + model, + sparse_layer, + cpu_sparse_norm, + cpu_router_selected, + cpu_router_weights); + ds4_glm_gpu_graph route_g = { + .routed_gate = routed_gate, + .routed_up = routed_up, + .routed_down = routed_down, + }; + ok = glm_graph_routed_moe_one_dispatch( + &route_g, + model, + sparse_layer, + sparse_il, + ffn_out, + ffn_mid, + gate_out * gate_row_bytes, + gate_row_bytes, + up_out * up_row_bytes, + up_row_bytes, + down_out * down_row_bytes, + down_row_bytes, + router_selected, + router_weights, + ffn_norm, + false); + } + } + if (ok) ok = ds4_gpu_tensor_read(ffn_out, 0, gpu_read, emb_bytes) != 0; + if (ok) { + ok = glm_metal_compare_f32(label_routed_moe, + cpu_sparse_moe, + gpu_read, + DS4_N_EMBD, + 1.0e-1f); + } + if (ok) { + layer_glm_shared_ffn_one_f32_ref(cpu_sparse_shared, + model, + sparse_layer, + cpu_sparse_norm); + for (uint32_t i = 0; i < DS4_N_EMBD; i++) { + cpu_sparse_ffn[i] = cpu_sparse_moe[i] + cpu_sparse_shared[i]; + } + ok = ds4_gpu_shared_gate_up_swiglu_q8_0_tensor( + ffn_gate, + ffn_up, + ffn_mid, + model->map, + model->size, + sparse_layer->ffn_gate_shexp->abs_offset, + sparse_layer->ffn_up_shexp->abs_offset, + DS4_N_EMBD, + DS4_N_FF_EXP, + ffn_norm, + 0.0f); + } + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(next, + model->map, + model->size, + sparse_layer->ffn_down_shexp->abs_offset, + DS4_N_FF_EXP, + DS4_N_EMBD, + ffn_mid, + 1); + if (ok) ok = ds4_gpu_tensor_read(next, 0, gpu_read, emb_bytes) != 0; + if (ok) { + ok = glm_metal_compare_f32(label_shared_expert, + cpu_sparse_shared, + gpu_read, + DS4_N_EMBD, + 5.0e-2f); + } + if (ok) ok = ds4_gpu_add_tensor(after_attn, ffn_out, next, DS4_N_EMBD); + if (ok) ok = ds4_gpu_tensor_read(after_attn, 0, gpu_read, emb_bytes) != 0; + if (ok) { + ok = glm_metal_compare_f32(label_sparse_ffn, + cpu_sparse_ffn, + gpu_read, + DS4_N_EMBD, + 5.0e-2f); + } + + if (ok) { + printf(" all_layers_reference: cpu_f32 normal_layers=%u\n", normal_layers); + fflush(stdout); + forward_glm_first_token_cpu_f32_ref(cpu_full_hidden, model, weights, token); + output_logits_glm_one_f32_ref(cpu_logits, model, weights, cpu_full_hidden); + ok = ds4_gpu_embed_token_q8_0_tensor(cur, + model->map, + model->size, + weights->token_embd->abs_offset, + DS4_N_VOCAB, + (uint32_t)token, + DS4_N_EMBD); + } + for (uint32_t il = 0; ok && il < normal_layers; il++) { + const ds4_layer_weights *gl = &weights->layer[il]; + const uint64_t gl_kv_raw_dim = gl->attn_kv_a_mqa ? gl->attn_kv_a_mqa->dim[1] : 0; + if (!gl->attn_norm || + !gl->attn_kv_a_mqa || + !gl->attn_kv_a_norm || + !gl->attn_v_b || + !gl->attn_output || + !gl->ffn_norm || + gl_kv_raw_dim < DS4_N_KV_LORA || + gl_kv_raw_dim > kv_raw_dim || + gl->attn_kv_a_mqa->dim[0] != DS4_N_EMBD || + gl->attn_v_b->dim[0] != DS4_N_KV_LORA || + gl->attn_v_b->dim[1] != DS4_N_VALUE_MLA || + gl->attn_v_b->dim[2] != DS4_N_HEAD || + gl->attn_output->dim[0] != heads_dim || + gl->attn_output->dim[1] != DS4_N_EMBD) { + fprintf(stderr, + "ds4: GLM Metal all-layer test found unexpected attention layout in layer %u\n", + il); + ok = 0; + break; + } + + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(attn_norm, cur, + model->map, model->size, + gl->attn_norm->abs_offset, + DS4_N_EMBD, DS4_RMS_EPS); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(kv_raw, + model->map, + model->size, + gl->attn_kv_a_mqa->abs_offset, + DS4_N_EMBD, + gl_kv_raw_dim, + attn_norm, + 1); + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(kv_norm, kv_raw, + model->map, model->size, + gl->attn_kv_a_norm->abs_offset, + DS4_N_KV_LORA, DS4_RMS_EPS); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(heads, + model->map, + model->size, + gl->attn_v_b->abs_offset, + DS4_N_KV_LORA, + heads_dim, + kv_norm, + 1); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(attn_out, + model->map, + model->size, + gl->attn_output->abs_offset, + heads_dim, + DS4_N_EMBD, + heads, + 1); + if (ok) ok = ds4_gpu_add_tensor(after_attn, cur, attn_out, DS4_N_EMBD); + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(ffn_norm, after_attn, + model->map, model->size, + gl->ffn_norm->abs_offset, + DS4_N_EMBD, DS4_RMS_EPS); + if (il < DS4_N_LEADING_DENSE) { + const uint64_t gl_ffn_hidden = gl->ffn_gate ? gl->ffn_gate->dim[1] : 0; + if (!gl->ffn_gate || + !gl->ffn_up || + !gl->ffn_down || + gl->ffn_gate->type != DS4_TENSOR_Q8_0 || + gl->ffn_up->type != DS4_TENSOR_Q8_0 || + gl->ffn_down->type != DS4_TENSOR_Q8_0 || + gl->ffn_gate->dim[0] != DS4_N_EMBD || + gl->ffn_up->dim[0] != DS4_N_EMBD || + gl->ffn_up->dim[1] != gl_ffn_hidden || + gl->ffn_down->dim[0] != gl_ffn_hidden || + gl->ffn_down->dim[1] != DS4_N_EMBD || + gl_ffn_hidden > ffn_hidden) { + fprintf(stderr, + "ds4: GLM Metal all-layer test found unexpected dense FFN layout in layer %u\n", + il); + ok = 0; + break; + } + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(ffn_gate, + model->map, + model->size, + gl->ffn_gate->abs_offset, + DS4_N_EMBD, + gl_ffn_hidden, + ffn_norm, + 1); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(ffn_up, + model->map, + model->size, + gl->ffn_up->abs_offset, + DS4_N_EMBD, + gl_ffn_hidden, + ffn_norm, + 1); + if (ok) ok = ds4_gpu_swiglu_tensor(ffn_mid, ffn_gate, ffn_up, + (uint32_t)gl_ffn_hidden, 0.0f, 1.0f); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(ffn_out, + model->map, + model->size, + gl->ffn_down->abs_offset, + gl_ffn_hidden, + DS4_N_EMBD, + ffn_mid, + 1); + if (ok) ok = ds4_gpu_add_tensor(next, after_attn, ffn_out, DS4_N_EMBD); + } else { + const uint32_t gl_gate_type = gl->ffn_gate_exps ? gl->ffn_gate_exps->type : 0; + const uint32_t gl_up_type = gl->ffn_up_exps ? gl->ffn_up_exps->type : 0; + const bool gl_gate_pair_supported = + glm_graph_gate_pair_type_supported(gl_gate_type, gl_up_type); + uint64_t gate_in = 0, gate_out = 0, gate_row_bytes = 0; + uint64_t up_in = 0, up_out = 0, up_row_bytes = 0; + uint64_t down_in = 0, down_out = 0, down_row_bytes = 0; + + if (!gl->ffn_gate_inp || + !gl->ffn_exp_probs_b || + !gl->ffn_gate_exps || + !gl->ffn_up_exps || + !gl->ffn_down_exps || + !gl->ffn_gate_shexp || + !gl->ffn_up_shexp || + !gl->ffn_down_shexp || + gl->ffn_gate_inp->type != DS4_TENSOR_F32 || + gl->ffn_gate_inp->dim[0] != DS4_N_EMBD || + gl->ffn_gate_inp->dim[1] != DS4_N_EXPERT || + gl->ffn_exp_probs_b->type != DS4_TENSOR_F32 || + gl->ffn_exp_probs_b->dim[0] != DS4_N_EXPERT || + !gl_gate_pair_supported || + !glm_graph_down_type_supported(gl->ffn_down_exps->type) || + gl->ffn_gate_shexp->type != DS4_TENSOR_Q8_0 || + gl->ffn_up_shexp->type != DS4_TENSOR_Q8_0 || + gl->ffn_down_shexp->type != DS4_TENSOR_Q8_0 || + gl->ffn_gate_shexp->dim[0] != DS4_N_EMBD || + gl->ffn_gate_shexp->dim[1] != DS4_N_FF_EXP || + gl->ffn_up_shexp->dim[0] != DS4_N_EMBD || + gl->ffn_up_shexp->dim[1] != DS4_N_FF_EXP || + gl->ffn_down_shexp->dim[0] != DS4_N_FF_EXP || + gl->ffn_down_shexp->dim[1] != DS4_N_EMBD || + (uint64_t)DS4_N_EXPERT_USED * DS4_N_FF_EXP > ffn_mid_elems) { + fprintf(stderr, + "ds4: GLM Metal all-layer test found unexpected sparse FFN layout in layer %u\n", + il); + ok = 0; + break; + } + + (void)tensor_expert_bytes(model, gl->ffn_gate_exps, 0, + &gate_in, &gate_out, &gate_row_bytes); + (void)tensor_expert_bytes(model, gl->ffn_up_exps, 0, + &up_in, &up_out, &up_row_bytes); + (void)tensor_expert_bytes(model, gl->ffn_down_exps, 0, + &down_in, &down_out, &down_row_bytes); + if (gate_in != DS4_N_EMBD || + up_in != DS4_N_EMBD || + down_in != DS4_N_FF_EXP || + gate_out != DS4_N_FF_EXP || + up_out != DS4_N_FF_EXP || + down_out != DS4_N_EMBD) { + fprintf(stderr, + "ds4: GLM Metal all-layer test found unexpected expert strides in layer %u\n", + il); + ok = 0; + break; + } + + if (ok) ok = ds4_gpu_matmul_f32_tensor(router_logits, + model->map, + model->size, + gl->ffn_gate_inp->abs_offset, + DS4_N_EMBD, + DS4_N_EXPERT, + ffn_norm, + 1); + if (ok) ok = ds4_gpu_glm_router_select_tensor(router_selected, + router_weights, + router_probs, + model->map, + model->size, + gl->ffn_exp_probs_b->abs_offset, + router_logits, + DS4_N_EXPERT, + DS4_N_EXPERT_USED, + DS4_EXPERT_WEIGHT_SCALE); + ds4_glm_gpu_graph route_g = { + .routed_gate = routed_gate, + .routed_up = routed_up, + .routed_down = routed_down, + }; + if (ok) ok = glm_graph_routed_moe_one_dispatch( + &route_g, + model, + gl, + il, + ffn_out, + ffn_mid, + gate_out * gate_row_bytes, + gate_row_bytes, + up_out * up_row_bytes, + up_row_bytes, + down_out * down_row_bytes, + down_row_bytes, + router_selected, + router_weights, + ffn_norm, + false); + if (ok) ok = ds4_gpu_shared_gate_up_swiglu_q8_0_tensor( + ffn_gate, + ffn_up, + ffn_mid, + model->map, + model->size, + gl->ffn_gate_shexp->abs_offset, + gl->ffn_up_shexp->abs_offset, + DS4_N_EMBD, + DS4_N_FF_EXP, + ffn_norm, + 0.0f); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(ffn_sum, + model->map, + model->size, + gl->ffn_down_shexp->abs_offset, + DS4_N_FF_EXP, + DS4_N_EMBD, + ffn_mid, + 1); + if (ok) ok = ds4_gpu_add_tensor(attn_out, ffn_out, ffn_sum, DS4_N_EMBD); + if (ok) ok = ds4_gpu_add_tensor(next, after_attn, attn_out, DS4_N_EMBD); + } + + if (ok) { + ds4_gpu_tensor *tmp = cur; + cur = next; + next = tmp; + } + } + if (ok) ok = ds4_gpu_tensor_read(cur, 0, gpu_full_hidden, emb_bytes) != 0; + if (ok) { + ok = glm_metal_compare_f32("all_layers_hidden", + cpu_full_hidden, + gpu_full_hidden, + DS4_N_EMBD, + 5.0f); + } + if (ok) ok = ds4_gpu_rms_norm_weight_tensor(ffn_norm, cur, + model->map, model->size, + weights->output_norm->abs_offset, + DS4_N_EMBD, DS4_RMS_EPS); + if (ok) ok = ds4_gpu_matmul_q8_0_tensor(logits, + model->map, + model->size, + weights->output->abs_offset, + DS4_N_EMBD, + DS4_N_VOCAB, + ffn_norm, + 1); + if (ok) ok = ds4_gpu_tensor_read(logits, 0, gpu_logits, logits_bytes) != 0; + if (ok) { + ok = glm_metal_compare_f32("first_token_logits", + cpu_logits, + gpu_logits, + DS4_N_VOCAB, + 10.0f); + } + + ds4_gpu_tensor_free(router_weights); + ds4_gpu_tensor_free(router_selected); + ds4_gpu_tensor_free(router_probs); + ds4_gpu_tensor_free(router_logits); + ds4_gpu_tensor_free(logits); + ds4_gpu_tensor_free(next); + ds4_gpu_tensor_free(ffn_sum); + ds4_gpu_tensor_free(ffn_out); + ds4_gpu_tensor_free(routed_down); + ds4_gpu_tensor_free(routed_up); + ds4_gpu_tensor_free(routed_gate); + ds4_gpu_tensor_free(ffn_mid); + ds4_gpu_tensor_free(ffn_up); + ds4_gpu_tensor_free(ffn_gate); + ds4_gpu_tensor_free(ffn_norm); + ds4_gpu_tensor_free(after_attn); + ds4_gpu_tensor_free(attn_out); + ds4_gpu_tensor_free(heads); + ds4_gpu_tensor_free(kv_norm); + ds4_gpu_tensor_free(kv_raw); + ds4_gpu_tensor_free(attn_norm); + ds4_gpu_tensor_free(cur); + free(gpu_read); + free(gpu_router_logits); + free(cpu_router_logits); + free(gpu_logits); + free(cpu_logits); + free(gpu_full_hidden); + free(cpu_full_hidden); + free(cpu_sparse_ffn); + free(cpu_sparse_shared); + free(cpu_sparse_moe); + free(cpu_sparse_mid); + free(cpu_sparse_norm); + free(cpu_sparse_after_attn); + free(cpu_sparse_attn); + free(cpu_next); + free(cpu_cur); + free(cpu_layer); + free(cpu_emb); + return ok ? 0 : 1; +} +#endif + int ds4_engine_metal_graph_test(ds4_engine *e, const ds4_tokens *prompt) { #ifndef DS4_NO_GPU if (!e->metal_ready) { @@ -31997,6 +44334,9 @@ int ds4_engine_metal_graph_test(ds4_engine *e, const ds4_tokens *prompt) { ds4_backend_name(e->backend)); return 1; } + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + return glm_metal_graph_test(e, prompt); + } return metal_graph_decode_test(&e->model, &e->weights, prompt, e->quality); #else (void)e; @@ -32146,6 +44486,41 @@ int ds4_engine_first_token_test(ds4_engine *e, const ds4_tokens *prompt) { const ds4_vocab *vocab = &e->vocab; const ds4_weights *weights = &e->weights; + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + float *hidden = xmalloc((size_t)DS4_N_EMBD * sizeof(hidden[0])); + float *logits = xmalloc((size_t)DS4_N_VOCAB * sizeof(logits[0])); + + forward_glm_first_token_cpu(hidden, model, weights, prompt->v[0]); + print_vec_stats("first-token final_hidden", hidden, DS4_N_EMBD); + output_logits_glm_one(logits, model, weights, hidden); + print_vec_stats("first-token logits", logits, DS4_N_VOCAB); + + int best[8]; + for (int i = 0; i < 8; i++) best[i] = -1; + for (uint32_t i = 0; i < DS4_N_VOCAB; i++) { + for (int j = 0; j < 8; j++) { + if (best[j] < 0 || logits[i] > logits[best[j]]) { + for (int k = 7; k > j; k--) best[k] = best[k - 1]; + best[j] = (int)i; + break; + } + } + } + + printf("top logits after GLM first-token CPU pass:\n"); + for (int i = 0; i < 8; i++) { + printf(" %6d %9.4f %.*s\n", + best[i], + logits[best[i]], + (int)vocab->token[best[i]].len, + vocab->token[best[i]].ptr); + } + + free(logits); + free(hidden); + return 0; + } + float *hc = xmalloc((size_t)DS4_N_HC * DS4_N_EMBD * sizeof(hc[0])); float *logits = xmalloc((size_t)DS4_N_VOCAB * sizeof(logits[0])); forward_first_token_cpu(hc, model, weights, prompt->v[0]); @@ -32229,7 +44604,23 @@ static bool ds4_engine_configure_streaming_auto_cache(ds4_engine *e) { return false; } - e->ssd_streaming_cache_experts = plan.cache_experts; + uint32_t cache_experts = plan.cache_experts; + uint64_t effective_cache_bytes = plan.effective_cache_bytes; + const bool glm_auto_cap = + e->backend == DS4_BACKEND_METAL && + DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA; + const uint64_t glm_auto_cap_bytes = 12ull * 1024ull * 1024ull * 1024ull; + if (glm_auto_cap && effective_cache_bytes > glm_auto_cap_bytes) { + uint64_t capped_experts = glm_auto_cap_bytes / per_expert_bytes; + if (capped_experts == 0) capped_experts = 1; + if (capped_experts > max_model_experts) capped_experts = max_model_experts; + cache_experts = capped_experts > UINT32_MAX ? + UINT32_MAX : (uint32_t)capped_experts; + effective_cache_bytes = (uint64_t)cache_experts * per_expert_bytes; + } + + e->ssd_streaming_cache_experts = cache_experts; + e->ssd_streaming_cache_bytes = effective_cache_bytes; fprintf(stderr, "ds4: SSD streaming auto cache budget\n"); fprintf(stderr, @@ -32245,10 +44636,24 @@ static bool ds4_engine_configure_streaming_auto_cache(ds4_engine *e) { fprintf(stderr, "ds4: routed expert size: %.2f MiB\n", (double)per_expert_bytes / 1048576.0); - fprintf(stderr, - "ds4: cached expert count: %u (%.2f GiB)\n", - e->ssd_streaming_cache_experts, - (double)plan.effective_cache_bytes / 1073741824.0); + if (glm_auto_cap) { + fprintf(stderr, + "ds4: expert budget before prefill/full-layer reserve: %u " + "(%.2f GiB)\n", + e->ssd_streaming_cache_experts, + (double)effective_cache_bytes / 1073741824.0); + } else { + fprintf(stderr, + "ds4: expert budget before prefill reserve: %u (%.2f GiB)\n", + e->ssd_streaming_cache_experts, + (double)effective_cache_bytes / 1073741824.0); + } + if (glm_auto_cap && plan.effective_cache_bytes != effective_cache_bytes) { + fprintf(stderr, + "ds4: GLM Metal auto cache capped at %.2f GiB; pass " + "--ssd-streaming-cache-experts NGB to override\n", + (double)glm_auto_cap_bytes / 1073741824.0); + } if (plan.model_target_bytes <= non_routed_bytes) { fprintf(stderr, "ds4: note: non-routed weights already fill the 80%% target; keeping a one-expert cache\n"); @@ -32257,6 +44662,312 @@ static bool ds4_engine_configure_streaming_auto_cache(ds4_engine *e) { #endif } +static uint32_t ds4_glm_streaming_normal_layer_count(void) { + if (DS4_N_NEXTN_PREDICT != 0 && DS4_N_LAYER > DS4_N_NEXTN_PREDICT) { + return DS4_N_LAYER - DS4_N_NEXTN_PREDICT; + } + return DS4_N_LAYER; +} + +static uint32_t ds4_glm_streaming_supported_resident_prefix_layers( + const ds4_weights *weights) { + if (!weights) return 0; + const uint32_t normal_layers = ds4_glm_streaming_normal_layer_count(); + if (normal_layers <= DS4_N_LEADING_DENSE) return 0; + + uint32_t n = 0; + for (uint32_t il = DS4_N_LEADING_DENSE; il < normal_layers; il++) { + if (!glm_stream_resident_decode_layer_supported(&weights->layer[il], + il)) { + break; + } + n++; + } + return n; +} + +static bool ds4_glm_streaming_resident_prefix_bytes( + const ds4_weights *weights, + uint32_t layers, + uint64_t *bytes_out) { + if (bytes_out) *bytes_out = 0; + if (!weights || !bytes_out || DS4_N_EXPERT == 0) return false; + + uint64_t total = 0; + for (uint32_t i = 0; i < layers; i++) { + const uint32_t il = DS4_N_LEADING_DENSE + i; + if (!glm_stream_resident_decode_layer_supported(&weights->layer[il], + il)) { + return false; + } + uint64_t per_expert_bytes = 0; + if (!streaming_layer_routed_expert_bytes(&weights->layer[il], + &per_expert_bytes) || + per_expert_bytes > UINT64_MAX / (uint64_t)DS4_N_EXPERT) { + return false; + } + const uint64_t layer_bytes = + per_expert_bytes * (uint64_t)DS4_N_EXPERT; + if (total > UINT64_MAX - layer_bytes) return false; + total += layer_bytes; + } + + *bytes_out = total; + return true; +} + +static uint32_t ds4_glm_streaming_auto_full_layers( + const ds4_weights *weights, + uint32_t supported_layers, + uint64_t total_budget_bytes) { + if (!weights || supported_layers == 0 || total_budget_bytes == 0) { + return 0; + } + + const uint64_t max_auto_bytes = 10ull * 1024ull * 1024ull * 1024ull; + uint64_t target_bytes = total_budget_bytes / 7ull; + if (target_bytes > max_auto_bytes) target_bytes = max_auto_bytes; + if (target_bytes == 0) return 0; + + uint32_t best = 0; + for (uint32_t n = 1; n <= supported_layers; n++) { + uint64_t bytes = 0; + if (!ds4_glm_streaming_resident_prefix_bytes(weights, n, &bytes)) { + break; + } + if (bytes > target_bytes) break; + best = n; + } + return best; +} + +static bool ds4_engine_configure_streaming_cache_budget(ds4_engine *e) { + g_glm_streaming_full_resident_layers = 0; +#ifdef DS4_NO_GPU + (void)e; + return true; +#else + if (!e || !e->ssd_streaming) return true; + + if (e->ssd_streaming_full_layers_set && + e->ssd_streaming_full_layers != 0 && + (e->backend != DS4_BACKEND_METAL || + DS4_MODEL_FAMILY != DS4_MODEL_FAMILY_GLM_DSA)) { + fprintf(stderr, + "ds4: --ssd-streaming-full-layers is currently supported " + "only for GLM Metal SSD streaming; ignoring\n"); + e->ssd_streaming_full_layers = 0; + } + + uint64_t per_expert_bytes = 0; + const bool glm_metal_streaming = + e->backend == DS4_BACKEND_METAL && + DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA; + const bool need_expert_bytes = + e->ssd_streaming_cache_bytes != 0 || + (glm_metal_streaming && !e->ssd_streaming_full_layers_set) || + e->ssd_streaming_full_layers != 0; + if (need_expert_bytes && + !ds4_streaming_routed_expert_bytes(&e->weights, + &per_expert_bytes)) { + fprintf(stderr, + "ds4: SSD streaming could not measure routed expert size\n"); + return false; + } + + uint32_t full_layers = 0; + uint64_t full_layers_bytes = 0; + bool full_layers_auto = false; + uint32_t supported = 0; + uint64_t total_cache_bytes = e->ssd_streaming_cache_bytes; + uint64_t prefill_headroom_bytes = 0; + uint64_t budget_after_prefill_headroom = total_cache_bytes; + if (total_cache_bytes != 0) { + if (!ds4_streaming_prefill_headroom_bytes(&e->weights, + &prefill_headroom_bytes)) { + fprintf(stderr, + "ds4: SSD streaming prefill headroom byte accounting failed\n"); + return false; + } + if (prefill_headroom_bytes >= total_cache_bytes) { + fprintf(stderr, + "ds4: --ssd-streaming-cache-experts byte budget %.2f GiB " + "is too small: two routed prefill layers need %.2f GiB\n", + (double)total_cache_bytes / 1073741824.0, + (double)prefill_headroom_bytes / 1073741824.0); + return false; + } + budget_after_prefill_headroom = + total_cache_bytes - prefill_headroom_bytes; + } + e->ssd_streaming_prefill_headroom_bytes = prefill_headroom_bytes; + if (glm_metal_streaming) { + supported = + ds4_glm_streaming_supported_resident_prefix_layers(&e->weights); + if (!e->ssd_streaming_full_layers_set && + e->ssd_streaming_cache_bytes != 0) { + e->ssd_streaming_full_layers = + ds4_glm_streaming_auto_full_layers(&e->weights, + supported, + budget_after_prefill_headroom); + full_layers_auto = true; + } + } + + if (e->ssd_streaming_full_layers != 0) { + const uint32_t requested = e->ssd_streaming_full_layers; + const uint32_t supported = + ds4_glm_streaming_supported_resident_prefix_layers(&e->weights); + full_layers = requested < supported ? requested : supported; + if (full_layers != requested) { + fprintf(stderr, + "ds4: GLM SSD streaming full resident layers capped " + "from %u to %u supported routed prefix layers\n", + requested, + full_layers); + } + + if (total_cache_bytes != 0 && per_expert_bytes != 0) { + /* + * The dynamic cache must be large enough for batch prefill too: + * selected-address prefill can see many unique experts for a + * layer, not just the top-k used by one decode token. + */ + uint64_t min_dynamic_experts = + DS4_N_EXPERT != 0 ? (uint64_t)DS4_N_EXPERT : 1u; + if (min_dynamic_experts > UINT64_MAX / per_expert_bytes) { + fprintf(stderr, + "ds4: SSD streaming full-layer budget overflow\n"); + return false; + } + const uint64_t min_dynamic_bytes = + min_dynamic_experts * per_expert_bytes; + const uint32_t before_budget_cap = full_layers; + while (full_layers != 0) { + uint64_t bytes = 0; + if (!ds4_glm_streaming_resident_prefix_bytes(&e->weights, + full_layers, + &bytes)) { + fprintf(stderr, + "ds4: SSD streaming full-layer byte accounting failed\n"); + return false; + } + if (budget_after_prefill_headroom > min_dynamic_bytes && + bytes <= budget_after_prefill_headroom - min_dynamic_bytes) { + full_layers_bytes = bytes; + break; + } + full_layers--; + } + if (full_layers == 0) full_layers_bytes = 0; + if (full_layers != before_budget_cap) { + fprintf(stderr, + "ds4: GLM SSD streaming full resident layers capped " + "from %u to %u by %.2f GiB total expert budget\n", + before_budget_cap, + full_layers, + (double)total_cache_bytes / 1073741824.0); + } + } else if (full_layers != 0 && + !ds4_glm_streaming_resident_prefix_bytes(&e->weights, + full_layers, + &full_layers_bytes)) { + fprintf(stderr, + "ds4: SSD streaming full-layer byte accounting failed\n"); + return false; + } + } + + if (total_cache_bytes != 0) { + uint64_t dynamic_cache_bytes = budget_after_prefill_headroom; + if (full_layers_bytes != 0) { + if (full_layers_bytes >= dynamic_cache_bytes) { + fprintf(stderr, + "ds4: SSD streaming full-layer budget leaves no dynamic expert cache\n"); + return false; + } + dynamic_cache_bytes -= full_layers_bytes; + } + + uint64_t budget_expert_bytes = 0; + const uint32_t budget = + ds4_streaming_cache_experts_for_byte_budget( + &e->weights, + dynamic_cache_bytes, + &budget_expert_bytes); + if (budget == 0 || budget_expert_bytes == 0) { + fprintf(stderr, + "ds4: --ssd-streaming-cache-experts byte budget is too small or invalid for this model\n"); + return false; + } + e->ssd_streaming_cache_experts = budget; + e->ssd_streaming_cache_bytes = + (uint64_t)budget * budget_expert_bytes; + + if (full_layers != 0) { + fprintf(stderr, + "ds4: GLM SSD streaming full resident layers: %u " + "(%.2f GiB, %s)\n", + full_layers, + (double)full_layers_bytes / 1073741824.0, + full_layers_auto ? "auto" : "explicit"); + fprintf(stderr, + "ds4: %s SSD streaming total expert budget %.2f GiB = " + "%.2f GiB prefill headroom + %.2f GiB full layers + " + "%.2f GiB dynamic cache (%u experts, %.2f MiB each)\n", + ds4_backend_name(e->backend), + (double)total_cache_bytes / 1073741824.0, + (double)prefill_headroom_bytes / 1073741824.0, + (double)full_layers_bytes / 1073741824.0, + (double)e->ssd_streaming_cache_bytes / 1073741824.0, + budget, + (double)budget_expert_bytes / 1048576.0); + } else { + if (glm_metal_streaming) { + const char *reason = + e->ssd_streaming_full_layers_set ? + "disabled by --ssd-streaming-full-layers 0" : + "auto selected 0 layers"; + fprintf(stderr, + "ds4: GLM SSD streaming full resident layers: 0 (%s)\n", + reason); + } + fprintf(stderr, + "ds4: %s SSD streaming total expert budget %.2f GiB = " + "%.2f GiB prefill headroom + %.2f GiB dynamic cache " + "(%u experts, %.2f MiB each)\n", + ds4_backend_name(e->backend), + (double)total_cache_bytes / 1073741824.0, + (double)prefill_headroom_bytes / 1073741824.0, + (double)e->ssd_streaming_cache_bytes / 1073741824.0, + budget, + (double)budget_expert_bytes / 1048576.0); + } + } else if (full_layers != 0) { + fprintf(stderr, + "ds4: GLM SSD streaming full resident layers: %u " + "(%.2f GiB, %s), dynamic cache budget: %u experts\n", + full_layers, + (double)full_layers_bytes / 1073741824.0, + full_layers_auto ? "auto" : "explicit", + e->ssd_streaming_cache_experts); + } else if (glm_metal_streaming) { + const char *reason = + e->ssd_streaming_full_layers_set ? + "disabled by --ssd-streaming-full-layers 0" : + "not auto-tuned for expert-count cache budgets"; + fprintf(stderr, + "ds4: GLM SSD streaming full resident layers: 0 (%s)\n", + reason); + } + + e->ssd_streaming_full_layers = full_layers; + e->ssd_streaming_full_layer_bytes = full_layers_bytes; + g_glm_streaming_full_resident_layers = full_layers; + return true; +#endif +} + static bool ds4_engine_preload_pro_q4_expert_tables( ds4_engine *e, bool load_slice, @@ -32345,6 +45056,84 @@ static bool ds4_engine_preload_pro_q4_expert_tables( #endif } +/* TP sharding: touch the dense weights and only this rank's contiguous range + * of every routed-expert blob, so the other range is never faulted in. + * Replaces the whole-file residency request; the pages + * fault through the same view buffers, streaming-style, but everything a + * rank will ever read is pre-faulted here. */ +static void model_warm_weights_sharded(const ds4_model *m, + const ds4_weights *w, + int rank) { + typedef struct { uint64_t off, len; } skip_range; + if (rank != 0 && rank != 1) return; + skip_range *skips = xmalloc((size_t)DS4_N_LAYER * 3 * sizeof(*skips)); + uint32_t n_skips = 0; + uint64_t skip_bytes = 0; + for (uint32_t il = 0; il < (uint32_t)DS4_N_LAYER; il++) { + const ds4_layer_weights *l = &w->layer[il]; + const ds4_tensor *exps[3] = { l->ffn_gate_exps, l->ffn_up_exps, + l->ffn_down_exps }; + for (int t = 0; t < 3; t++) { + const ds4_tensor *x = exps[t]; + if (!x || x->ndim != 3 || x->dim[2] < 2) continue; + uint64_t in_dim = 0, out_dim = 0, row_bytes = 0; + (void)tensor_expert_bytes(m, x, 0, &in_dim, &out_dim, &row_bytes); + const uint64_t expert_bytes = out_dim * row_bytes; + const uint64_t total_bytes = x->dim[2] * expert_bytes; + const uint64_t low_bytes = (x->dim[2] / 2) * expert_bytes; + /* Unowned range: rank 0 owns the low ids; rank 1 owns the high + * ids and takes any odd-count remainder. */ + skips[n_skips].off = x->abs_offset + (rank == 0 ? low_bytes : 0); + skips[n_skips].len = rank == 0 ? total_bytes - low_bytes : low_bytes; + skip_bytes += skips[n_skips].len; + n_skips++; + } + } + /* File order should already ascend, but do not rely on it. */ + for (uint32_t i = 1; i < n_skips; i++) { + skip_range key = skips[i]; + uint32_t j = i; + while (j > 0 && skips[j - 1].off > key.off) { + skips[j] = skips[j - 1]; + j--; + } + skips[j] = key; + } + const uint64_t page = (uint64_t)sysconf(_SC_PAGESIZE); + const uint8_t *p = m->map; + const uint64_t start = m->tensor_data_pos, end = m->size; + fprintf(stderr, + "ds4: warming sharded tensor pages (rank %d): %.2f of %.2f GiB\n", + rank, + (double)(end - start - skip_bytes) / 1073741824.0, + (double)(end - start) / 1073741824.0); + const double t0 = now_sec(); + volatile uint64_t checksum = 0; + uint64_t off = start; + uint32_t si = 0; + /* skips are naturally sorted: layers ascend and tensors within a layer + * are laid out in file order. */ + while (off < end) { + uint64_t stop = end; + while (si < n_skips && skips[si].off + skips[si].len <= off) si++; + if (si < n_skips && skips[si].off <= off) { + off = skips[si].off + skips[si].len; + si++; + continue; + } + if (si < n_skips && skips[si].off < stop) stop = skips[si].off; +#if defined(POSIX_MADV_WILLNEED) + (void)posix_madvise((void *)(p + off), (size_t)(stop - off), + POSIX_MADV_WILLNEED); +#endif + for (; off < stop; off += page) checksum += p[off]; + off = stop; + } + free(skips); + fprintf(stderr, "ds4: sharded warm done in %.1fs (checksum=%llu)\n", + now_sec() - t0, (unsigned long long)checksum); +} + int ds4_engine_open(ds4_engine **out, const ds4_engine_options *opt) { ds4_engine *e = xcalloc(1, sizeof(*e)); e->model.fd = -1; @@ -32353,11 +45142,13 @@ int ds4_engine_open(ds4_engine **out, const ds4_engine_options *opt) { e->quality = opt->quality; e->ssd_streaming = opt->ssd_streaming; e->ssd_streaming_cold = opt->ssd_streaming_cold; + e->ssd_streaming_full_layers_set = opt->ssd_streaming_full_layers_set; e->distributed = opt->distributed; e->power_percent = opt->power_percent > 0 ? opt->power_percent : 100; e->prefill_chunk = opt->prefill_chunk; e->ssd_streaming_cache_experts = opt->ssd_streaming_cache_experts; e->ssd_streaming_cache_bytes = opt->ssd_streaming_cache_bytes; + e->ssd_streaming_full_layers = opt->ssd_streaming_full_layers; e->ssd_streaming_preload_experts = opt->ssd_streaming_preload_experts; if (e->power_percent > 100) e->power_percent = 100; e->mtp_draft_tokens = opt->mtp_draft_tokens > 0 ? opt->mtp_draft_tokens : 1; @@ -32391,23 +45182,23 @@ int ds4_engine_open(ds4_engine **out, const ds4_engine_options *opt) { uint32_t load_layer_start = opt->load_layer_start; uint32_t load_layer_end = opt->load_layer_end; bool load_output = opt->load_output; - bool load_output_optional = false; if (opt->distributed.role != DS4_DISTRIBUTED_NONE && opt->distributed.layers.set) { load_slice = true; load_layer_start = opt->distributed.layers.start; - load_layer_end = opt->distributed.layers.has_output ? - UINT32_MAX : opt->distributed.layers.end; + load_layer_end = + (DS4_MODEL_FAMILY != DS4_MODEL_FAMILY_GLM_DSA && + opt->distributed.layers.has_output) ? + UINT32_MAX : + opt->distributed.layers.end; load_output = opt->distributed.layers.has_output; - load_output_optional = opt->distributed.role == DS4_DISTRIBUTED_COORDINATOR; } const bool graph_backend = ds4_backend_uses_graph(opt->backend); if (graph_backend) ds4_linux_graph_backend_set_oom_score(opt->backend); model_open(&e->model, opt->model_path, graph_backend, !opt->inspect_only); if (opt->warm_weights) model_warm_weights(&e->model); - if (!opt->inspect_only) vocab_load(&e->vocab, &e->model); config_validate_model(&e->model); if (e->ssd_streaming && !ds4_backend_supports_ssd_streaming(e->backend)) { fprintf(stderr, "ds4: --ssd-streaming is currently supported only with --metal/--cuda/--rocm\n"); @@ -32435,42 +45226,122 @@ int ds4_engine_open(ds4_engine **out, const ds4_engine_options *opt) { load_slice, load_layer_start, load_layer_end, - load_output, - load_output_optional); + load_output); + + /* TP always maps one contiguous routed-expert half per rank. Decide + * immediately after binding so memory guards account only the bytes this + * rank owns (replicated dense weights plus its expert shard). */ + const bool tp_shard = + opt->tp.role != DS4_TP_NONE && + !e->ssd_streaming; + const int tp_shard_rank = opt->tp.role == DS4_TP_WORKER ? 1 : 0; + g_tp_shard_model_bytes = 0; + if (tp_shard) { + ds4_model_map_span_vec shard_spans; + if (weights_model_map_sharded_spans(&e->weights, &e->model, + tp_shard_rank, &shard_spans)) { + g_tp_shard_model_bytes = + model_map_span_vec_total_bytes(&shard_spans); + free(shard_spans.v); + } + } + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + if (opt->inspect_only) { + *out = e; + return 0; + } + if ((opt->directional_steering_file && opt->directional_steering_file[0]) || + opt->directional_steering_attn != 0.0f || + opt->directional_steering_ffn != 0.0f) { + fprintf(stderr, "ds4: directional steering is not supported for GLM 5.2 yet\n"); + ds4_engine_close(e); + *out = NULL; + return 1; + } + if (e->power_percent < 100) { + fprintf(stderr, "ds4: --power is not supported for GLM 5.2 yet\n"); + ds4_engine_close(e); + *out = NULL; + return 1; + } + if (opt->prefill_chunk != 0) { + fprintf(stderr, + "ds4: --prefill-chunk is not supported for GLM 5.2; " + "GLM uses graph-selected prefill chunks\n"); + ds4_engine_close(e); + *out = NULL; + return 1; + } + if (opt->mtp_path && opt->mtp_path[0]) { + fprintf(stderr, "ds4: --mtp is not supported for GLM 5.2 yet\n"); + ds4_engine_close(e); + *out = NULL; + return 1; + } + if (opt->first_token_test) { + if (e->backend != DS4_BACKEND_CPU) { + fprintf(stderr, "ds4: GLM first-token test is CPU-only; pass --cpu\n"); + ds4_engine_close(e); + *out = NULL; + return 1; + } + vocab_load(&e->vocab, &e->model); + *out = e; + return 0; + } + if (e->backend != DS4_BACKEND_METAL || !ds4_backend_uses_graph(e->backend)) { + fprintf(stderr, + "ds4: GLM 5.2 tensor layout is recognized, but GLM inference is " + "currently Metal-only; use --inspect, --cpu --first-token-test, " + "--metal --metal-graph-test, or limited --metal generation\n"); + ds4_engine_close(e); + *out = NULL; + return 1; + } +#ifndef DS4_NO_GPU + if (opt->context_size > 0) { + uint32_t guard_ctx = 0; + if (!glm_graph_context_request(opt->context_size, &guard_ctx) || + !(load_slice ? + glm_graph_memory_guard_slice(&e->model, + &e->weights, + e->ssd_streaming, + load_layer_start, + load_layer_end, + load_layer_start == 0, + load_output, + guard_ctx) : + glm_graph_memory_guard(&e->model, + &e->weights, + e->ssd_streaming, + guard_ctx))) { + ds4_engine_close(e); + *out = NULL; + return 1; + } + } +#endif + vocab_load(&e->vocab, &e->model); + } else if (!opt->inspect_only) { + vocab_load(&e->vocab, &e->model); + } if (e->ssd_streaming && e->ssd_streaming_cache_bytes != 0) { const uint64_t requested_cache_bytes = e->ssd_streaming_cache_bytes; const uint64_t safe_cache_bytes = - ds4_streaming_manual_cache_safe_bytes(); + ds4_streaming_manual_cache_safe_bytes(e->backend, + opt->context_size, + e->prefill_chunk, + e->ssd_streaming); if (safe_cache_bytes != 0 && e->ssd_streaming_cache_bytes > safe_cache_bytes) { e->ssd_streaming_cache_bytes = safe_cache_bytes; fprintf(stderr, "ds4: %s SSD streaming cache budget %.2f GiB capped to %.2f GiB " - "to keep expert buffers lockable\n", + "to stay below the Metal working-set pressure budget\n", ds4_backend_name(e->backend), (double)requested_cache_bytes / 1073741824.0, (double)e->ssd_streaming_cache_bytes / 1073741824.0); } - uint64_t per_expert_bytes = 0; - const uint32_t budget = - ds4_streaming_cache_experts_for_byte_budget( - &e->weights, - e->ssd_streaming_cache_bytes, - &per_expert_bytes); - if (budget == 0 || per_expert_bytes == 0) { - fprintf(stderr, - "ds4: --ssd-streaming-cache-experts byte budget is too small or invalid for this model\n"); - ds4_engine_close(e); - *out = NULL; - return 1; - } - e->ssd_streaming_cache_experts = budget; - fprintf(stderr, - "ds4: %s SSD streaming cache budget %.2f GiB / %.2f MiB per expert = %u experts\n", - ds4_backend_name(e->backend), - (double)e->ssd_streaming_cache_bytes / 1073741824.0, - (double)per_expert_bytes / 1048576.0, - budget); } if (opt->inspect_only) { if (opt->mtp_path && opt->mtp_path[0] && @@ -32506,11 +45377,20 @@ int ds4_engine_open(ds4_engine **out, const ds4_engine_options *opt) { e->support_kind = support_model_detect(&e->mtp_model, &e->support_stages, &dspark); if (e->support_kind == DS4_SUPPORT_MTP_LEGACY) { - mtp_weights_bind(&e->mtp_weights, &e->mtp_model); - e->mtp_ready = true; - fprintf(stderr, "ds4: MTP support model loaded: %s (draft=%d)\n", - opt->mtp_path, - e->mtp_draft_tokens); + if (opt->tp.role != DS4_TP_NONE) { + fprintf(stderr, + "ds4: legacy MTP support is ignored under tensor parallelism; " + "using the normal TP decode path\n"); + model_close(&e->mtp_model); + e->support_kind = DS4_SUPPORT_NONE; + e->support_stages = 0; + } else { + mtp_weights_bind(&e->mtp_weights, &e->mtp_model); + e->mtp_ready = true; + fprintf(stderr, "ds4: MTP support model loaded: %s (draft=%d)\n", + opt->mtp_path, + e->mtp_draft_tokens); + } } else if (e->support_kind == DS4_SUPPORT_DSPARK) { dspark_weights_bind_optional(&e->dspark_weights, &e->mtp_model, @@ -32557,6 +45437,17 @@ int ds4_engine_open(ds4_engine **out, const ds4_engine_options *opt) { return 1; #endif } + /* With a raised wired limit the sharded span views (~97 GiB) fit the + * GPU budget, so let the residency set pin them — that is what makes + * the shard actually resident. Without the sysctl, fall back to lazy + * faulting (slow but functional). */ + if (graph_backend && tp_shard && glm_graph_wired_limit_bytes() == 0) { + fprintf(stderr, + "ds4: iogpu.wired_limit_mb is 0 -- TP expert shard will page " + "lazily; raise it (e.g. sudo sysctl iogpu.wired_limit_mb=120000) " + "for full residency\n"); + ds4_gpu_model_residency_skip(1); + } if (graph_backend) { e->metal_ready = ds4_gpu_init() != 0; if (!e->metal_ready) { @@ -32567,12 +45458,18 @@ int ds4_engine_open(ds4_engine **out, const ds4_engine_options *opt) { return 1; } ds4_gpu_set_quality(e->quality); + ds4_gpu_set_glm_model(DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA); ds4_gpu_set_ssd_streaming(e->ssd_streaming); if (!ds4_engine_configure_streaming_auto_cache(e)) { ds4_engine_close(e); *out = NULL; return 1; } + if (!ds4_engine_configure_streaming_cache_budget(e)) { + ds4_engine_close(e); + *out = NULL; + return 1; + } ds4_gpu_set_streaming_expert_cache_budget(e->ssd_streaming_cache_experts); if (e->ssd_streaming) { /* @@ -32639,9 +45536,7 @@ int ds4_engine_open(ds4_engine **out, const ds4_engine_options *opt) { uint32_t load_span_count = 0; if (e->ssd_streaming) { const bool map_output = load_slice && - (load_output || - (load_output_optional && - weights_have_output_head(&e->weights))); + load_output; ds4_model_map_span_vec spans; bool spans_ok = false; if (load_slice) { @@ -32672,6 +45567,7 @@ int ds4_engine_open(ds4_engine **out, const ds4_engine_options *opt) { load_offsets = offsets; load_sizes = sizes; load_span_count = spans.len; + e->startup_model_span_bytes = span_bytes; if (load_slice) { char load_end[32]; if (map_output && load_layer_end == UINT32_MAX) { @@ -32703,9 +45599,7 @@ int ds4_engine_open(ds4_engine **out, const ds4_engine_options *opt) { spans.max_tensor_bytes); free(spans.v); } else if (load_slice) { - const bool map_output = load_output || - (load_output_optional && - weights_have_output_head(&e->weights)); + const bool map_output = load_output; char load_end[32]; if (map_output && load_layer_end == UINT32_MAX) { snprintf(load_end, sizeof(load_end), "output"); @@ -32740,6 +45634,7 @@ int ds4_engine_open(ds4_engine **out, const ds4_engine_options *opt) { load_offsets = offsets; load_sizes = sizes; load_span_count = spans.len; + e->startup_model_span_bytes = span_bytes; fprintf(stderr, "ds4: restricting %s model map to layers %u:%s (%u spans, %.2f GiB tensor span)\n", ds4_backend_name(e->backend), @@ -32754,7 +45649,43 @@ int ds4_engine_open(ds4_engine **out, const ds4_engine_options *opt) { load_span_count, spans.max_tensor_bytes); free(spans.v); + } else if (tp_shard) { + ds4_model_map_span_vec spans; + if (!weights_model_map_sharded_spans(&e->weights, &e->model, + tp_shard_rank, &spans)) { + fprintf(stderr, "ds4: sharded model span build failed\n"); + ds4_engine_close(e); + *out = NULL; + return 1; + } + uint64_t *offsets = xmalloc((size_t)spans.len * sizeof(offsets[0])); + uint64_t *sizes = xmalloc((size_t)spans.len * sizeof(sizes[0])); + uint64_t span_bytes = 0; + for (uint32_t i = 0; i < spans.len; i++) { + offsets[i] = spans.v[i].off; + sizes[i] = spans.v[i].end - spans.v[i].off; + span_bytes += sizes[i]; + } + load_offsets = offsets; + load_sizes = sizes; + load_span_count = spans.len; + e->startup_model_span_bytes = span_bytes; + fprintf(stderr, + "ds4: TP expert shard (rank %d): mapping %u spans, %.2f GiB of %.2f GiB\n", + tp_shard_rank, + spans.len, + (double)span_bytes / 1073741824.0, + (double)(e->model.size - e->model.tensor_data_pos) / 1073741824.0); + model_map_ok = ds4_gpu_set_model_map_spans(e->model.map, + e->model.size, + load_offsets, + load_sizes, + load_span_count, + spans.max_tensor_bytes); + free(spans.v); } else { + e->startup_model_span_bytes = e->model.size > e->model.tensor_data_pos ? + e->model.size - e->model.tensor_data_pos : 0; model_map_ok = ds4_gpu_set_model_map_range(e->model.map, e->model.size, e->model.tensor_data_pos, @@ -32772,6 +45703,10 @@ int ds4_engine_open(ds4_engine **out, const ds4_engine_options *opt) { *out = NULL; return 1; } + if (tp_shard) { + model_warm_weights_sharded(&e->model, &e->weights, + tp_shard_rank); + } const char *dspark_enable = getenv("DS4_DSPARK_ENABLE"); const bool dspark_runtime_enabled = dspark_enable && dspark_enable[0] && strcmp(dspark_enable, "0") != 0; @@ -32846,6 +45781,9 @@ int ds4_engine_open(ds4_engine **out, const ds4_engine_options *opt) { } #endif + if (!opt->inspect_only) { + ds4_engine_print_startup_memory(e, opt->context_size); + } *out = e; return 0; } @@ -32876,6 +45814,7 @@ int ds4_engine_vocab_size(ds4_engine *e) { return e ? e->vocab.n_vocab : 0; } + int ds4_engine_power(ds4_engine *e) { return e ? e->power_percent : 100; } @@ -32893,6 +45832,10 @@ const char *ds4_engine_model_name(ds4_engine *e) { int ds4_engine_layer_count(ds4_engine *e) { (void)e; + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + if (DS4_N_LAYER <= DS4_N_NEXTN_PREDICT) return 0; + return (int)(DS4_N_LAYER - DS4_N_NEXTN_PREDICT); + } return (int)DS4_N_LAYER; } @@ -32904,14 +45847,68 @@ uint32_t ds4_engine_layer_compress_ratio(ds4_engine *e, uint32_t layer) { uint64_t ds4_engine_hidden_f32_values(ds4_engine *e) { (void)e; + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) return DS4_N_EMBD; return (uint64_t)DS4_N_HC * DS4_N_EMBD; } +bool ds4_engine_glm_layer_payload_bytes(ds4_engine *e, + uint32_t layer, + uint32_t full_live, + uint32_t key_dim, + uint32_t value_dim, + uint32_t compact_live, + uint32_t index_live, + uint64_t *out) { +#ifdef DS4_NO_GPU + (void)e; + (void)layer; + (void)full_live; + (void)key_dim; + (void)value_dim; + (void)compact_live; + (void)index_live; + (void)out; + return false; +#else + (void)e; + if (DS4_MODEL_FAMILY != DS4_MODEL_FAMILY_GLM_DSA) return false; + return glm_layer_payload_tensor_bytes(layer, + full_live, + key_dim, + value_dim, + compact_live, + index_live, + out); +#endif +} + int ds4_engine_model_id(ds4_engine *e) { (void)e; return (int)DS4_MODEL_VARIANT; } +/* Decode gate firing schedule for the TP transport (see ds4_tp_identity): + * DS4 fires ATTN+FFN gates on every layer (identity mapping); GLM fires a + * single FFN gate per sparse layer, skipping the leading dense blocks. */ +void ds4_engine_tp_gate_schedule(ds4_engine *e, + uint32_t *start, + uint32_t *step, + uint32_t *per_token) { + (void)e; + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + /* One FFN gate per sparse layer of the NORMAL pass: the leading + * dense blocks fire nothing and the trailing nextn/MTP block is + * not part of the decode pass at all. */ + *start = DS4_N_LEADING_DENSE * DS4_TP_GATES_PER_LAYER + DS4_TP_GATE_FFN; + *step = DS4_TP_GATES_PER_LAYER; + *per_token = DS4_N_LAYER - DS4_N_NEXTN_PREDICT - DS4_N_LEADING_DENSE; + } else { + *start = 0; + *step = 1; + *per_token = DS4_N_LAYER * DS4_TP_GATES_PER_LAYER; + } +} + int ds4_engine_embd_dim(ds4_engine *e) { (void)e; return (int)DS4_N_EMBD; @@ -32921,6 +45918,10 @@ uint64_t ds4_engine_model_bytes(ds4_engine *e) { return e->model.size; } +int ds4_engine_tp_vocab_split(ds4_engine *e) { + return e && e->tp.active && e->tp.vocab_split; +} + #if !defined(DS4_NO_GPU) && defined(__APPLE__) static int ds4_engine_tp_exchange(void *ud, uint32_t layer, uint32_t gate, uint64_t seq) { return ds4_tp_gate_exchange((ds4_tp *)ud, layer, gate, seq); @@ -32930,6 +45931,21 @@ static int ds4_engine_tp_batch_exchange(void *ud, uint32_t layer, uint32_t rows, uint64_t seq) { return ds4_tp_batch_gate_exchange((ds4_tp *)ud, layer, rows, seq); } + +static int ds4_engine_tp_big_exchange(void *ud, uint32_t layer, uint64_t seq, + const void *out, void *in, + uint64_t bytes) { + if (g_glm_tp_debug_ids && getenv("DS4_GLM_TP_DEBUG")) { + fprintf(stderr, + "ds4-tp: big gate l=%u ids[0..7]=%d %d %d %d %d %d %d %d\n", + layer, + g_glm_tp_debug_ids[0], g_glm_tp_debug_ids[1], + g_glm_tp_debug_ids[2], g_glm_tp_debug_ids[3], + g_glm_tp_debug_ids[4], g_glm_tp_debug_ids[5], + g_glm_tp_debug_ids[6], g_glm_tp_debug_ids[7]); + } + return ds4_tp_big_gate_exchange((ds4_tp *)ud, layer, seq, out, in, bytes); +} #endif int ds4_engine_tp_bind(ds4_engine *e, struct ds4_tp *tp, char *err, size_t errlen) { @@ -32991,26 +46007,33 @@ int ds4_engine_tp_bind(ds4_engine *e, struct ds4_tp *tp, char *err, size_t errle return 0; } } - e->tp.null_split = getenv("DS4_TP_NULL_SPLIT") != NULL; if (!ds4_gpu_tp_init((uint32_t)ds4_tp_rank(tp), - e->tp.null_split ? 1u : 2u, e->tp.slab, ds4_tp_slab_gpu_flags_offset(tp), ds4_engine_tp_exchange, tp)) { snprintf(err, errlen, "tp: gate service init failed"); return 0; } ds4_gpu_tp_set_batch_exchange(ds4_engine_tp_batch_exchange); + ds4_gpu_tp_set_big_exchange(ds4_engine_tp_big_exchange); + /* GLM keeps its replicated output head unsplit in v0: the + * leader computes full logits and nothing crosses the wire. */ + e->tp.vocab_split = DS4_MODEL_FAMILY != DS4_MODEL_FAMILY_GLM_DSA; e->tp.ctx = tp; e->tp.rank = ds4_tp_rank(tp); e->tp.eval_seq = 0; e->tp.active = true; - ds4_log(stderr, DS4_LOG_OK, "tensor parallelism bound: rank %d, %s transport%s", - e->tp.rank, ds4_tp_is_rdma(tp) ? "rdma" : "tcp", - e->tp.null_split ? ", null-split bring-up mode" : ""); + ds4_log(stderr, DS4_LOG_OK, + "tensor parallelism bound: rank %d, 50/50 expert split, %s transport", + e->tp.rank, ds4_tp_is_rdma(tp) ? "rdma" : "tcp"); return 1; #endif } +bool ds4_engine_is_glm_dsa(ds4_engine *e) { + (void)e; + return DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA; +} + void ds4_engine_close(ds4_engine *e) { if (!e) return; #if !defined(DS4_NO_GPU) && defined(__APPLE__) @@ -33160,6 +46183,10 @@ static void ds4_session_print_dspark_stats(const ds4_session *s) { int ds4_session_create(ds4_session **out, ds4_engine *e, int ctx_size) { if (!out || !e || ctx_size <= 0) return 1; if (e->backend == DS4_BACKEND_CPU) { + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + fprintf(stderr, "ds4: GLM sessions currently require --metal\n"); + return 1; + } if (e->distributed.role == DS4_DISTRIBUTED_COORDINATOR) { fprintf(stderr, "ds4: distributed coordinator sessions require the graph backend\n"); return 1; @@ -33183,6 +46210,75 @@ int ds4_session_create(ds4_session **out, ds4_engine *e, int ctx_size) { ds4_session *s = xcalloc(1, sizeof(*s)); s->engine = e; s->ctx_size = ctx_size; + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + const uint32_t normal_layers = glm_graph_normal_layer_count(); + uint32_t layer_start = 0; + uint32_t layer_end = normal_layers ? normal_layers - 1u : 0; + bool require_token_embd = true; + bool require_output = true; + if (e->distributed.role != DS4_DISTRIBUTED_NONE && e->distributed.layers.set) { + layer_start = e->distributed.layers.start; + layer_end = e->distributed.layers.has_output ? + (normal_layers ? normal_layers - 1u : 0u) : + e->distributed.layers.end; + require_token_embd = layer_start == 0; + require_output = e->distributed.layers.has_output; + } + if (!normal_layers || layer_start > layer_end || layer_end >= normal_layers) { + fprintf(stderr, "ds4: invalid GLM layer slice %u:%u\n", layer_start, layer_end); + free(s); + return 1; + } + if (!glm_graph_alloc_slice(&s->glm_graph, + &e->model, + &e->weights, + ctx_size, + e->ssd_streaming, + e->ssd_streaming_cold, + layer_start, + layer_end, + require_token_embd, + require_output)) { + free(s); + return 1; + } + s->prefill_cap = s->glm_graph.ctx_cap; + s->glm_graph_ready = true; + s->glm_graph.quality = e->quality; + s->glm_graph.ssd_streaming = e->ssd_streaming; + s->glm_graph.ssd_streaming_cold = e->ssd_streaming_cold; +#if !defined(DS4_NO_GPU) && defined(__APPLE__) + if (e->tp.active) { + s->glm_graph.tp_world = 2; + s->glm_graph.tp_rank = (uint32_t)e->tp.rank; + s->glm_graph.tp_out = e->tp.out_views; + s->glm_graph.tp_in = e->tp.in_views; + } +#endif + s->logits = xmalloc((size_t)DS4_N_VOCAB * sizeof(s->logits[0])); + if (e->distributed.role == DS4_DISTRIBUTED_COORDINATOR) { + char err[256]; + if (ds4_dist_session_create(&s->distributed, + e, + &e->distributed, + s, + ctx_size, + err, + sizeof(err)) != 0) { + fprintf(stderr, + "ds4: failed to create distributed coordinator session: %s\n", + err[0] ? err : "unknown error"); + glm_graph_free(&s->glm_graph); + free(s->glm_mtp_hc); + free(s->glm_mtp_logits0); + free(s->logits); + free(s); + return 1; + } + } + *out = s; + return 0; + } s->prefill_cap = metal_graph_prefill_cap_for_prompt(ctx_size, e->prefill_chunk); const uint32_t raw_cap = metal_graph_raw_cap_for_context(ctx_size, s->prefill_cap); @@ -33213,23 +46309,20 @@ int ds4_session_create(ds4_session **out, ds4_engine *e, int ctx_size) { if (e->tp.active) { s->graph.tp_world = 2; s->graph.tp_rank = (uint32_t)e->tp.rank; - s->graph.tp_null_split = e->tp.null_split; s->graph.tp_out = e->tp.out_views; s->graph.tp_in = e->tp.in_views; s->graph.tp_batch_out = e->tp.batch_out_views; s->graph.tp_batch_in = e->tp.batch_in_views; s->graph.tp_zero = e->tp.zero_vec; - if (!e->tp.null_split) { - const uint64_t half = (uint64_t)DS4_N_VOCAB / 2u; - s->graph.tp_logits_half = ds4_gpu_tensor_view( - s->graph.logits, - (uint64_t)e->tp.rank * half * sizeof(float), - half * sizeof(float)); - if (!s->graph.tp_logits_half) { - metal_graph_free(&s->graph); - free(s); - return 1; - } + const uint64_t half = (uint64_t)DS4_N_VOCAB / 2u; + s->graph.tp_logits_half = ds4_gpu_tensor_view( + s->graph.logits, + (uint64_t)e->tp.rank * half * sizeof(float), + half * sizeof(float)); + if (!s->graph.tp_logits_half) { + metal_graph_free(&s->graph); + free(s); + return 1; } } s->graph.power_percent = (uint32_t)e->power_percent; @@ -33321,11 +46414,19 @@ void ds4_session_free(ds4_session *s) { } #ifndef DS4_NO_GPU else { - metal_graph_free(&s->graph); + if (ds4_session_is_glm(s)) { + glm_graph_free(&s->glm_graph); + } else { + metal_graph_free(&s->graph); + } } #endif token_vec_free(&s->checkpoint); free(s->logits); +#ifndef DS4_NO_GPU + free(s->glm_mtp_hc); + free(s->glm_mtp_logits0); +#endif free(s->mtp_logits); #ifndef DS4_NO_GPU free(s->spec_row_logits); @@ -33354,9 +46455,15 @@ bool ds4_session_is_distributed(ds4_session *s) { int ds4_session_set_power(ds4_session *s, int power_percent) { if (!s || !s->engine || power_percent < 1 || power_percent > 100) return 1; +#ifndef DS4_NO_GPU + if (ds4_session_is_glm(s) && power_percent != 100) { + fprintf(stderr, "ds4: session power throttling is not supported for GLM 5.2 yet\n"); + return 1; + } +#endif s->engine->power_percent = power_percent; #ifndef DS4_NO_GPU - if (!ds4_session_is_cpu(s)) s->graph.power_percent = (uint32_t)power_percent; + if (!ds4_session_is_cpu(s) && !ds4_session_is_glm(s)) s->graph.power_percent = (uint32_t)power_percent; #endif return 0; } @@ -33406,6 +46513,13 @@ int ds4_session_layer_slice_reset(ds4_session *s, char *err, size_t errlen) { if (errlen) snprintf(err, errlen, "GPU support is not compiled in"); return 1; #else + if (ds4_session_is_glm(s)) { + s->checkpoint.len = 0; + s->checkpoint_valid = false; + s->mtp_draft_valid = false; + ds4_session_glm_reset_dense_cache(s); + return 0; + } if (!metal_graph_reset_prefill_state(&s->graph)) { if (errlen) snprintf(err, errlen, "%s layer-slice state reset failed", ds4_backend_name(s->engine->backend)); @@ -33432,8 +46546,8 @@ int ds4_session_eval_output_head_from_hc(ds4_session *s, if (errlen) snprintf(err, errlen, "output head is not loaded"); return 1; } - const uint64_t hc_dim = (uint64_t)DS4_N_HC * DS4_N_EMBD; - const float *last_hc = hidden_hc + (uint64_t)(n_tokens - 1u) * hc_dim; + const uint64_t hidden_dim = ds4_engine_hidden_f32_values(e); + const float *last_hc = hidden_hc + (uint64_t)(n_tokens - 1u) * hidden_dim; if (ds4_session_is_cpu(s)) { output_logits_one(logits, &e->model, &e->weights, last_hc); @@ -33444,11 +46558,34 @@ int ds4_session_eval_output_head_from_hc(ds4_session *s, if (errlen) snprintf(err, errlen, "GPU support is not compiled in"); return 1; #else + if (ds4_session_is_glm(s)) { + ds4_glm_gpu_graph *gg = &s->glm_graph; + bool ok = ds4_gpu_tensor_write(gg->cur, + 0, + last_hc, + hidden_dim * sizeof(float)) != 0; + if (ok) ok = ds4_gpu_begin_commands() != 0; + if (ok) ok = glm_graph_encode_output_head(gg, &e->model, &e->weights); + if (ok) ok = ds4_gpu_end_commands() != 0; + if (ok) ok = ds4_gpu_tensor_read(gg->logits, + 0, + logits, + (uint64_t)DS4_N_VOCAB * sizeof(float)) != 0; + if (!ok) { + if (ds4_gpu_synchronize() == 0) { + fprintf(stderr, "ds4: synchronize after GLM output-head hidden-state failure also failed\n"); + } + if (errlen) snprintf(err, errlen, "%s GLM output-head hidden-state evaluation failed", + ds4_backend_name(e->backend)); + return 1; + } + return 0; + } ds4_gpu_graph *g = &s->graph; bool ok = ds4_gpu_tensor_write(g->cur_hc, 0, last_hc, - hc_dim * sizeof(float)) != 0; + hidden_dim * sizeof(float)) != 0; if (ok) ok = ds4_gpu_begin_commands() != 0; if (ok) ok = metal_graph_encode_output_head(g, &e->model, @@ -33471,6 +46608,174 @@ int ds4_session_eval_output_head_from_hc(ds4_session *s, #endif } + +static int ds4_session_eval_internal(ds4_session *s, int token, bool probe_mtp, + char *err, size_t errlen); + +static int glm_session_logits_argmax(const float *logits) { + int best = 0; + float bv = logits[0]; + for (uint32_t i = 1; i < DS4_N_VOCAB; i++) { + if (logits[i] > bv) { bv = logits[i]; best = (int)i; } + } + return best; +} + +/* One GLM MTP speculative cycle (greedy): evaluate first_token, and when a + * pending draft exists verify [first_token, draft] in one 2-row batch pass + * (big gates only under TP). Returns the number of committed tokens (1 or + * 2) with s->logits left at the last committed position, or -1 on error. + * Both TP ranks run this off the same mirrored EVAL frame and derive + * identical drafts/decisions from their identical logits. */ +static int ds4_session_glm_spec_cycle(ds4_session *s, int first_token, + int *accepted, int accepted_cap, + char *err, size_t errlen) { + ds4_engine *e = s->engine; + ds4_glm_gpu_graph *g = &s->glm_graph; + const uint32_t pos = (uint32_t)s->checkpoint.len; + const uint32_t executable = glm_graph_normal_layer_count(); + const bool timing = getenv("DS4_GLM_MTP_TIMING") != NULL; + if (!s->glm_mtp_hc) { + s->glm_mtp_hc = malloc(2ull * DS4_N_EMBD * sizeof(float)); + s->glm_mtp_logits0 = malloc((size_t)DS4_N_VOCAB * sizeof(float)); + if (!s->glm_mtp_hc || !s->glm_mtp_logits0) { + if (errlen) snprintf(err, errlen, "glm mtp: out of memory"); + return -1; + } + } + if (!s->glm_mtp_have || accepted_cap < 2 || + pos + 2 > g->ctx_size || + (g->compact_cache_cap != 0 && pos + 1 >= g->compact_cache_cap)) { + /* Plain step, then seed the first draft from g->cur. */ + s->glm_spec_inside = 1; + const int rc = ds4_session_eval_internal(s, first_token, false, err, errlen); + s->glm_spec_inside = 0; + if (rc != 0) return -1; + const int n1 = glm_session_logits_argmax(s->logits); + if (s->glm_mtp_min_pos == 0 || s->glm_mtp_min_pos > pos) { + s->glm_mtp_min_pos = pos; + } + int d = -1; + s->glm_mtp_have = 0; + if (glm_graph_mtp_step(g, &e->model, &e->weights, n1, pos, + s->glm_mtp_min_pos, &d)) { + s->glm_mtp_draft = d; + s->glm_mtp_have = 1; + } + accepted[0] = first_token; + return 1; + } + + const double t0 = timing ? now_sec() : 0.0; + s->glm_mtp_have = 0; + const int d = s->glm_mtp_draft; + int toks[2] = { first_token, d }; + /* Verify MUST run in the same compact/indexed attention world the + * decode path writes: the full-KV batch branch attends over rows the + * indexed decode never populates, corrupting every prediction. */ + (void)executable; + /* Fast decode-style verify while the causal window covers everything + * the decode path would attend (pre-indexer-selection regime); the + * indexed batch path remains the fallback beyond it. */ + bool verified = false; + if (pos + 2u <= glm_graph_indexer_top_k_limit()) { + verified = glm_graph_verify_rows(g, &e->model, &e->weights, + toks, pos, 2, + s->glm_mtp_hc, s->logits); + } + if (!verified) { + if (!glm_graph_indexed_prefill_batch_ready(g, pos) || + glm_graph_limit_indexed_prefill_chunk(pos, 2u) < 2u || + !glm_graph_forward_indexed_tokens(g, &e->model, &e->weights, + toks, NULL, pos, 2, + s->glm_mtp_hc, s->logits, + NULL, NULL, pos, 0, 2)) { + if (errlen) snprintf(err, errlen, "glm mtp: verify failed"); + s->checkpoint_valid = false; + return -1; + } + } + const double t1 = timing ? now_sec() : 0.0; + /* Row0 logits through the shared head. */ + if (!glm_graph_mtp_ensure(g)) { + if (errlen) snprintf(err, errlen, "glm mtp: scratch alloc failed"); + return -1; + } + ds4_gpu_tensor *h0_view = + ds4_gpu_tensor_view(g->mtp_concat, 0, (uint64_t)DS4_N_EMBD * sizeof(float)); + if (!h0_view) { + if (errlen) snprintf(err, errlen, "glm mtp: hidden view failed"); + return -1; + } + bool head_ok = + ds4_gpu_tensor_write(h0_view, 0, s->glm_mtp_hc, + (uint64_t)DS4_N_EMBD * sizeof(float)) != 0 && + glm_graph_forward_output_head(g, &e->model, &e->weights, + h0_view, s->glm_mtp_logits0); + ds4_gpu_tensor_free(h0_view); + if (!head_ok) { + if (errlen) snprintf(err, errlen, "glm mtp: row0 head failed"); + return -1; + } + const int n1 = glm_session_logits_argmax(s->glm_mtp_logits0); + token_vec_push(&s->checkpoint, first_token); + s->checkpoint_valid = true; + const int accept = n1 == d; + int n_committed = 1; + if (accept) { + token_vec_push(&s->checkpoint, d); + ds4_session_glm_note_dense_cache(s, pos, 2); + n_committed = 2; + /* s->logits already holds row1 (position pos+1) logits. */ + const int n2 = glm_session_logits_argmax(s->logits); + int dummy = -1, nd = -1; + const bool cu = + ds4_gpu_tensor_write(g->cur, 0, s->glm_mtp_hc, + (uint64_t)DS4_N_EMBD * sizeof(float)) != 0 && + glm_graph_mtp_step(g, &e->model, &e->weights, d, pos, + s->glm_mtp_min_pos, &dummy) && + ds4_gpu_tensor_write(g->cur, 0, s->glm_mtp_hc + DS4_N_EMBD, + (uint64_t)DS4_N_EMBD * sizeof(float)) != 0 && + glm_graph_mtp_step(g, &e->model, &e->weights, n2, pos + 1u, + s->glm_mtp_min_pos, &nd); + if (cu) { + s->glm_mtp_draft = nd; + s->glm_mtp_have = 1; + } + accepted[0] = first_token; + accepted[1] = d; + } else { + ds4_session_glm_note_dense_cache(s, pos, 1); + memcpy(s->logits, s->glm_mtp_logits0, + (size_t)DS4_N_VOCAB * sizeof(float)); + int nd = -1; + const bool cu = + ds4_gpu_tensor_write(g->cur, 0, s->glm_mtp_hc, + (uint64_t)DS4_N_EMBD * sizeof(float)) != 0 && + glm_graph_mtp_step(g, &e->model, &e->weights, n1, pos, + s->glm_mtp_min_pos, &nd); + if (cu) { + s->glm_mtp_draft = nd; + s->glm_mtp_have = 1; + } + accepted[0] = first_token; + } + if (timing) { + const double t2 = now_sec(); + char *dt = ds4_token_text(e, d, NULL); + char *nt = ds4_token_text(e, n1, NULL); + fprintf(stderr, + "ds4: glm mtp cycle: verify2 %.1f ms, head+draft %.1f ms, %s " + "(draft %d '%s' vs true %d '%s')\n", + (t1 - t0) * 1000.0, (t2 - t1) * 1000.0, + accept ? "ACCEPT" : "reject", + d, dt ? dt : "?", n1, nt ? nt : "?"); + free(dt); + free(nt); + } + return n_committed; +} + static int ds4_session_slice_check_timeline( ds4_session *s, const int *tokens, @@ -33526,7 +46831,13 @@ int ds4_session_eval_layer_slice(ds4_session *s, if (errlen) snprintf(err, errlen, "missing layer-slice session"); return 1; } - if (layer_start > layer_end || layer_end >= (uint32_t)DS4_N_LAYER) { + uint32_t executable_layers = (uint32_t)DS4_N_LAYER; + if (DS4_MODEL_FAMILY == DS4_MODEL_FAMILY_GLM_DSA) { + executable_layers = glm_graph_normal_layer_count(); + } + if (executable_layers == 0 || + layer_start > layer_end || + layer_end >= executable_layers) { if (errlen) snprintf(err, errlen, "invalid layer-slice layer range %u:%u", layer_start, layer_end); return 1; @@ -33536,7 +46847,7 @@ int ds4_session_eval_layer_slice(ds4_session *s, layer_start); return 1; } - if (output_logits && layer_end + 1u != (uint32_t)DS4_N_LAYER) { + if (output_logits && layer_end + 1u != executable_layers) { if (errlen) snprintf(err, errlen, "layer-slice logits require final transformer layer"); return 1; } @@ -33572,6 +46883,135 @@ int ds4_session_eval_layer_slice(ds4_session *s, s->checkpoint_valid = false; return 1; #else + if (ds4_session_is_glm(s)) { + ds4_engine *e = s->engine; + ds4_glm_gpu_graph *g = &s->glm_graph; + if (!s->glm_graph_ready) { + if (errlen) snprintf(err, errlen, "%s GLM graph is not initialized", + ds4_backend_name(e->backend)); + return 1; + } + if (layer_start != g->layer_start || layer_end != g->layer_end) { + if (errlen) snprintf(err, errlen, + "requested GLM layer slice %u:%u does not match loaded slice %u:%u", + layer_start, + layer_end, + g->layer_start, + g->layer_end); + s->checkpoint_valid = false; + return 1; + } + if (n_tokens > s->prefill_cap) { + if (errlen) snprintf(err, errlen, "GLM layer-slice chunk %u exceeds prefill cap %u", + n_tokens, s->prefill_cap); + return 1; + } + + const uint64_t hidden_dim = DS4_N_EMBD; + uint32_t done = 0; + while (done < n_tokens) { + const uint32_t pos = pos0 + done; + const uint32_t remaining = n_tokens - done; + const float *chunk_input = input_hc ? input_hc + (uint64_t)done * hidden_dim : NULL; + float *chunk_output = output_hc ? output_hc + (uint64_t)done * hidden_dim : NULL; + uint32_t chunk = 1; + bool ok = false; + + /* + * Raw decode starts from a token embedding. Continuation slices + * receive a hidden vector from the previous node, so use the + * batch-equivalent path even for a single token. + */ + if (remaining == 1 && pos > 0 && !input_hc && !output_hc) { + float *chunk_logits = output_logits ? logits : NULL; + ok = glm_graph_forward_token(g, + &e->model, + &e->weights, + tokens[done], + chunk_input, + pos, + chunk_output, + chunk_logits); + if (ok && glm_graph_decode_updates_dense_cache(g, pos, chunk_logits)) { + ds4_session_glm_note_dense_cache(s, pos, 1); + } + } else if (g->full_kv_cache && pos < g->ctx_cap) { + chunk = remaining; + const uint32_t dense_remaining = g->ctx_cap - pos; + if (chunk > dense_remaining) chunk = dense_remaining; + float *chunk_logits = (output_logits && done + chunk == n_tokens) ? logits : NULL; + ok = glm_graph_forward_tokens(g, + &e->model, + &e->weights, + tokens + done, + chunk_input, + pos, + chunk, + chunk_output, + chunk_logits, + NULL, + NULL, + pos0, + done, + n_tokens); + if (ok) ds4_session_glm_note_dense_cache(s, pos, chunk); + } else if (glm_graph_indexed_prefill_batch_ready(g, pos)) { + chunk = remaining; + if (chunk > g->indexed_prefill_cap) chunk = g->indexed_prefill_cap; + chunk = glm_graph_limit_indexed_prefill_chunk(pos, chunk); + if (chunk == 0) chunk = 1; + float *chunk_logits = (output_logits && done + chunk == n_tokens) ? logits : NULL; + ok = glm_graph_forward_indexed_tokens(g, + &e->model, + &e->weights, + tokens + done, + chunk_input, + pos, + chunk, + chunk_output, + chunk_logits, + NULL, + NULL, + pos0, + done, + n_tokens); + } else { + float *chunk_logits = (output_logits && done + 1u == n_tokens) ? logits : NULL; + ok = glm_graph_forward_token(g, + &e->model, + &e->weights, + tokens[done], + chunk_input, + pos, + chunk_output, + chunk_logits); + chunk = 1; + } + + if (!ok) { + if (errlen) snprintf(err, errlen, + "%s GLM layer-slice evaluation failed at pos %u", + ds4_backend_name(e->backend), + pos); + s->checkpoint_valid = false; + s->mtp_draft_valid = false; + ds4_session_glm_cap_dense_cache(s); + return 1; + } + done += chunk; + } + if (!output_hc && !output_logits && ds4_gpu_synchronize() == 0) { + if (errlen) snprintf(err, errlen, + "%s GLM layer-slice synchronization failed", + ds4_backend_name(e->backend)); + s->checkpoint_valid = false; + s->mtp_draft_valid = false; + ds4_session_glm_cap_dense_cache(s); + return 1; + } + ds4_session_slice_commit_timeline(s, tokens, n_tokens); + return 0; + } if (n_tokens > s->prefill_cap) { if (errlen) snprintf(err, errlen, "layer-slice chunk %u exceeds prefill cap %u", n_tokens, s->prefill_cap); @@ -33900,7 +47340,7 @@ static int ds4_session_sync_internal(ds4_session *s, const ds4_tokens *prompt, c /* Under tensor parallelism the leader mirrors every public sync/eval to the * worker before doing the work itself, so both engines execute the same * graph sequence and the per-layer gates pair up. The worker acks a sync - * once its (replicated) prefill completes, surfacing worker-side failures + * once its matching prefill completes, surfacing worker-side failures * here instead of as a gate timeout mid-decode. */ static bool ds4_session_tp_leader(const ds4_session *s) { return s && s->engine && s->engine->tp.active && s->engine->tp.rank == 0; @@ -33915,9 +47355,33 @@ int ds4_session_sync(ds4_session *s, const ds4_tokens *prompt, char *err, size_t } } int rc = ds4_session_sync_internal(s, prompt, err, errlen); + if (rc == 0) glm_debug_dump_prefill_logits(s->logits); + if (rc == 0) { + const char *kvp = getenv("DS4_GLM_KV_DUMP"); + if (kvp && kvp[0] && s->glm_graph.layer_kv_lora_cache[0]) { + const ds4_glm_gpu_graph *g = &s->glm_graph; + const uint32_t rows = prompt ? (uint32_t)prompt->len : 0; + const uint64_t eb = glm_graph_compact_cache_elem_bytes(); + const struct { const char *sfx; ds4_gpu_tensor *t; uint64_t rb; } kd[2] = { + { "lora0", g->layer_kv_lora_cache[0], DS4_N_KV_LORA * eb }, + { "rope0", g->layer_k_rope_cache[0], DS4_N_ROT * eb }, + }; + for (int i = 0; i < 2 && rows; i++) { + char fp[1024]; + snprintf(fp, sizeof(fp), "%s.%s", kvp, kd[i].sfx); + void *buf = malloc(rows * kd[i].rb); + if (buf && + ds4_gpu_tensor_read(kd[i].t, 0, buf, rows * kd[i].rb)) { + FILE *f = fopen(fp, "wb"); + if (f) { fwrite(buf, 1, rows * kd[i].rb, f); fclose(f); } + } + free(buf); + } + } + } if (mirror && rc == 0) { if (!ds4_tp_wait_sync_ack(s->engine->tp.ctx, err, errlen)) return 1; - if (!s->engine->tp.null_split) { + if (s->engine->tp.vocab_split) { const uint32_t vhalf = (uint32_t)DS4_N_VOCAB / 2u; if (!ds4_tp_recv_logits_half(s->engine->tp.ctx, s->logits + vhalf, vhalf)) { snprintf(err, errlen, "tp: worker sync logits half missing"); @@ -33929,8 +47393,18 @@ int ds4_session_sync(ds4_session *s, const ds4_tokens *prompt, char *err, size_t } static int ds4_session_sync_internal(ds4_session *s, const ds4_tokens *prompt, char *err, size_t errlen) { - if (!s || !prompt || prompt->len <= 0 || prompt->len >= s->ctx_size) { - snprintf(err, errlen, "prompt exceeds context"); + if (!s || !prompt) { + snprintf(err, errlen, "missing session or prompt"); + return 1; + } + if (prompt->len <= 0) { + snprintf(err, errlen, "empty prompt"); + return 1; + } + if (prompt->len >= s->ctx_size) { + snprintf(err, errlen, + "prompt length %d exceeds context %d (one token of generation room is required)", + prompt->len, s->ctx_size); return 1; } if (ds4_session_cancelled(s)) { @@ -34003,6 +47477,580 @@ static int ds4_session_sync_internal(ds4_session *s, const ds4_tokens *prompt, c ds4_engine *e = s->engine; const char *backend_name = ds4_backend_name(e->backend); + if (ds4_session_is_glm(s)) { + if (!s->glm_graph_ready) { + snprintf(err, errlen, "%s GLM graph is not initialized", backend_name); + return 1; + } + if ((uint32_t)prompt->len >= s->glm_graph.ctx_size) { + snprintf(err, errlen, "prompt length %d leaves no GLM Metal context room (ctx %u)", + prompt->len, s->glm_graph.ctx_size); + s->checkpoint_valid = false; + ds4_session_glm_reset_dense_cache(s); + return 1; + } + + int start = 0; + bool resumed_checkpoint = false; + if (s->checkpoint_valid && + prompt->len >= s->checkpoint.len && + ds4_tokens_starts_with(prompt, &s->checkpoint)) + { + start = s->checkpoint.len; + resumed_checkpoint = true; + s->mtp_draft_valid = false; + } else { + s->checkpoint.len = 0; + s->checkpoint_valid = false; + s->mtp_draft_valid = false; + ds4_session_glm_reset_dense_cache(s); + } + + uint32_t glm_exact_prefill_max = 64; + { + const char *em = getenv("DS4_GLM_TP_EXACT_PREFILL_MAX"); + if (em && em[0]) glm_exact_prefill_max = (uint32_t)atoi(em); + } + if (getenv("DS4_GLM_TP_TOKEN_PREFILL") != NULL || + (s->glm_graph.tp_world == 2 && + (uint32_t)(prompt->len - start) <= glm_exact_prefill_max)) { + /* Small prompts (chat turns) replay through the gated + * single-token decode path: byte-exact single-node lineage, + * ~1s extra per turn. The split batch prefill's association + * drift is only accepted for long prompts, where the token + * loop would be minutes and the drift washes out; at chat + * sizes it can flip near-tie tokens (e.g. the thinking-mode + * opener) and visibly degrade answers. Env forces the token + * loop at any length. */ + for (int i = start; i < prompt->len; i++) { + const uint32_t pos = (uint32_t)i; + const bool updates_dense = + glm_graph_decode_updates_dense_cache(&s->glm_graph, pos, + s->logits); + const bool last = i + 1 == prompt->len; + /* Always request logits: it forces the per-token commit + * cadence of normal decode, so the per-layer gates execute + * token by token on both ranks instead of piling up in one + * giant open batch that times out at the late flush. */ + if (!glm_graph_forward_token(&s->glm_graph, + &s->engine->model, + &s->engine->weights, + prompt->v[i], + NULL, + pos, + NULL, + s->logits)) + { + snprintf(err, errlen, "%s GLM TP prefill failed at token %d", + backend_name, i); + s->checkpoint_valid = false; + ds4_session_glm_cap_dense_cache(s); + return 1; + } + token_vec_push(&s->checkpoint, prompt->v[i]); + if (updates_dense) ds4_session_glm_note_dense_cache(s, pos, 1); + if (s->progress && ((i - start) % 8 == 0 || last)) { + s->progress(s->progress_ud, "prefill_chunk", i + 1 - start, + prompt->len - start); + } + } + s->checkpoint_valid = true; + s->mtp_draft_valid = false; + (void)resumed_checkpoint; + glm_debug_dump_prefill_logits(s->logits); + return 0; + } + + int checkpoint_len_with_logits = s->checkpoint_valid ? s->checkpoint.len : 0; + int suffix = prompt->len - start; + const uint32_t resume_min = glm_graph_resume_prefill_min_tokens(); + bool dense_cache_gap = (uint32_t)start > s->glm_dense_cache_len; + const bool prompt_fits_dense_attention = + s->glm_graph.full_kv_cache && + (uint32_t)prompt->len <= s->glm_graph.ctx_cap; + const bool sync_trace = getenv("DS4_GLM_SYNC_TRACE") != NULL; + const bool indexed_batch_available = + glm_graph_indexed_prefill_batch_available(&s->glm_graph); + const bool indexed_resume_keeps_sparse_state = + resumed_checkpoint && suffix > 0 && dense_cache_gap && + glm_graph_decode_uses_indexed_attention(&s->glm_graph, + (uint32_t)start, + s->logits); + if (sync_trace) { + fprintf(stderr, + "ds4: GLM sync start=%d prompt=%d suffix=%d checkpoint=%d dense_len=%u ctx_cap=%u dense_fit=%d resume_min=%u dense_gap=%d indexed_keep=%d indexed_batch=%d batch_ffn=%d\n", + start, + prompt->len, + suffix, + s->checkpoint_valid ? s->checkpoint.len : 0, + s->glm_dense_cache_len, + s->glm_graph.ctx_cap, + prompt_fits_dense_attention ? 1 : 0, + resume_min, + dense_cache_gap ? 1 : 0, + indexed_resume_keeps_sparse_state ? 1 : 0, + indexed_batch_available ? 1 : 0, + glm_graph_indexed_prefill_batch_ffn() ? 1 : 0); + } + /* If the live checkpoint advanced with indexed attention, the compact + * cache already represents the live prefix but dense KV may lag behind. + * Continue from compact/indexed state instead of replaying the old + * assistant text just to repair dense KV before the new suffix. */ + if (resumed_checkpoint && suffix > 0 && dense_cache_gap && + !indexed_resume_keeps_sparse_state && + s->glm_graph.full_kv_cache && + s->glm_dense_cache_len < s->glm_graph.ctx_cap) + { + const uint32_t dense_end = + (uint32_t)prompt->len < s->glm_graph.ctx_cap ? + (uint32_t)prompt->len : + s->glm_graph.ctx_cap; + const uint32_t dense_progress_start = (uint32_t)start; + const uint32_t dense_progress_total = (uint32_t)suffix; + const uint32_t dense_chunk_max = + glm_graph_prefill_chunk_tokens(s->glm_graph.ctx_cap); + for (uint32_t dense_pos = s->glm_dense_cache_len; + dense_pos < dense_end; ) + { + if (ds4_session_cancelled(s)) { + snprintf(err, errlen, "interrupted"); + if (!s->checkpoint_valid) { + s->checkpoint.len = checkpoint_len_with_logits; + s->checkpoint_valid = checkpoint_len_with_logits > 0; + } + s->mtp_draft_valid = false; + ds4_session_glm_cap_dense_cache(s); + return DS4_SESSION_SYNC_INTERRUPTED; + } + + uint32_t chunk = dense_end - dense_pos; + if (chunk > dense_chunk_max) chunk = dense_chunk_max; + float *chunk_logits = + (dense_pos + chunk >= (uint32_t)prompt->len) ? + s->logits : + NULL; + if (sync_trace) { + fprintf(stderr, + "ds4: GLM sync branch=dense_bridge pos=%u chunk=%u logits=%d\n", + dense_pos, + chunk, + chunk_logits ? 1 : 0); + } + if (!glm_graph_forward_tokens(&s->glm_graph, + &e->model, + &e->weights, + prompt->v + dense_pos, + NULL, + dense_pos, + chunk, + NULL, + chunk_logits, + s->display_progress, + s->display_progress_ud, + dense_progress_start, + dense_pos > dense_progress_start ? + dense_pos - dense_progress_start : + 0, + dense_progress_total)) + { + snprintf(err, errlen, + "%s GLM dense prefill failed while rebuilding checkpoint cache", + backend_name); + if (!s->checkpoint_valid) { + s->checkpoint.len = checkpoint_len_with_logits; + s->checkpoint_valid = checkpoint_len_with_logits > 0; + } + s->mtp_draft_valid = false; + ds4_session_glm_cap_dense_cache(s); + return 1; + } + const uint32_t dense_next = dense_pos + chunk; + ds4_session_glm_note_dense_cache(s, dense_pos, chunk); + if (dense_next > (uint32_t)start) { + const uint32_t push_from = + dense_pos > (uint32_t)start ? dense_pos : (uint32_t)start; + if ((uint32_t)s->checkpoint.len != push_from) { + snprintf(err, errlen, + "%s GLM checkpoint/cache bridge is inconsistent", + backend_name); + s->checkpoint_valid = false; + s->mtp_draft_valid = false; + ds4_session_glm_cap_dense_cache(s); + return 1; + } + for (uint32_t j = push_from; j < dense_next; j++) { + token_vec_push(&s->checkpoint, prompt->v[j]); + } + start = s->checkpoint.len; + if (chunk_logits) { + checkpoint_len_with_logits = s->checkpoint.len; + s->checkpoint_valid = true; + } else { + s->checkpoint_valid = false; + } + s->mtp_draft_valid = false; + } + dense_pos = dense_next; + if (s->progress) { + s->progress(s->progress_ud, "prefill_chunk", + (int)dense_pos, prompt->len); + } + } + suffix = prompt->len - start; + dense_cache_gap = (uint32_t)start > s->glm_dense_cache_len; + } + if (resumed_checkpoint && suffix > 0 && dense_cache_gap && + (uint32_t)suffix >= resume_min && + indexed_batch_available) + { + for (int i = start; i < prompt->len; ) { + if (ds4_session_cancelled(s)) { + snprintf(err, errlen, "interrupted"); + s->checkpoint.len = checkpoint_len_with_logits; + s->checkpoint_valid = checkpoint_len_with_logits > 0; + s->mtp_draft_valid = false; + ds4_session_glm_cap_dense_cache(s); + return DS4_SESSION_SYNC_INTERRUPTED; + } + + const uint32_t pos = (uint32_t)s->checkpoint.len; + uint32_t chunk = (uint32_t)(prompt->len - i); + if (chunk > s->glm_graph.indexed_prefill_cap) { + chunk = s->glm_graph.indexed_prefill_cap; + } + chunk = glm_graph_limit_indexed_prefill_chunk(pos, chunk); + if (chunk == 0) chunk = 1; + float *chunk_logits = + (i + (int)chunk >= prompt->len) ? s->logits : NULL; + if (sync_trace) { + fprintf(stderr, + "ds4: GLM sync branch=indexed_resume pos=%u chunk=%u logits=%d\n", + pos, + chunk, + chunk_logits ? 1 : 0); + } + if (!glm_graph_forward_indexed_tokens(&s->glm_graph, + &e->model, + &e->weights, + prompt->v + i, + NULL, + pos, + chunk, + NULL, + chunk_logits, + s->display_progress, + s->display_progress_ud, + (uint32_t)start, + (uint32_t)(i - start), + (uint32_t)suffix)) + { + snprintf(err, errlen, "%s GLM indexed prefill failed while extending checkpoint", + backend_name); + s->checkpoint_valid = false; + s->mtp_draft_valid = false; + ds4_session_glm_cap_dense_cache(s); + return 1; + } + for (uint32_t j = 0; j < chunk; j++) { + token_vec_push(&s->checkpoint, prompt->v[i + (int)j]); + } + i += (int)chunk; + if (chunk_logits) { + checkpoint_len_with_logits = s->checkpoint.len; + s->checkpoint_valid = true; + } else { + s->checkpoint_valid = false; + } + s->mtp_draft_valid = false; + if (s->progress) { + s->progress(s->progress_ud, "prefill_chunk", i, prompt->len); + } + } + if (!glm_graph_maybe_warm_compact_indexer_after_prefill( + &s->glm_graph, + &e->model, + &e->weights, + (uint32_t)s->checkpoint.len)) { + snprintf(err, errlen, "%s GLM compact indexer warmup failed", backend_name); + s->checkpoint_valid = false; + s->mtp_draft_valid = false; + ds4_session_glm_cap_dense_cache(s); + return 1; + } + glm_debug_dump_prefill_logits(s->logits); + return 0; + } + if (resumed_checkpoint && suffix > 0 && + (dense_cache_gap || (uint32_t)suffix < resume_min)) + { + for (int i = start; i < prompt->len; i++) { + if (ds4_session_cancelled(s)) { + snprintf(err, errlen, "interrupted"); + s->checkpoint_valid = true; + s->mtp_draft_valid = false; + ds4_session_glm_cap_dense_cache(s); + return DS4_SESSION_SYNC_INTERRUPTED; + } + const uint32_t pos = (uint32_t)s->checkpoint.len; + const bool updates_dense = + glm_graph_decode_updates_dense_cache(&s->glm_graph, pos, s->logits); + if (sync_trace) { + fprintf(stderr, + "ds4: GLM sync branch=decode_resume pos=%u token_index=%d updates_dense=%d\n", + pos, + i, + updates_dense ? 1 : 0); + } + if (!glm_graph_forward_token(&s->glm_graph, + &e->model, + &e->weights, + prompt->v[i], + NULL, + pos, + NULL, + s->logits)) + { + snprintf(err, errlen, "%s GLM decode failed while extending checkpoint", + backend_name); + s->checkpoint_valid = false; + s->mtp_draft_valid = false; + ds4_session_glm_cap_dense_cache(s); + return 1; + } + token_vec_push(&s->checkpoint, prompt->v[i]); + s->checkpoint_valid = true; + s->mtp_draft_valid = false; + if (updates_dense) ds4_session_glm_note_dense_cache(s, pos, 1); + if (s->progress) { + s->progress(s->progress_ud, "prefill_chunk", i + 1, prompt->len); + } + } + if (!glm_graph_maybe_warm_compact_indexer_after_prefill( + &s->glm_graph, + &e->model, + &e->weights, + (uint32_t)s->checkpoint.len)) { + snprintf(err, errlen, "%s GLM compact indexer warmup failed", backend_name); + s->checkpoint_valid = false; + s->mtp_draft_valid = false; + ds4_session_glm_cap_dense_cache(s); + return 1; + } + glm_debug_dump_prefill_logits(s->logits); + return 0; + } + const uint32_t chunk_max = glm_graph_prefill_chunk_tokens(s->glm_graph.ctx_cap); + const uint32_t full_work_start = (uint32_t)start; + const uint32_t full_work_total = + (uint32_t)prompt->len > full_work_start ? + (uint32_t)prompt->len - full_work_start : + 0; + for (int i = start; i < prompt->len; ) { + if (ds4_session_cancelled(s)) { + snprintf(err, errlen, "interrupted"); + if (!s->checkpoint_valid) { + s->checkpoint.len = checkpoint_len_with_logits; + s->checkpoint_valid = checkpoint_len_with_logits > 0; + } + s->mtp_draft_valid = false; + ds4_session_glm_cap_dense_cache(s); + return DS4_SESSION_SYNC_INTERRUPTED; + } + if (!s->glm_graph.full_kv_cache || (uint32_t)i >= s->glm_graph.ctx_cap) { + const uint32_t remaining = (uint32_t)(prompt->len - i); + const bool use_token_major_prefill = + glm_graph_use_streaming_token_prefill(&s->glm_graph, + (uint32_t)i, + remaining); + const bool use_indexed_batch = + !use_token_major_prefill && + glm_graph_indexed_prefill_batch_ready(&s->glm_graph, + (uint32_t)i); + uint32_t chunk = 1; + bool prefill_ok = false; + if (use_token_major_prefill) { + chunk = remaining; + if (chunk > DS4_GLM_STREAM_PREFILL_TOKEN_MAJOR_MAX_TOKENS) { + chunk = DS4_GLM_STREAM_PREFILL_TOKEN_MAJOR_MAX_TOKENS; + } + float *chunk_logits = + (i + (int)chunk >= prompt->len) ? s->logits : NULL; + if (sync_trace) { + fprintf(stderr, + "ds4: GLM sync branch=full_compact_token_major pos=%d chunk=%u logits=%d\n", + i, + chunk, + chunk_logits ? 1 : 0); + } + prefill_ok = glm_graph_prefill_token_major(&s->glm_graph, + &e->model, + &e->weights, + prompt->v + i, + (uint32_t)i, + chunk, + chunk_logits, + s->display_progress, + s->display_progress_ud, + full_work_start, + (uint32_t)i - full_work_start, + full_work_total); + } else if (use_indexed_batch) { + chunk = (uint32_t)(prompt->len - i); + if (chunk > s->glm_graph.indexed_prefill_cap) { + chunk = s->glm_graph.indexed_prefill_cap; + } + chunk = glm_graph_limit_indexed_prefill_chunk((uint32_t)i, chunk); + float *chunk_logits = + (i + (int)chunk >= prompt->len) ? s->logits : NULL; + if (sync_trace) { + fprintf(stderr, + "ds4: GLM sync branch=full_indexed pos=%d chunk=%u logits=%d\n", + i, + chunk, + chunk_logits ? 1 : 0); + } + prefill_ok = glm_graph_forward_indexed_tokens(&s->glm_graph, + &e->model, + &e->weights, + prompt->v + i, + NULL, + (uint32_t)i, + chunk, + NULL, + chunk_logits, + s->display_progress, + s->display_progress_ud, + full_work_start, + (uint32_t)i - full_work_start, + full_work_total); + } else { + float *chunk_logits = + (i + 1 >= prompt->len) ? s->logits : NULL; + if (sync_trace) { + fprintf(stderr, + "ds4: GLM sync branch=full_decode pos=%d logits=%d\n", + i, + chunk_logits ? 1 : 0); + } + prefill_ok = glm_graph_forward_token(&s->glm_graph, + &e->model, + &e->weights, + prompt->v[i], + NULL, + (uint32_t)i, + NULL, + chunk_logits); + } + if (!prefill_ok) { + snprintf(err, errlen, "%s GLM prefill failed", backend_name); + if (!s->checkpoint_valid) { + s->checkpoint.len = checkpoint_len_with_logits; + s->checkpoint_valid = checkpoint_len_with_logits > 0; + } + s->mtp_draft_valid = false; + ds4_session_glm_cap_dense_cache(s); + return 1; + } + for (uint32_t j = 0; j < chunk; j++) { + token_vec_push(&s->checkpoint, prompt->v[i + (int)j]); + } + i += (int)chunk; + if (i >= prompt->len) { + checkpoint_len_with_logits = s->checkpoint.len; + s->checkpoint_valid = true; + } else { + s->checkpoint_valid = false; + } + s->mtp_draft_valid = false; + if (s->progress) s->progress(s->progress_ud, "prefill_chunk", i, prompt->len); + continue; + } + uint32_t chunk = (uint32_t)(prompt->len - i); + const uint32_t full_remaining = s->glm_graph.ctx_cap - (uint32_t)i; + if (chunk > full_remaining) chunk = full_remaining; + if (chunk > chunk_max) chunk = chunk_max; + float *chunk_logits = + (i + (int)chunk >= prompt->len) ? s->logits : NULL; + const bool use_token_major_prefill = + glm_graph_use_streaming_token_prefill(&s->glm_graph, + (uint32_t)i, + chunk); + if (sync_trace) { + fprintf(stderr, + "ds4: GLM sync branch=%s pos=%d chunk=%u logits=%d\n", + use_token_major_prefill ? "full_token_major" : "full_dense", + i, + chunk, + chunk_logits ? 1 : 0); + } + bool prefill_ok = false; + if (use_token_major_prefill) { + prefill_ok = glm_graph_prefill_token_major(&s->glm_graph, + &e->model, + &e->weights, + prompt->v + i, + (uint32_t)i, + chunk, + chunk_logits, + s->display_progress, + s->display_progress_ud, + full_work_start, + (uint32_t)i - full_work_start, + full_work_total); + } else { + prefill_ok = glm_graph_forward_tokens(&s->glm_graph, + &e->model, + &e->weights, + prompt->v + i, + NULL, + (uint32_t)i, + chunk, + NULL, + chunk_logits, + s->display_progress, + s->display_progress_ud, + full_work_start, + (uint32_t)i - full_work_start, + full_work_total); + } + if (!prefill_ok) { + snprintf(err, errlen, "%s GLM prefill failed", backend_name); + if (!s->checkpoint_valid) { + s->checkpoint.len = checkpoint_len_with_logits; + s->checkpoint_valid = checkpoint_len_with_logits > 0; + } + s->mtp_draft_valid = false; + ds4_session_glm_cap_dense_cache(s); + return 1; + } + for (uint32_t j = 0; j < chunk; j++) { + token_vec_push(&s->checkpoint, prompt->v[i + (int)j]); + } + ds4_session_glm_note_dense_cache(s, (uint32_t)i, chunk); + i += (int)chunk; + if (i >= prompt->len) { + checkpoint_len_with_logits = s->checkpoint.len; + s->checkpoint_valid = true; + } else { + s->checkpoint_valid = false; + } + s->mtp_draft_valid = false; + if (s->progress) s->progress(s->progress_ud, "prefill_chunk", i, prompt->len); + } + if (!glm_graph_maybe_warm_compact_indexer_after_prefill( + &s->glm_graph, + &e->model, + &e->weights, + (uint32_t)s->checkpoint.len)) { + snprintf(err, errlen, "%s GLM compact indexer warmup failed", backend_name); + s->checkpoint_valid = false; + s->mtp_draft_valid = false; + ds4_session_glm_cap_dense_cache(s); + return 1; + } + return 0; + } + if (s->checkpoint_valid && prompt->len >= s->checkpoint.len && ds4_tokens_starts_with(prompt, &s->checkpoint)) @@ -34159,8 +48207,18 @@ bool ds4_session_rewrite_requires_rebuild(int live_len, int canonical_len, int c ds4_session_rewrite_result ds4_session_rewrite_from_common( ds4_session *s, const ds4_tokens *prompt, int common, char *err, size_t errlen) { - if (!s || !prompt || prompt->len <= 0 || prompt->len >= s->ctx_size) { - snprintf(err, errlen, "prompt exceeds context"); + if (!s || !prompt) { + snprintf(err, errlen, "missing session or prompt"); + return DS4_SESSION_REWRITE_ERROR; + } + if (prompt->len <= 0) { + snprintf(err, errlen, "empty prompt"); + return DS4_SESSION_REWRITE_ERROR; + } + if (prompt->len >= s->ctx_size) { + snprintf(err, errlen, + "prompt length %d exceeds context %d (one token of generation room is required)", + prompt->len, s->ctx_size); return DS4_SESSION_REWRITE_ERROR; } if (!s->checkpoint_valid) { @@ -34301,590 +48359,27 @@ int ds4_session_set_logits(ds4_session *s, const float *logits, int n) { return 0; } +/* Pay the one-time first-submission GPU cost (pipeline ramp plus model-heap + * residency for the batched prefill kernels) outside any measured window. + * The TP worker calls this right after creating its session: it otherwise + * encodes no main-queue GPU work until the first mirrored sync arrives, so + * the cost lands inside the leader-timed prefill (measured ~1.1 s per run + * on the M5 Max pair -- the whole first-run TP deficit vs single + * node, which pays the same cost before its timing window starts). */ +void ds4_session_gpu_warmup(ds4_session *s) { #ifndef DS4_NO_GPU -static bool ds4_session_dspark_capture_current(const ds4_session *s) { - if (!s || ds4_session_is_cpu(s) || !s->checkpoint_valid) return false; - const ds4_gpu_graph *g = &s->graph; - return g->dspark_capture_enabled && - g->dspark_capture_valid && - g->dspark_capture_checkpoint_len == (uint32_t)s->checkpoint.len; -} - -static bool ds4_session_dspark_capture_batch_current(const ds4_session *s) { - if (!s || ds4_session_is_cpu(s) || !s->checkpoint_valid) return false; - const ds4_gpu_graph *g = &s->graph; - if (!g->dspark_capture_enabled || !g->dspark_capture_batch_valid) { - return false; - } - if (g->dspark_capture_batch_tokens == 0 || - g->dspark_capture_batch_start > (uint32_t)s->checkpoint.len) { - return false; - } - const uint32_t batch_end = - g->dspark_capture_batch_start + g->dspark_capture_batch_tokens; - return batch_end >= g->dspark_capture_batch_start && - batch_end <= (uint32_t)s->checkpoint.len; -} - -static void ds4_session_note_legacy_mtp_probe(ds4_session *s, - int token, - bool mtp_probe_log) { - if (!s || !s->mtp_draft_valid) return; - if (mtp_probe_log) { - s->mtp_probe_total++; - if (s->mtp_draft_token == token) s->mtp_probe_hit++; - fprintf(stderr, - "ds4: mtp probe token=%d draft=%d hit=%llu/%llu\n", - token, - s->mtp_draft_token, - (unsigned long long)s->mtp_probe_hit, - (unsigned long long)s->mtp_probe_total); - } - s->mtp_draft_valid = false; -} - -static bool ds4_session_prepare_legacy_mtp_draft(ds4_session *s, - int token, - uint32_t pos, - bool mtp_probe_log) { - ds4_engine *e = s->engine; - if (!e->mtp_ready || !s->mtp_logits || - (e->mtp_draft_tokens <= 1 && !mtp_probe_log)) { - return false; - } - - int mtp_top = -1; - if (metal_graph_eval_mtp_draft(&s->graph, - &e->model, - &e->weights, - &e->mtp_model, - &e->mtp_weights, - token, - pos, - getenv("DS4_MTP_FULL_LOGITS") ? s->mtp_logits : NULL, - &mtp_top)) { - s->mtp_draft_token = mtp_top >= 0 ? mtp_top : sample_argmax(s->mtp_logits, DS4_N_VOCAB); - s->mtp_draft_valid = true; - return true; - } - if (mtp_probe_log) { - fprintf(stderr, "ds4: mtp probe draft failed\n"); - } - return false; -} - -static bool ds4_session_prepare_dspark_draft(ds4_session *s, - int token, - uint32_t pos) { - const char *probe = getenv("DS4_DSPARK_PROBE"); - const bool probe_log = probe && probe[0]; - const char *enable = getenv("DS4_DSPARK_ENABLE"); - const bool enabled = - enable && enable[0] && strcmp(enable, "0") != 0; - const char *fake_argmax = getenv("DS4_DSPARK_FAKE_ARGMAX_PROPOSAL"); - const bool fake_argmax_enabled = - enabled && - fake_argmax && fake_argmax[0] && strcmp(fake_argmax, "0") != 0; - const float confidence_threshold = dspark_confidence_threshold(); - const bool stats_enabled = ds4_dspark_stats_enabled(); - const bool scheduler_enabled = ds4_dspark_scheduler_enabled(); - const bool time_enabled = stats_enabled || scheduler_enabled; - const double stats_t0 = time_enabled ? now_sec() : 0.0; -#define DS4_DSPARK_PROP_T0() (stats_enabled ? now_sec() : 0.0) -#define DS4_DSPARK_PROP_ADD(field_, t0_) do { \ - if (stats_enabled) { \ - s->dspark_stats.field_ += (now_sec() - (t0_)) * 1000.0; \ - } \ - } while (0) - s->dspark_draft_valid = false; - s->dspark_draft_len = 0; - s->dspark_last_confidence0 = 0.0f; - s->dspark_last_confidence0_valid = false; - if (scheduler_enabled) s->dspark_last_propose_ms = 0.0; - if (enabled && !fake_argmax_enabled && - ds4_session_dspark_scheduler_should_skip(s)) { - const double propose_ms = - time_enabled ? (now_sec() - stats_t0) * 1000.0 : 0.0; - if (scheduler_enabled) s->dspark_last_propose_ms = propose_ms; - if (stats_enabled) { - s->dspark_stats.propose_ms += propose_ms; - } - return false; - } - if (probe_log || enabled) { - const bool capture_ok = ds4_session_dspark_capture_current(s); - const bool batch_capture_ok = - ds4_session_dspark_capture_batch_current(s); - const ds4_dspark_weights *dw = &s->engine->dspark_weights; - const bool stage0_ready = dspark_stage0_weights_ready(&s->graph, dw); - const bool runtime_fused_stage0_setup = - enabled && !fake_argmax_enabled && !probe_log; - const double stage0_t0 = DS4_DSPARK_PROP_T0(); - bool stage0_ok = false; - if (capture_ok && stage0_ready && !runtime_fused_stage0_setup) { - stage0_ok = - metal_graph_eval_dspark_stage0(&s->graph, - &s->engine->mtp_model, - dw); - } else if (capture_ok && stage0_ready && runtime_fused_stage0_setup) { - stage0_ok = true; - } - DS4_DSPARK_PROP_ADD(propose_stage0_ms, stage0_t0); - const double setup_t0 = DS4_DSPARK_PROP_T0(); - const bool draft_block_ready = - dspark_draft_block_ready(&s->graph, &s->engine->weights, dw, token); - const bool stage_input_ready = - dspark_stage_input_ready(&s->graph, dw); - bool stage_input_ok = false; - if (stage0_ok && draft_block_ready && stage_input_ready) { - if (runtime_fused_stage0_setup) { - stage_input_ok = - metal_graph_prepare_dspark_stage0_setup_block( - &s->graph, - &s->engine->model, - &s->engine->weights, - &s->engine->mtp_model, - dw, - token, - pos); - stage0_ok = stage_input_ok; - } else { - stage_input_ok = - metal_graph_prepare_dspark_setup_block(&s->graph, - &s->engine->model, - &s->engine->weights, - dw, - token, - pos); - } - } - DS4_DSPARK_PROP_ADD(propose_setup_ms, setup_t0); - const bool draft_cache_ready = - dspark_stage_cache_ready(&s->graph, dw); - uint32_t initial_cache_rows = 0; - const uint64_t captured_batch_end = - (uint64_t)s->graph.dspark_capture_batch_start + - s->graph.dspark_capture_batch_tokens; - const bool captured_batch_end_ok = - s->graph.dspark_capture_batch_tokens != 0 && - captured_batch_end <= UINT32_MAX; - const bool initial_cache_ready = - batch_capture_ok && - draft_cache_ready && - captured_batch_end_ok && - (uint32_t)captured_batch_end == pos; - const double cache_t0 = DS4_DSPARK_PROP_T0(); - bool initial_cache_ok = false; - if (initial_cache_ready) { - initial_cache_ok = - metal_graph_seed_dspark_initial_cache_from_prefill( - &s->graph, - &s->engine->mtp_model, - dw, - s->graph.dspark_capture_batch_start, - s->graph.dspark_capture_batch_tokens, - &initial_cache_rows); - } - bool cache_window_ok = draft_cache_ready; - if (draft_cache_ready) { - if (initial_cache_ready) { - if (!initial_cache_ok) metal_graph_dspark_cache_reset(&s->graph); - cache_window_ok = initial_cache_ok; - } else { - cache_window_ok = - metal_graph_dspark_cache_crop_to_prefix(&s->graph, pos) && - metal_graph_dspark_cache_ends_at(&s->graph, pos); - } - } - DS4_DSPARK_PROP_ADD(propose_cache_ms, cache_t0); - const bool noncausal_attn_ready = - probe_log && - stage_input_ok && - draft_cache_ready && - dspark_noncausal_attention_probe_ready(&s->graph, dw); - const bool noncausal_attn_ok = - noncausal_attn_ready && - metal_graph_probe_dspark_noncausal_attention(&s->graph, - &s->engine->mtp_model, - dw); - const bool stage_block_ready = - stage_input_ok && - draft_cache_ready && - dspark_stage_block_ready(&s->graph, dw, 0); - uint32_t stage_chain_done = 0; - const bool stage_chain_ready = - stage_input_ok && - draft_cache_ready && - cache_window_ok && - dw->n_stages != 0 && - dw->n_stages <= DS4_DSPARK_MAX_STAGES; - uint32_t stage_cache_start = 0; - uint32_t stage_cache_rows = 0; - const double chain_t0 = DS4_DSPARK_PROP_T0(); - bool stage_chain_ok = false; - if (stage_chain_ready) { - stage_chain_ok = - metal_graph_eval_dspark_stage_chain(&s->graph, - &s->engine->mtp_model, - dw, - pos, - &stage_chain_done, - &stage_cache_start, - &stage_cache_rows); - } - DS4_DSPARK_PROP_ADD(propose_chain_ms, chain_t0); - const bool stage_block_ok = stage_chain_done >= 1u; - const bool base_logits_ready = - stage_chain_ok && - dspark_final_head_ready(&s->graph, &s->engine->weights, dw); - int32_t markov_proposal[DS4_DSPARK_MAX_BLOCK_SIZE]; - for (uint32_t i = 0; i < DS4_DSPARK_MAX_BLOCK_SIZE; i++) { - markov_proposal[i] = -1; - } - uint32_t markov_proposal_len = 0; - bool markov_ok = false; - uint32_t confidence_len = 0; - uint32_t confidence_prefix_len = 0; - float confidence0 = 0.0f; - bool confidence_ok = false; - bool reuse_confidence0_markov = false; - const bool runtime_confidence_precheck = - base_logits_ready && - !probe_log && - confidence_threshold > 0.0f && - dspark_confidence_probe_ready(dw); - bool base_logits_ok = false; - if (runtime_confidence_precheck) { - const double hidden_t0 = DS4_DSPARK_PROP_T0(); - const bool hidden_ok = - metal_graph_eval_dspark_final_hidden(&s->graph, - &s->engine->mtp_model, - dw); - DS4_DSPARK_PROP_ADD(propose_hidden_ms, hidden_t0); - bool conf0_ok = false; - if (hidden_ok) { - const double conf0_t0 = DS4_DSPARK_PROP_T0(); - conf0_ok = - dspark_eval_confidence0_runtime(&s->graph, - &s->engine->mtp_model, - dw, - token, - s->dspark_conf_features, - s->dspark_conf_features_cap, - &confidence0); - DS4_DSPARK_PROP_ADD(propose_conf0_ms, conf0_t0); - } - if (conf0_ok) { - confidence_ok = true; - confidence_len = 1; - if (sigmoid_stable(confidence0) >= confidence_threshold) { - confidence_prefix_len = 1; - const double logits_t0 = DS4_DSPARK_PROP_T0(); - base_logits_ok = - metal_graph_eval_dspark_base_logits_from_hidden( - &s->graph, - &s->engine->model, - &s->engine->weights, - dw); - DS4_DSPARK_PROP_ADD(propose_logits_ms, logits_t0); - reuse_confidence0_markov = - base_logits_ok && - !dspark_disable_reuse_confidence0_markov(); - } - } - } else if (base_logits_ready) { - const double logits_t0 = DS4_DSPARK_PROP_T0(); - base_logits_ok = - metal_graph_eval_dspark_base_logits(&s->graph, - &s->engine->model, - &s->engine->weights, - &s->engine->mtp_model, - dw); - DS4_DSPARK_PROP_ADD(propose_logits_ms, logits_t0); - } - const bool markov_ready = - base_logits_ok && dspark_markov_probe_ready(dw); - const bool lazy_runtime_confidence = - markov_ready && !probe_log && confidence_threshold > 0.0f; - if (lazy_runtime_confidence) { - const double markov_t0 = DS4_DSPARK_PROP_T0(); - markov_ok = - dspark_apply_markov_confidence_lazy_runtime( - &s->graph, - &s->engine->mtp_model, - dw, - token, - confidence_threshold, - s->spec_row_logits, - s->dspark_markov_bias, - s->dspark_conf_features, - s->dspark_conf_features_cap, - markov_proposal, - &markov_proposal_len, - &confidence_len, - &confidence_prefix_len, - reuse_confidence0_markov, - &confidence0); - DS4_DSPARK_PROP_ADD(propose_markov_ms, markov_t0); - confidence_ok = markov_ok; - } else if (markov_ready) { - const uint64_t logits_count = - (uint64_t)dw->block_size * (uint64_t)DS4_N_VOCAB; - if (logits_count != 0 && - logits_count <= (uint64_t)SIZE_MAX / sizeof(float)) { - const double markov_t0 = DS4_DSPARK_PROP_T0(); - const uint64_t logits_bytes = logits_count * sizeof(float); - float *logits = xmalloc((size_t)logits_bytes); - float *markov_state = - xmalloc((size_t)dw->markov_rank * sizeof(markov_state[0])); - float *markov_bias = - xmalloc((size_t)DS4_N_VOCAB * sizeof(markov_bias[0])); - markov_ok = - ds4_gpu_tensor_read(s->graph.spec_logits, - 0, - logits, - logits_bytes) != 0 && - dspark_apply_markov_greedy_probe(logits, - &s->engine->mtp_model, - dw, - token, - markov_state, - markov_bias, - markov_proposal, - &markov_proposal_len); - if (markov_ok && probe_log) { - /* Runtime only needs the greedy proposal. Keep the GPU - * writeback for probe mode, where spec_logits may be - * inspected after Markov correction. */ - markov_ok = - ds4_gpu_tensor_write(s->graph.spec_logits, - 0, - logits, - logits_bytes) != 0; - } - free(markov_bias); - free(markov_state); - free(logits); - DS4_DSPARK_PROP_ADD(propose_markov_ms, markov_t0); - } - } - const bool confidence_ready = - !lazy_runtime_confidence && - markov_ok && - dspark_confidence_probe_ready(dw); - if (confidence_ready) { - const uint64_t hidden_count = - (uint64_t)dw->block_size * (uint64_t)DS4_N_EMBD; - const uint64_t feature_count = - (uint64_t)DS4_N_EMBD + (uint64_t)dw->markov_rank; - if (hidden_count != 0 && - hidden_count <= (uint64_t)SIZE_MAX / sizeof(float) && - feature_count <= (uint64_t)SIZE_MAX / sizeof(float)) { - const double confidence_t0 = DS4_DSPARK_PROP_T0(); - const uint64_t hidden_bytes = hidden_count * sizeof(float); - float *hidden_rows = xmalloc((size_t)hidden_bytes); - float *markov_state = - xmalloc((size_t)dw->markov_rank * sizeof(markov_state[0])); - float *features = - xmalloc((size_t)feature_count * sizeof(features[0])); - float *confidence_logits = - xmalloc((size_t)dw->block_size * sizeof(confidence_logits[0])); - confidence_ok = - ds4_gpu_tensor_read(s->graph.batch_ffn_norm, - 0, - hidden_rows, - hidden_bytes) != 0 && - dspark_eval_confidence_probe(confidence_logits, - hidden_rows, - &s->engine->mtp_model, - dw, - token, - markov_proposal, - markov_state, - features, - &confidence_len); - if (confidence_ok && confidence_len != 0) { - confidence0 = confidence_logits[0]; - confidence_prefix_len = - dspark_confident_prefix_len(confidence_logits, - confidence_len, - confidence_threshold); - } - free(confidence_logits); - free(features); - free(markov_state); - free(hidden_rows); - DS4_DSPARK_PROP_ADD(propose_confidence_ms, confidence_t0); - } - } - if (markov_ok && markov_proposal_len != 0) { - uint32_t proposal_len = markov_proposal_len; - if (confidence_threshold > 0.0f) { - proposal_len = confidence_ok ? confidence_prefix_len : 0; - } - s->dspark_draft_len = proposal_len; - if (s->dspark_draft_len > DS4_DSPARK_MAX_BLOCK_SIZE) { - s->dspark_draft_len = DS4_DSPARK_MAX_BLOCK_SIZE; - } - for (uint32_t i = 0; i < s->dspark_draft_len; i++) { - s->dspark_draft_tokens[i] = markov_proposal[i]; - } - s->dspark_draft_valid = s->dspark_draft_len != 0; - } - if (confidence_ok && confidence_len != 0) { - s->dspark_last_confidence0 = confidence0; - s->dspark_last_confidence0_valid = true; - } - bool fake_argmax_ok = false; - if (!s->dspark_draft_valid && fake_argmax_enabled) { - s->dspark_draft_tokens[0] = sample_argmax(s->logits, DS4_N_VOCAB); - s->dspark_draft_len = 1; - s->dspark_draft_valid = true; - fake_argmax_ok = true; - } - if (probe_log) { - const char *stage0_status = - stage0_ok ? "ok" : - !capture_ok ? "capture-invalid" : - !stage0_ready ? "unavailable" : "failed"; - const char *draft_block_status = - stage_input_ok ? "ok" : - !stage0_ok ? "stage0-not-ready" : - !draft_block_ready ? "unavailable" : - !stage_input_ready ? "stage-input-not-ready" : "failed"; - const char *stage_input_status = - stage_input_ok ? "ok" : - !stage0_ok ? "stage0-not-ready" : - !draft_block_ready ? "draft-block-not-ready" : - !stage_input_ready ? "unavailable" : "failed"; - const char *draft_cache_status = - draft_cache_ready ? "ok" : "unavailable"; - const char *cache_window_status = - !draft_cache_ready ? "draft-cache-not-ready" : - cache_window_ok ? "ok" : - initial_cache_ready ? "seed-failed" : "invalid"; - const char *initial_cache_status = - initial_cache_ok ? "ok" : - !batch_capture_ok ? "batch-capture-invalid" : - !draft_cache_ready ? "draft-cache-not-ready" : - !initial_cache_ready ? "unsupported-window" : "failed"; - const char *noncausal_attn_status = - noncausal_attn_ok ? "ok" : - !stage_input_ok ? "stage-input-not-ready" : - !draft_cache_ready ? "draft-cache-not-ready" : - !noncausal_attn_ready ? "unavailable" : "failed"; - const char *stage_block_status = - stage_block_ok ? "ok" : - !stage_input_ok ? "stage-input-not-ready" : - !draft_cache_ready ? "draft-cache-not-ready" : - !stage_block_ready ? "unavailable" : "failed"; - const char *stage_chain_status = - stage_chain_ok ? "ok" : - !stage_input_ok ? "stage-input-not-ready" : - !draft_cache_ready ? "draft-cache-not-ready" : - !cache_window_ok ? "cache-window-not-ready" : - !stage_chain_ready ? "unavailable" : - stage_chain_done != 0 ? "partial" : "failed"; - const char *base_logits_status = - base_logits_ok ? "ok" : - !stage_chain_ok ? "stage-chain-not-ready" : - !base_logits_ready ? "unavailable" : "failed"; - const char *markov_status = - markov_ok ? "ok" : - !base_logits_ok ? "base-logits-not-ready" : - !markov_ready ? "unavailable" : "failed"; - const char *confidence_status = - confidence_ok ? "ok" : - !markov_ok ? "markov-not-ready" : - !confidence_ready ? "unavailable" : "failed"; - const char *fake_argmax_status = - fake_argmax_ok ? "ok" : - !fake_argmax_enabled ? "disabled" : - s->dspark_draft_valid ? "real-proposal-present" : "skipped"; - fprintf(stderr, - "ds4: DSpark proposer pending token=%d pos=%u capture=%s " - "batch_capture=%s batch_start=%u batch_tokens=%u " - "stage0=%s draft_block=%s stage_input=%s draft_cache=%s " - "initial_cache=%s initial_cache_rows=%u " - "cache_window=%s cache_token_start=%u " - "cache_raw_start=%u cache_len=%u " - "noncausal_attn=%s stage_block=%s stage_chain=%s " - "stage_chain_done=%u/%u stage_raw_start=%u cache_rows=%u " - "base_logits=%s markov=%s " - "proposal_len=%u proposal0=%d fake_argmax=%s confidence=%s " - "confidence_len=%u confidence_prefix=%u " - "confidence_threshold=%.3f confidence0=%.3f block=%u " - "tensors=%u missing=%u invalid=%u metadata_errors=%u\n", - token, - pos, - capture_ok ? "current" : "invalid", - batch_capture_ok ? "current" : "invalid", - s->graph.dspark_capture_batch_start, - s->graph.dspark_capture_batch_tokens, - stage0_status, - draft_block_status, - stage_input_status, - draft_cache_status, - initial_cache_status, - initial_cache_rows, - cache_window_status, - s->graph.dspark_cache_token_start, - s->graph.dspark_cache_start, - s->graph.dspark_cache_len, - noncausal_attn_status, - stage_block_status, - stage_chain_status, - stage_chain_done, - dw->n_stages, - stage_cache_start, - stage_cache_rows, - base_logits_status, - markov_status, - s->dspark_draft_len, - s->dspark_draft_len ? s->dspark_draft_tokens[0] : -1, - fake_argmax_status, - confidence_status, - confidence_len, - confidence_prefix_len, - confidence_threshold, - confidence0, - dw->block_size, - dw->present_tensors, - dw->missing_tensors, - dw->invalid_tensors, - dw->metadata_errors); - } - } - if (time_enabled) { - const double propose_ms = (now_sec() - stats_t0) * 1000.0; - if (scheduler_enabled) s->dspark_last_propose_ms = propose_ms; - if (stats_enabled) s->dspark_stats.propose_ms += propose_ms; - } -#undef DS4_DSPARK_PROP_ADD -#undef DS4_DSPARK_PROP_T0 - return s->dspark_draft_valid; -} - -static void ds4_session_prepare_support_draft(ds4_session *s, - int token, - uint32_t pos, - bool probe_mtp, - bool mtp_probe_log) { - if (!s || !probe_mtp || !s->engine) return; - - switch (s->engine->support_kind) { - case DS4_SUPPORT_MTP_LEGACY: - (void)ds4_session_prepare_legacy_mtp_draft(s, token, pos, mtp_probe_log); - break; - case DS4_SUPPORT_DSPARK: - (void)ds4_session_prepare_dspark_draft(s, token, pos); - break; - case DS4_SUPPORT_NONE: - default: - break; - } -} + if (!s || ds4_session_is_cpu(s)) return; + if (DS4_MODEL_FAMILY != DS4_MODEL_FAMILY_DEEPSEEK4) return; + if (!s->graph.batch_hc_mix || !s->graph.batch_flat_hc) return; + if (!s->engine->weights.layer[0].hc_attn_fn) return; + (void)metal_graph_warmup_prefill_kernels(&s->graph, + &s->engine->model, + &s->engine->weights, + 32); +#else + (void)s; #endif +} #ifndef DS4_NO_GPU static bool ds4_session_dspark_capture_current(const ds4_session *s) { @@ -35515,6 +49010,87 @@ static int ds4_session_eval_internal(ds4_session *s, int token, bool probe_mtp, return 1; #else ds4_engine *e = s->engine; + if (ds4_session_is_glm(s)) { + /* TP worker under GLM MTP: run the full speculative cycle off the + * mirrored EVAL frame so drafts, verify batches, and gate traffic + * stay in lockstep with the leader's cycle. */ + if (!s->glm_spec_inside && s->glm_graph_ready && + getenv("DS4_GLM_MTP") != NULL && DS4_N_NEXTN_PREDICT != 0 && + e->tp.active && e->tp.rank != 0) { + int acc[2]; + const int rc = ds4_session_glm_spec_cycle(s, token, acc, 2, err, errlen); + (void)probe_mtp; + return rc < 0 ? 1 : 0; + } + if (!s->glm_graph_ready) { + if (errlen) snprintf(err, errlen, "%s GLM graph is not initialized", + ds4_backend_name(e->backend)); + return 1; + } + if ((uint32_t)s->checkpoint.len >= s->glm_graph.ctx_size) { + if (errlen) snprintf(err, errlen, "GLM Metal context reached (%u)", + s->glm_graph.ctx_size); + return 1; + } + const uint32_t pos = (uint32_t)s->checkpoint.len; + const bool updates_dense = + glm_graph_decode_updates_dense_cache(&s->glm_graph, pos, s->logits); + if (!glm_graph_forward_token(&s->glm_graph, + &e->model, + &e->weights, + token, + NULL, + pos, + NULL, + s->logits)) + { + if (errlen) snprintf(err, errlen, "%s GLM decode failed", + ds4_backend_name(e->backend)); + s->checkpoint_valid = false; + s->mtp_draft_valid = false; + ds4_session_glm_cap_dense_cache(s); + return 1; + } + token_vec_push(&s->checkpoint, token); + s->checkpoint_valid = true; + s->mtp_draft_valid = false; + if (updates_dense) ds4_session_glm_note_dense_cache(s, pos, 1); + /* MTP acceptance probe (timing/quality only, output untouched): + * after each committed token, draft the token two positions ahead + * from the nextn block and score it against the next greedy pick. + * Both TP ranks must set the env (the draft's routed experts ride + * a big-gate exchange). */ + if (getenv("DS4_GLM_MTP_PROBE") && DS4_N_NEXTN_PREDICT != 0) { + static int probe_hits, probe_total, probe_have, probe_draft; + static uint32_t probe_min_pos = UINT32_MAX; + int nmax = 0; + float nbest = s->logits[0]; + for (uint32_t i = 1; i < DS4_N_VOCAB; i++) { + if (s->logits[i] > nbest) { nbest = s->logits[i]; nmax = (int)i; } + } + if (probe_have) { + probe_total++; + probe_hits += (probe_draft == nmax); + if ((probe_total % 16) == 0) { + fprintf(stderr, "ds4: glm mtp probe: %d/%d hits (%.1f%%)\n", + probe_hits, probe_total, + 100.0 * probe_hits / probe_total); + } + } + if (probe_min_pos == UINT32_MAX) probe_min_pos = pos; + int draft = -1; + if (glm_graph_mtp_step(&s->glm_graph, &e->model, &e->weights, + nmax, pos, probe_min_pos, &draft)) { + probe_draft = draft; + probe_have = 1; + } else { + probe_have = 0; + fprintf(stderr, "ds4: glm mtp probe: draft step failed at pos %u\n", pos); + } + } + (void)probe_mtp; + return 0; + } const bool mtp_probe_log = getenv("DS4_MTP_PROBE") != NULL; if (probe_mtp && e->support_kind == DS4_SUPPORT_MTP_LEGACY) { ds4_session_note_legacy_mtp_probe(s, token, mtp_probe_log); @@ -35571,8 +49147,8 @@ static int ds4_session_eval_probe_tp(ds4_session *s, int token, bool probe_mtp, return 1; } #endif - /* Vocab-split head: merge the halves after every eval. */ - if (rc == 0 && s->engine && s->engine->tp.active && !s->engine->tp.null_split) { + /* Vocab-split head: merge the halves after every eval (DS4 only). */ + if (rc == 0 && s->engine && s->engine->tp.active && s->engine->tp.vocab_split) { const uint32_t vhalf = (uint32_t)DS4_N_VOCAB / 2u; if (s->engine->tp.rank == 0) { if (!ds4_tp_recv_logits_half(s->engine->tp.ctx, s->logits + vhalf, vhalf)) { @@ -35733,8 +49309,8 @@ static int ds4_session_eval_dspark_speculative_argmax( bool verifier_may_have_mutated = false; bool tp_verify_sent = false; if (ok && ds4_session_tp_leader(s)) { - /* Announce the block before mutating anything: the worker runs the - * same replicated verify and then waits for our commit decision. */ + /* Announce the block before mutating anything: the worker runs its + * half of the verify and then waits for our commit decision. */ if (!ds4_tp_send_verify(e->tp.ctx, drafts, (uint32_t)draft_n)) { snprintf(err, errlen, "tp: verify send failed"); spec_frontier_free(&frontier); @@ -35922,7 +49498,7 @@ static int ds4_session_eval_dspark_speculative_argmax( } /* Vocab-split head: the last replay eval produced only our logits half; * merge the worker's before installing them as the session logits. */ - if (replayed_drafts > 0 && tp_verify_sent && !e->tp.null_split) { + if (replayed_drafts > 0 && tp_verify_sent && e->tp.vocab_split) { const uint32_t vhalf = (uint32_t)DS4_N_VOCAB / 2u; if (!ds4_tp_recv_logits_half(e->tp.ctx, row_logits + vhalf, vhalf)) { snprintf(err, errlen, "tp: replay logits half missing"); @@ -35966,9 +49542,9 @@ static int ds4_session_eval_dspark_speculative_argmax( } #endif -/* TP worker side of a mirrored speculative-verify block. Runs the same - * replicated (ungated) batch verify the leader runs — purely for its KV, - * compressor and indexer side effects — then obeys the leader's commit +/* TP worker side of a mirrored speculative-verify block. Runs its half of the + * same batch verify as the leader, including per-layer combine gates, purely + * for KV, compressor, and indexer side effects; then it obeys the commit * frame: keep the pushed rows, or roll back and replay the accepted prefix * through the gated single-token decode in lockstep with the leader. */ int ds4_session_tp_spec_cycle(ds4_session *s, const int *drafts, int draft_n, @@ -36070,7 +49646,7 @@ int ds4_session_tp_spec_cycle(ds4_session *s, const int *drafts, int draft_n, } if (replay_n > 0) { s->checkpoint_valid = true; - if (!e->tp.null_split) { + if (e->tp.vocab_split) { const uint32_t vhalf = (uint32_t)DS4_N_VOCAB / 2u; if (!ds4_tp_send_logits_half(e->tp.ctx, logits + vhalf, vhalf)) { free(scratch); @@ -36083,7 +49659,6 @@ int ds4_session_tp_spec_cycle(ds4_session *s, const int *drafts, int draft_n, return 0; #endif } -#endif /* Speculative decode state machine: * 1. commit the normal target token and use its logits to validate draft[0]; @@ -36111,6 +49686,35 @@ int ds4_session_eval_speculative_argmax(ds4_session *s, int first_token, accepted[0] = first_token; return 1; } + if (ds4_session_is_glm(s)) { + (void)max_tokens; + (void)eos_token; + if (!accepted || accepted_cap <= 0) return 0; +#ifndef DS4_NO_GPU + if (getenv("DS4_GLM_MTP") != NULL && DS4_N_NEXTN_PREDICT != 0 && + s->glm_graph_ready) { + if (ds4_session_tp_leader(s)) { + ds4_engine *ge = s->engine; + if (!ds4_tp_send_eval(ge->tp.ctx, ++ge->tp.eval_seq, first_token)) { + snprintf(err, errlen, "tp: worker eval send failed"); + return -1; + } + } + int rc = ds4_session_glm_spec_cycle(s, first_token, accepted, + accepted_cap, err, errlen); +#if defined(__APPLE__) + if (rc >= 0 && s->engine && s->engine->tp.active && ds4_gpu_tp_failed()) { + snprintf(err, errlen, "tp: gate transport failed"); + return -1; + } +#endif + return rc; + } +#endif + if (ds4_session_eval(s, first_token, err, errlen) != 0) return -1; + accepted[0] = first_token; + return 1; + } #ifdef DS4_NO_GPU (void)s; (void)first_token; (void)max_tokens; (void)eos_token; (void)accepted; (void)accepted_cap; @@ -36137,6 +49741,11 @@ int ds4_session_eval_speculative_argmax(ds4_session *s, int first_token, bool can_prepare_support_draft = !strict_dspark && first_token != eos_token && max_tokens > 1 && accepted_cap > 1; + if (can_prepare_support_draft && + e->tp.active && + e->support_kind == DS4_SUPPORT_MTP_LEGACY) { + can_prepare_support_draft = false; + } bool dspark_tail_skip = false; if (can_prepare_support_draft && e->support_kind == DS4_SUPPORT_DSPARK && ds4_dspark_scheduler_enabled()) { @@ -36764,6 +50373,9 @@ void ds4_session_invalidate(ds4_session *s) { s->checkpoint.len = 0; s->mtp_draft_valid = false; ds4_session_dspark_capture_invalidate(s); +#ifndef DS4_NO_GPU + ds4_session_glm_reset_dense_cache(s); +#endif } void ds4_session_rewind(ds4_session *s, int pos) { @@ -36773,6 +50385,9 @@ void ds4_session_rewind(ds4_session *s, int pos) { s->checkpoint.len = pos; s->mtp_draft_valid = false; ds4_session_dspark_capture_invalidate(s); +#ifndef DS4_NO_GPU + ds4_session_glm_cap_dense_cache(s); +#endif } int ds4_session_pos(ds4_session *s) { diff --git a/ds4.h b/ds4.h index a3b8587f..085c108f 100644 --- a/ds4.h +++ b/ds4.h @@ -91,11 +91,12 @@ typedef struct { bool debug; } ds4_distributed_options; -/* Tensor parallelism: two identical machines run the full model in lockstep - * and split the heavy per-layer matvecs, exchanging 16KB partial sums at two - * gates per layer (see misc/METAL_TENSOR_PARALLELISM.md). The leader owns - * prompt/sampling/output and listens; the worker dials in and mirrors every - * session sync/eval. */ +/* Tensor parallelism: two identical machines run the model in lockstep and + * split the heavy per-layer matvecs, exchanging partial sums at gates inside + * the graph (see misc/METAL_TENSOR_PARALLELISM.md). Each rank keeps one + * contiguous half of the routed experts resident; dense and shared weights + * remain replicated. The leader owns prompt/sampling and listens; the worker + * dials in and mirrors every session sync/eval. */ typedef enum { DS4_TP_NONE = 0, DS4_TP_LEADER, @@ -123,6 +124,7 @@ typedef struct { const char *mtp_path; ds4_backend backend; int n_threads; + int context_size; uint32_t prefill_chunk; int mtp_draft_tokens; float mtp_margin; @@ -133,13 +135,17 @@ typedef struct { int power_percent; uint32_t ssd_streaming_cache_experts; uint64_t ssd_streaming_cache_bytes; + uint32_t ssd_streaming_full_layers; uint32_t ssd_streaming_preload_experts; uint64_t simulate_used_memory_bytes; bool warm_weights; bool quality; bool ssd_streaming; bool ssd_streaming_cold; + bool ssd_streaming_full_layers_set; bool inspect_only; + bool first_token_test; + bool metal_graph_test; bool load_slice; uint32_t load_layer_start; uint32_t load_layer_end; @@ -180,18 +186,34 @@ int ds4_engine_power(ds4_engine *e); int ds4_engine_set_power(ds4_engine *e, int power_percent); const char *ds4_engine_model_name(ds4_engine *e); int ds4_engine_layer_count(ds4_engine *e); +/* Decode gate schedule for the TP transport; see ds4_tp_identity. */ +void ds4_engine_tp_gate_schedule(ds4_engine *e, + uint32_t *start, + uint32_t *step, + uint32_t *per_token); uint32_t ds4_engine_layer_compress_ratio(ds4_engine *e, uint32_t layer); uint64_t ds4_engine_hidden_f32_values(ds4_engine *e); int ds4_engine_embd_dim(ds4_engine *e); uint64_t ds4_engine_model_bytes(ds4_engine *e); +int ds4_engine_tp_vocab_split(ds4_engine *e); +bool ds4_engine_glm_layer_payload_bytes(ds4_engine *e, + uint32_t layer, + uint32_t full_live, + uint32_t key_dim, + uint32_t value_dim, + uint32_t compact_live, + uint32_t index_live, + uint64_t *out); /* Stable id for cache compatibility. 0 is the original Flash shape, so old * KV files with the previously-zero reserved byte remain Flash-compatible; * Pro and later shapes must use nonzero ids. */ int ds4_engine_model_id(ds4_engine *e); +bool ds4_engine_is_glm_dsa(ds4_engine *e); const char *ds4_backend_name(ds4_backend backend); bool ds4_think_mode_enabled(ds4_think_mode mode); const char *ds4_think_mode_name(ds4_think_mode mode); const char *ds4_think_max_prefix(void); +const char *ds4_glm_reasoning_effort_text(ds4_think_mode mode); uint32_t ds4_think_max_min_context(void); ds4_think_mode ds4_think_mode_for_context(ds4_think_mode mode, int ctx_size); /* Uses the active model shape selected by ds4_engine_open(); call after opening @@ -201,6 +223,11 @@ ds4_context_memory ds4_context_memory_estimate_with_prefill( ds4_backend backend, int ctx_size, uint32_t prefill_chunk); +ds4_context_memory ds4_context_memory_estimate_with_prefill_mode( + ds4_backend backend, + int ctx_size, + uint32_t prefill_chunk, + bool ssd_streaming); bool ds4_log_is_tty(FILE *fp); void ds4_log(FILE *fp, ds4_log_type type, const char *fmt, ...); int ds4_engine_generate_argmax(ds4_engine *e, const ds4_tokens *prompt, @@ -244,6 +271,11 @@ void ds4_chat_append_assistant_prefix(ds4_engine *e, ds4_tokens *tokens, ds4_thi char *ds4_token_text(ds4_engine *e, int token, size_t *len); int ds4_token_eos(ds4_engine *e); +bool ds4_token_is_stop(ds4_engine *e, int token); +bool ds4_token_is_thinking_control(ds4_engine *e, int token); +bool ds4_token_is_stop_for_think_mode(ds4_engine *e, + int token, + ds4_think_mode mode); int ds4_token_user(ds4_engine *e); int ds4_token_assistant(ds4_engine *e); @@ -298,13 +330,16 @@ int ds4_session_top_logprobs(ds4_session *s, ds4_token_score *out, int k); int ds4_session_token_logprob(ds4_session *s, int token, ds4_token_score *out); int ds4_session_copy_logits(ds4_session *s, float *out, int cap); int ds4_session_set_logits(ds4_session *s, const float *logits, int n); +/* Pay the one-time first-submission GPU cost outside any measured window; + * used by the TP worker right after session create (no-op on CPU/GLM). */ +void ds4_session_gpu_warmup(ds4_session *s); int ds4_session_eval(ds4_session *s, int token, char *err, size_t errlen); int ds4_session_eval_speculative_argmax(ds4_session *s, int first_token, int max_tokens, int eos_token, int *accepted, int accepted_cap, char *err, size_t errlen); -/* TP worker side of a mirrored speculative-verify block: run the replicated - * batch verify for its KV side effects, then obey the leader's commit frame +/* TP worker side of a mirrored speculative-verify block: run its half of the + * batch verify for KV side effects, then obey the leader's commit frame * (keep, or roll back and replay). Only called from ds4_tp_worker_run. */ int ds4_session_tp_spec_cycle(ds4_session *s, const int *drafts, int draft_n, char *err, size_t errlen); diff --git a/ds4_agent.c b/ds4_agent.c index 1c520915..48f9d1e0 100644 --- a/ds4_agent.c +++ b/ds4_agent.c @@ -51,11 +51,15 @@ typedef struct { const char *prompt; const char *system; const char *trace_path; + bool raw_prompt; int n_predict; int ctx_size; float temperature; float top_p; float min_p; + bool temperature_set; + bool top_p_set; + bool min_p_set; uint64_t seed; ds4_think_mode think_mode; } agent_generation_options; @@ -122,8 +126,8 @@ typedef struct { bool power_requested; int requested_power; int progress_base; + bool progress_direct; double progress_started_at; - int last_system_prompt_reminder_at; char *cmd_text; agent_status status; char *out; @@ -223,6 +227,11 @@ typedef struct { int cap; } agent_tool_calls; +typedef enum { + AGENT_TOOL_SYNTAX_DSML, + AGENT_TOOL_SYNTAX_GLM, +} agent_tool_syntax; + typedef enum { AGENT_DSML_SEARCH, AGENT_DSML_STRUCTURAL, @@ -232,6 +241,7 @@ typedef enum { } agent_dsml_state; typedef struct { + agent_tool_syntax syntax; agent_dsml_state state; char search_tail[64]; size_t search_len; @@ -244,6 +254,7 @@ typedef struct { bool param_is_string; size_t param_value_start; bool param_close_prefix; + bool glm_after_call; agent_tool_calls calls; char error[160]; } agent_dsml_parser; @@ -288,6 +299,7 @@ typedef struct { typedef struct { agent_token_renderer *renderer; agent_dsml_parser *parser; + agent_tool_syntax syntax; agent_tool_visualizer viz; bool in_think; bool dsml_active; @@ -318,6 +330,7 @@ static void worker_apply_pending_power(agent_worker *w); static void agent_trace(agent_worker *w, const char *fmt, ...); static void agent_trace_text(agent_worker *w, const char *label, const char *text, size_t len); +static bool agent_stream_wants_greedy_sampling(const agent_stream_renderer *sr); static void agent_publish_system_status(agent_worker *w, const char *msg); static int agent_web_confirm(void *privdata, const char *message, char *err, size_t err_len); @@ -327,6 +340,29 @@ static bool agent_preflight_edit_old(agent_worker *w, const agent_tool_call *cal static int agent_worker_sync_tokens(agent_worker *w, const ds4_tokens *tokens, bool publish_progress, char *err, size_t err_len); +static int agent_read_default_lines(agent_worker *w); + +static agent_tool_syntax agent_tool_syntax_for_engine(ds4_engine *engine) { + return ds4_engine_is_glm_dsa(engine) ? AGENT_TOOL_SYNTAX_GLM + : AGENT_TOOL_SYNTAX_DSML; +} + +static bool agent_tool_syntax_assistant_turn_uses_eos(agent_tool_syntax syntax) { + return syntax != AGENT_TOOL_SYNTAX_GLM; +} + +static void agent_worker_append_assistant_turn_end(agent_worker *w) { + if (agent_tool_syntax_assistant_turn_uses_eos( + agent_tool_syntax_for_engine(w->engine))) + ds4_tokens_push(&w->transcript, ds4_token_eos(w->engine)); +} + +static int agent_worker_effective_ctx_size(const agent_worker *w) { + int ctx = 0; + if (w && w->session) ctx = ds4_session_ctx(w->session); + if (ctx <= 0 && w && w->cfg) ctx = w->cfg->gen.ctx_size; + return ctx; +} /* ============================================================================ * Small Utilities And Command-Line Parsing @@ -424,6 +460,16 @@ static int parse_int(const char *s, const char *opt) { return (int)v; } +static int parse_nonnegative_int(const char *s, const char *opt) { + char *end = NULL; + long v = strtol(s, &end, 10); + if (s[0] == '\0' || *end != '\0' || v < 0 || v > INT32_MAX) { + fprintf(stderr, "ds4-agent: invalid value for %s: %s\n", opt, s); + exit(2); + } + return (int)v; +} + static bool parse_power_percent(const char *arg, int *out) { char *end = NULL; long v = strtol(arg, &end, 10); @@ -558,6 +604,8 @@ static agent_config parse_options(int argc, char **argv) { c.gen.prompt = need_arg(&i, argc, argv, arg); } else if (!strcmp(arg, "--non-interactive")) { c.non_interactive = true; + } else if (!strcmp(arg, "--raw") || !strcmp(arg, "--raw-prompt")) { + c.gen.raw_prompt = true; } else if (!strcmp(arg, "-sys") || !strcmp(arg, "--system")) { c.gen.system = need_arg(&i, argc, argv, arg); } else if (!strcmp(arg, "--trace")) { @@ -576,10 +624,13 @@ static agent_config parse_options(int argc, char **argv) { c.gen.n_predict = parse_int(need_arg(&i, argc, argv, arg), arg); } else if (!strcmp(arg, "--temp")) { c.gen.temperature = parse_float_range(need_arg(&i, argc, argv, arg), arg, 0.0f, 100.0f); + c.gen.temperature_set = true; } else if (!strcmp(arg, "--top-p")) { c.gen.top_p = parse_float_range(need_arg(&i, argc, argv, arg), arg, 0.0f, 1.0f); + c.gen.top_p_set = true; } else if (!strcmp(arg, "--min-p")) { c.gen.min_p = parse_float_range(need_arg(&i, argc, argv, arg), arg, 0.0f, 1.0f); + c.gen.min_p_set = true; } else if (!strcmp(arg, "--seed")) { c.gen.seed = parse_u64(need_arg(&i, argc, argv, arg), arg); } else if (!strcmp(arg, "--think")) { @@ -617,6 +668,10 @@ static agent_config parse_options(int argc, char **argv) { } c.engine.ssd_streaming_cache_experts = experts; c.engine.ssd_streaming_cache_bytes = bytes; + } else if (!strcmp(arg, "--ssd-streaming-full-layers")) { + int v = parse_nonnegative_int(need_arg(&i, argc, argv, arg), arg); + c.engine.ssd_streaming_full_layers = (uint32_t)v; + c.engine.ssd_streaming_full_layers_set = true; } else if (!strcmp(arg, "--ssd-streaming-preload-experts")) { int v = parse_int(need_arg(&i, argc, argv, arg), arg); if (v <= 0) { @@ -675,24 +730,22 @@ static agent_config parse_options(int argc, char **argv) { fprintf(stderr, "ds4-agent: --role worker is a serving mode; start workers with ./ds4\n"); exit(2); } + if (c.gen.raw_prompt && (!c.non_interactive || !c.gen.prompt)) { + fprintf(stderr, + "ds4-agent: --raw-prompt is only supported with --non-interactive -p\n"); + exit(2); + } return c; } -static void log_context_memory(ds4_backend backend, - int ctx_size, - uint32_t prefill_chunk) { - ds4_context_memory m = - ds4_context_memory_estimate_with_prefill(backend, - ctx_size, - prefill_chunk); - fprintf(stderr, - "ds4-agent: context buffers %.2f MiB (ctx=%d, backend=%s, prefill_chunk=%u, raw_kv_rows=%u, compressed_kv_rows=%u)\n", - (double)m.total_bytes / (1024.0 * 1024.0), - ctx_size, - ds4_backend_name(backend), - m.prefill_cap, - m.raw_cap, - m.comp_cap); +static void agent_apply_model_sampling_defaults( + ds4_engine *engine, + agent_generation_options *gen) { + if (!engine || !gen || !ds4_engine_is_glm_dsa(engine)) return; + + if (!gen->temperature_set) gen->temperature = 1.0f; + if (!gen->top_p_set) gen->top_p = 0.95f; + if (!gen->min_p_set) gen->min_p = 0.0f; } static ds4_think_mode effective_think_mode(const agent_config *cfg) { @@ -717,17 +770,20 @@ static const char agent_tools_prompt_intro[] = "\n\n" "Tool calls are not allowed inside ; finish thinking before emitting DSML.\n\n" "String parameters use raw text and string=\"true\". Numbers and booleans use JSON text and string=\"false\".\n\n" - "Read defaults to a bounded chunk: path alone returns the first 500 lines, not the whole file. " - "If read says more lines are available, call more with count= to read the next chunk; " - "more defaults to the next 500 lines. " + "Read defaults to a context-sized bounded chunk, not the whole file. " + "For first looks at large files, prefer read with explicit max_lines around 80-160; " + "if read says more lines are available, call more with count= to read the next chunk. " "The read result also reports continue_offset=N, which is the next start_line if you need to jump manually. " "If the user explicitly asks you to read a complete file into context, call read with whole=true. " "A whole-file read may fail if the result would not fit the current context; then explain that and use chunks.\n\n"; +#define AGENT_EDIT_TARGET_RULE \ + "When editing files, state the target filename before the edit; for the edit tool, put path first." + static const char agent_tools_prompt_edit_line[] = "## Editing files\n\n" + AGENT_EDIT_TARGET_RULE "\n" "Use write for new files or deliberate whole-file replacement. Use edit with path, old, and new for changes. " - "For edit, always put the edited file path as the first parameter. " "The old text must match exactly once in the current file; otherwise edit fails for safety.\n" "For large replacements, prefer anchored old text: write the first lines, then [upto], then the final lines. " "The tool replaces everything from the head through the tail. If the head or tail is ambiguous, the edit fails.\n" @@ -945,7 +1001,7 @@ static const char agent_tools_prompt_after_edit[] = "- Work in a way that preserves the current system configuration integrity, " "unless explicitly asked otherwise by the user.\n"; -static char *agent_build_tools_prompt(void) { +static char *agent_build_dsml_tools_prompt(void) { const char *edit = agent_tools_prompt_edit_line; size_t a = strlen(agent_tools_prompt_intro); size_t b = strlen(edit); @@ -957,6 +1013,63 @@ static char *agent_build_tools_prompt(void) { return out; } +static const char agent_glm_tools_prompt_intro[] = + "You are a coding agent running in a local workspace. Use tools for local file and system work. " + "Avoid printing large file contents or large code blocks as answers; create or edit files with tools, " + "then summarize results briefly.\n\n" + "# Tools\n\n" + "You may call one or more functions to assist with the user query.\n\n" + "You are provided with function signatures within XML tags:\n" + "\n"; + +static const char agent_glm_tools_prompt_after_schemas[] = + "\n\n" + "For a function call, output the function name and arguments within exactly this XML format:\n" + "{function-name}{arg-key-1}{arg-value-1}" + "{arg-key-2}{arg-value-2}...\n\n" + "Tool calls are not allowed inside ; finish thinking before emitting .\n\n" + "# Rules\n\n" + "- Use strict native GLM tool-call syntax with , , and tags.\n" + "- read path alone returns a context-sized bounded chunk, not the whole file; for first looks at large files, prefer max_lines around 80-160.\n" + "- If read says more lines are available, call more with count= to read the next chunk.\n" + "- Use whole=true only when the user explicitly asks for the complete file contents or when bounded chunks are insufficient for the task; add raw=true only when line numbers would corrupt the payload.\n" + "- " AGENT_EDIT_TARGET_RULE "\n" + "- Use edit with exact old text and replacement new text; old may contain one [upto] marker between unique anchors.\n" + "- For long bash jobs, pass refresh_sec and then poll with bash_status or stop with bash_stop.\n" + "- Preserve the current system configuration unless the user explicitly asks otherwise.\n"; + +static const char agent_glm_tool_schemas[] = + "{\"type\":\"function\",\"function\":{\"name\":\"google_search\",\"description\":\"Search web pages.\",\"parameters\":{\"type\":\"object\",\"properties\":{\"query\":{\"type\":\"string\"}},\"required\":[\"query\"]}}}\n" + "{\"type\":\"function\",\"function\":{\"name\":\"visit_page\",\"description\":\"Read a URL in browser.\",\"parameters\":{\"type\":\"object\",\"properties\":{\"url\":{\"type\":\"string\"}},\"required\":[\"url\"]}}}\n" + "{\"type\":\"function\",\"function\":{\"name\":\"bash\",\"description\":\"Run a shell command.\",\"parameters\":{\"type\":\"object\",\"properties\":{\"command\":{\"type\":\"string\"},\"timeout_sec\":{\"type\":\"number\"},\"refresh_sec\":{\"type\":\"number\"}},\"required\":[\"command\"]}}}\n" + "{\"type\":\"function\",\"function\":{\"name\":\"bash_status\",\"description\":\"Check a bash job.\",\"parameters\":{\"type\":\"object\",\"properties\":{\"job\":{\"type\":\"number\"},\"pid\":{\"type\":\"number\"},\"refresh_sec\":{\"type\":\"number\"}},\"required\":[\"job\"]}}}\n" + "{\"type\":\"function\",\"function\":{\"name\":\"bash_stop\",\"description\":\"Stop a bash job.\",\"parameters\":{\"type\":\"object\",\"properties\":{\"job\":{\"type\":\"number\"},\"pid\":{\"type\":\"number\"},\"refresh_sec\":{\"type\":\"number\"}},\"required\":[\"job\"]}}}\n" + "{\"type\":\"function\",\"function\":{\"name\":\"read\",\"description\":\"Read a text file/range.\",\"parameters\":{\"type\":\"object\",\"properties\":{\"path\":{\"type\":\"string\"},\"start_line\":{\"type\":\"number\"},\"max_lines\":{\"type\":\"number\"},\"whole\":{\"type\":\"boolean\"},\"raw\":{\"type\":\"boolean\"}},\"required\":[\"path\"]}}}\n" + "{\"type\":\"function\",\"function\":{\"name\":\"more\",\"description\":\"Continue previous read-like output.\",\"parameters\":{\"type\":\"object\",\"properties\":{\"count\":{\"type\":\"number\"}}}}}\n" + "{\"type\":\"function\",\"function\":{\"name\":\"write\",\"description\":\"Create or overwrite a file.\",\"parameters\":{\"type\":\"object\",\"properties\":{\"path\":{\"type\":\"string\"},\"content\":{\"type\":\"string\"}},\"required\":[\"path\",\"content\"]}}}\n" + "{\"type\":\"function\",\"function\":{\"name\":\"edit\",\"description\":\"Replace one exact old text match; old may use [upto].\",\"parameters\":{\"type\":\"object\",\"properties\":{\"path\":{\"type\":\"string\"},\"old\":{\"type\":\"string\"},\"new\":{\"type\":\"string\"}},\"required\":[\"path\",\"old\",\"new\"]}}}\n" + "{\"type\":\"function\",\"function\":{\"name\":\"search\",\"description\":\"Search files.\",\"parameters\":{\"type\":\"object\",\"properties\":{\"query\":{\"type\":\"string\"},\"path\":{\"type\":\"string\"},\"mode\":{\"type\":\"string\"},\"glob\":{\"type\":\"string\"},\"context\":{\"type\":\"number\"},\"max_results\":{\"type\":\"number\"},\"case_sensitive\":{\"type\":\"boolean\"}},\"required\":[\"query\"]}}}\n" + "{\"type\":\"function\",\"function\":{\"name\":\"list\",\"description\":\"List one directory.\",\"parameters\":{\"type\":\"object\",\"properties\":{\"path\":{\"type\":\"string\"}},\"required\":[\"path\"]}}}\n"; + +static char *agent_build_glm_tools_prompt(void) { + size_t schemas_len = strlen(agent_glm_tool_schemas); + const char *schemas = agent_glm_tool_schemas; + size_t a = strlen(agent_glm_tools_prompt_intro); + size_t b = schemas_len; + size_t c = strlen(agent_glm_tools_prompt_after_schemas); + char *out = xmalloc(a + b + c + 1); + memcpy(out, agent_glm_tools_prompt_intro, a); + memcpy(out + a, schemas, b); + memcpy(out + a + b, agent_glm_tools_prompt_after_schemas, c + 1); + return out; +} + +static char *agent_build_tools_prompt(ds4_engine *engine) { + if (agent_tool_syntax_for_engine(engine) == AGENT_TOOL_SYNTAX_GLM) + return agent_build_glm_tools_prompt(); + return agent_build_dsml_tools_prompt(); +} + static const char agent_dsml_syntax_reminder[] = "DSML syntax reminder:\n" "<｜DSML｜tool_calls>\n" @@ -965,21 +1078,10 @@ static const char agent_dsml_syntax_reminder[] = "\n" "\n"; -#define AGENT_SYSTEM_PROMPT_REMINDER_TOKENS 50000 - -static char *agent_build_system_prompt_reminder(void) { - char *tools = agent_build_tools_prompt(); - const char *start = "\n\n[System prompt reminder follows.]\n"; - const char *end = "[End system prompt reminder.]\n\n"; - size_t len = strlen(start) + strlen(tools) + strlen(end) + 1; - char *out = xmalloc(len); - out[0] = '\0'; - strcat(out, start); - strcat(out, tools); - strcat(out, end); - free(tools); - return out; -} +static const char agent_glm_syntax_reminder[] = + "GLM tool-call syntax reminder:\n" + "$TOOL_NAME$PARAMETER_NAME" + "$PARAMETER_VALUE\n"; static void agent_append_system_prompt(ds4_engine *engine, ds4_tokens *tokens, const char *extra) { @@ -988,8 +1090,11 @@ static void agent_append_system_prompt(ds4_engine *engine, ds4_tokens *tokens, * the model's dedicated DSML token. Do not apply that tokenizer to user * supplied -sys text: arbitrary user text containing <｜User｜>, , or * ｜DSML｜ must remain plain content, not control tokens. */ - char *tools_prompt = agent_build_tools_prompt(); - ds4_tokenize_rendered_chat(engine, tools_prompt, tokens); + char *tools_prompt = agent_build_tools_prompt(engine); + if (agent_tool_syntax_for_engine(engine) == AGENT_TOOL_SYNTAX_GLM) + ds4_chat_append_message(engine, tokens, "system", tools_prompt); + else + ds4_tokenize_rendered_chat(engine, tools_prompt, tokens); free(tools_prompt); if (!extra || !extra[0]) return; @@ -1001,10 +1106,6 @@ static void agent_append_system_prompt(ds4_engine *engine, ds4_tokens *tokens, free(plain); } -static void agent_worker_note_system_prompt_seen(agent_worker *w) { - w->last_system_prompt_reminder_at = w->transcript.len; -} - static void agent_worker_maybe_append_datetime_context(agent_worker *w) { if (w->datetime_context_injected) return; @@ -1025,40 +1126,6 @@ static void agent_worker_maybe_append_datetime_context(agent_worker *w) { w->datetime_context_injected = true; } -/* The full tool/system reminder is separate from DSML syntax errors: it is a - * pressure-controlled refresh of the same trusted prompt shape used at startup. - * The built-in prompt is tokenized as rendered chat so DSML markers stay native - * control tokens; arbitrary -sys text remains ordinary text. */ -static void agent_worker_maybe_append_system_prompt_reminder(agent_worker *w) { - if (w->last_system_prompt_reminder_at <= 0) { - agent_worker_note_system_prompt_seen(w); - return; - } - if (w->transcript.len - w->last_system_prompt_reminder_at < - AGENT_SYSTEM_PROMPT_REMINDER_TOKENS) - { - return; - } - - char *reminder = agent_build_system_prompt_reminder(); - agent_publish_system_status(w, "Re-injecting system prompt reminder..."); - agent_trace(w, "system prompt reminder injected at transcript=%d", - w->transcript.len); - ds4_tokenize_rendered_chat(w->engine, reminder, &w->transcript); - free(reminder); - - const char *extra = w->cfg->gen.system; - if (extra && extra[0]) { - ds4_tokenize_text(w->engine, - "\nAdditional system instructions reminder:\n", &w->transcript); - ds4_tokenize_text(w->engine, extra, &w->transcript); - ds4_tokenize_text(w->engine, - "\n[End additional system instructions reminder.]\n\n", - &w->transcript); - } - agent_worker_note_system_prompt_seen(w); -} - /* Wake the UI thread after changing worker-visible state. The byte in * wake_fd is level-triggered with wake_pending so bursts of sampled tokens do * not flood the pipe. */ @@ -1297,11 +1364,13 @@ static const char *agent_tool_arg_value(const agent_tool_call *call, const char static void agent_dsml_parser_free(agent_dsml_parser *p) { if (!p) return; + agent_tool_syntax syntax = p->syntax; free(p->raw); agent_tool_call_free(&p->current); free(p->param_name); agent_tool_calls_free(&p->calls); memset(p, 0, sizeof(*p)); + p->syntax = syntax; } static void agent_dsml_parser_reset(agent_dsml_parser *p) { @@ -1338,6 +1407,20 @@ static void agent_dsml_set_error(agent_dsml_parser *p, const char *msg) { snprintf(p->error, sizeof(p->error), "%s", msg); } +static const char *agent_skip_ascii_space(const char *p, const char *end) { + while (p < end && (*p == ' ' || *p == '\t' || *p == '\r' || *p == '\n')) p++; + return p; +} + +static void agent_trim_span(const char **p, const char **end) { + *p = agent_skip_ascii_space(*p, *end); + while (*end > *p) { + char c = (*end)[-1]; + if (c != ' ' && c != '\t' && c != '\r' && c != '\n') break; + (*end)--; + } +} + static bool agent_dsml_open_tag_is(const char *tag, const char *name) { char prefix[64]; snprintf(prefix, sizeof(prefix), "<｜DSML｜%s", name); @@ -1394,6 +1477,26 @@ static bool agent_dsml_parameter_close_tail(const char *tail, size_t len, return true; } +static bool agent_glm_arg_value_close_tail(const char *tail, size_t len, + bool *complete) { + static const char close[] = ""; + *complete = false; + size_t close_len = sizeof(close) - 1; + if (len <= close_len && memcmp(close, tail, len) == 0) { + *complete = len == close_len; + return true; + } + return false; +} + +static bool agent_tool_value_close_tail(agent_tool_syntax syntax, + const char *tail, size_t len, + bool *complete) { + if (syntax == AGENT_TOOL_SYNTAX_GLM) + return agent_glm_arg_value_close_tail(tail, len, complete); + return agent_dsml_parameter_close_tail(tail, len, complete); +} + static void agent_dsml_update_param_close_prefix(agent_dsml_parser *p) { p->param_close_prefix = false; if (p->state != AGENT_DSML_PARAM_VALUE || p->raw_len <= p->param_value_start) @@ -1411,11 +1514,8 @@ static void agent_dsml_update_param_close_prefix(agent_dsml_parser *p) { size_t tail_len = (size_t)(end - lt); if (tail_len > 64) return; bool complete = false; - static const char dsml_marker[] = "param_close_prefix = - tail_len >= sizeof(dsml_marker) - 1 && - memcmp(lt, dsml_marker, sizeof(dsml_marker) - 1) == 0 && - agent_dsml_parameter_close_tail(lt, tail_len, &complete) && + agent_tool_value_close_tail(p->syntax, lt, tail_len, &complete) && !complete; } @@ -1431,11 +1531,174 @@ static char *agent_dsml_find_close_tag(const char *s, const char *name, size_t * return NULL; } +static bool agent_bytes_starts_with(const char *p, const char *end, + const char *prefix) { + size_t n = strlen(prefix); + return (size_t)(end - p) >= n && memcmp(p, prefix, n) == 0; +} + +static bool agent_bytes_partial_prefix_at(const char *p, const char *end, + const char *prefix) { + return bytes_is_partial_prefix(p, (size_t)(end - p), prefix); +} + +static void agent_glm_tool_parse(agent_dsml_parser *p) { + static const char start[] = ""; + static const char close[] = ""; + static const char arg_key[] = ""; + static const char arg_key_close[] = ""; + static const char arg_value[] = ""; + static const char arg_value_close[] = ""; + + if (p->raw_len < sizeof(start) - 1 || + memcmp(p->raw, start, sizeof(start) - 1) != 0) { + return; + } + + while (p->state == AGENT_DSML_STRUCTURAL || + p->state == AGENT_DSML_PARAM_VALUE) + { + const char *raw = p->raw; + const char *end = p->raw + p->raw_len; + if (p->state == AGENT_DSML_PARAM_VALUE) { + char *value_end = strstr(raw + p->param_value_start, arg_value_close); + if (!value_end) { + char *call_end = strstr(raw + p->param_value_start, close); + if (call_end) agent_dsml_set_error(p, "unterminated in GLM tool call"); + return; + } + agent_tool_call_add_arg(&p->current, p->param_name ? p->param_name : "", + raw + p->param_value_start, + (size_t)(value_end - (raw + p->param_value_start)), + true); + free(p->param_name); + p->param_name = NULL; + p->param_close_prefix = false; + p->parse_pos = (size_t)(value_end - raw) + sizeof(arg_value_close) - 1; + p->state = AGENT_DSML_STRUCTURAL; + continue; + } + + while (p->parse_pos < p->raw_len && + (p->raw[p->parse_pos] == ' ' || p->raw[p->parse_pos] == '\t' || + p->raw[p->parse_pos] == '\r' || p->raw[p->parse_pos] == '\n')) + p->parse_pos++; + if (p->parse_pos >= p->raw_len) return; + + const char *cur = raw + p->parse_pos; + if (p->glm_after_call) { + if (agent_bytes_starts_with(cur, end, start)) { + p->parse_pos += sizeof(start) - 1; + p->glm_after_call = false; + continue; + } + if (agent_bytes_partial_prefix_at(cur, end, start)) return; + p->glm_after_call = false; + p->state = AGENT_DSML_DONE; + return; + } + + if (!p->current.name) { + const char *name_start = agent_skip_ascii_space(cur, end); + const char *lt = memchr(name_start, '<', (size_t)(end - name_start)); + if (!lt) return; + bool at_arg = agent_bytes_starts_with(lt, end, arg_key); + bool at_close = agent_bytes_starts_with(lt, end, close); + if (!at_arg && !at_close) { + if (agent_bytes_partial_prefix_at(lt, end, arg_key) || + agent_bytes_partial_prefix_at(lt, end, close)) + return; + agent_dsml_set_error(p, "expected or in GLM tool call"); + return; + } + const char *name_end = lt; + agent_trim_span(&name_start, &name_end); + if (name_start >= name_end) { + agent_dsml_set_error(p, "GLM tool call without function name"); + return; + } + agent_tool_call_free(&p->current); + p->current.name = xstrndup(name_start, (size_t)(name_end - name_start)); + p->parse_pos = (size_t)(lt - raw); + cur = raw + p->parse_pos; + } + + if (agent_bytes_starts_with(cur, end, close)) { + p->parse_pos += sizeof(close) - 1; + agent_tool_calls_push(&p->calls, &p->current); + p->glm_after_call = true; + continue; + } + if (agent_bytes_partial_prefix_at(cur, end, close)) return; + + if (!agent_bytes_starts_with(cur, end, arg_key)) { + if (agent_bytes_partial_prefix_at(cur, end, arg_key)) return; + agent_dsml_set_error(p, "expected in GLM tool call"); + return; + } + cur += sizeof(arg_key) - 1; + char *key_end_mut = strstr(cur, arg_key_close); + if (!key_end_mut) { + char *call_end = strstr(cur, close); + if (call_end) agent_dsml_set_error(p, "unterminated in GLM tool call"); + return; + } + const char *key_start = cur; + const char *key_end = key_end_mut; + agent_trim_span(&key_start, &key_end); + if (key_start >= key_end) { + agent_dsml_set_error(p, "empty in GLM tool call"); + return; + } + char *key = xstrndup(key_start, (size_t)(key_end - key_start)); + cur = key_end_mut + sizeof(arg_key_close) - 1; + cur = agent_skip_ascii_space(cur, end); + if (!agent_bytes_starts_with(cur, end, arg_value)) { + if (agent_bytes_partial_prefix_at(cur, end, arg_value)) { + free(key); + return; + } + free(key); + agent_dsml_set_error(p, "expected in GLM tool call"); + return; + } + cur += sizeof(arg_value) - 1; + free(p->param_name); + p->param_name = key; + p->param_is_string = true; + p->param_value_start = (size_t)(cur - raw); + p->parse_pos = p->param_value_start; + p->param_close_prefix = false; + p->state = AGENT_DSML_PARAM_VALUE; + } +} + +static void agent_dsml_finish(agent_dsml_parser *p) { + if (!p || p->state == AGENT_DSML_DONE || p->state == AGENT_DSML_ERROR) + return; + if (p->syntax != AGENT_TOOL_SYNTAX_GLM || !p->glm_after_call) + return; + + while (p->parse_pos < p->raw_len && + (p->raw[p->parse_pos] == ' ' || p->raw[p->parse_pos] == '\t' || + p->raw[p->parse_pos] == '\r' || p->raw[p->parse_pos] == '\n')) + p->parse_pos++; + if (p->parse_pos >= p->raw_len) { + p->glm_after_call = false; + p->state = AGENT_DSML_DONE; + } +} + /* Parse as much of the accumulated DSML buffer as possible. The parser can be * called after every streamed byte: incomplete input leaves state unchanged * until enough bytes arrive, while malformed completed input switches to * AGENT_DSML_ERROR so the model gets a retryable tool error. */ static void agent_dsml_parse(agent_dsml_parser *p) { + if (p->syntax == AGENT_TOOL_SYNTAX_GLM) { + agent_glm_tool_parse(p); + return; + } + while (p->state == AGENT_DSML_STRUCTURAL || p->state == AGENT_DSML_PARAM_VALUE) { if (p->state == AGENT_DSML_PARAM_VALUE) { size_t end_tag_len = 0; @@ -1514,7 +1777,8 @@ static void agent_dsml_parse(agent_dsml_parser *p) { } static void agent_dsml_start(agent_dsml_parser *p) { - static const char start[] = "<｜DSML｜tool_calls>"; + const char *start = p->syntax == AGENT_TOOL_SYNTAX_GLM ? + "" : "<｜DSML｜tool_calls>"; p->state = AGENT_DSML_STRUCTURAL; p->search_len = 0; agent_dsml_raw_append(p, start, strlen(start)); @@ -1522,8 +1786,9 @@ static void agent_dsml_start(agent_dsml_parser *p) { } static void agent_dsml_feed(agent_dsml_parser *p, const char *s, size_t n) { - static const char start[] = "<｜DSML｜tool_calls>"; - const size_t start_len = sizeof(start) - 1; + const char *start = p->syntax == AGENT_TOOL_SYNTAX_GLM ? + "" : "<｜DSML｜tool_calls>"; + const size_t start_len = strlen(start); if (p->state == AGENT_DSML_DONE || p->state == AGENT_DSML_ERROR) return; for (size_t i = 0; i < n; i++) { @@ -2847,10 +3112,14 @@ static void agent_tool_viz_render_read(agent_stream_renderer *sr) { agent_tool_viz_puts(sr, v->read_start); agent_tool_viz_puts(sr, ":EOF"); } else { + char default_lines[16]; + snprintf(default_lines, sizeof(default_lines), "%d", + agent_read_default_lines(sr->renderer ? + sr->renderer->worker : NULL)); agent_tool_viz_puts(sr, " "); agent_tool_viz_puts(sr, v->read_start[0] ? v->read_start : "1"); agent_tool_viz_puts(sr, ":"); - agent_tool_viz_puts(sr, v->read_max[0] ? v->read_max : "500"); + agent_tool_viz_puts(sr, v->read_max[0] ? v->read_max : default_lines); } renderer_color(sr->renderer, "\x1b[1;37m"); agent_tool_viz_puts(sr, "..."); @@ -3050,7 +3319,10 @@ static void agent_tool_viz_param_value_byte(agent_stream_renderer *sr, char c) { if (v->param_end_len < sizeof(v->param_end_tail)) v->param_end_tail[v->param_end_len++] = c; bool complete = false; - if (agent_dsml_parameter_close_tail(v->param_end_tail, v->param_end_len, &complete)) { + if (agent_tool_value_close_tail(sr->parser->syntax, + v->param_end_tail, + v->param_end_len, + &complete)) { if (complete) agent_tool_viz_param_end(sr); return; } @@ -3231,7 +3503,8 @@ static void agent_stream_start_dsml(agent_stream_renderer *sr, bool ignored) { if (ignored) sr->dsml_in_think = true; sr->dsml_start_len = 0; sr->post_think_gap = false; - agent_trace(sr->renderer->worker, "dsml start detected%s", + agent_trace(sr->renderer->worker, "%s tool start detected%s", + sr->syntax == AGENT_TOOL_SYNTAX_GLM ? "glm" : "dsml", ignored ? " inside thinking" : ""); agent_dsml_start(sr->parser); if (!ignored) { @@ -3253,9 +3526,22 @@ static void agent_stream_flush_start_tail(agent_stream_renderer *sr) { sr->dsml_start_len = 0; } -static bool agent_stream_dsml_start_match(const char *tail, size_t len, +static bool agent_stream_dsml_start_match(agent_tool_syntax syntax, + const char *tail, size_t len, bool *complete, bool *implicit_invoke) { + if (syntax == AGENT_TOOL_SYNTAX_GLM) { + static const char glm_call[] = ""; + size_t form_len = sizeof(glm_call) - 1; + *complete = false; + *implicit_invoke = false; + if (len <= form_len && memcmp(glm_call, tail, len) == 0) { + *complete = len == form_len; + return true; + } + return false; + } + static const char canonical[] = "<｜DSML｜tool_calls>"; static const char missing_bar[] = ""; static const char invoke[] = "<｜DSML｜invoke"; @@ -3336,8 +3622,9 @@ static void agent_stream_note_plain_dsml_byte(agent_stream_renderer *sr, * the DSML detector. The detector must hold short prefixes because the model * can split "<｜DSML｜tool_calls>" across arbitrary tokens. */ static void agent_stream_normal_byte(agent_stream_renderer *sr, char c) { - static const char start[] = "<｜DSML｜tool_calls>"; static const char canonical_invoke[] = "<｜DSML｜invoke"; + const char *start = sr->syntax == AGENT_TOOL_SYNTAX_GLM ? + "" : "<｜DSML｜tool_calls>"; if (sr->parser->state == AGENT_DSML_ERROR) return; agent_stream_note_thinking_dsml_byte(sr, c); @@ -3357,7 +3644,8 @@ static void agent_stream_normal_byte(agent_stream_renderer *sr, char c) { if (sr->dsml_start_len < sizeof(sr->dsml_start_tail)) sr->dsml_start_tail[sr->dsml_start_len++] = c; bool complete = false, implicit_invoke = false; - if (agent_stream_dsml_start_match(sr->dsml_start_tail, sr->dsml_start_len, + if (agent_stream_dsml_start_match(sr->syntax, + sr->dsml_start_tail, sr->dsml_start_len, &complete, &implicit_invoke)) { if (complete) { @@ -3368,7 +3656,7 @@ static void agent_stream_normal_byte(agent_stream_renderer *sr, char c) { * implicit tool_calls block; the model often knows it wants a * tool but forgets the outer wrapper. */ agent_stream_start_dsml(sr, sr->in_think); - if (implicit_invoke) { + if (sr->syntax == AGENT_TOOL_SYNTAX_DSML && implicit_invoke) { for (size_t i = 0; i < sizeof(canonical_invoke) - 1; i++) agent_stream_feed_dsml_byte(sr, canonical_invoke[i]); } @@ -3478,8 +3766,19 @@ static void agent_stream_text(agent_stream_renderer *sr, const char *text, size_ if (finish) { agent_stream_flush_start_tail(sr); sr->post_think_gap = false; + if (sr->dsml_active) agent_dsml_finish(sr->parser); if (sr->dsml_active) { - if (sr->dsml_ignored) { + if (sr->parser->state == AGENT_DSML_DONE) { + if (sr->dsml_ignored) { + agent_stream_finish_ignored_dsml( + sr, "tool calling is not allowed inside "); + } else { + agent_trace(sr->renderer->worker, "dsml done calls=%d", + sr->parser->calls.len); + agent_tool_viz_finish(sr, NULL); + sr->dsml_active = false; + } + } else if (sr->dsml_ignored) { agent_stream_finish_ignored_dsml( sr, "tool calling is not allowed inside "); } else { @@ -3502,15 +3801,33 @@ static void agent_stream_text(agent_stream_renderer *sr, const char *text, size_ */ static void worker_progress_cb(void *ud, const char *event, int current, int total) { - (void)total; agent_worker *w = ud; if (!w || !event) return; - if (strcmp(event, "prefill_chunk") && strcmp(event, "prefill_display")) return; + (void)total; worker_apply_pending_power(w); pthread_mutex_lock(&w->mu); - int done = current - w->progress_base; + int done = 0; + int progress_total = w->status.prefill_total; + if (!strcmp(event, "prefill_work")) { + /* GLM reports intra-chunk work relative to the suffix being synced. + * It is display progress only: checkpoint progress still arrives as + * absolute prefill_chunk positions after each completed chunk. */ + done = current; + } else if (!strcmp(event, "prefill_chunk") || + !strcmp(event, "prefill_display")) { + if (w->progress_direct) { + pthread_mutex_unlock(&w->mu); + return; + } + done = current - w->progress_base; + } else { + pthread_mutex_unlock(&w->mu); + return; + } + if (progress_total < 0) progress_total = 0; if (done < 0) done = 0; - if (done > w->status.prefill_total) done = w->status.prefill_total; + if (done > progress_total) done = progress_total; + w->status.prefill_total = progress_total; w->status.prefill_done = done; double elapsed = now_sec() - w->progress_started_at; w->status.prefill_tps = @@ -3990,9 +4307,14 @@ static bool agent_kv_save_path(agent_worker *w, const char *path, static void agent_worker_build_system_tokens(agent_worker *w, ds4_tokens *out) { ds4_chat_begin(w->engine, out); - if (w->cfg->gen.think_mode == DS4_THINK_MAX && - effective_think_mode(w->cfg) == DS4_THINK_MAX) + ds4_think_mode think_mode = effective_think_mode(w->cfg); + if (agent_tool_syntax_for_engine(w->engine) == AGENT_TOOL_SYNTAX_GLM) { + const char *effort = ds4_glm_reasoning_effort_text(think_mode); + if (effort) ds4_chat_append_message(w->engine, out, "system", effort); + } else if (w->cfg->gen.think_mode == DS4_THINK_MAX && + think_mode == DS4_THINK_MAX) { ds4_chat_append_max_effort_prefix(w->engine, out); + } agent_append_system_prompt(w->engine, out, w->cfg->gen.system); } @@ -4160,6 +4482,7 @@ static int agent_worker_sync_tokens(agent_worker *w, const ds4_tokens *tokens, w->status.prefill_label : agent_next_prefill_label(); w->status.state = AGENT_WORKER_PREFILL; w->progress_base = cached; + w->progress_direct = false; w->progress_started_at = now_sec(); w->status.prefill_done = 0; w->status.prefill_total = suffix; @@ -4177,10 +4500,14 @@ static int agent_worker_sync_tokens(agent_worker *w, const ds4_tokens *tokens, publish_progress ? worker_progress_cb : NULL, publish_progress ? w : NULL); ds4_session_set_cancel(w->session, worker_cancel_session_cb, w); + double t_sync0 = now_sec(); int rc = ds4_session_sync(w->session, tokens, err, err_len); + double t_sync1 = now_sec(); ds4_session_set_cancel(w->session, NULL, NULL); ds4_session_set_progress(w->session, NULL, NULL); ds4_session_set_display_progress(w->session, NULL, NULL); + agent_trace(w, "prefill sync done prompt=%d cached=%d suffix=%d rc=%d %.3f ms", + tokens->len, cached, suffix, rc, (t_sync1 - t_sync0) * 1000.0); return rc; } @@ -4251,11 +4578,11 @@ static bool agent_worker_reset_to_sysprompt(agent_worker *w, char *err, size_t e } } - agent_worker_note_system_prompt_seen(w); pthread_mutex_lock(&w->mu); w->user_activity = false; w->session_dirty = false; w->status.state = AGENT_WORKER_IDLE; + w->progress_direct = false; w->status.prefill_done = 0; w->status.prefill_total = 0; w->status.prefill_tps = 0.0; @@ -4827,10 +5154,15 @@ static void agent_history_render_assistant(agent_worker *w, .last_output_newline = true, .capture = source_truncated ? &tail : NULL, }; - agent_dsml_parser dsml = {.state = AGENT_DSML_SEARCH}; + agent_tool_syntax tool_syntax = agent_tool_syntax_for_engine(w->engine); + agent_dsml_parser dsml = { + .syntax = tool_syntax, + .state = AGENT_DSML_SEARCH, + }; agent_stream_renderer stream = { .renderer = &renderer, .parser = &dsml, + .syntax = tool_syntax, .replay = true, }; @@ -5397,14 +5729,13 @@ static bool agent_worker_switch_session(agent_worker *w, const char *prefix, memcpy(w->session_sha, sha, sizeof(w->session_sha)); free(w->legacy_session_path_to_delete); w->legacy_session_path_to_delete = meta.legacy_identity ? xstrdup(path) : NULL; - agent_worker_note_system_prompt_seen(w); w->datetime_context_injected = true; pthread_mutex_lock(&w->mu); w->user_activity = true; w->session_dirty = false; w->status.state = AGENT_WORKER_IDLE; w->status.ctx_used = w->transcript.len; - w->status.ctx_size = w->cfg->gen.ctx_size; + w->status.ctx_size = agent_worker_effective_ctx_size(w); w->status.prefill_tps = 0.0; w->status.greedy_sampling = false; w->status.error[0] = '\0'; @@ -5459,7 +5790,11 @@ static bool agent_parse_bool_default(const char *s, bool def) { } #define AGENT_FILE_MAX_BYTES (16*1024*1024) -#define AGENT_READ_DEFAULT_LINES 500 +#define AGENT_READ_DEFAULT_LINES_SMALL 120 +#define AGENT_READ_DEFAULT_LINES_MEDIUM 240 +#define AGENT_READ_DEFAULT_LINES_LARGE 500 +#define AGENT_READ_SMALL_CONTEXT_MAX 8192 +#define AGENT_READ_MEDIUM_CONTEXT_MAX 16384 #define AGENT_TOOL_RESULT_RESERVE_TOKENS 1024 #define AGENT_EDIT_UPTO_MIN_PREFIX_BYTES 64 #define AGENT_EDIT_UPTO_MIN_PREFIX_LINES 2 @@ -5645,7 +5980,28 @@ static bool agent_tool_result_fits_context(agent_worker *w, const char *result, int tokens = tmp.len; ds4_tokens_free(&tmp); if (tokens_out) *tokens_out = tokens; - return tokens + reserve_tokens < w->cfg->gen.ctx_size; + int ctx = agent_worker_effective_ctx_size(w); + return ctx > 0 && tokens + reserve_tokens < ctx; +} + +static int agent_tool_result_reserve_tokens(agent_worker *w) { + int ctx = agent_worker_effective_ctx_size(w); + int reserve = AGENT_TOOL_RESULT_RESERVE_TOKENS; + if (ctx > 0) { + int proportional = ctx / 8; + if (proportional < 16) proportional = 16; + if (reserve > proportional) reserve = proportional; + } + return reserve; +} + +static int agent_read_default_lines(agent_worker *w) { + int ctx = agent_worker_effective_ctx_size(w); + if (ctx > 0 && ctx <= AGENT_READ_SMALL_CONTEXT_MAX) + return AGENT_READ_DEFAULT_LINES_SMALL; + if (ctx > 0 && ctx <= AGENT_READ_MEDIUM_CONTEXT_MAX) + return AGENT_READ_DEFAULT_LINES_MEDIUM; + return AGENT_READ_DEFAULT_LINES_LARGE; } /* Read file text for the model. Normal mode shows plain line numbers. Raw @@ -5674,7 +6030,7 @@ static char *agent_read_range(agent_worker *w, const char *path, int start_line, if (whole_file) { max_lines = spans.len - start_idx; } else { - if (max_lines <= 0) max_lines = AGENT_READ_DEFAULT_LINES; + if (max_lines <= 0) max_lines = agent_read_default_lines(w); } int end_idx = start_idx + max_lines; if (end_idx > spans.len) end_idx = spans.len; @@ -5691,7 +6047,7 @@ static char *agent_read_range(agent_worker *w, const char *path, int start_line, "[Read truncated at line %d of %d. continue_offset=%d. " "Call more with count=%d to read the next chunk.]\n", end_idx, spans.len, end_idx + 1, - max_lines > 0 ? max_lines : AGENT_READ_DEFAULT_LINES); + max_lines > 0 ? max_lines : agent_read_default_lines(w)); agent_buf_puts(&out, note); } } else { @@ -5701,7 +6057,7 @@ static char *agent_read_range(agent_worker *w, const char *path, int start_line, "%s: lines %d-%d of %d; continue_offset=%d; " "call more with count=%d to read the next chunk\n", path, spans.len ? start_idx + 1 : 0, end_idx, spans.len, - end_idx + 1, max_lines > 0 ? max_lines : AGENT_READ_DEFAULT_LINES); + end_idx + 1, max_lines > 0 ? max_lines : agent_read_default_lines(w)); } else { snprintf(hdr, sizeof(hdr), "%s: lines %d-%d of %d\n", path, spans.len ? start_idx + 1 : 0, end_idx, spans.len); @@ -5731,14 +6087,14 @@ static char *agent_tool_read(agent_worker *w, const agent_tool_call *call) { int start = agent_parse_int_default(agent_tool_arg_value(call, "start_line"), 1, 1, INT_MAX); int count = agent_parse_int_default(agent_tool_arg_value(call, "max_lines"), - AGENT_READ_DEFAULT_LINES, 1, INT_MAX); + agent_read_default_lines(w), 1, INT_MAX); bool raw = agent_parse_bool_default(agent_tool_arg_value(call, "raw"), false); return agent_read_range(w, path, start, count, whole, raw, true); } static char *agent_tool_more(agent_worker *w, const agent_tool_call *call) { int count = agent_parse_int_default(agent_tool_arg_value(call, "count"), - AGENT_READ_DEFAULT_LINES, 1, INT_MAX); + agent_read_default_lines(w), 1, INT_MAX); if (!w->more_valid) return xstrdup("Tool error: no previous output to continue\n"); return agent_read_range(w, w->more_path, w->more_next_line, count, false, w->more_bare, true); @@ -6194,9 +6550,349 @@ static void test_agent_edit_upto_requires_tail_after_newline_strip(void) { AGENT_TEST_ASSERT(strstr(err, "must include a unique tail anchor") != NULL); } +static char *agent_test_stream_capture(agent_tool_syntax syntax, + const char **chunks, + size_t chunk_count, + agent_dsml_parser *p, + bool *dsml_in_think) { + agent_tail_capture tail = { + .cap = 16384, + }; + agent_token_renderer renderer = { + .format_thinking = true, + .format_markdown = false, + .last_output_newline = true, + .capture = &tail, + }; + *p = (agent_dsml_parser){ + .syntax = syntax, + .state = AGENT_DSML_SEARCH, + }; + agent_stream_renderer stream = { + .renderer = &renderer, + .parser = p, + .syntax = syntax, + }; + + for (size_t i = 0; i < chunk_count; i++) + agent_stream_text(&stream, chunks[i], strlen(chunks[i]), false); + agent_stream_text(&stream, NULL, 0, true); + renderer_finish(&renderer); + if (dsml_in_think) *dsml_in_think = stream.dsml_in_think; + return agent_tail_capture_take(&tail, NULL); +} + +static void test_agent_glm_tool_parser_single_arg(void) { + const char *text = + "prose before list" + "path." + ""; + agent_dsml_parser p = { + .syntax = AGENT_TOOL_SYNTAX_GLM, + .state = AGENT_DSML_SEARCH, + }; + + agent_dsml_feed(&p, text, strlen(text)); + agent_dsml_finish(&p); + + AGENT_TEST_ASSERT(p.state == AGENT_DSML_DONE); + AGENT_TEST_ASSERT(p.calls.len == 1); + AGENT_TEST_ASSERT(p.calls.v[0].name && !strcmp(p.calls.v[0].name, "list")); + AGENT_TEST_ASSERT(p.calls.v[0].argc == 1); + AGENT_TEST_ASSERT(p.calls.v[0].args[0].name && + !strcmp(p.calls.v[0].args[0].name, "path")); + AGENT_TEST_ASSERT(p.calls.v[0].args[0].value && + !strcmp(p.calls.v[0].args[0].value, ".")); + + agent_dsml_parser_free(&p); +} + +static void test_agent_glm_tool_parser_chunked_multi_arg(void) { + const char *a = "bashcommand"; + const char *b = "printf hi"; + const char *c = + "refresh_sec1"; + agent_dsml_parser p = { + .syntax = AGENT_TOOL_SYNTAX_GLM, + .state = AGENT_DSML_SEARCH, + }; + + agent_dsml_feed(&p, a, strlen(a)); + AGENT_TEST_ASSERT(p.state == AGENT_DSML_STRUCTURAL); + agent_dsml_feed(&p, b, strlen(b)); + AGENT_TEST_ASSERT(p.state == AGENT_DSML_STRUCTURAL); + agent_dsml_feed(&p, c, strlen(c)); + agent_dsml_finish(&p); + + AGENT_TEST_ASSERT(p.state == AGENT_DSML_DONE); + AGENT_TEST_ASSERT(p.calls.len == 1); + AGENT_TEST_ASSERT(p.calls.v[0].name && !strcmp(p.calls.v[0].name, "bash")); + AGENT_TEST_ASSERT(p.calls.v[0].argc == 2); + AGENT_TEST_ASSERT(!strcmp(agent_tool_arg_value(&p.calls.v[0], "command"), + "printf hi")); + AGENT_TEST_ASSERT(!strcmp(agent_tool_arg_value(&p.calls.v[0], "refresh_sec"), + "1")); + + agent_dsml_parser_free(&p); +} + +static void test_agent_glm_tool_parser_streams_param_state(void) { + const char *a = + "bashcommandprintf hi"; + const char *b = "refresh_sec1"; + agent_dsml_parser p = { + .syntax = AGENT_TOOL_SYNTAX_GLM, + .state = AGENT_DSML_SEARCH, + }; + + agent_dsml_feed(&p, a, strlen(a)); + AGENT_TEST_ASSERT(p.state == AGENT_DSML_PARAM_VALUE); + AGENT_TEST_ASSERT(p.current.name && !strcmp(p.current.name, "bash")); + AGENT_TEST_ASSERT(p.param_name && !strcmp(p.param_name, "command")); + AGENT_TEST_ASSERT(!p.param_close_prefix); + + agent_dsml_feed(&p, b, strlen(b)); + AGENT_TEST_ASSERT(p.state == AGENT_DSML_PARAM_VALUE); + AGENT_TEST_ASSERT(p.param_close_prefix); + + agent_dsml_feed(&p, c, strlen(c)); + agent_dsml_finish(&p); + AGENT_TEST_ASSERT(p.state == AGENT_DSML_DONE); + AGENT_TEST_ASSERT(p.calls.len == 1); + AGENT_TEST_ASSERT(!strcmp(agent_tool_arg_value(&p.calls.v[0], "command"), + "printf hi")); + AGENT_TEST_ASSERT(!strcmp(agent_tool_arg_value(&p.calls.v[0], "refresh_sec"), + "1")); + + agent_dsml_parser_free(&p); +} + +static void test_agent_glm_tool_parser_multiple_adjacent_calls(void) { + const char *text = + "listpath.\n" + "bashcommandpwd"; + agent_dsml_parser p = { + .syntax = AGENT_TOOL_SYNTAX_GLM, + .state = AGENT_DSML_SEARCH, + }; + + agent_dsml_feed(&p, text, strlen(text)); + agent_dsml_finish(&p); + + AGENT_TEST_ASSERT(p.state == AGENT_DSML_DONE); + AGENT_TEST_ASSERT(p.calls.len == 2); + AGENT_TEST_ASSERT(p.calls.v[0].name && !strcmp(p.calls.v[0].name, "list")); + AGENT_TEST_ASSERT(!strcmp(agent_tool_arg_value(&p.calls.v[0], "path"), ".")); + AGENT_TEST_ASSERT(p.calls.v[1].name && !strcmp(p.calls.v[1].name, "bash")); + AGENT_TEST_ASSERT(!strcmp(agent_tool_arg_value(&p.calls.v[1], "command"), "pwd")); + + agent_dsml_parser_free(&p); +} + +static void test_agent_glm_stream_tool_call_chunked(void) { + const char *chunks[] = { + "intro ", + "bashcommandprintf hirefresh_sec1", + }; + agent_dsml_parser p; + char *out = agent_test_stream_capture(AGENT_TOOL_SYNTAX_GLM, + chunks, + sizeof(chunks)/sizeof(chunks[0]), + &p, + NULL); + + AGENT_TEST_ASSERT(p.state == AGENT_DSML_DONE); + AGENT_TEST_ASSERT(p.calls.len == 1); + AGENT_TEST_ASSERT(p.calls.v[0].name && !strcmp(p.calls.v[0].name, "bash")); + AGENT_TEST_ASSERT(!strcmp(agent_tool_arg_value(&p.calls.v[0], "command"), + "printf hi")); + AGENT_TEST_ASSERT(strstr(out, "intro ") != NULL); + AGENT_TEST_ASSERT(strstr(out, "printf hi") != NULL); + AGENT_TEST_ASSERT(strstr(out, "") == NULL); + AGENT_TEST_ASSERT(strstr(out, "") == NULL); + AGENT_TEST_ASSERT(strstr(out, "") == NULL); + + free(out); + agent_dsml_parser_free(&p); +} + +static void test_agent_glm_stream_ignores_tool_inside_think(void) { + const char *chunks[] = { + "plan bashcommandprintf hi", + "done", + }; + agent_dsml_parser p; + bool dsml_in_think = false; + char *out = agent_test_stream_capture(AGENT_TOOL_SYNTAX_GLM, + chunks, + sizeof(chunks)/sizeof(chunks[0]), + &p, + &dsml_in_think); + + AGENT_TEST_ASSERT(dsml_in_think); + AGENT_TEST_ASSERT(p.calls.len == 0); + AGENT_TEST_ASSERT(strstr(out, "[tool call ignored:") != NULL); + AGENT_TEST_ASSERT(strstr(out, "") == NULL); + + free(out); + agent_dsml_parser_free(&p); +} + +static void test_agent_glm_stream_greedy_sampling_boundaries(void) { + agent_tail_capture tail = { + .cap = 4096, + }; + agent_token_renderer renderer = { + .format_thinking = true, + .format_markdown = false, + .last_output_newline = true, + .capture = &tail, + }; + agent_dsml_parser p = { + .syntax = AGENT_TOOL_SYNTAX_GLM, + .state = AGENT_DSML_SEARCH, + }; + agent_stream_renderer stream = { + .renderer = &renderer, + .parser = &p, + .syntax = AGENT_TOOL_SYNTAX_GLM, + }; + + agent_stream_text(&stream, "bashcommandprintf hi"; + agent_stream_text(&stream, body, strlen(body), false); + AGENT_TEST_ASSERT(p.state == AGENT_DSML_PARAM_VALUE); + AGENT_TEST_ASSERT(!agent_stream_wants_greedy_sampling(&stream)); + + agent_stream_text(&stream, "") == NULL); + + free(out); + agent_dsml_parser_free(&p); +} + +static void test_agent_dsml_stream_tool_call_chunked(void) { + const char *chunks[] = { + "<｜D", + "SML｜tool_calls><｜DSML｜invoke name=\"read\">" + "<｜DSML｜parameter name=\"path\" string=\"true\">ds4_agent.c" + "", + }; + agent_dsml_parser p; + char *out = agent_test_stream_capture(AGENT_TOOL_SYNTAX_DSML, + chunks, + sizeof(chunks)/sizeof(chunks[0]), + &p, + NULL); + + AGENT_TEST_ASSERT(p.state == AGENT_DSML_DONE); + AGENT_TEST_ASSERT(p.calls.len == 1); + AGENT_TEST_ASSERT(p.calls.v[0].name && !strcmp(p.calls.v[0].name, "read")); + AGENT_TEST_ASSERT(!strcmp(agent_tool_arg_value(&p.calls.v[0], "path"), + "ds4_agent.c")); + AGENT_TEST_ASSERT(strstr(out, "Reading ") != NULL); + AGENT_TEST_ASSERT(strstr(out, "ds4_agent.c") != NULL); + AGENT_TEST_ASSERT(strstr(out, "DSML") == NULL); + + free(out); + agent_dsml_parser_free(&p); +} + +static void test_agent_glm_tool_parser_rejects_missing_value(void) { + const char *text = "listpath"; + agent_dsml_parser p = { + .syntax = AGENT_TOOL_SYNTAX_GLM, + .state = AGENT_DSML_SEARCH, + }; + + agent_dsml_feed(&p, text, strlen(text)); + + AGENT_TEST_ASSERT(p.state == AGENT_DSML_ERROR); + AGENT_TEST_ASSERT(strstr(p.error, "expected ") != NULL); + + agent_dsml_parser_free(&p); +} + +static void test_agent_glm_tools_prompt_is_native(void) { + char *prompt = agent_build_glm_tools_prompt(); + + AGENT_TEST_ASSERT(strstr(prompt, "") != NULL); + AGENT_TEST_ASSERT(strstr(prompt, "") != NULL); + AGENT_TEST_ASSERT(strstr(prompt, "") != NULL); + AGENT_TEST_ASSERT(strstr(prompt, "\"name\":\"bash\"") != NULL); + AGENT_TEST_ASSERT(strstr(prompt, "\"command\"") != NULL); + AGENT_TEST_ASSERT(strstr(prompt, "put path first") != NULL); + AGENT_TEST_ASSERT(strstr(prompt, "Emit at most one") == NULL); + AGENT_TEST_ASSERT(strstr(prompt, "<｜DSML｜") == NULL); + + free(prompt); +} + +static void test_agent_glm_template_policy(void) { + AGENT_TEST_ASSERT(!agent_tool_syntax_assistant_turn_uses_eos( + AGENT_TOOL_SYNTAX_GLM)); + AGENT_TEST_ASSERT(agent_tool_syntax_assistant_turn_uses_eos( + AGENT_TOOL_SYNTAX_DSML)); + AGENT_TEST_ASSERT(!strcmp(ds4_glm_reasoning_effort_text(DS4_THINK_HIGH), + "Reasoning Effort: High")); + AGENT_TEST_ASSERT(!strcmp(ds4_glm_reasoning_effort_text(DS4_THINK_MAX), + "Reasoning Effort: Max")); + AGENT_TEST_ASSERT(ds4_glm_reasoning_effort_text(DS4_THINK_NONE) == NULL); +} + +static void test_agent_read_default_lines_follow_context(void) { + agent_config cfg = {0}; + agent_worker w = { + .cfg = &cfg, + }; + + cfg.gen.ctx_size = 4096; + AGENT_TEST_ASSERT(agent_read_default_lines(&w) == + AGENT_READ_DEFAULT_LINES_SMALL); + + cfg.gen.ctx_size = AGENT_READ_SMALL_CONTEXT_MAX + 1; + AGENT_TEST_ASSERT(agent_read_default_lines(&w) == + AGENT_READ_DEFAULT_LINES_MEDIUM); + + cfg.gen.ctx_size = AGENT_READ_MEDIUM_CONTEXT_MAX + 1; + AGENT_TEST_ASSERT(agent_read_default_lines(&w) == + AGENT_READ_DEFAULT_LINES_LARGE); +} + static void ds4_agent_unit_tests_run(void) { test_agent_edit_upto_tail_newline_is_not_part_of_anchor(); test_agent_edit_upto_requires_tail_after_newline_strip(); + test_agent_read_default_lines_follow_context(); + test_agent_glm_template_policy(); + test_agent_glm_tools_prompt_is_native(); + test_agent_glm_tool_parser_single_arg(); + test_agent_glm_tool_parser_chunked_multi_arg(); + test_agent_glm_tool_parser_streams_param_state(); + test_agent_glm_tool_parser_multiple_adjacent_calls(); + test_agent_glm_stream_tool_call_chunked(); + test_agent_glm_stream_ignores_tool_inside_think(); + test_agent_glm_stream_greedy_sampling_boundaries(); + test_agent_dsml_stream_tool_call_chunked(); + test_agent_glm_tool_parser_rejects_missing_value(); } #endif @@ -7253,12 +7949,12 @@ static char *agent_bash_jobs_compaction_observation(agent_worker *w) { * tool result. The fixed free-token threshold is capped proportionally for * smaller contexts so tests with tiny contexts still compact rather than fail. */ static bool agent_worker_should_compact(agent_worker *w) { - int ctx = w->cfg->gen.ctx_size; + int ctx = agent_worker_effective_ctx_size(w); int used = w->transcript.len; if (ctx <= 0 || used <= 0) return false; if (used >= (ctx * AGENT_COMPACT_SOFT_PERCENT) / 100) return true; int free_threshold = AGENT_COMPACT_MIN_FREE_TOKENS; - int proportional = ctx / 4; + int proportional = ctx / 8; if (free_threshold > proportional) free_threshold = proportional; return ctx - used <= free_threshold; } @@ -7274,7 +7970,8 @@ static int agent_special_token_id(ds4_engine *engine, const char *rendered) { /* Pick a recent verbatim tail for the compacted transcript. Prefer a user * boundary inside the budget so the rebuilt context starts at a natural turn. */ static int agent_compact_tail_start(agent_worker *w, int bottom, int sys_len) { - int tail_budget = w->cfg->gen.ctx_size / AGENT_COMPACT_TAIL_DIVISOR; + int ctx = agent_worker_effective_ctx_size(w); + int tail_budget = ctx / AGENT_COMPACT_TAIL_DIVISOR; if (tail_budget > AGENT_COMPACT_TAIL_CAP_TOKENS) tail_budget = AGENT_COMPACT_TAIL_CAP_TOKENS; if (tail_budget < 1) tail_budget = 1; @@ -7282,7 +7979,8 @@ static int agent_compact_tail_start(agent_worker *w, int bottom, int sys_len) { int target = bottom - tail_budget; if (target < sys_len) target = sys_len; - int user_id = agent_special_token_id(w->engine, "<｜User｜>"); + int user_id = agent_special_token_id(w->engine, + ds4_engine_is_glm_dsa(w->engine) ? "<|user|>" : "<｜User｜>"); if (user_id < 0) return target; for (int i = target; i < bottom; i++) { @@ -7351,6 +8049,7 @@ static bool agent_worker_compact(agent_worker *w, const char *reason, pthread_mutex_lock(&w->mu); w->status.state = AGENT_WORKER_COMPACTING; + w->progress_direct = false; w->progress_started_at = now_sec(); w->status.prefill_done = 0; w->status.prefill_total = 0; @@ -7361,7 +8060,7 @@ static bool agent_worker_compact(agent_worker *w, const char *reason, agent_wake_locked(w); pthread_mutex_unlock(&w->mu); - int summary_room = w->cfg->gen.ctx_size - prompt.len - 1; + int summary_room = agent_worker_effective_ctx_size(w) - prompt.len - 1; if (summary_room < 256) { snprintf(err, err_len, "not enough context left to request compaction summary"); ds4_tokens_free(&prompt); @@ -7404,7 +8103,6 @@ static bool agent_worker_compact(agent_worker *w, const char *reason, * cannot accidentally continue from the private compaction exchange. */ agent_buf summary = {0}; char eval_err[160] = {0}; - int think_end_id = agent_special_token_id(w->engine, ""); int dsml_id = agent_special_token_id(w->engine, "｜DSML｜"); double t0 = now_sec(); for (int i = 0; i < summary_max; i++) { @@ -7421,8 +8119,10 @@ static bool agent_worker_compact(agent_worker *w, const char *reason, return false; } int token = ds4_session_argmax(w->session); - if (token == ds4_token_eos(w->engine)) break; - if (token == think_end_id || token == dsml_id) { + if (ds4_token_is_stop_for_think_mode(w->engine, + token, + DS4_THINK_NONE) || + token == dsml_id) { if (token == dsml_id && summary.len && summary.ptr[summary.len - 1] == '<') { summary.ptr[--summary.len] = '\0'; } @@ -7496,7 +8196,6 @@ static bool agent_worker_compact(agent_worker *w, const char *reason, ds4_tokens_free(&sys); return false; } - agent_worker_note_system_prompt_seen(w); ds4_tokens_free(&old_transcript); ds4_tokens_free(&sys); char *bash_update = agent_bash_jobs_compaction_observation(w); @@ -7527,9 +8226,6 @@ static int worker_accept_generated_token(agent_worker *w, agent_stream_renderer *stream, char *err, size_t err_len) { - if (ds4_session_eval(w->session, token, err, err_len) != 0) - return 1; - ds4_tokens_push(&w->transcript, token); size_t text_len = 0; @@ -7539,6 +8235,11 @@ static int worker_accept_generated_token(agent_worker *w, free(text); (*generated)++; + if (ds4_session_eval(w->session, token, err, err_len) != 0) { + ds4_session_invalidate(w->session); + return 1; + } + double dt = now_sec() - t0; pthread_mutex_lock(&w->mu); w->status.generated = *generated; @@ -7692,7 +8393,6 @@ static int worker_run_turn(agent_worker *w, const char *user_text) { agent_set_error(w, compact_err[0] ? compact_err : "context compaction failed"); return 1; } - agent_worker_maybe_append_system_prompt_reminder(w); ds4_chat_append_assistant_prefix(w->engine, &w->transcript, think_mode); const ds4_tokens *prompt_for_sync = &w->transcript; @@ -7711,6 +8411,7 @@ static int worker_run_turn(agent_worker *w, const char *user_text) { w->status.prefill_label : agent_next_prefill_label(); w->status.state = AGENT_WORKER_PREFILL; w->progress_base = cached; + w->progress_direct = false; w->progress_started_at = now_sec(); w->status.prefill_done = 0; w->status.prefill_total = suffix; @@ -7726,14 +8427,19 @@ static int worker_run_turn(agent_worker *w, const char *user_text) { ds4_session_set_progress(w->session, worker_progress_cb, w); ds4_session_set_display_progress(w->session, worker_progress_cb, w); ds4_session_set_cancel(w->session, worker_cancel_session_cb, w); + double t_sync0 = now_sec(); int sync_rc = ds4_session_sync(w->session, prompt_for_sync, err, sizeof(err)); + double t_sync1 = now_sec(); ds4_session_set_cancel(w->session, NULL, NULL); ds4_session_set_progress(w->session, NULL, NULL); ds4_session_set_display_progress(w->session, NULL, NULL); + agent_trace(w, "prefill sync done tool_round=%d prompt=%d cached=%d suffix=%d rc=%d %.3f ms", + tool_round, prompt_for_sync->len, cached, suffix, + sync_rc, (t_sync1 - t_sync0) * 1000.0); if (sync_rc == DS4_SESSION_SYNC_INTERRUPTED) { agent_publish_system_status( w, "Model reading interrupted; the model may only be aware of the prefix processed so far."); - ds4_tokens_push(&w->transcript, ds4_token_eos(w->engine)); + agent_worker_append_assistant_turn_end(w); worker_clear_interrupt(w); agent_set_status(w, AGENT_WORKER_IDLE); return 0; @@ -7758,10 +8464,15 @@ static int worker_run_turn(agent_worker *w, const char *user_text) { .use_color = use_color, .last_output_newline = true, }; - agent_dsml_parser dsml = {.state = AGENT_DSML_SEARCH}; + agent_tool_syntax tool_syntax = agent_tool_syntax_for_engine(w->engine); + agent_dsml_parser dsml = { + .syntax = tool_syntax, + .state = AGENT_DSML_SEARCH, + }; agent_stream_renderer stream = { .renderer = &renderer, .parser = &dsml, + .syntax = tool_syntax, .in_think = ds4_think_mode_enabled(think_mode), }; agent_edit_upto_forcer upto_forcer = {0}; @@ -7770,7 +8481,6 @@ static int worker_run_turn(agent_worker *w, const char *user_text) { bool early_tool_error = false; int generated = 0; double t0 = now_sec(); - pthread_mutex_lock(&w->mu); w->status.state = AGENT_WORKER_GENERATING; w->status.prefill_tps = 0.0; @@ -7787,7 +8497,13 @@ static int worker_run_turn(agent_worker *w, const char *user_text) { status_greedy_sampling = greedy_sampling; } int token = worker_sample_with_mode(w, cfg, greedy_sampling, &rng); - if (token == ds4_token_eos(w->engine)) break; + if (ds4_token_is_stop_for_think_mode(w->engine, token, think_mode)) { + if (tool_syntax == AGENT_TOOL_SYNTAX_GLM && + token != ds4_token_eos(w->engine)) { + agent_trace(w, "glm assistant generation stopped before control token id=%d", token); + } + break; + } size_t text_len = 0; char *text = ds4_token_text(w->engine, token, &text_len); @@ -7842,8 +8558,10 @@ static int worker_run_turn(agent_worker *w, const char *user_text) { agent_stream_text(&stream, NULL, 0, true); renderer_finish(&renderer); worker_set_greedy_sampling(w, false); + if (!got_tool && dsml.state == AGENT_DSML_DONE && dsml.calls.len > 0) + got_tool = true; if (interrupted) { - ds4_tokens_push(&w->transcript, ds4_token_eos(w->engine)); + agent_worker_append_assistant_turn_end(w); agent_dsml_parser_free(&dsml); agent_publish_system_status(w, "Stopped by user"); worker_clear_interrupt(w); @@ -7865,10 +8583,12 @@ static int worker_run_turn(agent_worker *w, const char *user_text) { { malformed_tool = true; snprintf(dsml.error, sizeof(dsml.error), + tool_syntax == AGENT_TOOL_SYNTAX_GLM ? + "incomplete GLM tool call" : "incomplete DSML tool call"); } - ds4_tokens_push(&w->transcript, ds4_token_eos(w->engine)); + agent_worker_append_assistant_turn_end(w); if (!got_tool && !malformed_tool && !early_tool_error) { agent_dsml_parser_free(&dsml); @@ -7887,17 +8607,21 @@ static int worker_run_turn(agent_worker *w, const char *user_text) { tool_result = agent_buf_take(&b); } else if (malformed_tool) { agent_buf b = {0}; - agent_buf_puts(&b, "Tool error: invalid DSML tool call: "); + agent_buf_puts(&b, tool_syntax == AGENT_TOOL_SYNTAX_GLM ? + "Tool error: invalid GLM tool call: " : + "Tool error: invalid DSML tool call: "); agent_buf_puts(&b, dsml.error[0] ? dsml.error : "parse error"); agent_buf_puts(&b, "\n"); - agent_buf_puts(&b, agent_dsml_syntax_reminder); + agent_buf_puts(&b, tool_syntax == AGENT_TOOL_SYNTAX_GLM ? + agent_glm_syntax_reminder : + agent_dsml_syntax_reminder); tool_result = agent_buf_take(&b); } else { tool_result = agent_execute_tool_calls(w, &dsml.calls); } int projected_tokens = 0; - if (!agent_tool_result_fits_context(w, tool_result, - AGENT_TOOL_RESULT_RESERVE_TOKENS, + int result_reserve = agent_tool_result_reserve_tokens(w); + if (!agent_tool_result_fits_context(w, tool_result, result_reserve, &projected_tokens)) { if (!agent_worker_compact(w, "tool result would exceed context", @@ -7913,8 +8637,7 @@ static int worker_run_turn(agent_worker *w, const char *user_text) { agent_set_error(w, compact_err[0] ? compact_err : "context compaction failed"); return 1; } - if (!agent_tool_result_fits_context(w, tool_result, - AGENT_TOOL_RESULT_RESERVE_TOKENS, + if (!agent_tool_result_fits_context(w, tool_result, result_reserve, &projected_tokens)) { free(tool_result); @@ -7924,8 +8647,8 @@ static int worker_run_turn(agent_worker *w, const char *user_text) { "Tool error: tool result still does not fit after context compaction " "(projected_prompt=%d tokens, ctx=%d, reserve=%d). " "Retry with a smaller read/search/bash output.\n", - projected_tokens, w->cfg->gen.ctx_size, - AGENT_TOOL_RESULT_RESERVE_TOKENS); + projected_tokens, agent_worker_effective_ctx_size(w), + result_reserve); agent_buf_puts(&b, msg); tool_result = agent_buf_take(&b); if (!agent_tool_result_fits_context(w, tool_result, 16, NULL)) { @@ -7954,6 +8677,107 @@ static int worker_run_turn(agent_worker *w, const char *user_text) { } } +static int worker_run_raw_prompt(agent_worker *w, const char *user_text) { + agent_config *cfg = w->cfg; + pthread_mutex_lock(&w->mu); + w->interrupt = false; + w->status.error[0] = '\0'; + agent_wake_locked(w); + pthread_mutex_unlock(&w->mu); + + ds4_tokens prompt = {0}; + ds4_tokenize_text(w->engine, user_text ? user_text : "", &prompt); + if (prompt.len <= 0) { + ds4_tokens_free(&prompt); + agent_set_error(w, "raw prompt tokenized to no tokens"); + return 1; + } + + agent_trace_text(w, "raw-prompt", user_text ? user_text : "", + user_text ? strlen(user_text) : 0); + agent_trace_tokens(w, "raw_prompt_tokens", &prompt, 0); + + char err[160] = {0}; + int sync_rc = agent_worker_sync_tokens(w, &prompt, true, err, sizeof(err)); + if (sync_rc == DS4_SESSION_SYNC_INTERRUPTED) { + worker_clear_interrupt(w); + agent_set_status(w, AGENT_WORKER_IDLE); + ds4_tokens_free(&prompt); + return 0; + } + if (sync_rc != 0) { + agent_set_error(w, err[0] ? err : "raw prompt processing failed"); + ds4_tokens_free(&prompt); + return 1; + } + + ds4_tokens_free(&w->transcript); + ds4_tokens_copy(&w->transcript, &prompt); + + int max_tokens = cfg->gen.n_predict; + int room = ds4_session_ctx(w->session) - ds4_session_pos(w->session); + if (room <= 1) max_tokens = 0; + else if (max_tokens > room - 1) max_tokens = room - 1; + + uint64_t rng = cfg->gen.seed ? cfg->gen.seed : + ((uint64_t)time(NULL) ^ ((uint64_t)getpid() << 32) ^ (uint64_t)clock()); + int generated = 0; + double t0 = now_sec(); + + pthread_mutex_lock(&w->mu); + w->status.state = AGENT_WORKER_GENERATING; + w->status.prefill_tps = 0.0; + w->status.generated = 0; + w->status.gen_tps = 0.0; + w->status.greedy_sampling = cfg->gen.temperature <= 0.0f; + agent_wake_locked(w); + pthread_mutex_unlock(&w->mu); + + while (generated < max_tokens && !worker_should_interrupt(w)) { + int token = ds4_session_sample(w->session, + cfg->gen.temperature, + 0, + cfg->gen.top_p, + cfg->gen.min_p, + &rng); + if (ds4_token_is_stop(w->engine, token)) break; + + size_t text_len = 0; + char *text = ds4_token_text(w->engine, token, &text_len); + agent_trace_token(w, token, text, text_len, generated + 1); + + if (ds4_session_eval(w->session, token, err, sizeof(err)) != 0) { + free(text); + agent_set_error(w, err[0] ? err : "raw decode failed"); + ds4_tokens_free(&prompt); + return 1; + } + + ds4_tokens_push(&w->transcript, token); + agent_publish(w, text, text_len); + free(text); + generated++; + + double dt = now_sec() - t0; + pthread_mutex_lock(&w->mu); + w->status.generated = generated; + w->status.gen_tps = dt > 0.0 ? (double)generated / dt : 0.0; + agent_wake_locked(w); + pthread_mutex_unlock(&w->mu); + } + + if (worker_should_interrupt(w)) { + worker_clear_interrupt(w); + agent_set_status(w, AGENT_WORKER_IDLE); + ds4_tokens_free(&prompt); + return 0; + } + + agent_set_status(w, AGENT_WORKER_IDLE); + ds4_tokens_free(&prompt); + return 0; +} + static void worker_request_save(agent_worker *w) { pthread_mutex_lock(&w->mu); w->save_requested = true; @@ -8068,16 +8892,21 @@ static void worker_run_deferred_compact(agent_worker *w) { static void *worker_main(void *arg) { agent_worker *w = arg; agent_trace(w, "agent worker start ctx=%d backend=%s model=%s trace=%s", - w->cfg->gen.ctx_size, + agent_worker_effective_ctx_size(w), ds4_backend_name(w->cfg->engine.backend), w->cfg->engine.model_path ? w->cfg->engine.model_path : "", w->cfg->gen.trace_path ? w->cfg->gen.trace_path : ""); char init_err[160] = {0}; - if (!agent_worker_wait_distributed_route(w, init_err, sizeof(init_err)) || - !agent_worker_reset_to_sysprompt(w, init_err, sizeof(init_err))) { + bool init_ok = agent_worker_wait_distributed_route(w, init_err, sizeof(init_err)); + if (init_ok && !w->cfg->gen.raw_prompt) + init_ok = agent_worker_reset_to_sysprompt(w, init_err, sizeof(init_err)); + if (!init_ok) { agent_set_error(w, init_err[0] ? init_err : "failed to initialize system prompt"); } - agent_trace_tokens(w, "initial_system_prompt", &w->transcript, 0); + if (w->cfg->gen.raw_prompt) + agent_trace(w, "raw one-shot prompt mode: skipping agent system prompt"); + else + agent_trace_tokens(w, "initial_system_prompt", &w->transcript, 0); pthread_mutex_lock(&w->mu); w->initialized = true; agent_wake_locked(w); @@ -8111,7 +8940,10 @@ static void *worker_main(void *arg) { w->cmd_text = NULL; pthread_mutex_unlock(&w->mu); - worker_run_turn(w, cmd); + if (w->cfg->gen.raw_prompt) + worker_run_raw_prompt(w, cmd); + else + worker_run_turn(w, cmd); free(cmd); worker_apply_pending_power(w); worker_run_deferred_compact(w); @@ -8170,6 +9002,7 @@ static bool worker_submit(agent_worker *w, const char *text) { * depends on this to avoid exiting in the small handoff window between * accepting stdin and starting generation. */ w->status.state = AGENT_WORKER_PREFILL; + w->progress_direct = false; w->status.prefill_done = 0; w->status.prefill_total = 0; w->status.prefill_label = agent_next_prefill_label(); @@ -8227,7 +9060,7 @@ static void worker_consume(agent_worker *w, char **out, size_t *out_len, agent_s w->out_cap = 0; } w->status.ctx_used = w->transcript.len; - w->status.ctx_size = w->cfg->gen.ctx_size; + w->status.ctx_size = agent_worker_effective_ctx_size(w); w->status.power_percent = worker_status_power_locked(w); if (status) *status = w->status; w->wake_pending = false; @@ -8237,7 +9070,7 @@ static void worker_consume(agent_worker *w, char **out, size_t *out_len, agent_s static void worker_get_status(agent_worker *w, agent_status *status) { pthread_mutex_lock(&w->mu); w->status.ctx_used = w->transcript.len; - w->status.ctx_size = w->cfg->gen.ctx_size; + w->status.ctx_size = agent_worker_effective_ctx_size(w); w->status.power_percent = worker_status_power_locked(w); *status = w->status; pthread_mutex_unlock(&w->mu); @@ -8255,7 +9088,7 @@ static bool worker_is_idle(agent_worker *w) { static bool worker_is_initialized(agent_worker *w, agent_status *status) { pthread_mutex_lock(&w->mu); w->status.ctx_used = w->transcript.len; - w->status.ctx_size = w->cfg->gen.ctx_size; + w->status.ctx_size = agent_worker_effective_ctx_size(w); w->status.power_percent = worker_status_power_locked(w); if (status) *status = w->status; bool initialized = w->initialized; @@ -10219,11 +11052,10 @@ int main(int argc, char **argv) { cfg.chdir_path, strerror(errno)); return 1; } + cfg.engine.context_size = cfg.gen.ctx_size; ds4_engine *engine = NULL; if (ds4_engine_open(&engine, &cfg.engine) != 0) return 1; - log_context_memory(cfg.engine.backend, - cfg.gen.ctx_size, - cfg.engine.prefill_chunk); + agent_apply_model_sampling_defaults(engine, &cfg.gen); struct sigaction old_int; struct sigaction sa; diff --git a/ds4_bench.c b/ds4_bench.c index 143ea1bd..dbc0143d 100644 --- a/ds4_bench.c +++ b/ds4_bench.c @@ -6,10 +6,10 @@ * * The benchmark walks one fixed token sequence to configurable context * frontiers, measuring only the newest prefill interval at each frontier. It - * then snapshots the live session in memory, performs a fixed greedy decode - * run without allowing EOS, restores the snapshot, and continues to the next - * frontier. Snapshot save/restore time is intentionally outside both timing - * windows. + * then snapshots the live session in memory when the payload is small enough, + * performs a fixed greedy decode run without allowing EOS, restores the + * snapshot or replays the prefix, and continues to the next frontier. Snapshot + * save/restore time is intentionally outside both timing windows. */ #include @@ -22,6 +22,8 @@ #include #include +#define DS4_BENCH_DEFAULT_SNAPSHOT_MAX_BYTES (UINT64_C(1) << 30) + typedef struct { const char *model_path; const char *prompt_path; @@ -40,6 +42,7 @@ typedef struct { uint32_t prefill_chunk; uint32_t ssd_streaming_cache_experts; uint64_t ssd_streaming_cache_bytes; + uint32_t ssd_streaming_full_layers; uint32_t ssd_streaming_preload_experts; uint64_t simulate_used_memory_bytes; double step_mul; @@ -49,6 +52,7 @@ typedef struct { bool quality; bool ssd_streaming; bool ssd_streaming_cold; + bool ssd_streaming_full_layers_set; } bench_config; static double bench_now_sec(void) { @@ -57,6 +61,29 @@ static double bench_now_sec(void) { return (double)ts.tv_sec + (double)ts.tv_nsec / 1000000000.0; } +static uint64_t bench_snapshot_max_bytes(void) { + const char *env = getenv("DS4_BENCH_SNAPSHOT_MAX_BYTES"); + if (!env || env[0] == '\0') return DS4_BENCH_DEFAULT_SNAPSHOT_MAX_BYTES; + if (!strcmp(env, "unlimited") || !strcmp(env, "UNLIMITED") || + !strcmp(env, "inf") || !strcmp(env, "INF")) { + return UINT64_MAX; + } + char *end = NULL; + unsigned long long v = strtoull(env, &end, 10); + if (env[0] == '\0' || !end || *end != '\0') { + fprintf(stderr, + "ds4-bench: invalid DS4_BENCH_SNAPSHOT_MAX_BYTES=%s; using default %llu\n", + env, + (unsigned long long)DS4_BENCH_DEFAULT_SNAPSHOT_MAX_BYTES); + return DS4_BENCH_DEFAULT_SNAPSHOT_MAX_BYTES; + } + return (uint64_t)v; +} + +static double bytes_to_gib(uint64_t bytes) { + return (double)bytes / (1024.0 * 1024.0 * 1024.0); +} + static void usage(FILE *fp, const char *topic) { ds4_help_print(fp, DS4_HELP_BENCH, topic); } @@ -260,6 +287,10 @@ static bench_config parse_options(int argc, char **argv) { } c.ssd_streaming_cache_experts = experts; c.ssd_streaming_cache_bytes = bytes; + } else if (!strcmp(arg, "--ssd-streaming-full-layers")) { + int v = parse_nonnegative_int(need_arg(&i, argc, argv, arg), arg); + c.ssd_streaming_full_layers = (uint32_t)v; + c.ssd_streaming_full_layers_set = true; } else if (!strcmp(arg, "--ssd-streaming-preload-experts")) { int v = parse_int(need_arg(&i, argc, argv, arg), arg); if (v <= 0) { @@ -441,11 +472,13 @@ static int next_frontier(const bench_config *c, int cur) { static void log_context_memory(ds4_backend backend, int ctx_size, - uint32_t prefill_chunk) { + uint32_t prefill_chunk, + bool ssd_streaming) { ds4_context_memory m = - ds4_context_memory_estimate_with_prefill(backend, - ctx_size, - prefill_chunk); + ds4_context_memory_estimate_with_prefill_mode(backend, + ctx_size, + prefill_chunk, + ssd_streaming); fprintf(stderr, "ds4-bench: context buffers %.2f MiB (ctx=%d, backend=%s, prefill_chunk=%u, raw_kv_rows=%u, compressed_kv_rows=%u)\n", (double)m.total_bytes / (1024.0 * 1024.0), @@ -512,9 +545,11 @@ int main(int argc, char **argv) { .model_path = cfg.model_path, .backend = cfg.backend, .n_threads = cfg.threads, + .context_size = cfg.ctx_alloc, .prefill_chunk = cfg.prefill_chunk, .ssd_streaming_cache_experts = cfg.ssd_streaming_cache_experts, .ssd_streaming_cache_bytes = cfg.ssd_streaming_cache_bytes, + .ssd_streaming_full_layers = cfg.ssd_streaming_full_layers, .ssd_streaming_preload_experts = cfg.ssd_streaming_preload_experts, .simulate_used_memory_bytes = cfg.simulate_used_memory_bytes, .power_percent = cfg.power_percent, @@ -522,6 +557,7 @@ int main(int argc, char **argv) { .quality = cfg.quality, .ssd_streaming = cfg.ssd_streaming, .ssd_streaming_cold = cfg.ssd_streaming_cold, + .ssd_streaming_full_layers_set = cfg.ssd_streaming_full_layers_set, .expert_profile_path = cfg.expert_profile_path, .distributed = cfg.dist, }; @@ -532,7 +568,10 @@ int main(int argc, char **argv) { } ds4_engine *engine = NULL; if (ds4_engine_open(&engine, &opt) != 0) return 1; - log_context_memory(cfg.backend, cfg.ctx_alloc, cfg.prefill_chunk); + log_context_memory(cfg.backend, + cfg.ctx_alloc, + cfg.prefill_chunk, + cfg.ssd_streaming); char *text = read_file(cfg.prompt_path ? cfg.prompt_path : cfg.chat_prompt_path); ds4_tokens prompt = {0}; @@ -581,12 +620,14 @@ int main(int argc, char **argv) { return 1; } } - fprintf(out, "ctx_tokens,prefill_tokens,prefill_tps,gen_tokens,gen_tps,kvcache_bytes\n"); + fprintf(out, "ctx_tokens,prefill_tokens,prefill_tps,gen_tokens,gen_tps,gen_first_ms,gen_steady_tokens,gen_steady_tps,kvcache_bytes\n"); fflush(out); const int eos = ds4_token_eos(engine); const bool distributed = cfg.dist.role == DS4_DISTRIBUTED_COORDINATOR; ds4_session_snapshot snap = {0}; + const uint64_t snapshot_max_bytes = bench_snapshot_max_bytes(); + bool warned_large_snapshot = false; char err[256]; int previous = 0; int rc = 0; @@ -613,15 +654,37 @@ int main(int argc, char **argv) { break; } - if (cfg.gen_tokens > 0 && !distributed) { - if (ds4_session_save_snapshot(session, &snap, err, sizeof(err)) != 0) { - fprintf(stderr, "ds4-bench: snapshot at %d failed: %s\n", frontier, err); - rc = 1; - break; + const bool need_restore_after_generation = + cfg.gen_tokens > 0 && frontier < cfg.ctx_max; + bool have_snapshot = false; + if (need_restore_after_generation && !distributed && + getenv("DS4_BENCH_DISABLE_SNAPSHOT") == NULL) { + const uint64_t payload_bytes = ds4_session_payload_bytes(session); + const bool large_snapshot_forced = + getenv("DS4_BENCH_FORCE_SNAPSHOT") != NULL; + if (payload_bytes > snapshot_max_bytes && !large_snapshot_forced) { + if (!warned_large_snapshot) { + fprintf(stderr, + "ds4-bench: session payload snapshot is %.2f GiB, above the %.2f GiB benchmark limit; " + "replaying prefixes instead (set DS4_BENCH_FORCE_SNAPSHOT=1 to force snapshots)\n", + bytes_to_gib(payload_bytes), + bytes_to_gib(snapshot_max_bytes)); + warned_large_snapshot = true; + } + } else if (payload_bytes > 0) { + if (ds4_session_save_snapshot(session, &snap, err, sizeof(err)) != 0) { + fprintf(stderr, "ds4-bench: snapshot at %d failed: %s\n", frontier, err); + rc = 1; + break; + } + have_snapshot = true; } } const double gen_t0 = bench_now_sec(); + double gen_first_sec = 0.0; + double gen_steady_sec = 0.0; + int gen_done = 0; for (int i = 0; i < cfg.gen_tokens; i++) { if (ds4_session_pos(session) + 1 >= ds4_session_ctx(session)) { fprintf(stderr, "ds4-bench: generation would exceed allocated context at frontier %d\n", frontier); @@ -634,20 +697,25 @@ int main(int argc, char **argv) { rc = 1; break; } + const double token_t0 = bench_now_sec(); if (ds4_session_eval(session, token, err, sizeof(err)) != 0) { fprintf(stderr, "ds4-bench: decode at frontier %d failed: %s\n", frontier, err); rc = 1; break; } + const double token_t1 = bench_now_sec(); + if (i == 0) gen_first_sec = token_t1 - token_t0; + else gen_steady_sec += token_t1 - token_t0; + gen_done++; } const double gen_t1 = bench_now_sec(); if (rc != 0) break; - if (cfg.gen_tokens == 0) { - /* Pure prefill benchmark: leave the live session at the frontier. */ - } else if (distributed) { + if (!need_restore_after_generation) { + /* Nothing later depends on the frontier state. */ + } else if (distributed || !have_snapshot) { if (ds4_session_sync(session, &prefix, err, sizeof(err)) != 0) { - fprintf(stderr, "ds4-bench: distributed replay restore at %d failed: %s\n", frontier, err); + fprintf(stderr, "ds4-bench: replay restore at %d failed: %s\n", frontier, err); rc = 1; break; } @@ -660,14 +728,18 @@ int main(int argc, char **argv) { } const double gen_sec = gen_t1 - gen_t0; + const int gen_steady_tokens = gen_done > 1 ? gen_done - 1 : 0; fprintf(out, - "%d,%d,%.2f,%d,%.2f,%llu\n", + "%d,%d,%.2f,%d,%.2f,%.3f,%d,%.2f,%llu\n", frontier, prefill_tokens, prefill_sec > 0.0 ? (double)prefill_tokens / prefill_sec : 0.0, - cfg.gen_tokens, - gen_sec > 0.0 ? (double)cfg.gen_tokens / gen_sec : 0.0, - (unsigned long long)(distributed ? 0 : snap.len)); + gen_done, + gen_sec > 0.0 ? (double)gen_done / gen_sec : 0.0, + gen_first_sec * 1000.0, + gen_steady_tokens, + gen_steady_sec > 0.0 ? (double)gen_steady_tokens / gen_steady_sec : 0.0, + (unsigned long long)(have_snapshot ? snap.len : 0)); fflush(out); previous = frontier; diff --git a/ds4_cli.c b/ds4_cli.c index ab787b23..fb487a4c 100644 --- a/ds4_cli.c +++ b/ds4_cli.c @@ -6,7 +6,7 @@ /* ds4 CLI. * - * One-shot mode builds a single DeepSeek chat prompt and exits. Interactive + * One-shot mode builds a single model-family chat prompt and exits. Interactive * mode keeps a rendered token transcript plus one ds4_session, so follow-up * turns reuse the live Metal KV checkpoint just like the server does. The CLI * deliberately keeps policy here and leaves graph/cache mechanics inside the @@ -29,16 +29,21 @@ typedef struct { const char *prompt; const char *system; + bool raw_prompt; int n_predict; int ctx_size; float temperature; float top_p; float min_p; + bool temperature_set; + bool top_p_set; + bool min_p_set; uint64_t seed; bool dump_tokens; const char *dump_logits_path; const char *dump_logprobs_path; int dump_logprobs_top_k; + int decode_consistency_tokens; const char *perplexity_file_path; const char *imatrix_dataset_path; const char *imatrix_output_path; @@ -143,6 +148,16 @@ static int parse_int(const char *s, const char *opt) { return (int)v; } +static int parse_nonnegative_int(const char *s, const char *opt) { + char *end = NULL; + long v = strtol(s, &end, 10); + if (s[0] == '\0' || *end != '\0' || v < 0 || v > INT32_MAX) { + fprintf(stderr, "ds4: invalid value for %s: %s\n", opt, s); + exit(2); + } + return (int)v; +} + static uint64_t parse_u64(const char *s, const char *opt) { char *end = NULL; unsigned long long v = strtoull(s, &end, 10); @@ -192,19 +207,40 @@ static ds4_backend default_backend(void) { static void log_context_memory(ds4_backend backend, int ctx_size, - uint32_t prefill_chunk) { + uint32_t prefill_chunk, + bool ssd_streaming) { ds4_context_memory m = - ds4_context_memory_estimate_with_prefill(backend, - ctx_size, - prefill_chunk); + ds4_context_memory_estimate_with_prefill_mode(backend, + ctx_size, + prefill_chunk, + ssd_streaming); + const uint64_t kv_bytes = m.raw_bytes + m.compressed_bytes; + const uint64_t total_bytes = kv_bytes + m.scratch_bytes; + const bool color = ds4_log_is_tty(stderr); + const char *green = color ? "\x1b[32m" : ""; + const char *bright_green = color ? "\x1b[1;32m" : ""; + const char *reset = color ? "\x1b[0m" : ""; fprintf(stderr, - "ds4: context buffers %.2f MiB (ctx=%d, backend=%s, prefill_chunk=%u, raw_kv_rows=%u, compressed_kv_rows=%u)\n", - (double)m.total_bytes / (1024.0 * 1024.0), + "%sds4: memory: KV %.2f GiB (raw %.2f + compressed %.2f) " + "+ buffers %.2f GiB = %s%.2f GiB context%s\n", + green, + (double)kv_bytes / 1073741824.0, + (double)m.raw_bytes / 1073741824.0, + (double)m.compressed_bytes / 1073741824.0, + (double)m.scratch_bytes / 1073741824.0, + bright_green, + (double)total_bytes / 1073741824.0, + reset); + fprintf(stderr, + "%sds4: memory detail: ctx=%d prefill_cap=%u raw_kv_rows=%u " + "compressed_kv_rows=%u backend=%s%s\n", + green, ctx_size, - ds4_backend_name(backend), m.prefill_cap, m.raw_cap, - m.comp_cap); + m.comp_cap, + ds4_backend_name(backend), + reset); } static ds4_think_mode cli_effective_think_mode(const cli_generation_options *gen) { @@ -245,7 +281,8 @@ static void cli_prefill_progress_cb(void *ud, const char *event, int current, in (void)total; cli_prefill_progress *p = ud; if (!p || !event || p->input_tokens <= 0) return; - const bool is_display = strcmp(event, "prefill_display") == 0; + const bool is_display = + strcmp(event, "prefill_display") == 0; if (strcmp(event, "prefill_chunk") && !is_display) return; if (is_display && !p->use_color) return; @@ -282,8 +319,22 @@ static void cli_prefill_progress_cb(void *ud, const char *event, int current, in } static bool is_rendered_chat_prompt(const char *prompt) { - const char *bos = "<｜begin▁of▁sentence｜>"; - return prompt && strncmp(prompt, bos, strlen(bos)) == 0; + static const char *prefixes[] = { + "<｜begin▁of▁sentence｜>", + "<｜User｜>", + "[gMASK]", + "", + "<|system|>", + "<|user|>", + "<|assistant|>", + "<|observation|>", + }; + if (!prompt) return false; + for (size_t i = 0; i < sizeof(prefixes) / sizeof(prefixes[0]); i++) { + size_t n = strlen(prefixes[i]); + if (strncmp(prompt, prefixes[i], n) == 0) return true; + } + return false; } typedef struct { @@ -411,7 +462,9 @@ static void print_generated_token(void *ud, int token) { } static void build_prompt(ds4_engine *engine, const cli_generation_options *gen, ds4_tokens *out) { - if (is_rendered_chat_prompt(gen->prompt)) { + if (gen->raw_prompt) { + ds4_tokenize_text(engine, gen->prompt ? gen->prompt : "", out); + } else if (is_rendered_chat_prompt(gen->prompt)) { ds4_tokenize_rendered_chat(engine, gen->prompt, out); } else { ds4_encode_chat_prompt(engine, gen->system, gen->prompt, @@ -419,6 +472,16 @@ static void build_prompt(ds4_engine *engine, const cli_generation_options *gen, } } +static void cli_apply_model_sampling_defaults( + ds4_engine *engine, + cli_generation_options *gen) { + if (!engine || !gen || !ds4_engine_is_glm_dsa(engine)) return; + + if (!gen->temperature_set) gen->temperature = 1.0f; + if (!gen->top_p_set) gen->top_p = 0.95f; + if (!gen->min_p_set) gen->min_p = 0.0f; +} + static int run_sampled_generation(ds4_engine *engine, const cli_config *cfg, const ds4_tokens *prompt) { ds4_session *session = NULL; if (ds4_session_create(&session, engine, cfg->gen.ctx_size) != 0) { @@ -429,6 +492,9 @@ static int run_sampled_generation(ds4_engine *engine, const cli_config *cfg, con ds4_session_free(session); return 1; } + /* Pay the one-time first-submission GPU cost before the prefill timer + * starts (matches the TP worker's startup warmup). */ + ds4_session_gpu_warmup(session); char err[160]; ds4_think_mode think_mode = cli_effective_think_mode(&cfg->gen); @@ -477,7 +543,7 @@ static int run_sampled_generation(ds4_engine *engine, const cli_config *cfg, con while (generated < max_tokens && !cli_interrupt_requested()) { int token = ds4_session_sample(session, cfg->gen.temperature, 0, cfg->gen.top_p, cfg->gen.min_p, &rng); - if (token == ds4_token_eos(engine)) break; + if (ds4_token_is_stop_for_think_mode(engine, token, think_mode)) break; int toks[17]; int ntok = 0; @@ -499,6 +565,16 @@ static int run_sampled_generation(ds4_engine *engine, const cli_config *cfg, con return 1; } } else { + size_t piece_len = 0; + char *piece = ds4_token_text(engine, token, &piece_len); + token_printer_write_text(&printer, piece, piece_len); + fflush(stdout); + free(piece); + generated++; + if (generated >= max_tokens || cli_interrupt_requested()) { + continue; + } + cli_dist_busy_set(cfg, true); int eval_rc = ds4_session_eval(session, token, err, sizeof(err)); cli_dist_busy_set(cfg, false); @@ -507,13 +583,12 @@ static int run_sampled_generation(ds4_engine *engine, const cli_config *cfg, con ds4_session_free(session); return 1; } - toks[0] = token; - ntok = 1; + continue; } bool stop = false; for (int j = 0; j < ntok; j++) { - if (toks[j] == ds4_token_eos(engine)) { + if (ds4_token_is_stop_for_think_mode(engine, toks[j], think_mode)) { stop = true; break; } @@ -767,7 +842,7 @@ static int run_logprob_dump(ds4_engine *engine, const cli_config *cfg, const ds4 } fputs("]}", fp); - if (token == ds4_token_eos(engine)) break; + if (ds4_token_is_stop(engine, token)) break; if (ds4_session_eval(session, token, err, sizeof(err)) != 0) { fprintf(stderr, "ds4: decode failed while dumping logprobs: %s\n", err); free(scores); @@ -788,6 +863,176 @@ static int run_logprob_dump(ds4_engine *engine, const cli_config *cfg, const ds4 return 0; } +static void print_diag_token(FILE *fp, ds4_engine *engine, int token) { + fputs("{\"token\":", fp); + json_write_token(fp, engine, token); + fputc('}', fp); +} + +static void print_diag_top(FILE *fp, ds4_engine *engine, const char *label, + const ds4_token_score *scores, int n) { + fprintf(fp, "%s:", label); + for (int i = 0; i < n && scores[i].id >= 0; i++) { + fputc(' ', fp); + json_write_token(fp, engine, scores[i].id); + fprintf(fp, "@%.6g", scores[i].logit); + } + fputc('\n', fp); +} + +static int run_decode_consistency(ds4_engine *engine, const cli_config *cfg, + const ds4_tokens *prompt) { + if (cfg->dist && cfg->dist->role != DS4_DISTRIBUTED_NONE) { + fprintf(stderr, "ds4: --decode-consistency is local-session only\n"); + return 1; + } + if (cfg->gen.decode_consistency_tokens < 0) { + fprintf(stderr, "ds4: --decode-consistency requires a non-negative token count\n"); + return 1; + } + + const int vocab = ds4_engine_vocab_size(engine); + float *live_logits = malloc((size_t)vocab * sizeof(live_logits[0])); + float *fresh_logits = malloc((size_t)vocab * sizeof(fresh_logits[0])); + if (!live_logits || !fresh_logits) { + free(live_logits); + free(fresh_logits); + fprintf(stderr, "ds4: out of memory allocating diagnostic logits\n"); + return 1; + } + + ds4_tokens prefix = {0}; + ds4_tokens_copy(&prefix, prompt); + + ds4_session *live = NULL; + char err[160]; + if (ds4_session_create(&live, engine, cfg->gen.ctx_size) != 0) { + fprintf(stderr, "ds4: --decode-consistency requires a graph session backend\n"); + ds4_tokens_free(&prefix); + free(live_logits); + free(fresh_logits); + return 1; + } + + cli_prefill_progress progress = { + .base_tokens = 0, + .input_tokens = prompt->len, + .use_color = ds4_log_is_tty(stderr), + }; + ds4_session_set_progress(live, cli_prefill_progress_cb, &progress); + ds4_session_set_display_progress(live, + progress.use_color ? cli_prefill_progress_cb : NULL, + progress.use_color ? &progress : NULL); + if (ds4_session_sync(live, prompt, err, sizeof(err)) != 0) { + ds4_session_set_progress(live, NULL, NULL); + ds4_session_set_display_progress(live, NULL, NULL); + fprintf(stderr, "ds4: prompt processing failed: %s\n", err); + ds4_session_free(live); + ds4_tokens_free(&prefix); + free(live_logits); + free(fresh_logits); + return 1; + } + ds4_session_set_progress(live, NULL, NULL); + ds4_session_set_display_progress(live, NULL, NULL); + + fprintf(stderr, "ds4: decode-consistency prompt_tokens=%d check_after=%d\n", + prompt->len, cfg->gen.decode_consistency_tokens); + for (int i = 0; i < cfg->gen.decode_consistency_tokens; i++) { + int token = ds4_session_argmax(live); + fprintf(stderr, "ds4: decode-consistency selected[%d]=", i); + print_diag_token(stderr, engine, token); + fputc('\n', stderr); + ds4_tokens_push(&prefix, token); + if (ds4_session_eval(live, token, err, sizeof(err)) != 0) { + fprintf(stderr, "ds4: decode failed during consistency check: %s\n", err); + ds4_session_free(live); + ds4_tokens_free(&prefix); + free(live_logits); + free(fresh_logits); + return 1; + } + if (ds4_token_is_stop(engine, token)) break; + } + + ds4_token_score live_top[10]; + int live_top_n = ds4_session_top_logprobs(live, live_top, 10); + if (ds4_session_copy_logits(live, live_logits, vocab) != vocab) { + fprintf(stderr, "ds4: failed to copy live logits\n"); + ds4_session_free(live); + ds4_tokens_free(&prefix); + free(live_logits); + free(fresh_logits); + return 1; + } + ds4_session_free(live); + live = NULL; + + ds4_session *fresh = NULL; + if (ds4_session_create(&fresh, engine, cfg->gen.ctx_size) != 0) { + fprintf(stderr, "ds4: failed to create fresh diagnostic session\n"); + ds4_tokens_free(&prefix); + free(live_logits); + free(fresh_logits); + return 1; + } + progress.input_tokens = prefix.len; + ds4_session_set_progress(fresh, cli_prefill_progress_cb, &progress); + ds4_session_set_display_progress(fresh, + progress.use_color ? cli_prefill_progress_cb : NULL, + progress.use_color ? &progress : NULL); + if (ds4_session_sync(fresh, &prefix, err, sizeof(err)) != 0) { + ds4_session_set_progress(fresh, NULL, NULL); + ds4_session_set_display_progress(fresh, NULL, NULL); + fprintf(stderr, "ds4: fresh prompt processing failed: %s\n", err); + ds4_session_free(fresh); + ds4_tokens_free(&prefix); + free(live_logits); + free(fresh_logits); + return 1; + } + ds4_session_set_progress(fresh, NULL, NULL); + ds4_session_set_display_progress(fresh, NULL, NULL); + + ds4_token_score fresh_top[10]; + int fresh_top_n = ds4_session_top_logprobs(fresh, fresh_top, 10); + if (ds4_session_copy_logits(fresh, fresh_logits, vocab) != vocab) { + fprintf(stderr, "ds4: failed to copy fresh logits\n"); + ds4_session_free(fresh); + ds4_tokens_free(&prefix); + free(live_logits); + free(fresh_logits); + return 1; + } + ds4_session_free(fresh); + + double ss = 0.0; + float max_abs = 0.0f; + int max_i = 0; + for (int i = 0; i < vocab; i++) { + float d = fabsf(live_logits[i] - fresh_logits[i]); + if (d > max_abs) { + max_abs = d; + max_i = i; + } + ss += (double)d * (double)d; + } + + fprintf(stderr, + "ds4: decode-consistency compared prefix_tokens=%d vocab=%d " + "max_abs=%.9g at token=%d live=%.9g fresh=%.9g rms=%.9g\n", + prefix.len, vocab, max_abs, max_i, + live_logits[max_i], fresh_logits[max_i], + sqrt(ss / (double)vocab)); + print_diag_top(stderr, engine, "ds4: live_top", live_top, live_top_n); + print_diag_top(stderr, engine, "ds4: fresh_top", fresh_top, fresh_top_n); + + ds4_tokens_free(&prefix); + free(live_logits); + free(fresh_logits); + return live_top_n > 0 && fresh_top_n > 0 && live_top[0].id == fresh_top[0].id ? 0 : 1; +} + static int run_perplexity_file(ds4_engine *engine, const cli_config *cfg) { char *text = read_prompt_file(cfg->gen.perplexity_file_path, true); ds4_tokens tokens = {0}; @@ -901,6 +1146,11 @@ static int run_generation(ds4_engine *engine, const cli_config *cfg) { ds4_tokens_free(&prompt); return rc; } + if (cfg->gen.decode_consistency_tokens > 0) { + rc = run_decode_consistency(engine, cfg, &prompt); + ds4_tokens_free(&prompt); + return rc; + } const bool diagnostic = cfg->gen.dump_tokens || cfg->gen.head_test || @@ -920,36 +1170,39 @@ static int run_generation(ds4_engine *engine, const cli_config *cfg) { fprintf(stderr, "ds4: diagnostic run completed on the native %s path.\n", ds4_backend_name(cfg->engine.backend)); } - } else if (cfg->engine.distributed.role == DS4_DISTRIBUTED_COORDINATOR || - cfg->engine.tp.role == DS4_TP_LEADER || - getenv("DS4_CLI_FORCE_SESSION") != NULL || - cfg->gen.temperature > 0.0f || - ds4_engine_mtp_draft_tokens(engine) > 1) { - /* TP leaders always drive the session path: the sync/eval mirroring - * that keeps the worker in lockstep lives there. The env override - * exists so TP-vs-single-node validation compares like with like. */ - rc = run_sampled_generation(engine, cfg, &prompt); } else { - token_printer printer = { - .engine = engine, - .fp = stdout, - .format_thinking = ds4_think_mode_enabled(cli_effective_think_mode(&cfg->gen)), - .in_think = ds4_think_mode_enabled(cli_effective_think_mode(&cfg->gen)), - .use_color = isatty(fileno(stdout)) != 0, - .last_output_newline = true, - }; - cli_prefill_progress progress = { - .base_tokens = 0, - .input_tokens = prompt.len, - .use_color = ds4_log_is_tty(stderr), - }; - rc = ds4_engine_generate_argmax(engine, &prompt, cfg->gen.n_predict, - cfg->gen.ctx_size, - print_generated_token, - generation_done, - &printer, - cli_prefill_progress_cb, - &progress); + if (cfg->engine.distributed.role == DS4_DISTRIBUTED_COORDINATOR || + cfg->engine.tp.role == DS4_TP_LEADER || + getenv("DS4_CLI_FORCE_SESSION") != NULL || + cfg->gen.temperature > 0.0f || + ds4_engine_mtp_draft_tokens(engine) > 1) { + /* TP leaders always drive the session path: the sync/eval + * mirroring that keeps the worker in lockstep lives there. + * The env override exists so TP-vs-single-node validation + * compares like with like. */ + rc = run_sampled_generation(engine, cfg, &prompt); + } else { + token_printer printer = { + .engine = engine, + .fp = stdout, + .format_thinking = ds4_think_mode_enabled(cli_effective_think_mode(&cfg->gen)), + .in_think = ds4_think_mode_enabled(cli_effective_think_mode(&cfg->gen)), + .use_color = isatty(fileno(stdout)) != 0, + .last_output_newline = true, + }; + cli_prefill_progress progress = { + .base_tokens = 0, + .input_tokens = prompt.len, + .use_color = ds4_log_is_tty(stderr), + }; + rc = ds4_engine_generate_argmax(engine, &prompt, cfg->gen.n_predict, + cfg->gen.ctx_size, + print_generated_token, + generation_done, + &printer, + cli_prefill_progress_cb, + &progress); + } } ds4_tokens_free(&prompt); @@ -995,7 +1248,8 @@ typedef struct { ds4_session *session; ds4_tokens transcript; int ctx_size; - int max_prefix_tokens; + int think_prefix_pos; + int think_prefix_tokens; } repl_chat; static void tokens_insert(ds4_tokens *dst, int pos, const ds4_tokens *src) { @@ -1025,23 +1279,49 @@ static void tokens_remove(ds4_tokens *dst, int pos, int n) { dst->len -= n; } -/* Insert/remove the Think Max prefix inside the existing transcript. The - * prefix lives after BOS, before any system/developer text, which mirrors the - * API rendering path. Changing it invalidates the session because every later - * token position would otherwise refer to the wrong prefix. */ -static void repl_chat_apply_max_prefix(ds4_engine *engine, repl_chat *chat, bool enable) { - if (enable && chat->max_prefix_tokens == 0) { - ds4_tokens prefix = {0}; - ds4_chat_append_max_effort_prefix(engine, &prefix); - tokens_insert(&chat->transcript, 1, &prefix); - chat->max_prefix_tokens = prefix.len; - ds4_tokens_free(&prefix); - if (chat->session) ds4_session_invalidate(chat->session); - } else if (!enable && chat->max_prefix_tokens > 0) { - tokens_remove(&chat->transcript, 1, chat->max_prefix_tokens); - chat->max_prefix_tokens = 0; +static const char *repl_glm_reasoning_effort_text(ds4_think_mode mode) { + switch (mode) { + case DS4_THINK_HIGH: return "Reasoning Effort: High"; + case DS4_THINK_MAX: return "Reasoning Effort: Max"; + case DS4_THINK_NONE: return NULL; + } + return NULL; +} + +static void repl_chat_build_think_prefix(ds4_engine *engine, + ds4_think_mode mode, + ds4_tokens *prefix) { + if (ds4_engine_is_glm_dsa(engine)) { + const char *effort = repl_glm_reasoning_effort_text(mode); + if (effort) ds4_chat_append_message(engine, prefix, "system", effort); + } else if (mode == DS4_THINK_MAX) { + ds4_chat_append_max_effort_prefix(engine, prefix); + } +} + +/* Insert/replace the model-family thinking prefix inside the existing + * transcript. It lives immediately after the BOS sequence and before any + * user/system text, matching the GGUF chat templates. */ +static void repl_chat_apply_think_prefix(ds4_engine *engine, + repl_chat *chat, + ds4_think_mode mode) { + ds4_tokens prefix = {0}; + repl_chat_build_think_prefix(engine, mode, &prefix); + + bool same = chat->think_prefix_tokens == prefix.len; + if (same && prefix.len > 0) { + same = !memcmp(chat->transcript.v + chat->think_prefix_pos, + prefix.v, + (size_t)prefix.len * sizeof(prefix.v[0])); + } + if (!same) { + tokens_remove(&chat->transcript, chat->think_prefix_pos, + chat->think_prefix_tokens); + tokens_insert(&chat->transcript, chat->think_prefix_pos, &prefix); + chat->think_prefix_tokens = prefix.len; if (chat->session) ds4_session_invalidate(chat->session); } + ds4_tokens_free(&prefix); } static int repl_chat_create_session(ds4_engine *engine, repl_chat *chat, int ctx_size) { @@ -1059,8 +1339,8 @@ static int repl_chat_create_session(ds4_engine *engine, repl_chat *chat, int ctx static int repl_chat_init(ds4_engine *engine, repl_chat *chat, const cli_config *cfg) { memset(chat, 0, sizeof(*chat)); ds4_chat_begin(engine, &chat->transcript); - repl_chat_apply_max_prefix(engine, chat, - cli_effective_think_mode(&cfg->gen) == DS4_THINK_MAX); + chat->think_prefix_pos = chat->transcript.len; + repl_chat_apply_think_prefix(engine, chat, cli_effective_think_mode(&cfg->gen)); if (cfg->gen.system && cfg->gen.system[0]) { ds4_chat_append_message(engine, &chat->transcript, "system", cfg->gen.system); } @@ -1081,6 +1361,10 @@ static int repl_chat_set_ctx(ds4_engine *engine, repl_chat *chat, int ctx_size) return repl_chat_create_session(engine, chat, ctx_size); } +static bool repl_chat_assistant_turn_uses_eos(ds4_engine *engine) { + return !ds4_engine_is_glm_dsa(engine); +} + /* Run one interactive turn. The transcript is tentatively extended with user * and assistant markers, then ds4_session_sync() decides whether this is a KV * continuation. If prompt processing fails, the transcript rolls back before @@ -1093,7 +1377,7 @@ static int run_chat_turn(ds4_engine *engine, cli_config *cfg, repl_chat *chat, c ds4_think_mode think_mode = ds4_think_mode_for_context(cfg->gen.think_mode, chat->ctx_size); - repl_chat_apply_max_prefix(engine, chat, think_mode == DS4_THINK_MAX); + repl_chat_apply_think_prefix(engine, chat, think_mode); const int rollback_len = chat->transcript.len; ds4_chat_append_message(engine, &chat->transcript, "user", user_text); ds4_chat_append_assistant_prefix(engine, &chat->transcript, think_mode); @@ -1153,7 +1437,7 @@ static int run_chat_turn(ds4_engine *engine, cli_config *cfg, repl_chat *chat, c cfg->gen.top_p, cfg->gen.min_p, &rng); - if (token == ds4_token_eos(engine)) break; + if (ds4_token_is_stop_for_think_mode(engine, token, think_mode)) break; int toks[17]; int ntok = 0; @@ -1174,20 +1458,29 @@ static int run_chat_turn(ds4_engine *engine, cli_config *cfg, repl_chat *chat, c return 1; } } else { + size_t piece_len = 0; + char *piece = ds4_token_text(engine, token, &piece_len); + ds4_tokens_push(&chat->transcript, token); + token_printer_write_text(&printer, piece, piece_len); + fflush(stdout); + free(piece); + generated++; + cli_dist_busy_set(cfg, true); int eval_rc = ds4_session_eval(chat->session, token, err, sizeof(err)); cli_dist_busy_set(cfg, false); if (eval_rc != 0) { fprintf(stderr, "ds4: decode failed: %s\n", err); + ds4_session_invalidate(chat->session); return 1; } - toks[0] = token; - ntok = 1; + if (generated >= max_tokens) break; + continue; } bool stop = false; for (int j = 0; j < ntok; j++) { - if (toks[j] == ds4_token_eos(engine)) { + if (ds4_token_is_stop_for_think_mode(engine, toks[j], think_mode)) { stop = true; break; } @@ -1209,7 +1502,7 @@ static int run_chat_turn(ds4_engine *engine, cli_config *cfg, repl_chat *chat, c if (interrupted && generated == 0) { chat->transcript.len = rollback_len; ds4_session_invalidate(chat->session); - } else { + } else if (repl_chat_assistant_turn_uses_eos(engine)) { ds4_tokens_push(&chat->transcript, ds4_token_eos(engine)); } @@ -1266,18 +1559,19 @@ static int run_repl(ds4_engine *engine, cli_config *cfg) { print_repl_help(); } else if (!strcmp(cmd, "/think")) { cfg->gen.think_mode = DS4_THINK_HIGH; - repl_chat_apply_max_prefix(engine, &chat, false); + repl_chat_apply_think_prefix(engine, &chat, DS4_THINK_HIGH); puts("Thinking mode: high."); } else if (!strcmp(cmd, "/think-max")) { cfg->gen.think_mode = DS4_THINK_MAX; bool active = ds4_think_mode_for_context(cfg->gen.think_mode, chat.ctx_size) == DS4_THINK_MAX; - repl_chat_apply_max_prefix(engine, &chat, active); + repl_chat_apply_think_prefix(engine, &chat, + active ? DS4_THINK_MAX : DS4_THINK_HIGH); cli_warn_think_max_downgraded(&cfg->gen, "/think-max"); printf("Thinking mode: %s.\n", active ? "max" : "high (ctx below 393216)"); } else if (!strcmp(cmd, "/nothink")) { cfg->gen.think_mode = DS4_THINK_NONE; - repl_chat_apply_max_prefix(engine, &chat, false); + repl_chat_apply_think_prefix(engine, &chat, DS4_THINK_NONE); puts("Thinking mode: none."); } else if (!strncmp(cmd, "/power", 6) && (cmd[6] == '\0' || isspace((unsigned char)cmd[6]))) { char *arg = trim_inplace(cmd + 6); @@ -1302,15 +1596,16 @@ static int run_repl(ds4_engine *engine, cli_config *cfg) { cfg->gen.ctx_size = parse_int(arg, "/ctx"); log_context_memory(cfg->engine.backend, cfg->gen.ctx_size, - cfg->engine.prefill_chunk); + cfg->engine.prefill_chunk, + cfg->engine.ssd_streaming); rc = repl_chat_set_ctx(engine, &chat, cfg->gen.ctx_size); if (rc != 0) { linenoiseFree(line); break; } - bool active = ds4_think_mode_for_context(cfg->gen.think_mode, - chat.ctx_size) == DS4_THINK_MAX; - repl_chat_apply_max_prefix(engine, &chat, active); + ds4_think_mode effective = ds4_think_mode_for_context(cfg->gen.think_mode, + chat.ctx_size); + repl_chat_apply_think_prefix(engine, &chat, effective); cli_warn_think_max_downgraded(&cfg->gen, "/ctx"); } } else if (!strcmp(cmd, "/quit") || !strcmp(cmd, "/exit")) { @@ -1474,6 +1769,8 @@ static cli_config parse_options(int argc, char **argv) { c.gen.prompt = c.prompt_owned; } else if (!strcmp(arg, "-sys") || !strcmp(arg, "--system")) { c.gen.system = need_arg(&i, argc, argv, arg); + } else if (!strcmp(arg, "--raw") || !strcmp(arg, "--raw-prompt")) { + c.gen.raw_prompt = true; } else if (!strcmp(arg, "-m") || !strcmp(arg, "--model")) { c.engine.model_path = need_arg(&i, argc, argv, arg); } else if (!strcmp(arg, "--mtp")) { @@ -1488,10 +1785,13 @@ static cli_config parse_options(int argc, char **argv) { c.gen.ctx_size = parse_int(need_arg(&i, argc, argv, arg), arg); } else if (!strcmp(arg, "--temp")) { c.gen.temperature = parse_float_range(need_arg(&i, argc, argv, arg), arg, 0.0f, 100.0f); + c.gen.temperature_set = true; } else if (!strcmp(arg, "--top-p")) { c.gen.top_p = parse_float_range(need_arg(&i, argc, argv, arg), arg, 0.0f, 1.0f); + c.gen.top_p_set = true; } else if (!strcmp(arg, "--min-p")) { c.gen.min_p = parse_float_range(need_arg(&i, argc, argv, arg), arg, 0.0f, 1.0f); + c.gen.min_p_set = true; } else if (!strcmp(arg, "--seed")) { c.gen.seed = parse_u64(need_arg(&i, argc, argv, arg), arg); } else if (!strcmp(arg, "--quality")) { @@ -1511,6 +1811,10 @@ static cli_config parse_options(int argc, char **argv) { } c.engine.ssd_streaming_cache_experts = experts; c.engine.ssd_streaming_cache_bytes = bytes; + } else if (!strcmp(arg, "--ssd-streaming-full-layers")) { + int v = parse_nonnegative_int(need_arg(&i, argc, argv, arg), arg); + c.engine.ssd_streaming_full_layers = (uint32_t)v; + c.engine.ssd_streaming_full_layers_set = true; } else if (!strcmp(arg, "--ssd-streaming-preload-experts")) { int v = parse_int(need_arg(&i, argc, argv, arg), arg); if (v <= 0) { @@ -1571,6 +1875,8 @@ static cli_config parse_options(int argc, char **argv) { c.gen.dump_logprobs_path = need_arg(&i, argc, argv, arg); } else if (!strcmp(arg, "--logprobs-top-k")) { c.gen.dump_logprobs_top_k = parse_int(need_arg(&i, argc, argv, arg), arg); + } else if (!strcmp(arg, "--decode-consistency")) { + c.gen.decode_consistency_tokens = parse_int(need_arg(&i, argc, argv, arg), arg); } else if (!strcmp(arg, "--perplexity-file")) { c.gen.perplexity_file_path = need_arg(&i, argc, argv, arg); } else if (!strcmp(arg, "--imatrix-dataset")) { @@ -1675,12 +1981,16 @@ int main(int argc, char **argv) { return rc; } cfg.engine.inspect_only = cfg.inspect; + cfg.engine.first_token_test = cfg.gen.first_token_test; + cfg.engine.metal_graph_test = cfg.gen.metal_graph_test; + cfg.engine.context_size = cfg.gen.ctx_size; ds4_engine *engine = NULL; if (ds4_engine_open(&engine, &cfg.engine) != 0) { ds4_dist_options_free(cfg.dist); free(cfg.prompt_owned); return 1; } + cli_apply_model_sampling_defaults(engine, &cfg.gen); if (cfg.engine.tp.role == DS4_TP_WORKER) { int rc = ds4_tp_worker_run(engine, &cfg.engine.tp); ds4_engine_close(engine); @@ -1700,6 +2010,10 @@ int main(int argc, char **argv) { .quant_bits = (uint32_t)ds4_engine_routed_quant_bits(engine), .ctx_size = (uint32_t)cfg.gen.ctx_size, }; + ds4_engine_tp_gate_schedule(engine, + &tp_id.gate_slot_start, + &tp_id.gate_slot_step, + &tp_id.gates_per_token); if (!ds4_tp_create(&tp_leader, &cfg.engine.tp, &tp_id, tp_err, sizeof(tp_err)) || !ds4_engine_tp_bind(engine, tp_leader, tp_err, sizeof(tp_err))) { fprintf(stderr, "ds4: %s\n", tp_err); @@ -1732,9 +2046,6 @@ int main(int argc, char **argv) { return rc; } if (!cfg.inspect) { - log_context_memory(cfg.engine.backend, - cfg.gen.ctx_size, - cfg.engine.prefill_chunk); cli_warn_think_max_downgraded(&cfg.gen, "--think-max"); } int rc = 0; diff --git a/ds4_cuda.cu b/ds4_cuda.cu index 9c9ecfa8..6c382912 100644 --- a/ds4_cuda.cu +++ b/ds4_cuda.cu @@ -2515,6 +2515,7 @@ extern "C" int ds4_gpu_pack_slot_rows_f32_tensor( extern "C" int ds4_gpu_begin_commands(void) { return 1; } extern "C" int ds4_gpu_flush_commands(void) { return cuda_ok(cudaDeviceSynchronize(), "flush"); } +extern "C" int ds4_gpu_commands_active(void) { return 0; } extern "C" int ds4_gpu_signal_selected_readback_ready(uint64_t *event_value) { if (event_value) *event_value = 1; return cuda_ok(cudaDeviceSynchronize(), "selected readback signal"); @@ -2791,6 +2792,10 @@ extern "C" void ds4_gpu_set_quality(bool quality) { } } +extern "C" void ds4_gpu_set_glm_model(bool enabled) { + (void)enabled; +} + extern "C" void ds4_gpu_set_ssd_streaming(bool enabled) { g_ssd_streaming_mode = enabled ? 1 : 0; g_stream_expert_runtime_cap = 0; @@ -2803,6 +2808,10 @@ extern "C" void ds4_gpu_set_ssd_streaming(bool enabled) { } } +extern "C" void ds4_gpu_set_glm_streaming_prefill_full_layer(bool enabled) { + (void)enabled; +} + extern "C" void ds4_gpu_set_streaming_expert_cache_budget(uint32_t experts) { g_stream_expert_budget_override = experts; g_stream_expert_runtime_cap = 0; @@ -7838,6 +7847,20 @@ extern "C" int ds4_gpu_matmul_q8_0_tensor(ds4_gpu_tensor *out, const void *model in_dim, out_dim, x, n_tok, "q8_0"); } +extern "C" int ds4_gpu_matmul_q8_0_rows_scalar_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok) { + (void)out; (void)model_map; (void)model_size; (void)weight_offset; + (void)in_dim; (void)out_dim; (void)x; (void)n_tok; + return 0; +} + extern "C" int ds4_gpu_matmul_q8_0_pair_tensor( ds4_gpu_tensor *out0, ds4_gpu_tensor *out1, @@ -8878,6 +8901,11 @@ extern "C" int ds4_gpu_attention_prefill_raw_heads_tensor(ds4_gpu_tensor *heads, n_tokens, window, n_head, head_dim); return cuda_ok(cudaGetLastError(), "attention_prefill_raw launch"); } +extern "C" int ds4_gpu_attention_prefill_raw_heads_range_tensor(ds4_gpu_tensor *heads, const void *model_map, uint64_t model_size, uint64_t sinks_offset, const ds4_gpu_tensor *q, const ds4_gpu_tensor *raw_kv, uint32_t q_row0, uint32_t n_q, uint32_t n_kv, uint32_t window, uint32_t n_head, uint32_t head_dim) { + /* Rectangular problems only arise from the Metal-only TP row split. */ + if (q_row0 != 0 || n_q != n_kv) return 0; + return ds4_gpu_attention_prefill_raw_heads_tensor(heads, model_map, model_size, sinks_offset, q, raw_kv, n_q, window, n_head, head_dim); +} static int attention_decode_batch_launch( ds4_gpu_tensor *heads, const void *model_map, @@ -9298,6 +9326,11 @@ extern "C" int ds4_gpu_attention_prefill_static_mixed_heads_tensor( q, raw_kv, comp_kv, NULL, 0, n_tokens, n_comp, window, ratio, n_head, head_dim); } +extern "C" int ds4_gpu_attention_prefill_static_mixed_heads_range_tensor(ds4_gpu_tensor *heads, const void *model_map, uint64_t model_size, uint64_t sinks_offset, const ds4_gpu_tensor *q, const ds4_gpu_tensor *raw_kv, const ds4_gpu_tensor *comp_kv, uint32_t comp_kv_f16, uint32_t q_row0, uint32_t n_q, uint32_t n_tokens, uint32_t n_comp, uint32_t window, uint32_t ratio, uint32_t n_head, uint32_t head_dim) { + /* Rectangular problems only arise from the Metal-only TP row split. */ + if (q_row0 != 0 || n_q != n_tokens) return 0; + return ds4_gpu_attention_prefill_static_mixed_heads_tensor(heads, model_map, model_size, sinks_offset, q, raw_kv, comp_kv, comp_kv_f16, n_tokens, n_comp, window, ratio, n_head, head_dim); +} extern "C" int ds4_gpu_attention_prefill_masked_mixed_heads_tensor( ds4_gpu_tensor *heads, @@ -9574,6 +9607,26 @@ extern "C" int ds4_gpu_shared_gate_up_swiglu_q8_0_tensor( up_offset, in_dim, out_dim, x, 1) && ds4_gpu_swiglu_tensor(mid, gate, up, (uint32_t)out_dim, clamp, 1.0f); } + +extern "C" int ds4_gpu_shared_gate_up_swiglu_q8_0_rows_scalar_tensor( + ds4_gpu_tensor *gate, + ds4_gpu_tensor *up, + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok, + float clamp) { + (void)gate; (void)up; (void)mid; (void)model_map; (void)model_size; + (void)gate_offset; (void)up_offset; (void)in_dim; (void)out_dim; + (void)x; (void)n_tok; (void)clamp; + return 0; +} + extern "C" int ds4_gpu_add_tensor(ds4_gpu_tensor *out, const ds4_gpu_tensor *a, const ds4_gpu_tensor *b, uint32_t n) { if (!out || !a || !b || out->bytes < (uint64_t)n * sizeof(float) || @@ -13349,10 +13402,46 @@ extern "C" void ds4_gpu_tp_set_batch_exchange(ds4_gpu_tp_batch_exchange_fn fn) { (void)fn; } +extern "C" void ds4_gpu_tp_suspend_expert_sharding(int suspend) { + (void)suspend; +} + extern "C" void ds4_gpu_tp_keepalive_pause(int paused) { (void)paused; } +extern "C" void ds4_gpu_tp_set_attn_head_split(int enabled) { + (void)enabled; +} + +extern "C" void ds4_gpu_model_residency_skip(int skip) { + (void)skip; +} + +extern "C" void ds4_gpu_tp_set_big_exchange(ds4_gpu_tp_big_exchange_fn fn) { + (void)fn; +} + +extern "C" int ds4_gpu_tp_big_gate_encode(uint32_t layer, uint32_t rows, + const ds4_gpu_tensor *out_t, + ds4_gpu_tensor *in_t, + uint64_t bytes) { + (void)layer; (void)rows; (void)out_t; (void)in_t; (void)bytes; + return 0; +} +extern "C" uint64_t ds4_gpu_tp_big_gate_kick(uint32_t layer, uint32_t rows, + const ds4_gpu_tensor *out_t, + ds4_gpu_tensor *in_t, + uint64_t bytes) { + (void)layer; (void)rows; (void)out_t; (void)in_t; (void)bytes; + return 0; +} + +extern "C" int ds4_gpu_tp_big_gate_wait(uint64_t seq) { + (void)seq; + return 0; +} + extern "C" int ds4_gpu_tp_batch_gate_encode(uint32_t layer, uint32_t rows) { (void)layer; (void)rows; fprintf(stderr, "ds4: tensor parallelism is Metal-only\n"); diff --git a/ds4_distributed.c b/ds4_distributed.c index d31c8e2a..6ecbc328 100644 --- a/ds4_distributed.c +++ b/ds4_distributed.c @@ -4616,6 +4616,16 @@ static bool dist_kv_layer_tensor_bytes( uint32_t n_index_comp, uint64_t *out) { if (!layout || !out) return false; + if (ds4_engine_is_glm_dsa(engine)) { + return ds4_engine_glm_layer_payload_bytes(engine, + layer, + layout->raw_live, + layout->head_dim, + layout->indexer_head_dim, + n_comp, + n_index_comp, + out); + } uint64_t bytes = 0; uint64_t tmp = 0; if (!dist_u64_mul(layout->raw_live, layout->head_dim, &tmp) || @@ -4668,12 +4678,15 @@ static bool dist_kv_layout_matches( a->raw_live == b->raw_live; } -static bool dist_kv_raw_live_valid(const ds4_dist_kv_layout *layout) { +static bool dist_kv_raw_live_valid(ds4_engine *engine, const ds4_dist_kv_layout *layout) { if (!layout || layout->raw_window == 0 || layout->raw_cap == 0) return false; - const uint32_t expected = + const uint32_t max_live = layout->token_count < layout->raw_window ? layout->token_count : layout->raw_window; - return layout->raw_live == expected && - layout->raw_live <= layout->raw_cap; + if (ds4_engine_is_glm_dsa(engine)) { + return layout->raw_live <= max_live && + layout->raw_live <= layout->raw_cap; + } + return layout->raw_live == max_live && layout->raw_live <= layout->raw_cap; } static int dist_kv_parse_layer_payload( @@ -4725,7 +4738,7 @@ static int dist_kv_parse_layer_payload( return 1; } if (got.n_layers != (uint32_t)ds4_engine_layer_count(engine) || - !dist_kv_raw_live_valid(&got)) { + !dist_kv_raw_live_valid(engine, &got)) { if (errlen) snprintf(err, errlen, "distributed KV shard layout is invalid"); return 1; } @@ -5251,7 +5264,7 @@ int ds4_dist_session_load_payload( layout.ctx > (uint32_t)ds4_session_ctx(owner) || layout.token_count >= (uint32_t)ds4_session_ctx(owner) || layout.vocab != (uint32_t)ds4_engine_vocab_size(d->state.engine) || - !dist_kv_raw_live_valid(&layout)) { + !dist_kv_raw_live_valid(d->state.engine, &layout)) { if (errlen) snprintf(err, errlen, "DS4 KV payload does not match current distributed runtime"); return 1; } @@ -5648,10 +5661,6 @@ int ds4_dist_session_eval( } if (dist_session_ensure_route(d, err, errlen) != 0) return 1; - ds4_tokens transcript = {0}; - ds4_tokens_copy(&transcript, checkpoint); - ds4_tokens_push(&transcript, token); - int rc = dist_coordinator_eval_span(&d->state, owner, &d->plan, @@ -5665,6 +5674,9 @@ int ds4_dist_session_eval( err, errlen); if (rc != 0) { + ds4_tokens transcript = {0}; + ds4_tokens_copy(&transcript, checkpoint); + ds4_tokens_push(&transcript, token); if (dist_coordinator_rebuild_from_transcript(&d->state, owner, &d->plan, @@ -5682,9 +5694,9 @@ int ds4_dist_session_eval( return 1; } d->plan_ready = true; + ds4_tokens_free(&transcript); rc = 0; } - ds4_tokens_free(&transcript); return rc; } diff --git a/ds4_eval.c b/ds4_eval.c index b28f717a..7aed5d5c 100644 --- a/ds4_eval.c +++ b/ds4_eval.c @@ -1210,6 +1210,7 @@ typedef struct { uint32_t prefill_chunk; uint32_t ssd_streaming_cache_experts; uint64_t ssd_streaming_cache_bytes; + uint32_t ssd_streaming_full_layers; uint32_t ssd_streaming_preload_experts; uint64_t simulate_used_memory_bytes; int soft_limit_reply_budget; @@ -1222,6 +1223,7 @@ typedef struct { bool quality; bool ssd_streaming; bool ssd_streaming_cold; + bool ssd_streaming_full_layers_set; bool self_test_extractors; } eval_config; @@ -1440,6 +1442,16 @@ static int parse_int_arg(const char *s, const char *opt) { return (int)v; } +static int parse_nonnegative_int_arg(const char *s, const char *opt) { + char *end = NULL; + long v = strtol(s, &end, 10); + if (s[0] == '\0' || *end != '\0' || v < 0 || v > INT_MAX) { + fprintf(stderr, "ds4-eval: invalid value for %s: %s\n", opt, s); + exit(2); + } + return (int)v; +} + static uint64_t parse_u64_arg(const char *s, const char *opt) { char *end = NULL; unsigned long long v = strtoull(s, &end, 10); @@ -1602,6 +1614,10 @@ static eval_config parse_options(int argc, char **argv) { } c.ssd_streaming_cache_experts = experts; c.ssd_streaming_cache_bytes = bytes; + } else if (!strcmp(arg, "--ssd-streaming-full-layers")) { + int v = parse_nonnegative_int_arg(need_arg(&i, argc, argv, arg), arg); + c.ssd_streaming_full_layers = (uint32_t)v; + c.ssd_streaming_full_layers_set = true; } else if (!strcmp(arg, "--ssd-streaming-preload-experts")) { int v = parse_int_arg(need_arg(&i, argc, argv, arg), arg); if (v <= 0) { @@ -3756,7 +3772,6 @@ static eval_run_result run_one_case(ds4_engine *engine, ds4_session *session, if (!tty && plain_in_think) plain_set_thinking_color(use_plain_color); tui_refresh(ui, "thinking"); - const int eos = ds4_token_eos(engine); double t0 = ui->phase_start_sec; int forced_close_pos = -1; for (int i = 0; i < generation_limit; i++) { @@ -3858,7 +3873,7 @@ static eval_run_result run_one_case(ds4_engine *engine, ds4_session *session, if (token < 0) token = ds4_session_sample(session, cfg->temperature, 0, cfg->top_p, cfg->min_p, rng); - if (token == eos) break; + if (ds4_token_is_stop(engine, token)) break; if (close_kind != EVAL_THINK_CLOSE_NONE && think_close.kind == EVAL_THINK_CLOSE_NONE) { think_close.kind = close_kind; @@ -4016,11 +4031,13 @@ static int parse_case_sequence(const char *arg, int ncases, int **seq_out, int * static void log_context_memory(ds4_backend backend, int ctx_size, - uint32_t prefill_chunk) { + uint32_t prefill_chunk, + bool ssd_streaming) { ds4_context_memory m = - ds4_context_memory_estimate_with_prefill(backend, - ctx_size, - prefill_chunk); + ds4_context_memory_estimate_with_prefill_mode(backend, + ctx_size, + prefill_chunk, + ssd_streaming); fprintf(stderr, "ds4-eval: context buffers %.2f MiB (ctx=%d, backend=%s, prefill_chunk=%u, raw_kv_rows=%u, compressed_kv_rows=%u)\n", (double)m.total_bytes / (1024.0 * 1024.0), @@ -4139,18 +4156,21 @@ int main(int argc, char **argv) { .mtp_path = cfg.mtp_path, .backend = cfg.backend, .n_threads = cfg.threads, + .context_size = cfg.ctx_size > 0 ? cfg.ctx_size : 0, .mtp_draft_tokens = 1, .mtp_margin = 3.0f, .power_percent = cfg.power_percent, .prefill_chunk = cfg.prefill_chunk, .ssd_streaming_cache_experts = cfg.ssd_streaming_cache_experts, .ssd_streaming_cache_bytes = cfg.ssd_streaming_cache_bytes, + .ssd_streaming_full_layers = cfg.ssd_streaming_full_layers, .ssd_streaming_preload_experts = cfg.ssd_streaming_preload_experts, .simulate_used_memory_bytes = cfg.simulate_used_memory_bytes, .warm_weights = cfg.warm_weights, .quality = cfg.quality, .ssd_streaming = cfg.ssd_streaming, .ssd_streaming_cold = cfg.ssd_streaming_cold, + .ssd_streaming_full_layers_set = cfg.ssd_streaming_full_layers_set, .distributed = cfg.dist, }; char dist_err[256]; @@ -4190,7 +4210,10 @@ int main(int argc, char **argv) { fprintf(stderr, "ds4-eval: model shape %s\n", ds4_engine_model_name(engine)); eval_warn_think_max_downgraded(&cfg); trace_write_header(trace, &cfg, ds4_engine_model_name(engine), ncases, max_prompt_tokens); - log_context_memory(cfg.backend, cfg.ctx_size, cfg.prefill_chunk); + log_context_memory(cfg.backend, + cfg.ctx_size, + cfg.prefill_chunk, + cfg.ssd_streaming); ds4_session *session = NULL; if (ds4_session_create(&session, engine, cfg.ctx_size) != 0) { diff --git a/ds4_gpu.h b/ds4_gpu.h index e0982315..c4764685 100644 --- a/ds4_gpu.h +++ b/ds4_gpu.h @@ -46,7 +46,9 @@ int ds4_gpu_pack_slot_rows_f32_tensor( uint32_t slot_cap); int ds4_gpu_begin_commands(void); +int ds4_gpu_flush_encoder(void); int ds4_gpu_flush_commands(void); +int ds4_gpu_commands_active(void); int ds4_gpu_signal_selected_readback_ready(uint64_t *event_value); int ds4_gpu_commit_and_wait_selected_readback(uint64_t event_value, const char *label); int ds4_gpu_wait_selected_readback_ready(uint64_t event_value, const char *label); @@ -78,7 +80,9 @@ int ds4_gpu_preload_q4_expert_tables(const void *model_map, uint64_t model_size, uint32_t n_total_expert); int ds4_gpu_should_use_managed_kv_cache(uint64_t kv_cache_bytes, uint64_t context_bytes); void ds4_gpu_set_quality(bool quality); +void ds4_gpu_set_glm_model(bool enabled); void ds4_gpu_set_ssd_streaming(bool enabled); +void ds4_gpu_set_glm_streaming_prefill_full_layer(bool enabled); void ds4_gpu_set_streaming_expert_cache_budget(uint32_t experts); void ds4_gpu_set_streaming_expert_cache_expert_bytes(uint64_t bytes); uint64_t ds4_gpu_recommended_working_set_size(void); @@ -110,6 +114,10 @@ int ds4_gpu_stream_expert_cache_begin_selected_load( const ds4_gpu_stream_expert_table *table, const int32_t *selected_ids, uint32_t n_selected); +int ds4_gpu_glm_stream_expert_cache_begin_selected_load_tensor( + const ds4_gpu_stream_expert_table *table, + const ds4_gpu_tensor *selected, + uint32_t n_selected); #ifdef __APPLE__ /* The async selected-load worker registers itself so Metal cache paths never * wait on command buffers from that thread (they fail the load instead and @@ -151,14 +159,16 @@ void ds4_gpu_print_memory_report(const char *label); * construction. The exchange callback runs on the service thread and must * return nonzero on success. */ typedef int (*ds4_gpu_tp_exchange_fn)(void *ud, uint32_t layer, uint32_t gate, uint64_t seq); -/* split_world 1 keeps kernels computing full outputs (null-split bring-up); - * split_world 2 arms the expert-ownership and slice splits. slab is the - * transport slab tensor and gpu_flags_off the offset of its GPU-written - * gate-ready flag words (used by the flag-gate arrival path). */ -int ds4_gpu_tp_init(uint32_t rank, uint32_t split_world, +/* Bind one rank of the two-way split. slab is the transport slab tensor and + * gpu_flags_off is the offset of its GPU-written gate-ready flag words. */ +int ds4_gpu_tp_init(uint32_t rank, ds4_gpu_tensor *slab, uint64_t gpu_flags_off, ds4_gpu_tp_exchange_fn fn, void *ud); void ds4_gpu_tp_shutdown(void); +/* The coordinator-only DSpark support model does not participate in TP. + * Suspend ownership only while encoding it; base-model verification remains + * split across both ranks. */ +void ds4_gpu_tp_suspend_expert_sharding(int suspend); int ds4_gpu_tp_gate_encode(uint32_t layer, uint32_t gate); /* Verify-block batch gates: one exchange per layer moving `rows` partial * rows at once (speculative verify). The callback runs on the gate service @@ -167,9 +177,39 @@ typedef int (*ds4_gpu_tp_batch_exchange_fn)(void *ud, uint32_t layer, uint32_t rows, uint64_t seq); void ds4_gpu_tp_set_batch_exchange(ds4_gpu_tp_batch_exchange_fn fn); int ds4_gpu_tp_batch_gate_encode(uint32_t layer, uint32_t rows); -/* Pause/resume the DVFS keep-alive around work that keeps the GPU busy - * anyway (the replicated verify blocks). No-op when TP is not bound. */ +/* Prefill batch gates: the service thread exchanges `bytes` between two + * CPU-visible bounce tensors directly (payloads far beyond slab slots). */ +typedef int (*ds4_gpu_tp_big_exchange_fn)(void *ud, uint32_t layer, + uint64_t seq, const void *out, + void *in, uint64_t bytes); +void ds4_gpu_tp_set_big_exchange(ds4_gpu_tp_big_exchange_fn fn); +int ds4_gpu_tp_big_gate_encode(uint32_t layer, uint32_t rows, + const ds4_gpu_tensor *out_t, + ds4_gpu_tensor *in_t, + uint64_t bytes); +/* Split big gate: kick publishes the GPU arrival marker (batch shared + * event, whose completion semantics make the bounce payload visible to + * the exchange thread) and queues the exchange, returning the gate seq + * (0 on failure); wait encodes the release. Multiple kicks may be in + * flight; waiting on the last seq covers all earlier kicks (monotonic + * release event, in-order service thread). */ +uint64_t ds4_gpu_tp_big_gate_kick(uint32_t layer, uint32_t rows, + const ds4_gpu_tensor *out_t, + ds4_gpu_tensor *in_t, + uint64_t bytes); +int ds4_gpu_tp_big_gate_wait(uint64_t seq); +/* Pause/resume the DVFS keep-alive around work that keeps the GPU busy. + * No-op when TP is not bound. */ void ds4_gpu_tp_keepalive_pause(int paused); +/* Split attention heads across the two TP ranks in the GLM batch-prefill + * attention kernels (qk-low, attention-lora, value-project). The caller + * zeroes the unowned head range of the heads buffer and combines the + * attn-output partials over the TP big-gate exchange. */ +void ds4_gpu_tp_set_attn_head_split(int enabled); +/* Skip the whole-file model residency set (TP sharding: only the + * owned ranges are warmed; the rest must never be paged in). Call before + * the model is mapped. */ +void ds4_gpu_model_residency_skip(int skip); /* Nonzero after any gate exchange failed; the eval must abort. */ int ds4_gpu_tp_failed(void); @@ -196,6 +236,18 @@ int ds4_gpu_matmul_q8_0_kslice_tensor( uint64_t out_dim, const ds4_gpu_tensor *x, uint64_t x_elem_off); +int ds4_gpu_matmul_quant_kslice_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint64_t full_in_dim, + uint64_t k_off, + uint64_t k_cnt, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t x_elem_off); int ds4_gpu_attention_output_q8_tp_tensor( ds4_gpu_tensor *out, ds4_gpu_tensor *low, @@ -240,6 +292,46 @@ int ds4_gpu_embed_tokens_hc_tensor( uint32_t n_embd, uint32_t n_hc); +int ds4_gpu_embed_token_q8_0_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t n_vocab, + uint32_t token, + uint32_t n_embd); + +int ds4_gpu_embed_tokens_q8_0_tensor( + ds4_gpu_tensor *out, + const ds4_gpu_tensor *tokens, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t n_vocab, + uint32_t n_tokens, + uint32_t n_embd); + +int ds4_gpu_embed_token_quant_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint32_t n_vocab, + uint32_t token, + uint32_t n_embd); + +int ds4_gpu_embed_tokens_quant_tensor( + ds4_gpu_tensor *out, + const ds4_gpu_tensor *tokens, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint32_t n_vocab, + uint32_t n_tokens, + uint32_t n_embd); + int ds4_gpu_indexer_score_one_tensor( ds4_gpu_tensor *scores, const ds4_gpu_tensor *q, @@ -314,6 +406,69 @@ int ds4_gpu_matmul_q8_0_tensor( const ds4_gpu_tensor *x, uint64_t n_tok); +int ds4_gpu_matmul_q8_0_decode_mpp_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok); + +int ds4_gpu_matmul_q8_0_decode_mpp_model_view_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok); + +int ds4_gpu_matmul_q8_0_rows_scalar_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok); + +int ds4_gpu_matmul_quant_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok); + +int ds4_gpu_matmul_quant_decode_mpp_model_view_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok); + +int ds4_gpu_matmul_quant_rows_scalar_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok); + /* Optional fused GPU operations. * * These are acceleration hooks, not required backend primitives. A backend @@ -358,6 +513,58 @@ int ds4_gpu_shared_gate_up_swiglu_q8_0_tensor( const ds4_gpu_tensor *x, float clamp); +int ds4_gpu_shared_mid_swiglu_q8_0_tensor( + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + float clamp); + +int ds4_gpu_shared_gate_up_swiglu_q8_0_model_view_tensor( + ds4_gpu_tensor *gate, + ds4_gpu_tensor *up, + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + float clamp); + +int ds4_gpu_shared_gate_up_swiglu_q8_0_rows_tensor( + ds4_gpu_tensor *gate, + ds4_gpu_tensor *up, + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok, + float clamp); + +int ds4_gpu_shared_gate_up_swiglu_q8_0_rows_scalar_tensor( + ds4_gpu_tensor *gate, + ds4_gpu_tensor *up, + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok, + float clamp); + int ds4_gpu_matmul_f16_tensor( ds4_gpu_tensor *out, const void *model_map, @@ -435,6 +642,17 @@ int ds4_gpu_rms_norm_weight_rows_tensor( uint32_t rows, float eps); +int ds4_gpu_add_rms_norm_weight_tensor( + ds4_gpu_tensor *norm_out, + ds4_gpu_tensor *sum_out, + const ds4_gpu_tensor *a, + const ds4_gpu_tensor *b, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t n, + float eps); + int ds4_gpu_dsv4_qkv_rms_norm_rows_tensor( ds4_gpu_tensor *q_out, const ds4_gpu_tensor *q, @@ -524,6 +742,567 @@ int ds4_gpu_rope_tail_tensor( float beta_fast, float beta_slow); +int ds4_gpu_glm_rope_tail_tensor( + ds4_gpu_tensor *x, + uint32_t n_tokens, + uint32_t n_head, + uint32_t head_dim, + uint32_t rot_dim, + uint32_t pos0, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow); + +int ds4_gpu_glm_kv_lora_rms_norm_tensor( + ds4_gpu_tensor *out, + const ds4_gpu_tensor *kv_raw, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t n_tokens, + uint32_t kv_raw_dim, + uint32_t kv_lora_dim, + float eps); + +int ds4_gpu_glm_k_b_project_tensor( + ds4_gpu_tensor *out, + const ds4_gpu_tensor *kv_norm, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t n_tokens, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t n_head); + +int ds4_gpu_glm_k_b_project_typed_tensor( + ds4_gpu_tensor *out, + const ds4_gpu_tensor *kv_norm, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint32_t n_tokens, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t n_head); + +int ds4_gpu_glm_store_compact_kv_tensor( + ds4_gpu_tensor *kv_lora_cache, + ds4_gpu_tensor *k_rope_cache, + const ds4_gpu_tensor *kv_norm, + const ds4_gpu_tensor *kv_raw, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_cap, + uint32_t kv_raw_dim, + uint32_t kv_lora_dim, + uint32_t qk_rope, + bool cache_f16); + +int ds4_gpu_glm_qkv_norm_store_compact_kv_tensor( + ds4_gpu_tensor *q_out, + const ds4_gpu_tensor *q, + const void *model_map, + uint64_t model_size, + uint64_t q_weight_offset, + uint32_t q_n, + ds4_gpu_tensor *kv_lora_cache, + ds4_gpu_tensor *k_rope_cache, + const ds4_gpu_tensor *kv_raw, + uint64_t kv_weight_offset, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_cap, + uint32_t kv_raw_dim, + uint32_t kv_lora_dim, + uint32_t qk_rope, + bool cache_f16, + float eps); + +int ds4_gpu_glm_store_indexer_k_tensor( + ds4_gpu_tensor *indexer_key_cache, + const ds4_gpu_tensor *raw_k, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint64_t bias_offset, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_cap, + uint32_t head_dim, + uint32_t rot_dim, + uint32_t n_ctx_orig, + float eps, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow, + bool cache_f16); + +int ds4_gpu_glm_build_kv_cache_tensor( + ds4_gpu_tensor *key_cache, + ds4_gpu_tensor *value_cache, + const ds4_gpu_tensor *kv_raw, + const ds4_gpu_tensor *k_nope, + const ds4_gpu_tensor *value, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_cap, + uint32_t n_head, + uint32_t kv_raw_dim, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t value_dim, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow, + bool cache_f16); + +int ds4_gpu_glm_build_kv_cache_flash_tensor( + ds4_gpu_tensor *key_cache, + ds4_gpu_tensor *value_cache, + const ds4_gpu_tensor *kv_raw, + const ds4_gpu_tensor *k_nope, + const ds4_gpu_tensor *value, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_cap, + uint32_t n_head, + uint32_t kv_raw_dim, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t value_dim, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow, + bool cache_f16); + +int ds4_gpu_glm_attention_full_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *key_cache, + const ds4_gpu_tensor *value_cache, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_len, + uint32_t cache_cap, + uint32_t n_head, + uint32_t qk_dim, + uint32_t value_dim, + bool cache_f16); + +int ds4_gpu_glm_fill_selected_range_tensor( + ds4_gpu_tensor *selected, + uint32_t n_selected); + +int ds4_gpu_glm_fill_selected_range_batch_tensor( + ds4_gpu_tensor *selected, + uint32_t n_tokens, + uint32_t pos0, + uint32_t n_selected, + uint32_t pad_row); + +int ds4_gpu_glm_indexer_rope_tail_tensor( + ds4_gpu_tensor *x, + uint32_t n_tokens, + uint32_t n_head, + uint32_t head_dim, + uint32_t rot_dim, + uint32_t pos0, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow); + +int ds4_gpu_glm_indexer_score_one_tensor( + ds4_gpu_tensor *scores, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *weights, + const ds4_gpu_tensor *indexer_key_cache, + uint32_t n_rows, + uint32_t n_head, + uint32_t head_dim, + float scale, + bool cache_f16); + +int ds4_gpu_glm_indexer_scores_batch_tensor( + ds4_gpu_tensor *scores, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *weights, + const ds4_gpu_tensor *indexer_key_cache, + uint32_t n_rows, + uint32_t n_tokens, + uint32_t pos0, + uint32_t n_head, + uint32_t head_dim, + float scale, + bool cache_f16); + +int ds4_gpu_glm_qk_lowrank_q8_0_tensor( + ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *q, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_dim); + +int ds4_gpu_glm_qk_lowrank_q8_0_batch_tensor( + ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *q, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t n_tokens, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_dim); + +int ds4_gpu_glm_qk_lowrank_typed_tensor( + ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *q, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_dim); + +int ds4_gpu_glm_qk_lowrank_typed_batch_tensor( + ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *q, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint32_t n_tokens, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_dim); + +int ds4_gpu_glm_value_project_q8_0_batch_heads_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *lora, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t n_tokens, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t value_dim); + +int ds4_gpu_glm_value_project_typed_batch_heads_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *lora, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint32_t n_tokens, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t value_dim); + +int ds4_gpu_glm_attention_indexed_decode_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const void *model_map, + uint64_t model_size, + uint64_t value_weight_offset, + const ds4_gpu_tensor *selected, + uint32_t n_selected, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t value_dim, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow); + +int ds4_gpu_glm_attention_indexed_decode_typed_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const void *model_map, + uint64_t model_size, + uint64_t value_weight_offset, + uint32_t value_weight_type, + const ds4_gpu_tensor *selected, + uint32_t n_selected, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t value_dim, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow); + +int ds4_gpu_glm_attention_indexed_decode_split_group8_tensor( + ds4_gpu_tensor *heads, + ds4_gpu_tensor *partial_lora, + ds4_gpu_tensor *partial_ms, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const void *model_map, + uint64_t model_size, + uint64_t value_weight_offset, + const ds4_gpu_tensor *selected, + uint32_t n_selected, + bool selected_rows_valid, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t value_dim, + uint32_t n_ctx_orig, + uint32_t block_rows, + uint32_t n_blocks, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow); + +int ds4_gpu_glm_attention_indexed_decode_split_group8_typed_tensor( + ds4_gpu_tensor *heads, + ds4_gpu_tensor *partial_lora, + ds4_gpu_tensor *partial_ms, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const void *model_map, + uint64_t model_size, + uint64_t value_weight_offset, + uint32_t value_weight_type, + const ds4_gpu_tensor *selected, + uint32_t n_selected, + bool selected_rows_valid, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t value_dim, + uint32_t n_ctx_orig, + uint32_t block_rows, + uint32_t n_blocks, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow); + +int ds4_gpu_glm_attention_indexed_batch_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const void *model_map, + uint64_t model_size, + uint64_t value_weight_offset, + const ds4_gpu_tensor *selected, + uint32_t n_tokens, + uint32_t n_selected, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t value_dim, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow); + +int ds4_gpu_glm_attention_indexed_batch_typed_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const void *model_map, + uint64_t model_size, + uint64_t value_weight_offset, + uint32_t value_weight_type, + const ds4_gpu_tensor *selected, + uint32_t n_tokens, + uint32_t n_selected, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t value_dim, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow); + +int ds4_gpu_sort_i32_rows_asc_tensor( + ds4_gpu_tensor *dst, + const ds4_gpu_tensor *src, + uint32_t row_width, + uint32_t n_rows); + +int ds4_gpu_glm_attention_indexed_batch_lora_tensor( + ds4_gpu_tensor *lora_out, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const ds4_gpu_tensor *selected, + uint32_t n_tokens, + uint32_t n_selected, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow); + +int ds4_gpu_glm_attention_indexed_batch_lora_causal_tensor( + ds4_gpu_tensor *lora_out, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + uint32_t n_tokens, + uint32_t pos0, + uint32_t n_selected, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow); + +int ds4_gpu_glm_attention_indexed_batch_lora_valid_tensor( + ds4_gpu_tensor *lora_out, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const ds4_gpu_tensor *selected, + uint32_t n_tokens, + uint32_t n_selected, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow); + +int ds4_gpu_glm_attention_flash_staged_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *key_cache, + const ds4_gpu_tensor *value_cache, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_len, + uint32_t cache_cap, + uint32_t n_head, + uint32_t qk_dim, + uint32_t value_dim, + bool cache_f16); + +int ds4_gpu_glm_attention_flash_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *key_cache, + const ds4_gpu_tensor *value_cache, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_len, + uint32_t cache_cap, + uint32_t n_head, + uint32_t qk_dim, + uint32_t value_dim, + bool cache_f16); + /* Release decode fused KV finalizer: after the standalone RoPE kernel, this * performs DS4's FP8 non-RoPE KV round trip and writes the F16-rounded raw * attention cache row in one dispatch. */ @@ -697,6 +1476,24 @@ int ds4_gpu_attention_prefill_raw_heads_tensor( uint32_t n_head, uint32_t head_dim); +/* Rectangular raw prefill attention: q is a view of the n_q query rows at + * token positions [q_row0, q_row0 + n_q) of the chunk, raw_kv keeps all + * n_kv rows, heads receives n_q output rows. Used by the TP prefill row + * split; the square entry above is the q_row0 = 0, n_q = n_kv case. */ +int ds4_gpu_attention_prefill_raw_heads_range_tensor( + ds4_gpu_tensor *heads, + const void *model_map, + uint64_t model_size, + uint64_t sinks_offset, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *raw_kv, + uint32_t q_row0, + uint32_t n_q, + uint32_t n_kv, + uint32_t window, + uint32_t n_head, + uint32_t head_dim); + int ds4_gpu_attention_decode_raw_batch_heads_tensor( ds4_gpu_tensor *heads, const void *model_map, @@ -787,6 +1584,29 @@ int ds4_gpu_attention_prefill_static_mixed_heads_tensor( uint32_t n_head, uint32_t head_dim); +/* Rectangular static-mixed prefill attention: q is a view of the n_q query + * rows at token positions [q_row0, q_row0 + n_q) of the chunk, while raw_kv + * keeps all n_tokens rows and comp_kv all n_comp compressed keys. Used by + * the TP prefill row split; the square entry above is q_row0 = 0, + * n_q = n_tokens. */ +int ds4_gpu_attention_prefill_static_mixed_heads_range_tensor( + ds4_gpu_tensor *heads, + const void *model_map, + uint64_t model_size, + uint64_t sinks_offset, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *raw_kv, + const ds4_gpu_tensor *comp_kv, + uint32_t comp_kv_f16, + uint32_t q_row0, + uint32_t n_q, + uint32_t n_tokens, + uint32_t n_comp, + uint32_t window, + uint32_t ratio, + uint32_t n_head, + uint32_t head_dim); + int ds4_gpu_attention_prefill_masked_mixed_heads_tensor( ds4_gpu_tensor *heads, const void *model_map, @@ -819,6 +1639,22 @@ int ds4_gpu_attention_output_q8_batch_tensor( uint64_t out_dim, const ds4_gpu_tensor *heads, uint32_t n_tokens); +int ds4_gpu_attention_output_q4_K_batch_tensor( + ds4_gpu_tensor *out, + ds4_gpu_tensor *low, + ds4_gpu_tensor *group_tmp, + ds4_gpu_tensor *low_tmp, + const void *model_map, + uint64_t model_size, + uint64_t out_a_offset, + uint64_t out_b_offset, + uint32_t out_b_type, + uint64_t group_dim, + uint64_t rank, + uint32_t n_groups, + uint64_t out_dim, + const ds4_gpu_tensor *heads, + uint32_t n_tokens); int ds4_gpu_attention_output_q8_batch_f16_tensor( ds4_gpu_tensor *out_h, @@ -843,6 +1679,16 @@ int ds4_gpu_attention_output_low_q8_tensor( uint64_t rank, uint32_t n_groups, const ds4_gpu_tensor *heads); +int ds4_gpu_attention_output_low_q4_K_slice_tensor( + ds4_gpu_tensor *low, + const void *model_map, + uint64_t model_size, + uint64_t out_a_offset, + uint64_t group_dim, + uint64_t rank, + uint32_t group0, + uint32_t group_cnt, + const ds4_gpu_tensor *heads); /* ========================================================================= * Router, Shared Expert, and Routed MoE. @@ -866,6 +1712,13 @@ int ds4_gpu_add_tensor( const ds4_gpu_tensor *b, uint32_t n); +int ds4_gpu_add3_tensor( + ds4_gpu_tensor *out, + const ds4_gpu_tensor *a, + const ds4_gpu_tensor *b, + const ds4_gpu_tensor *c, + uint32_t n); + int ds4_gpu_directional_steering_project_tensor( ds4_gpu_tensor *x, const ds4_gpu_tensor *directions, @@ -913,6 +1766,117 @@ int ds4_gpu_router_select_batch_tensor( float expert_weight_scale, uint32_t n_tokens); +int ds4_gpu_glm_router_select_tensor( + ds4_gpu_tensor *selected, + ds4_gpu_tensor *weights, + ds4_gpu_tensor *probs, + const void *model_map, + uint64_t model_size, + uint64_t bias_offset, + const ds4_gpu_tensor *logits, + uint32_t n_expert, + uint32_t n_expert_used, + float expert_weight_scale); + +int ds4_gpu_glm_router_select_batch_tensor( + ds4_gpu_tensor *selected, + ds4_gpu_tensor *weights, + ds4_gpu_tensor *probs, + const void *model_map, + uint64_t model_size, + uint64_t bias_offset, + const ds4_gpu_tensor *logits, + uint32_t n_expert, + uint32_t n_expert_used, + float expert_weight_scale, + uint32_t n_tokens); + +int ds4_gpu_glm_routed_moe_one_tensor( + ds4_gpu_tensor *out, + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t down_offset, + uint32_t gate_type, + uint32_t up_type, + uint32_t down_type, + uint64_t gate_expert_bytes, + uint64_t gate_row_bytes, + uint64_t up_expert_bytes, + uint64_t up_row_bytes, + uint64_t down_expert_bytes, + uint64_t down_row_bytes, + uint32_t expert_in_dim, + uint32_t expert_mid_dim, + uint32_t out_dim, + const ds4_gpu_tensor *selected, + const ds4_gpu_tensor *weights, + uint32_t n_total_expert, + uint32_t n_expert, + uint32_t layer_index, + const ds4_gpu_tensor *x, + bool force_resident); + +int ds4_gpu_glm_routed_moe_batch_tensor( + ds4_gpu_tensor *out, + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t down_offset, + uint32_t gate_type, + uint32_t up_type, + uint32_t down_type, + uint64_t gate_expert_bytes, + uint64_t gate_row_bytes, + uint64_t up_expert_bytes, + uint64_t up_row_bytes, + uint64_t down_expert_bytes, + uint64_t down_row_bytes, + uint32_t expert_in_dim, + uint32_t expert_mid_dim, + uint32_t out_dim, + const ds4_gpu_tensor *selected, + const ds4_gpu_tensor *weights, + uint32_t n_total_expert, + uint32_t n_expert, + uint32_t layer_index, + const ds4_gpu_tensor *x, + uint32_t n_tokens, + uint32_t mid_token_stride); + +int ds4_gpu_glm_routed_moe_batch_direct_scalar_q4_tensor( + ds4_gpu_tensor *out, + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t down_offset, + uint32_t gate_type, + uint32_t up_type, + uint32_t down_type, + uint64_t gate_expert_bytes, + uint64_t gate_row_bytes, + uint64_t up_expert_bytes, + uint64_t up_row_bytes, + uint64_t down_expert_bytes, + uint64_t down_row_bytes, + uint32_t expert_in_dim, + uint32_t expert_mid_dim, + uint32_t out_dim, + const ds4_gpu_tensor *selected, + const ds4_gpu_tensor *weights, + uint32_t n_total_expert, + uint32_t n_expert, + uint32_t layer_index, + const ds4_gpu_tensor *x, + uint32_t n_tokens, + uint32_t mid_token_stride); + int ds4_gpu_routed_moe_set_selected_override(const int32_t *selected, uint32_t n_selected); int ds4_gpu_routed_moe_one_tensor( @@ -942,7 +1906,8 @@ int ds4_gpu_routed_moe_one_tensor( float clamp, const ds4_gpu_tensor *x, const ds4_gpu_tensor *add_in, - uint32_t layer_index); + uint32_t layer_index, + bool force_resident); int ds4_gpu_routed_moe_batch_tensor( ds4_gpu_tensor *out, diff --git a/ds4_help.c b/ds4_help.c index d32e088c..b4e810a8 100644 --- a/ds4_help.c +++ b/ds4_help.c @@ -164,8 +164,9 @@ static void print_model_runtime(FILE *fp, const help_colors *c, opt(fp, c, "--power N", "GPU duty-cycle target, 1..100. Default: 100"); opt(fp, c, "--ssd-streaming", "Metal/CUDA/ROCm: opt in to SSD-backed model streaming instead of full residency."); opt(fp, c, "--ssd-streaming-cold", "SSD streaming: skip default popularity-based expert-cache preload."); - opt(fp, c, "--ssd-streaming-cache-experts N|NGB", "SSD streaming: routed expert cache as expert count or GiB, e.g. 32GB. Metal/ROCm default: 80% working set minus non-routed weights; CUDA default: backend fixed cache."); - opt(fp, c, "--ssd-streaming-preload-experts N", "SSD streaming: upfront popularity preload count. Default: auto hot seed capped at 4096; use --ssd-streaming-cold to skip."); + opt(fp, c, "--ssd-streaming-cache-experts N|NGB", "SSD streaming: N is an exact dynamic expert count; NGB is a routed memory budget that also reserves two full prefill layers. Auto: 80% working set minus non-routed weights; GLM Metal caps lower."); + opt(fp, c, "--ssd-streaming-full-layers N", "GLM Metal streaming: keep the first N routed layers fully resident. Default: auto from NGB expert budget; use 0 to disable."); + opt(fp, c, "--ssd-streaming-preload-experts N", "SSD streaming: upfront popularity preload count. DeepSeek auto-seeds by default; GLM demand-fills unless N is explicit."); opt(fp, c, "--simulate-used-memory NGB", "Diagnostic: lock N GiB before model load to simulate a smaller-memory machine."); opt(fp, c, "--prefill-chunk N", "Metal graph prefill chunk size. Default: auto (PRO long prompts use 8192; others use 4096)."); if (full) { @@ -192,6 +193,7 @@ static void print_sampling(FILE *fp, const help_colors *c, bool full) { opt(fp, c, "--top-p F", "Nucleus sampling probability."); opt(fp, c, "--min-p F", "Keep tokens scoring at least F times the top token."); opt(fp, c, "--seed N", "Sampling seed for reproducible non-greedy runs."); + para(fp, c, "GLM CLI and agent runs default to temperature 1.0, top-p 0.95, and min-p 0 unless those options are set explicitly."); opt(fp, c, "--think", "Use normal thinking mode."); opt(fp, c, "--think-max", "Use Think Max when context is large enough."); opt(fp, c, "--nothink", "Disable thinking and ask for direct replies."); @@ -199,6 +201,7 @@ static void print_sampling(FILE *fp, const help_colors *c, bool full) { opt(fp, c, "-sys, --system TEXT", "System prompt. Empty string disables the default where supported."); opt(fp, c, "-p, --prompt TEXT", "One-shot prompt text."); opt(fp, c, "--prompt-file FILE", "Read one-shot prompt text from FILE."); + opt(fp, c, "--raw-prompt", "Tokenize the one-shot prompt without chat markers."); } fputc('\n', fp); } @@ -226,6 +229,16 @@ static void print_distributed(FILE *fp, const help_colors *c) { opt(fp, c, "--dist-replay-check", "Diagnostic: reset and replay prompt, then compare logits."); opt(fp, c, "--debug", "Print coordinator route/debug logs."); fputc('\n', fp); + title(fp, c, "Tensor Parallelism"); + fputc('\n', fp); + para(fp, c, "Tensor parallelism runs one token at a time across two Macs. Each rank keeps one contiguous half of the routed experts resident while dense and shared weights remain replicated. Start the worker first, then the coordinator."); + fputc('\n', fp); + opt(fp, c, "--tp-coordinator PORT", "Coordinate a TP pair and listen for one worker."); + opt(fp, c, "--tp-coordinator-host HOST", "Coordinator listen address. Default: 0.0.0.0"); + opt(fp, c, "--tp-worker HOST PORT", "Dial the coordinator and mirror its session."); + opt(fp, c, "--tp-transport auto|rdma|tcp", "Gate transport. Default: auto"); + opt(fp, c, "--tp-debug-hash N", "Cross-check hidden state every N tokens."); + fputc('\n', fp); } static void print_cli_diagnostics(FILE *fp, const help_colors *c); @@ -248,6 +261,7 @@ static void print_cli_diagnostics(FILE *fp, const help_colors *c) { opt(fp, c, "--dump-logits FILE", "Write full next-token logits as JSON."); opt(fp, c, "--dump-logprobs FILE", "Write greedy continuation top-logprobs as JSON."); opt(fp, c, "--logprobs-top-k N", "Alternatives stored by --dump-logprobs. Default: 20"); + opt(fp, c, "--decode-consistency N", "Compare N-token decode logits with a fresh full prefill."); opt(fp, c, "--expert-profile FILE", "Metal-only: write routed expert locality/cache simulation JSON."); opt(fp, c, "--perplexity-file FILE", "Score raw text with teacher-forced NLL."); opt(fp, c, "--imatrix-dataset FILE", "Rendered prompt dataset for imatrix collection."); @@ -278,6 +292,7 @@ static void print_agent_specific(FILE *fp, const help_colors *c) { title(fp, c, "Agent Options"); opt(fp, c, "-p, --prompt TEXT", "Submit an initial prompt after startup."); opt(fp, c, "--non-interactive", "Run without TUI. With -p: one turn; without -p: repeated stdin prompts."); + opt(fp, c, "--raw-prompt", "Non-interactive -p only: tokenize prompt without agent chat/tool text."); opt(fp, c, "-sys, --system TEXT", "Extra system prompt. Empty disables extra text."); opt(fp, c, "--trace FILE", "Write prompt, token, and DSML debug trace."); opt(fp, c, "--chdir DIR", "Change working directory before loading runtime assets."); @@ -513,7 +528,7 @@ static void print_topic(FILE *fp, const help_colors *c, ds4_help_tool tool, cons else if (tool == DS4_HELP_AGENT && streq(topic, "tools")) { title(fp, c, "Agent Tool System"); para(fp, c, "The agent can read, search, write, edit, run bash, and browse through Chrome-backed web tools."); - para(fp, c, "Tool calls are emitted by the model as DSML and rendered live in the terminal."); + para(fp, c, "DeepSeek-family models emit DSML tool calls; GLM models use native syntax. Both are rendered live in the terminal."); para(fp, c, "Edit uses exact old/new replacement; [upto] can bridge a unique head and tail for large anchored edits."); fputc('\n', fp); } else if (tool == DS4_HELP_BENCH && streq(topic, "benchmark")) print_bench_specific(fp, c); diff --git a/ds4_metal.m b/ds4_metal.m index ec86b2a8..7fdb71ef 100644 --- a/ds4_metal.m +++ b/ds4_metal.m @@ -34,8 +34,12 @@ */ enum { + DS4_METAL_TENSOR_Q4_0 = 2, + DS4_METAL_TENSOR_Q8_0 = 8, DS4_METAL_TENSOR_Q2_K = 10, DS4_METAL_TENSOR_Q4_K = 12, + DS4_METAL_TENSOR_Q5_K = 13, + DS4_METAL_TENSOR_Q6_K = 14, DS4_METAL_TENSOR_IQ2_XXS = 16, }; @@ -46,6 +50,7 @@ static id g_queue; static id g_library; static id g_batch_cb; static id g_batch_enc; +static BOOL g_batch_has_work; static NSMutableArray> *g_pending_cbs; static id g_selected_readback_event; static uint64_t g_selected_readback_event_value; @@ -53,17 +58,26 @@ static id g_set_rows_f32_i32_pipeline; static id g_get_rows_f32_pipeline; static id g_get_rows_f16_pipeline; static id g_get_rows_i32_pipeline; +static id g_get_rows_q8_0_pipeline; +static id g_get_rows_q4_0_pipeline; +static id g_get_rows_q4_K_pipeline; static id g_repeat_f32_pipeline; static id g_concat_pipeline; static id g_cpy_f32_f32_pipeline; static id g_cpy_f32_f16_pipeline; static id g_cpy_f16_f32_pipeline; +static id g_cpy_f16_f16_pipeline; static id g_swiglu_pipeline; +static id g_swiglu_flat_pipeline; static id g_add_pipeline; +static id g_add2_pipeline; +static id g_add3_pipeline; static id g_moe_sum6_pipeline; +static id g_moe_sum8_pipeline; static id g_mul_pipeline; static id g_rms_norm_pipeline; static id g_rms_norm_plain_pipeline; +static id g_add_rms_norm_pipeline; static id g_dsv4_qkv_rms_norm_pipeline; static id g_hc_split_sinkhorn_pipeline; static id g_hc_split_weighted_sum_pipeline; @@ -85,6 +99,7 @@ static id g_moe_mul_mv_id_iq2_xxs_pair_pipeline; static id g_moe_mul_mv_id_iq2_xxs_pair_swiglu_pipeline; static id g_moe_mul_mv_id_q2_k_pipeline; static id g_moe_mul_mv_id_q2_k_sum6_pipeline; +static id g_moe_mul_mv_id_iq2_xxs_sum6_pipeline; static id g_moe_mul_mv_id_q4_k_pipeline; static id g_moe_mul_mv_id_q4_k_pair_pipeline; static id g_moe_mul_mv_id_q4_k_pair_swiglu_pipeline; @@ -102,6 +117,7 @@ static id g_moe_mul_mv_slots6_q2_k_sum6_pipeline; static id g_moe_mul_mv_slots6_q4_k_pair_swiglu_pipeline; static id g_moe_mul_mv_slots6_q4_k_sum6_pipeline; static id g_moe_mul_mv_addr_iq2_xxs_pair_swiglu_pipeline; +static id g_moe_mul_mv_addr_iq2_xxs_pipeline; static id g_moe_mul_mv_addr_q2_k_sum6_pipeline; static id g_moe_mul_mv_addr_iq2_xxs_pair_swiglu_masked_pipeline; static id g_moe_mul_mv_addr_q2_k_sum6_masked_pipeline; @@ -136,6 +152,65 @@ static id g_dsv4_indexed_attention_heads8_rb16_pipeline static id g_dsv4_softplus_sqrt_pipeline; static id g_dsv4_router_finalize_one_pipeline; static id g_dsv4_router_weights_one_pipeline; +static id g_glm_router_select_one_pipeline; +static id g_glm_kv_lora_rms_norm_pipeline; +static id g_glm_k_b_project_pipeline; +static id g_glm_store_compact_kv_pipeline; +static id g_glm_qkv_norm_store_compact_kv_pipeline; +static id g_glm_store_indexer_k_pipeline; +static id g_glm_build_kv_cache_pipeline; +static id g_glm_build_kv_cache_decode_group4_pipeline; +static id g_glm_build_kv_cache_flash_pipeline; +static id g_glm_attention_full_pipeline; +static id g_glm_fill_selected_range_pipeline; +static id g_glm_fill_selected_range_batch_pipeline; +static id g_glm_indexer_rope_tail_pipeline; +static id g_glm_indexer_score_one_pipeline; +static id g_glm_indexer_score_one_direct_pipeline; +static id g_glm_indexer_scores_batch_pipeline; +static id g_glm_indexer_scores_tiled_pipeline; +static id g_glm_indexer_scores_tiled_f32_pipeline; +static id g_glm_qk_lowrank_pipeline; +static id g_glm_qk_lowrank_glm52_pipeline; +static id g_glm_qk_lowrank_glm52_sg_pipeline; +static id g_glm_qk_lowrank_batch_pipeline; +static id g_glm_qk_lowrank_batch_glm52_t4_pipeline; +static id g_glm_value_project_q8_0_pipeline; +static id g_glm_value_project_q8_0_batch_heads_pipeline; +static id g_glm_value_project_q8_0_batch_heads_mma_pipeline; +static id g_glm_attention_indexed_decode_pipeline; +static id g_glm_attention_indexed_decode_split_group8_partial_pipeline; +static id g_glm_attention_indexed_decode_split_group8_partial_valid_fullheads_pipeline; +static id g_glm_attention_indexed_decode_split_group8_reduce_pipeline; +static id g_glm_attention_indexed_decode_split_group8_reduce16_pipeline; +static id g_glm_attention_indexed_batch_pipeline; +static id g_glm_attention_indexed_batch_group2_pipeline; +static id g_glm_attention_indexed_batch_q2_group4_pipeline; +static id g_glm_attention_indexed_batch_group8_pipeline; +static id g_glm_attention_indexed_batch_lora_group8_vec_pipeline; +static id g_glm_attention_indexed_batch_lora_group8_vec_valid_pipeline; +static id g_glm_attention_indexed_batch_lora_group8_vec_valid_fullheads_pipeline; +static id g_glm_attention_indexed_batch_lora_group8_vec_causal_pipeline; +static id g_glm_attention_indexed_batch_lora_group8_vec_causal_fullheads_pipeline; +static id g_glm_q4_k_pair_swiglu_f32_pipeline; +static id g_glm_q4_k_pair_swiglu2_f32_pipeline; +static id g_glm_q4_k_pair_swiglu4_f32_pipeline; +static id g_glm_q4_k_pair_swiglu2_mapped_f32_pipeline; +static id g_glm_q4_k_pair_swiglu2_mapped_row_f32_pipeline; +static id g_glm_q2_k_pair_swiglu_f32_pipeline; +static id g_glm_q2_k_addr_pair_swiglu2_f32_pipeline; +static id g_glm_q2_k_addr_pair_swiglu2_masked_f32_pipeline; +static id g_glm_q4_k_addr_pair_swiglu_f32_pipeline; +static id g_glm_q4_k_addr_pair_swiglu_masked_f32_pipeline; +static id g_glm_q2_k_down_f32_pipeline; +static id g_glm_q4_k_down_f32_pipeline; +static id g_glm_q2_k_addr_down_f32_pipeline; +static id g_glm_q4_k_addr_down_f32_pipeline; +static id g_glm_q5_k_pair_swiglu_f32_pipeline; +static id g_glm_q5_k_pair_swiglu_mapped_f32_pipeline; +static id g_glm_q5_k_pair_swiglu_mapped_row_f32_pipeline; +static id g_glm_q5_k_down_f32_pipeline; +static id g_glm_q6_k_down_f32_pipeline; static id g_dsv4_hc_expand4_pipeline; static NSMutableDictionary> *g_pipeline_cache; static NSMutableDictionary> *g_model_buffer_cache; @@ -149,6 +224,7 @@ static id g_flash_attn_tmp_buffer; static id g_flash_attn_blk_buffer; static id g_flash_attn_ring_buffer; static id g_flash_attn_kv_buffer; +static id g_glm_flash_attn_mask_buffer; static id g_compressor_pool_kv_buffer; static id g_compressor_pool_score_buffer; static id g_compressor_pool_score_cont_buffer; @@ -194,8 +270,6 @@ static uint64_t g_stream_expert_cache_bytes; static uint64_t g_stream_expert_cache_expert_bytes; static uint32_t g_stream_expert_cache_entry_count; static uint32_t g_stream_expert_cache_budget_override; -static uint32_t g_stream_expert_cache_mlock_budget_cap; -static uint8_t g_stream_expert_cache_mlock_relief_applied; static uint64_t g_stream_expert_cache_hits; static uint64_t g_stream_expert_cache_misses; static uint64_t g_stream_expert_cache_evictions; @@ -205,17 +279,14 @@ static uint64_t g_stream_expert_cache_evict_advise_bytes; static uint64_t g_stream_expert_cache_willneed_advise_bytes; static uint64_t g_stream_expert_cache_pread_bytes; static double g_stream_expert_cache_pread_ms; -static uint64_t g_stream_expert_cache_mlock_bytes; -static uint64_t g_stream_expert_cache_mlock_fail_bytes; -static uint64_t g_stream_expert_cache_mlock_failures; -static double g_stream_expert_cache_mlock_ms; -static int g_stream_expert_cache_mlock_warned; static uint64_t g_stream_expert_cache_buffer_allocs; static uint64_t g_stream_expert_cache_buffer_reuses; static uint64_t g_stream_expert_cache_decode_tokens; static uint64_t g_stream_expert_cache_hotness_decay_token; static uint64_t g_stream_expert_timing_selected_calls; static double g_stream_expert_timing_selected_read_ms; +static double g_stream_expert_timing_selected_sync_ms; +static double g_stream_expert_timing_selected_copy_ms; static double g_stream_expert_timing_selected_bind_ms; static uint64_t g_stream_expert_timing_split_layers; static uint64_t g_stream_expert_timing_split_resident_experts; @@ -232,6 +303,19 @@ static double g_stream_expert_timing_load_prepare_ms; static double g_stream_expert_timing_load_pread_ms; static double g_stream_expert_timing_load_modify_ms; static double g_stream_expert_timing_load_install_ms; +static uint64_t g_stream_expert_timing_prepare_batch_reuse_calls; +static double g_stream_expert_timing_prepare_batch_reuse_ms; +static uint64_t g_stream_expert_timing_prepare_buffer_calls; +static double g_stream_expert_timing_prepare_buffer_ms; +static uint64_t g_stream_expert_timing_prepare_task_experts; +static double g_stream_expert_timing_prepare_task_ms; +static uint64_t g_stream_expert_timing_reuse_scan_calls; +static uint64_t g_stream_expert_timing_reuse_scan_entries; +static double g_stream_expert_timing_reuse_scan_ms; +static double g_stream_expert_timing_reuse_clear_ms; +static uint64_t g_stream_expert_timing_readahead_calls; +static uint64_t g_stream_expert_timing_readahead_bytes; +static double g_stream_expert_timing_readahead_ms; static uint64_t g_stream_expert_timing_cache_all_resident_layers; static uint64_t g_stream_expert_timing_cache_all_missing_layers; static uint64_t g_stream_expert_timing_cache_mixed_layers; @@ -240,6 +324,8 @@ static uint64_t g_stream_expert_timing_cache_missing_experts; typedef struct { uint64_t selected_calls; double selected_read_ms; + double selected_sync_ms; + double selected_copy_ms; double selected_bind_ms; uint64_t split_layers; uint64_t split_resident_experts; @@ -256,6 +342,19 @@ typedef struct { double load_pread_ms; double load_modify_ms; double load_install_ms; + uint64_t prepare_batch_reuse_calls; + double prepare_batch_reuse_ms; + uint64_t prepare_buffer_calls; + double prepare_buffer_ms; + uint64_t prepare_task_experts; + double prepare_task_ms; + uint64_t reuse_scan_calls; + uint64_t reuse_scan_entries; + double reuse_scan_ms; + double reuse_clear_ms; + uint64_t readahead_calls; + uint64_t readahead_bytes; + double readahead_ms; uint64_t cache_all_resident_layers; uint64_t cache_all_missing_layers; uint64_t cache_mixed_layers; @@ -264,9 +363,12 @@ typedef struct { } ds4_gpu_stream_expert_timing_snapshot; static ds4_gpu_stream_expert_timing_snapshot g_stream_expert_timing_last_report; static int g_stream_prefill_batch_selected_addr_building; +static int g_glm_stream_expert_addr_table_building; static uint64_t g_model_residency_count; static int g_model_residency_added_to_queue; +static int g_glm_model_mode; static int g_ssd_streaming_mode; +static int g_glm_streaming_prefill_full_layer_runtime; static int g_metal4_runtime_available; static int g_metal4_family_supported; static int g_metal4_queue_supported; @@ -311,6 +413,11 @@ static NSUInteger g_flash_attn_tmp_bytes; static NSUInteger g_flash_attn_blk_bytes; static NSUInteger g_flash_attn_ring_bytes; static NSUInteger g_flash_attn_kv_bytes; +static NSUInteger g_glm_flash_attn_mask_bytes; +static uint32_t g_glm_flash_attn_mask_pos0; +static uint32_t g_glm_flash_attn_mask_tokens; +static uint32_t g_glm_flash_attn_mask_cache_len; +static int g_glm_flash_attn_mask_valid; static NSUInteger g_compressor_pool_kv_bytes; static NSUInteger g_compressor_pool_score_bytes; static NSUInteger g_compressor_pool_score_cont_bytes; @@ -336,7 +443,8 @@ static NSUInteger g_attn_out_group_ids_bytes; static int g_initialized; static int g_quality_mode; static int g_mpp_invalid_env_reported; -static int32_t g_routed_moe_selected_override[6]; +#define DS4_METAL_MAX_ROUTED_EXPERT_USED 8 +static int32_t g_routed_moe_selected_override[DS4_METAL_MAX_ROUTED_EXPERT_USED]; static uint32_t g_routed_moe_selected_override_n; static int g_moe_selected_trace_record_initialized; static FILE *g_moe_selected_trace_record_fp; @@ -383,8 +491,9 @@ static ds4_gpu_model_view g_model_views[DS4_METAL_MAX_MODEL_VIEWS]; static uint32_t g_model_view_count; enum { - DS4_METAL_STREAM_EXPERT_CACHE_MAX_LAYER = 61, + DS4_METAL_STREAM_EXPERT_CACHE_MAX_LAYER = 80, DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT = 384, + DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED = DS4_METAL_MAX_ROUTED_EXPERT_USED, DS4_METAL_STREAM_EXPERT_CACHE_MAX_ENTRIES = DS4_METAL_STREAM_EXPERT_CACHE_MAX_LAYER * DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT, @@ -465,7 +574,6 @@ static uint32_t g_stream_expert_cache_slab_count; static uint32_t g_stream_expert_cache_slab_total_slots; static uint32_t g_stream_expert_cache_free_slots[DS4_METAL_STREAM_EXPERT_CACHE_MAX_ENTRIES]; static uint32_t g_stream_expert_cache_free_slot_count; -static uint8_t g_stream_expert_cache_slab_slot_locked[DS4_METAL_STREAM_EXPERT_CACHE_MAX_ENTRIES]; static uint64_t g_stream_expert_cache_slab_slot_bytes; static uint64_t g_stream_expert_cache_cb_seq; static uint64_t g_stream_expert_cache_done_seq; @@ -732,6 +840,7 @@ static id ds4_gpu_command_buffer(int *owned) { static id ds4_gpu_compute_encoder(id cb) { if (g_batch_cb && cb == g_batch_cb) { + g_batch_has_work = YES; if (!g_batch_enc) g_batch_enc = [cb computeCommandEncoder]; return g_batch_enc; } @@ -750,8 +859,20 @@ static void ds4_gpu_close_batch_encoder(void) { g_batch_enc = nil; } +static double g_gpu_busy_accum; +static uint64_t g_gpu_busy_cbs; + static int ds4_gpu_wait_command_buffer(id cb, const char *label) { [cb waitUntilCompleted]; + if (getenv("DS4_METAL_GPU_BUSY_PROFILE")) { + const double busy = cb.GPUEndTime - cb.GPUStartTime; + if (busy > 0) g_gpu_busy_accum += busy; + if ((++g_gpu_busy_cbs % 64u) == 0u) { + fprintf(stderr, "ds4: gpu busy accum %.1f ms over %llu cbs\n", + g_gpu_busy_accum * 1000.0, + (unsigned long long)g_gpu_busy_cbs); + } + } if (cb.status == MTLCommandBufferStatusError) { fprintf(stderr, "ds4: Metal %s failed: %s\n", label, [[cb.error localizedDescription] UTF8String]); @@ -1214,12 +1335,16 @@ static void ds4_gpu_moe_selected_hotlist_close(void) { static int ds4_gpu_moe_selected_hotlist_record( uint32_t layer, - const int32_t selected_ids[6], + const int32_t *selected_ids, uint32_t n_selected, uint32_t n_total_expert) { const char *path = getenv("DS4_MOE_RECORD_SELECTED_HOTLIST"); if (!path || !path[0]) return 1; - if (!selected_ids || n_selected == 0 || n_selected > 6) return 0; + if (!selected_ids || + n_selected == 0 || + n_selected > DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED) { + return 0; + } if (!g_moe_selected_hotlist_initialized) { g_moe_selected_hotlist_initialized = 1; if (!ds4_gpu_moe_selected_hotlist_load_existing(path)) return 0; @@ -1421,9 +1546,20 @@ static void ds4_gpu_model_residency_clear(void) { g_model_residency_added_to_queue = 0; } +/* TP sharding keeps only this rank's expert ranges warm, + * so whole-view residency requests (which would page in the full file) + * must be skipped; pages fault in lazily through the same view buffers, + * exactly like ssd-streaming mode. */ +static int g_model_residency_skipped; + +void ds4_gpu_model_residency_skip(int skip) { + g_model_residency_skipped = skip; +} + static int ds4_gpu_model_residency_request_views(void) { if (g_model_view_count == 0 || g_ssd_streaming_mode || + g_model_residency_skipped || getenv("DS4_METAL_NO_RESIDENCY") != NULL) { return 1; } @@ -1455,7 +1591,7 @@ static int ds4_gpu_model_residency_request_views(void) { } [g_model_residency_set commit]; [g_model_residency_set requestResidency]; - if (getenv("DS4_METAL_USE_QUEUE_RESIDENCY_SET") != NULL && + if (getenv("DS4_METAL_DISABLE_QUEUE_RESIDENCY_SET") == NULL && g_queue && [g_queue respondsToSelector:@selector(addResidencySet:)]) { [g_queue addResidencySet:g_model_residency_set]; @@ -1643,10 +1779,17 @@ static int ds4_gpu_finish_model_views( * dense prefetch would create exactly the kind of memory pressure and * startup stalls this path is designed to avoid. */ - ds4_gpu_progress_begin("warming Metal model views"); - warmed = ds4_gpu_warm_model_views(); - if (warmed) ds4_gpu_progress_done(); - else ds4_gpu_progress_failed(); + if (g_model_residency_skipped) { + /* TP sharding: a single command buffer binding every + * view demands residency of them all and OOMs; the engine's + * CPU-side sharded warm pre-faults the owned bytes instead. */ + warmed = 1; + } else { + ds4_gpu_progress_begin("warming Metal model views"); + warmed = ds4_gpu_warm_model_views(); + if (warmed) ds4_gpu_progress_done(); + else ds4_gpu_progress_failed(); + } } const double t_warm = ds4_gpu_now_ms(); if (ds4_gpu_model_map_log_enabled()) { @@ -1867,6 +2010,47 @@ static int ds4_gpu_env_bool(const char *name) { return 1; } +static uint64_t ds4_gpu_env_u64(const char *name, + uint64_t fallback, + uint64_t min_value, + uint64_t max_value) { + const char *v = getenv(name); + if (!v) return fallback; + while (isspace((unsigned char)*v)) v++; + if (!*v) return fallback; + + errno = 0; + char *end = NULL; + unsigned long long parsed = strtoull(v, &end, 10); + if (end == v || errno == ERANGE) return fallback; + while (isspace((unsigned char)*end)) end++; + if (*end) return fallback; + + if (parsed < min_value) return fallback; + uint64_t value = (uint64_t)parsed; + if (value > max_value) value = max_value; + return value; +} + +static uint32_t ds4_gpu_glm_full_attention_max_cache_len(void) { + /* + * kernel_glm_attention_full stores one score per visible token in + * threadgroup memory, plus 256 reduction slots. Keep the default under + * the 32 KiB envelope used by current Apple GPUs while allowing short + * dense decode to step past the 4096-token prefill boundary. + */ + return 7680u; +} + +static uint32_t ds4_gpu_glm_flash_attention_max_cache_len(void) { + /* + * Staged FlashAttention uses fixed-size threadgroup scratch and separate + * KV staging buffers, so it is not bound by the legacy full-attention + * kernel's one-score-per-token threadgroup-memory envelope. + */ + return 8192u; +} + static int ds4_gpu_mpp_available(void) { return g_metal4_tensor_api_enabled && !g_quality_mode; } @@ -2424,6 +2608,8 @@ ds4_gpu_stream_expert_timing_current(void) { return (ds4_gpu_stream_expert_timing_snapshot) { .selected_calls = g_stream_expert_timing_selected_calls, .selected_read_ms = g_stream_expert_timing_selected_read_ms, + .selected_sync_ms = g_stream_expert_timing_selected_sync_ms, + .selected_copy_ms = g_stream_expert_timing_selected_copy_ms, .selected_bind_ms = g_stream_expert_timing_selected_bind_ms, .split_layers = g_stream_expert_timing_split_layers, .split_resident_experts = g_stream_expert_timing_split_resident_experts, @@ -2445,6 +2631,32 @@ ds4_gpu_stream_expert_timing_current(void) { .load_pread_ms = g_stream_expert_timing_load_pread_ms, .load_modify_ms = g_stream_expert_timing_load_modify_ms, .load_install_ms = g_stream_expert_timing_load_install_ms, + .prepare_batch_reuse_calls = + g_stream_expert_timing_prepare_batch_reuse_calls, + .prepare_batch_reuse_ms = + g_stream_expert_timing_prepare_batch_reuse_ms, + .prepare_buffer_calls = + g_stream_expert_timing_prepare_buffer_calls, + .prepare_buffer_ms = + g_stream_expert_timing_prepare_buffer_ms, + .prepare_task_experts = + g_stream_expert_timing_prepare_task_experts, + .prepare_task_ms = + g_stream_expert_timing_prepare_task_ms, + .reuse_scan_calls = + g_stream_expert_timing_reuse_scan_calls, + .reuse_scan_entries = + g_stream_expert_timing_reuse_scan_entries, + .reuse_scan_ms = + g_stream_expert_timing_reuse_scan_ms, + .reuse_clear_ms = + g_stream_expert_timing_reuse_clear_ms, + .readahead_calls = + g_stream_expert_timing_readahead_calls, + .readahead_bytes = + g_stream_expert_timing_readahead_bytes, + .readahead_ms = + g_stream_expert_timing_readahead_ms, .cache_all_resident_layers = g_stream_expert_timing_cache_all_resident_layers, .cache_all_missing_layers = @@ -2480,6 +2692,12 @@ ds4_gpu_stream_expert_timing_delta( .selected_read_ms = ds4_gpu_stream_expert_timing_delta_f64(current.selected_read_ms, previous.selected_read_ms), + .selected_sync_ms = + ds4_gpu_stream_expert_timing_delta_f64(current.selected_sync_ms, + previous.selected_sync_ms), + .selected_copy_ms = + ds4_gpu_stream_expert_timing_delta_f64(current.selected_copy_ms, + previous.selected_copy_ms), .selected_bind_ms = ds4_gpu_stream_expert_timing_delta_f64(current.selected_bind_ms, previous.selected_bind_ms), @@ -2533,6 +2751,58 @@ ds4_gpu_stream_expert_timing_delta( .load_install_ms = ds4_gpu_stream_expert_timing_delta_f64(current.load_install_ms, previous.load_install_ms), + .prepare_batch_reuse_calls = + ds4_gpu_stream_expert_timing_delta_u64( + current.prepare_batch_reuse_calls, + previous.prepare_batch_reuse_calls), + .prepare_batch_reuse_ms = + ds4_gpu_stream_expert_timing_delta_f64( + current.prepare_batch_reuse_ms, + previous.prepare_batch_reuse_ms), + .prepare_buffer_calls = + ds4_gpu_stream_expert_timing_delta_u64( + current.prepare_buffer_calls, + previous.prepare_buffer_calls), + .prepare_buffer_ms = + ds4_gpu_stream_expert_timing_delta_f64( + current.prepare_buffer_ms, + previous.prepare_buffer_ms), + .prepare_task_experts = + ds4_gpu_stream_expert_timing_delta_u64( + current.prepare_task_experts, + previous.prepare_task_experts), + .prepare_task_ms = + ds4_gpu_stream_expert_timing_delta_f64( + current.prepare_task_ms, + previous.prepare_task_ms), + .reuse_scan_calls = + ds4_gpu_stream_expert_timing_delta_u64( + current.reuse_scan_calls, + previous.reuse_scan_calls), + .reuse_scan_entries = + ds4_gpu_stream_expert_timing_delta_u64( + current.reuse_scan_entries, + previous.reuse_scan_entries), + .reuse_scan_ms = + ds4_gpu_stream_expert_timing_delta_f64( + current.reuse_scan_ms, + previous.reuse_scan_ms), + .reuse_clear_ms = + ds4_gpu_stream_expert_timing_delta_f64( + current.reuse_clear_ms, + previous.reuse_clear_ms), + .readahead_calls = + ds4_gpu_stream_expert_timing_delta_u64( + current.readahead_calls, + previous.readahead_calls), + .readahead_bytes = + ds4_gpu_stream_expert_timing_delta_u64( + current.readahead_bytes, + previous.readahead_bytes), + .readahead_ms = + ds4_gpu_stream_expert_timing_delta_f64( + current.readahead_ms, + previous.readahead_ms), .cache_all_resident_layers = ds4_gpu_stream_expert_timing_delta_u64( current.cache_all_resident_layers, @@ -2573,6 +2843,10 @@ static void ds4_gpu_stream_expert_timing_print( const double split_layers = (double)s.split_layers; const double selected_read_avg = selected_calls != 0.0 ? s.selected_read_ms / selected_calls : 0.0; + const double selected_sync_avg = + selected_calls != 0.0 ? s.selected_sync_ms / selected_calls : 0.0; + const double selected_copy_avg = + selected_calls != 0.0 ? s.selected_copy_ms / selected_calls : 0.0; const double selected_bind_avg = selected_calls != 0.0 ? s.selected_bind_ms / selected_calls : 0.0; const double split_resident_avg = @@ -2603,6 +2877,25 @@ static void ds4_gpu_stream_expert_timing_print( load_calls != 0.0 ? s.load_modify_ms / load_calls : 0.0; const double load_install_avg = load_calls != 0.0 ? s.load_install_ms / load_calls : 0.0; + const double prepare_batch_reuse_avg = + s.prepare_batch_reuse_calls != 0 ? + s.prepare_batch_reuse_ms / + (double)s.prepare_batch_reuse_calls : 0.0; + const double prepare_buffer_avg = + s.prepare_buffer_calls != 0 ? + s.prepare_buffer_ms / (double)s.prepare_buffer_calls : 0.0; + const double prepare_task_avg = + s.prepare_task_experts != 0 ? + s.prepare_task_ms / (double)s.prepare_task_experts : 0.0; + const double reuse_scan_avg = + s.reuse_scan_calls != 0 ? + s.reuse_scan_ms / (double)s.reuse_scan_calls : 0.0; + const double reuse_scan_entries_avg = + s.reuse_scan_calls != 0 ? + (double)s.reuse_scan_entries / (double)s.reuse_scan_calls : 0.0; + const double readahead_avg = + s.readahead_calls != 0 ? + s.readahead_ms / (double)s.readahead_calls : 0.0; const double split_resident_experts_avg = split_layers != 0.0 ? (double)s.split_resident_experts / split_layers : 0.0; @@ -2621,12 +2914,16 @@ static void ds4_gpu_stream_expert_timing_print( cache_layer_count != 0.0 ? (double)s.cache_missing_experts / cache_layer_count : 0.0; fprintf(stderr, - "ds4: streaming expert timing %s selected_calls=%llu read_avg=%.3f ms bind_avg=%.3f ms read_total=%.3f ms bind_total=%.3f ms split_layers=%llu resident_experts_avg=%.2f missing_experts_avg=%.2f resident_submit_avg=%.3f ms missing_bind_avg=%.3f ms resident_submit_total=%.3f ms missing_bind_total=%.3f ms missing_load_avg=%.3f ms missing_slot_avg=%.3f ms missing_prune_avg=%.3f ms missing_addr_avg=%.3f ms missing_wait_avg=%.3f ms missing_wait_total=%.3f ms load_calls=%llu load_prepare_avg=%.3f ms load_pread_avg=%.3f ms load_modify_avg=%.3f ms load_install_avg=%.3f ms cache_all_resident=%llu cache_all_missing=%llu cache_mixed=%llu cache_resident_avg=%.2f cache_missing_avg=%.2f\n", + "ds4: streaming expert timing %s selected_calls=%llu read_avg=%.3f ms sync_avg=%.3f ms copy_avg=%.3f ms bind_avg=%.3f ms read_total=%.3f ms sync_total=%.3f ms copy_total=%.3f ms bind_total=%.3f ms split_layers=%llu resident_experts_avg=%.2f missing_experts_avg=%.2f resident_submit_avg=%.3f ms missing_bind_avg=%.3f ms resident_submit_total=%.3f ms missing_bind_total=%.3f ms missing_load_avg=%.3f ms missing_slot_avg=%.3f ms missing_prune_avg=%.3f ms missing_addr_avg=%.3f ms missing_wait_avg=%.3f ms missing_wait_total=%.3f ms load_calls=%llu load_prepare_avg=%.3f ms load_pread_avg=%.3f ms load_modify_avg=%.3f ms load_install_avg=%.3f ms prepare_batch_reuse_calls=%llu prepare_batch_reuse_avg=%.3f ms prepare_batch_reuse_total=%.3f ms prepare_buffer_calls=%llu prepare_buffer_avg=%.3f ms prepare_buffer_total=%.3f ms prepare_task_experts=%llu prepare_task_avg=%.3f ms prepare_task_total=%.3f ms reuse_scan_calls=%llu reuse_scan_entries_avg=%.1f reuse_scan_avg=%.3f ms reuse_scan_total=%.3f ms reuse_clear_total=%.3f ms readahead_calls=%llu readahead_avg=%.3f ms readahead_total=%.3f ms readahead_gib=%.2f cache_all_resident=%llu cache_all_missing=%llu cache_mixed=%llu cache_resident_avg=%.2f cache_missing_avg=%.2f\n", scope ? scope : "total", (unsigned long long)s.selected_calls, selected_read_avg, + selected_sync_avg, + selected_copy_avg, selected_bind_avg, s.selected_read_ms, + s.selected_sync_ms, + s.selected_copy_ms, s.selected_bind_ms, (unsigned long long)s.split_layers, split_resident_experts_avg, @@ -2646,6 +2943,24 @@ static void ds4_gpu_stream_expert_timing_print( load_pread_avg, load_modify_avg, load_install_avg, + (unsigned long long)s.prepare_batch_reuse_calls, + prepare_batch_reuse_avg, + s.prepare_batch_reuse_ms, + (unsigned long long)s.prepare_buffer_calls, + prepare_buffer_avg, + s.prepare_buffer_ms, + (unsigned long long)s.prepare_task_experts, + prepare_task_avg, + s.prepare_task_ms, + (unsigned long long)s.reuse_scan_calls, + reuse_scan_entries_avg, + reuse_scan_avg, + s.reuse_scan_ms, + s.reuse_clear_ms, + (unsigned long long)s.readahead_calls, + readahead_avg, + s.readahead_ms, + ds4_gpu_gib(s.readahead_bytes), (unsigned long long)s.cache_all_resident_layers, (unsigned long long)s.cache_all_missing_layers, (unsigned long long)s.cache_mixed_layers, @@ -2677,6 +2992,7 @@ void ds4_gpu_print_memory_report(const char *label) { (uint64_t)g_flash_attn_blk_bytes + (uint64_t)g_flash_attn_ring_bytes + (uint64_t)g_flash_attn_kv_bytes + + (uint64_t)g_glm_flash_attn_mask_bytes + (uint64_t)g_compressor_pool_kv_bytes + (uint64_t)g_compressor_pool_score_bytes + (uint64_t)g_compressor_pool_score_cont_bytes + @@ -2699,13 +3015,33 @@ void ds4_gpu_print_memory_report(const char *label) { (uint64_t)g_moe_q4_up_slots_bytes + (uint64_t)g_moe_q4_down_slots_bytes; - fprintf(stderr, "ds4: Metal memory report%s%s\n", - label && label[0] ? " " : "", - label && label[0] ? label : ""); pthread_mutex_lock(&g_tensor_mu); const uint64_t tensor_live_snap = g_tensor_alloc_live_bytes; const uint64_t tensor_peak_snap = g_tensor_alloc_peak_bytes; pthread_mutex_unlock(&g_tensor_mu); + + uint64_t tracked_live = tensor_live_snap; + if (tracked_live > UINT64_MAX - g_stream_expert_cache_bytes) { + tracked_live = UINT64_MAX; + } else { + tracked_live += g_stream_expert_cache_bytes; + } + + const bool color = ds4_log_is_tty(stderr); + const char *green = color ? "\x1b[32m" : ""; + const char *bright_green = color ? "\x1b[1;32m" : ""; + const char *reset = color ? "\x1b[0m" : ""; + fprintf(stderr, + "%sds4: Metal memory%s%s: runtime %.2f GiB + streaming experts %.2f GiB = %s%.2f GiB tracked live%s\n", + green, + label && label[0] ? " " : "", + label && label[0] ? label : "", + ds4_gpu_gib(tensor_live_snap), + ds4_gpu_gib(g_stream_expert_cache_bytes), + bright_green, + ds4_gpu_gib(tracked_live), + reset); + if (color) fputs(green, stderr); fprintf(stderr, "ds4: runtime tensors live %.2f MiB peak %.2f MiB\n", ds4_gpu_mib(tensor_live_snap), @@ -2784,15 +3120,6 @@ void ds4_gpu_print_memory_report(const char *label) { (unsigned long long)g_stream_expert_cache_buffer_allocs, (unsigned long long)g_stream_expert_cache_buffer_reuses); } - if (g_stream_expert_cache_mlock_bytes != 0 || - g_stream_expert_cache_mlock_failures != 0) { - fprintf(stderr, - "ds4: streaming expert buffer mlock locked=%.2f GiB failed=%.2f GiB failures=%llu time=%.3f ms\n", - ds4_gpu_gib(g_stream_expert_cache_mlock_bytes), - ds4_gpu_gib(g_stream_expert_cache_mlock_fail_bytes), - (unsigned long long)g_stream_expert_cache_mlock_failures, - g_stream_expert_cache_mlock_ms); - } if (ds4_gpu_stream_expert_timing_summary_enabled()) { const ds4_gpu_stream_expert_timing_snapshot total = ds4_gpu_stream_expert_timing_current(); @@ -2922,7 +3249,8 @@ void ds4_gpu_print_memory_report(const char *label) { fprintf(stderr, "ds4: scratch %.2f MiB (flash mask %.2f, pad %.2f, tmp %.2f, blk %.2f, ring %.2f, kv %.2f, compressor %.2f, router %.2f, indexer %.2f, moe %.2f, f16 %.2f, raw-store %.2f)\n", ds4_gpu_mib(scratch), - ds4_gpu_mib((uint64_t)g_flash_attn_mask_bytes), + ds4_gpu_mib((uint64_t)g_flash_attn_mask_bytes + + (uint64_t)g_glm_flash_attn_mask_bytes), ds4_gpu_mib((uint64_t)g_flash_attn_pad_bytes), ds4_gpu_mib((uint64_t)g_flash_attn_tmp_bytes), ds4_gpu_mib((uint64_t)g_flash_attn_blk_bytes), @@ -2949,12 +3277,17 @@ void ds4_gpu_print_memory_report(const char *label) { (uint64_t)g_moe_q4_down_slots_bytes), ds4_gpu_mib((uint64_t)g_f16_round_scratch_bytes), ds4_gpu_mib((uint64_t)g_raw_store_round_bytes)); + if (color) fputs(reset, stderr); } void ds4_gpu_set_quality(bool quality) { g_quality_mode = quality ? 1 : 0; } +void ds4_gpu_set_glm_model(bool enabled) { + g_glm_model_mode = enabled ? 1 : 0; +} + void ds4_gpu_set_ssd_streaming(bool enabled) { g_ssd_streaming_mode = enabled ? 1 : 0; ds4_gpu_stream_expert_cache_clear_all(1); @@ -2964,6 +3297,10 @@ void ds4_gpu_set_ssd_streaming(bool enabled) { } } +void ds4_gpu_set_glm_streaming_prefill_full_layer(bool enabled) { + g_glm_streaming_prefill_full_layer_runtime = enabled ? 1 : 0; +} + void ds4_gpu_set_streaming_expert_cache_budget(uint32_t experts) { if (experts > DS4_METAL_STREAM_EXPERT_CACHE_MAX_ENTRIES) { experts = DS4_METAL_STREAM_EXPERT_CACHE_MAX_ENTRIES; @@ -3002,6 +3339,13 @@ static id ds4_gpu_wrap_model_range( uint64_t len, uint64_t *inner_offset); +static id ds4_gpu_wrap_model_exact_range( + const void *model_map, + uint64_t model_size, + uint64_t offset, + uint64_t len, + uint64_t *inner_offset); + static const char *ds4_gpu_source = "#include \n" "#ifdef DS4_METAL_HAS_TENSOR\n" @@ -3136,6 +3480,15 @@ typedef struct { uint64_t nb3; } ds4_gpu_get_rows_args; +typedef struct { + int32_t n_embd; + int32_t n_vocab; + int32_t n_tokens; + uint64_t src_row_bytes; + uint64_t dst_row_bytes; + uint64_t token_stride; +} ds4_gpu_get_rows_q8_0_args; + typedef struct { int32_t ne00; int32_t ne01; @@ -3358,6 +3711,10 @@ typedef struct { float limit; } ds4_gpu_glu_args; +typedef struct { + uint32_t n; +} ds4_gpu_add_flat_args; + typedef struct { int32_t ne00; int32_t ne01; @@ -3678,10 +4035,24 @@ typedef struct { NSUInteger smem; } ds4_gpu_mv_dispatch; +static int ds4_gpu_tp_world_is_two(void); + static ds4_gpu_mv_dispatch ds4_gpu_make_q8_0_mv_dispatch(void) { + const uint64_t default_nsg = ds4_gpu_tp_world_is_two() ? 2u : 4u; + const int16_t nsg = + (int16_t)ds4_gpu_env_u64("DS4_METAL_Q8_MV_NSG", default_nsg, 1u, 8u); + const uint64_t rows = ds4_gpu_env_u64("DS4_METAL_Q8_MV_ROWS", 2u, 2u, 4u); + if (rows >= 4u) { + return (ds4_gpu_mv_dispatch) { + .function_name = "kernel_mul_mv_q8_0_f32_r4", + .nsg = nsg, + .nr0 = 4, + .smem = 32u * 4u * sizeof(float), + }; + } return (ds4_gpu_mv_dispatch) { .function_name = "kernel_mul_mv_q8_0_f32", - .nsg = 4, + .nsg = nsg, .nr0 = 2, .smem = 32u * 2u * sizeof(float), }; @@ -3777,7 +4148,7 @@ static int16_t ds4_gpu_mv_ext_r1ptg(uint64_t n_tok) { case 7: case 8: return 4; case 5: return 5; - default: return 0; + default: return n_tok > 8 ? 4 : 0; } } @@ -3811,6 +4182,16 @@ static const char *ds4_gpu_mv_ext_f32_name(int16_t r1ptg) { } } +static const char *ds4_gpu_mv_ext_q8_pair_swiglu_name(int16_t r1ptg) { + switch (r1ptg) { + case 2: return "kernel_mul_mv_ext_q8_0_pair_swiglu_f32_r1_2"; + case 3: return "kernel_mul_mv_ext_q8_0_pair_swiglu_f32_r1_3"; + case 4: return "kernel_mul_mv_ext_q8_0_pair_swiglu_f32_r1_4"; + case 5: return "kernel_mul_mv_ext_q8_0_pair_swiglu_f32_r1_5"; + default: return NULL; + } +} + typedef struct { int32_t ne00; int32_t ne00_t; @@ -4002,6 +4383,7 @@ typedef struct { int32_t tp_rank; int32_t tp_world; int32_t tp_addend; + int32_t tp_expert_base; } ds4_gpu_mul_mv_id_args; typedef struct { @@ -4042,6 +4424,9 @@ typedef struct { int32_t ne1; int16_t r2; int16_t r3; + int32_t tp_rank; + int32_t tp_world; + int32_t tp_expert_base; } ds4_gpu_mul_mm_id_args; static int ds4_gpu_encode_mul_mv_id( @@ -4071,7 +4456,8 @@ static int ds4_gpu_encode_attn_out_low_q8_direct( id dst, NSUInteger dst_off, NSUInteger threadgroup_bytes, - NSUInteger nsg); + NSUInteger nsg, + bool rows_per_group_is_nr0); static int ds4_gpu_encode_attn_out_low_q8_mpp( id cb, @@ -4153,7 +4539,22 @@ static int ds4_gpu_encode_mul_mm_id_mapped_tile( id src1, NSUInteger src1_off, id dst, - NSUInteger dst_off); + NSUInteger dst_off, + NSUInteger threadgroup_bytes); +static int ds4_gpu_encode_mul_mm_id_addr_mapped_tile( + id cb, + id mm_pipeline, + const ds4_gpu_mul_mm_id_args *mm_args, + id src0_addrs, + id src1, + NSUInteger src1_off, + id dst, + NSUInteger dst_off, + NSUInteger threadgroup_bytes, + ds4_gpu_stream_expert_cache_entry * const *resources, + uint32_t resource_count, + uint32_t resource_kind, + id overflow_resource); typedef struct { int32_t ne11; @@ -4516,6 +4917,271 @@ typedef struct { uint32_t hash_rows; } ds4_gpu_dsv4_router_select_one_args; +typedef struct { + uint32_t n_expert; + uint32_t n_expert_used; + float expert_weight_scale; + uint32_t pad0; +} ds4_gpu_glm_router_select_one_args; + +typedef struct { + uint32_t n_tokens; + uint32_t kv_raw_dim; + uint32_t kv_lora_dim; + float eps; +} ds4_gpu_glm_kv_lora_rms_norm_args; + +typedef struct { + uint32_t n_tokens; + uint32_t kv_lora_dim; + uint32_t qk_nope; + uint32_t n_head; + uint32_t row_bytes; + uint32_t weight_type; + uint32_t pad1; + uint32_t pad2; +} ds4_gpu_glm_k_b_project_args; + +typedef struct { + uint32_t pos0; + uint32_t n_tokens; + uint32_t cache_cap; + uint32_t kv_raw_dim; + uint32_t kv_lora_dim; + uint32_t qk_rope; + uint32_t cache_f16; + uint32_t pad1; +} ds4_gpu_glm_store_compact_kv_args; + +typedef struct { + uint32_t pos0; + uint32_t n_tokens; + uint32_t cache_cap; + uint32_t q_n; + uint32_t q_n4; + uint32_t kv_raw_dim; + uint32_t kv_lora_dim; + uint32_t kv_lora_n4; + uint32_t qk_rope; + uint32_t cache_f16; + float eps; + uint32_t pad0; +} ds4_gpu_glm_qkv_norm_store_compact_kv_args; + +typedef struct { + uint32_t pos0; + uint32_t n_tokens; + uint32_t cache_cap; + uint32_t head_dim; + uint32_t rot_dim; + uint32_t n_ctx_orig; + uint32_t cache_f16; + uint32_t pad0; + float eps; + float freq_base; + float freq_scale; + float ext_factor; + float attn_factor; + float beta_fast; + float beta_slow; + float pad1; +} ds4_gpu_glm_store_indexer_k_args; + +typedef struct { + uint32_t pos0; + uint32_t n_tokens; + uint32_t cache_cap; + uint32_t n_head; + uint32_t kv_raw_dim; + uint32_t kv_lora_dim; + uint32_t qk_nope; + uint32_t qk_rope; + uint32_t value_dim; + uint32_t n_ctx_orig; + uint32_t cache_f16; + uint32_t pad0; + float freq_base; + float freq_scale; + float ext_factor; + float attn_factor; + float beta_fast; + float beta_slow; +} ds4_gpu_glm_build_kv_cache_args; + +typedef struct { + uint32_t pos0; + uint32_t n_tokens; + uint32_t cache_len; + uint32_t cache_cap; + uint32_t n_head; + uint32_t qk_dim; + uint32_t value_dim; + uint32_t pad0; + uint32_t cache_f16; + uint32_t pad1; + uint32_t pad2; + float scale; +} ds4_gpu_glm_attention_full_args; + +typedef struct { + uint32_t n_selected; +} ds4_gpu_glm_fill_selected_range_args; + +typedef struct { + uint32_t n_tokens; + uint32_t pos0; + uint32_t n_selected; + uint32_t pad_row; +} ds4_gpu_glm_fill_selected_range_batch_args; + +typedef struct { + uint32_t n_tokens; + uint32_t n_head; + uint32_t head_dim; + uint32_t rot_dim; + uint32_t rot_offset; + uint32_t pos0; + uint32_t n_ctx_orig; + float freq_base; + float freq_scale; + float ext_factor; + float attn_factor; + float beta_fast; + float beta_slow; +} ds4_gpu_glm_rope_tail_args; + +typedef struct { + uint32_t n_rows; + uint32_t n_head; + uint32_t head_dim; + uint32_t cache_f16; + float scale; +} ds4_gpu_glm_indexer_score_one_args; + +typedef struct { + uint32_t n_rows; + uint32_t n_tokens; + uint32_t n_head; + uint32_t head_dim; + uint32_t pos0; + uint32_t cache_f16; + uint64_t q_token_stride; + uint64_t q_head_stride; + uint64_t weights_token_stride; + uint64_t score_token_stride; + float scale; +} ds4_gpu_glm_indexer_scores_batch_args; + +typedef struct { + uint32_t n_head; + uint32_t kv_lora_dim; + uint32_t qk_nope; + uint32_t qk_dim; + uint32_t row_bytes; + uint32_t weight_type; + uint32_t pad1; + uint32_t pad2; +} ds4_gpu_glm_qk_lowrank_args; + +typedef struct { + uint32_t n_tokens; + uint32_t n_head; + uint32_t kv_lora_dim; + uint32_t qk_nope; + uint32_t qk_dim; + uint32_t row_bytes; + uint32_t weight_type; + uint32_t head_base; +} ds4_gpu_glm_qk_lowrank_batch_args; + +typedef struct { + uint32_t n_selected; + uint32_t cache_cap; + uint32_t cache_f16; + uint32_t n_head; + uint32_t kv_lora_dim; + uint32_t qk_nope; + uint32_t qk_rope; + uint32_t value_dim; + uint32_t n_ctx_orig; + uint32_t value_row_bytes; + float scale; + float freq_base; + float freq_scale; + float ext_factor; + float attn_factor; + float beta_fast; + float beta_slow; + uint32_t value_type; +} ds4_gpu_glm_attention_indexed_decode_args; + +typedef struct { + uint32_t n_selected; + uint32_t cache_cap; + uint32_t cache_f16; + uint32_t n_head; + uint32_t kv_lora_dim; + uint32_t qk_nope; + uint32_t qk_rope; + uint32_t value_dim; + uint32_t n_ctx_orig; + uint32_t value_row_bytes; + uint32_t block_rows; + uint32_t n_blocks; + float scale; + float freq_base; + float freq_scale; + float ext_factor; + float attn_factor; + float beta_fast; + float beta_slow; + uint32_t value_type; +} ds4_gpu_glm_attention_indexed_decode_split_args; + +typedef struct { + uint32_t n_tokens; + uint32_t n_selected; + uint32_t cache_cap; + uint32_t cache_f16; + uint32_t n_head; + uint32_t kv_lora_dim; + uint32_t qk_nope; + uint32_t qk_rope; + uint32_t value_dim; + uint32_t n_ctx_orig; + uint32_t value_row_bytes; + uint32_t value_type; + uint32_t pos0; + float scale; + float freq_base; + float freq_scale; + float ext_factor; + float attn_factor; + float beta_fast; + float beta_slow; + uint32_t head_base; +} ds4_gpu_glm_attention_indexed_batch_args; + +typedef struct { + uint32_t in_dim; + uint32_t mid_dim; + uint32_t out_dim; + uint32_t n_total_expert; + uint32_t n_expert_used; + uint32_t n_tokens; + uint32_t mid_token_stride; + uint32_t down_type; + int32_t tp_rank; + int32_t tp_world; + int32_t tp_expert_base; + uint64_t gate_expert_bytes; + uint64_t gate_row_bytes; + uint64_t up_expert_bytes; + uint64_t up_row_bytes; + uint64_t down_expert_bytes; + uint64_t down_row_bytes; +} ds4_gpu_glm_routed_moe_args; + typedef struct { uint32_t n_tokens; uint32_t n_head; @@ -4746,6 +5412,57 @@ int ds4_gpu_init(void) { return 0; } + fn = [library newFunctionWithName:@"kernel_get_rows_q8_0_f32"]; + if (!fn) { + fprintf(stderr, "ds4: Metal kernel_get_rows_q8_0_f32 function not found\n"); + g_queue = nil; + g_device = nil; + return 0; + } + + g_get_rows_q8_0_pipeline = [g_device newComputePipelineStateWithFunction:fn error:&error]; + if (!g_get_rows_q8_0_pipeline) { + fprintf(stderr, "ds4: Metal kernel_get_rows_q8_0_f32 pipeline failed: %s\n", + [[error localizedDescription] UTF8String]); + g_queue = nil; + g_device = nil; + return 0; + } + + fn = [library newFunctionWithName:@"kernel_get_rows_q4_0_f32"]; + if (!fn) { + fprintf(stderr, "ds4: Metal kernel_get_rows_q4_0_f32 function not found\n"); + g_queue = nil; + g_device = nil; + return 0; + } + + g_get_rows_q4_0_pipeline = [g_device newComputePipelineStateWithFunction:fn error:&error]; + if (!g_get_rows_q4_0_pipeline) { + fprintf(stderr, "ds4: Metal kernel_get_rows_q4_0_f32 pipeline failed: %s\n", + [[error localizedDescription] UTF8String]); + g_queue = nil; + g_device = nil; + return 0; + } + + fn = [library newFunctionWithName:@"kernel_get_rows_q4_K_f32"]; + if (!fn) { + fprintf(stderr, "ds4: Metal kernel_get_rows_q4_K_f32 function not found\n"); + g_queue = nil; + g_device = nil; + return 0; + } + + g_get_rows_q4_K_pipeline = [g_device newComputePipelineStateWithFunction:fn error:&error]; + if (!g_get_rows_q4_K_pipeline) { + fprintf(stderr, "ds4: Metal kernel_get_rows_q4_K_f32 pipeline failed: %s\n", + [[error localizedDescription] UTF8String]); + g_queue = nil; + g_device = nil; + return 0; + } + fn = [library newFunctionWithName:@"kernel_repeat_f32"]; if (!fn) { fprintf(stderr, "ds4: Metal kernel_repeat_f32 function not found\n"); @@ -4848,6 +5565,23 @@ int ds4_gpu_init(void) { return 0; } + fn = [library newFunctionWithName:@"kernel_cpy_f16_f16"]; + if (!fn) { + fprintf(stderr, "ds4: Metal kernel_cpy_f16_f16 function not found\n"); + g_queue = nil; + g_device = nil; + return 0; + } + + g_cpy_f16_f16_pipeline = [g_device newComputePipelineStateWithFunction:fn error:&error]; + if (!g_cpy_f16_f16_pipeline) { + fprintf(stderr, "ds4: Metal kernel_cpy_f16_f16 pipeline failed: %s\n", + [[error localizedDescription] UTF8String]); + g_queue = nil; + g_device = nil; + return 0; + } + fn = [library newFunctionWithName:@"kernel_dsv4_fp8_kv_quantize_f32"]; if (!fn) { fprintf(stderr, "ds4: Metal kernel_dsv4_fp8_kv_quantize_f32 function not found\n"); @@ -4929,6 +5663,24 @@ int ds4_gpu_init(void) { return 0; } + fn = [library newFunctionWithName:@"kernel_swiglu_flat_f32"]; + if (!fn) { + fprintf(stderr, "ds4: Metal kernel_swiglu_flat_f32 function not found\n"); + g_queue = nil; + g_device = nil; + return 0; + } + + error = nil; + g_swiglu_flat_pipeline = [g_device newComputePipelineStateWithFunction:fn error:&error]; + if (!g_swiglu_flat_pipeline) { + fprintf(stderr, "ds4: Metal kernel_swiglu_flat_f32 pipeline failed: %s\n", + [[error localizedDescription] UTF8String]); + g_queue = nil; + g_device = nil; + return 0; + } + fn = [library newFunctionWithName:@"kernel_dsv4_moe_sum6_f32"]; if (!fn) { fprintf(stderr, "ds4: Metal kernel_dsv4_moe_sum6_f32 function not found\n"); @@ -4946,6 +5698,23 @@ int ds4_gpu_init(void) { return 0; } + fn = [library newFunctionWithName:@"kernel_dsv4_moe_sum8_f32"]; + if (!fn) { + fprintf(stderr, "ds4: Metal kernel_dsv4_moe_sum8_f32 function not found\n"); + g_queue = nil; + g_device = nil; + return 0; + } + + g_moe_sum8_pipeline = [g_device newComputePipelineStateWithFunction:fn error:&error]; + if (!g_moe_sum8_pipeline) { + fprintf(stderr, "ds4: Metal kernel_dsv4_moe_sum8_f32 pipeline failed: %s\n", + [[error localizedDescription] UTF8String]); + g_queue = nil; + g_device = nil; + return 0; + } + MTLFunctionConstantValues *bin_constants = [[MTLFunctionConstantValues alloc] init]; int16_t bin_op = 0; int16_t bin_f = 1; @@ -4977,6 +5746,42 @@ int ds4_gpu_init(void) { return 0; } + fn = [library newFunctionWithName:@"kernel_add2_f32"]; + if (!fn) { + fprintf(stderr, "ds4: Metal kernel_add2_f32 function not found\n"); + g_queue = nil; + g_device = nil; + return 0; + } + + error = nil; + g_add2_pipeline = [g_device newComputePipelineStateWithFunction:fn error:&error]; + if (!g_add2_pipeline) { + fprintf(stderr, "ds4: Metal kernel_add2_f32 pipeline failed: %s\n", + [[error localizedDescription] UTF8String]); + g_queue = nil; + g_device = nil; + return 0; + } + + fn = [library newFunctionWithName:@"kernel_add3_f32"]; + if (!fn) { + fprintf(stderr, "ds4: Metal kernel_add3_f32 function not found\n"); + g_queue = nil; + g_device = nil; + return 0; + } + + error = nil; + g_add3_pipeline = [g_device newComputePipelineStateWithFunction:fn error:&error]; + if (!g_add3_pipeline) { + fprintf(stderr, "ds4: Metal kernel_add3_f32 pipeline failed: %s\n", + [[error localizedDescription] UTF8String]); + g_queue = nil; + g_device = nil; + return 0; + } + MTLFunctionConstantValues *bin_mul_constants = [[MTLFunctionConstantValues alloc] init]; int16_t bin_mul_plain_op = 2; int16_t bin_mul_plain_f = 1; @@ -5102,6 +5907,22 @@ int ds4_gpu_init(void) { return 0; } + fn = [library newFunctionWithName:@"kernel_add_rms_norm_mul_f32_4"]; + if (!fn) { + fprintf(stderr, "ds4: Metal kernel_add_rms_norm_mul_f32_4 function not found\n"); + g_queue = nil; + g_device = nil; + return 0; + } + g_add_rms_norm_pipeline = [g_device newComputePipelineStateWithFunction:fn error:&error]; + if (!g_add_rms_norm_pipeline) { + fprintf(stderr, "ds4: Metal kernel_add_rms_norm_mul_f32_4 pipeline failed: %s\n", + [[error localizedDescription] UTF8String]); + g_queue = nil; + g_device = nil; + return 0; + } + fn = [library newFunctionWithName:@"kernel_dsv4_qkv_rms_norm_f32_4"]; if (!fn) { fprintf(stderr, "ds4: Metal kernel_dsv4_qkv_rms_norm_f32_4 function not found\n"); @@ -5222,6 +6043,26 @@ int ds4_gpu_init(void) { return 0; } + error = nil; + fn = [library newFunctionWithName:@"kernel_mul_mv_id_iq2_xxs_sum6_f32" + constantValues:moe_mv_id_constants + error:&error]; + if (!fn) { + fprintf(stderr, "ds4: Metal kernel_mul_mv_id_iq2_xxs_sum6_f32 function not found: %s\n", + [[error localizedDescription] UTF8String]); + g_queue = nil; + g_device = nil; + return 0; + } + g_moe_mul_mv_id_iq2_xxs_sum6_pipeline = [g_device newComputePipelineStateWithFunction:fn error:&error]; + if (!g_moe_mul_mv_id_iq2_xxs_sum6_pipeline) { + fprintf(stderr, "ds4: Metal kernel_mul_mv_id_iq2_xxs_sum6_f32 pipeline failed: %s\n", + [[error localizedDescription] UTF8String]); + g_queue = nil; + g_device = nil; + return 0; + } + error = nil; fn = [library newFunctionWithName:@"kernel_mul_mv_slots6_iq2_xxs_pair_swiglu_f32" constantValues:moe_mv_id_constants @@ -5282,6 +6123,26 @@ int ds4_gpu_init(void) { return 0; } + error = nil; + fn = [library newFunctionWithName:@"kernel_mul_mv_addr_iq2_xxs_f32" + constantValues:moe_mv_id_constants + error:&error]; + if (!fn) { + fprintf(stderr, "ds4: Metal kernel_mul_mv_addr_iq2_xxs_f32 function not found: %s\n", + [[error localizedDescription] UTF8String]); + g_queue = nil; + g_device = nil; + return 0; + } + g_moe_mul_mv_addr_iq2_xxs_pipeline = [g_device newComputePipelineStateWithFunction:fn error:&error]; + if (!g_moe_mul_mv_addr_iq2_xxs_pipeline) { + fprintf(stderr, "ds4: Metal kernel_mul_mv_addr_iq2_xxs_f32 pipeline failed: %s\n", + [[error localizedDescription] UTF8String]); + g_queue = nil; + g_device = nil; + return 0; + } + error = nil; fn = [library newFunctionWithName:@"kernel_mul_mv_addr_q2_K_sum6_f32" constantValues:moe_mv_id_constants @@ -6206,6 +7067,124 @@ int ds4_gpu_init(void) { ds4_gpu_get_pipeline("kernel_dsv4_router_finalize_one"); g_dsv4_router_weights_one_pipeline = ds4_gpu_get_pipeline("kernel_dsv4_router_weights_one"); + g_glm_router_select_one_pipeline = + ds4_gpu_get_pipeline("kernel_glm_router_select_one"); + g_glm_kv_lora_rms_norm_pipeline = + ds4_gpu_get_pipeline("kernel_glm_kv_lora_rms_norm"); + g_glm_k_b_project_pipeline = + ds4_gpu_get_pipeline("kernel_glm_k_b_project_q8_0"); + g_glm_store_compact_kv_pipeline = + ds4_gpu_get_pipeline("kernel_glm_store_compact_kv"); + g_glm_qkv_norm_store_compact_kv_pipeline = + ds4_gpu_get_pipeline("kernel_glm_qkv_norm_store_compact_kv"); + g_glm_store_indexer_k_pipeline = + ds4_gpu_get_pipeline("kernel_glm_store_indexer_k"); + g_glm_build_kv_cache_pipeline = + ds4_gpu_get_pipeline("kernel_glm_build_kv_cache"); + g_glm_build_kv_cache_decode_group4_pipeline = + ds4_gpu_get_pipeline("kernel_glm_build_kv_cache_decode_group4"); + g_glm_build_kv_cache_flash_pipeline = + ds4_gpu_get_pipeline("kernel_glm_build_kv_cache_flash"); + g_glm_attention_full_pipeline = + ds4_gpu_get_pipeline("kernel_glm_attention_full"); + g_glm_fill_selected_range_pipeline = + ds4_gpu_get_pipeline("kernel_glm_fill_selected_range"); + g_glm_fill_selected_range_batch_pipeline = + ds4_gpu_get_pipeline("kernel_glm_fill_selected_range_batch"); + g_glm_indexer_rope_tail_pipeline = + ds4_gpu_get_pipeline("kernel_glm_indexer_rope_tail_f32"); + g_glm_indexer_score_one_pipeline = + ds4_gpu_get_pipeline("kernel_glm_indexer_score_one"); + g_glm_indexer_score_one_direct_pipeline = + ds4_gpu_get_pipeline("kernel_glm_indexer_score_one_direct"); + g_glm_indexer_scores_batch_pipeline = + ds4_gpu_get_pipeline("kernel_glm_indexer_scores_batch"); + g_glm_indexer_scores_tiled_pipeline = + ds4_gpu_get_pipeline("kernel_glm_indexer_scores_tiled"); + g_glm_indexer_scores_tiled_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_indexer_scores_tiled_f32"); + g_glm_qk_lowrank_pipeline = + ds4_gpu_get_pipeline("kernel_glm_qk_lowrank_q8_0"); + g_glm_qk_lowrank_glm52_pipeline = + ds4_gpu_get_pipeline("kernel_glm_qk_lowrank_q8_0_glm52"); + g_glm_qk_lowrank_glm52_sg_pipeline = + ds4_gpu_get_pipeline("kernel_glm_qk_lowrank_q8_0_glm52_sg"); + g_glm_qk_lowrank_batch_pipeline = + ds4_gpu_get_pipeline("kernel_glm_qk_lowrank_q8_0_batch"); + g_glm_qk_lowrank_batch_glm52_t4_pipeline = + ds4_gpu_get_pipeline("kernel_glm_qk_lowrank_q8_0_batch_glm52_t4"); + g_glm_value_project_q8_0_pipeline = + ds4_gpu_get_pipeline("kernel_glm_value_project_q8_0"); + g_glm_value_project_q8_0_batch_heads_pipeline = + ds4_gpu_get_pipeline("kernel_glm_value_project_q8_0_batch_heads"); + g_glm_value_project_q8_0_batch_heads_mma_pipeline = + ds4_gpu_get_pipeline("kernel_glm_value_project_q8_0_batch_heads_mma"); + g_glm_attention_indexed_decode_pipeline = + ds4_gpu_get_pipeline("kernel_glm_attention_indexed_decode"); + g_glm_attention_indexed_decode_split_group8_partial_pipeline = + ds4_gpu_get_pipeline("kernel_glm_attention_indexed_decode_split_group8_partial"); + g_glm_attention_indexed_decode_split_group8_partial_valid_fullheads_pipeline = + ds4_gpu_get_pipeline("kernel_glm_attention_indexed_decode_split_group8_partial_valid_fullheads"); + g_glm_attention_indexed_decode_split_group8_reduce_pipeline = + ds4_gpu_get_pipeline("kernel_glm_attention_indexed_decode_split_group8_reduce"); + g_glm_attention_indexed_decode_split_group8_reduce16_pipeline = + ds4_gpu_get_pipeline("kernel_glm_attention_indexed_decode_split_group8_reduce16"); + g_glm_attention_indexed_batch_pipeline = + ds4_gpu_get_pipeline("kernel_glm_attention_indexed_batch"); + g_glm_attention_indexed_batch_group2_pipeline = + ds4_gpu_get_pipeline("kernel_glm_attention_indexed_batch_group2"); + g_glm_attention_indexed_batch_q2_group4_pipeline = + ds4_gpu_get_pipeline("kernel_glm_attention_indexed_batch_q2_group4"); + g_glm_attention_indexed_batch_group8_pipeline = + ds4_gpu_get_pipeline("kernel_glm_attention_indexed_batch_group8"); + g_glm_attention_indexed_batch_lora_group8_vec_pipeline = + ds4_gpu_get_pipeline("kernel_glm_attention_indexed_batch_lora_group8_vec"); + g_glm_attention_indexed_batch_lora_group8_vec_valid_pipeline = + ds4_gpu_get_pipeline("kernel_glm_attention_indexed_batch_lora_group8_vec_valid"); + g_glm_attention_indexed_batch_lora_group8_vec_valid_fullheads_pipeline = + ds4_gpu_get_pipeline("kernel_glm_attention_indexed_batch_lora_group8_vec_valid_fullheads"); + g_glm_attention_indexed_batch_lora_group8_vec_causal_pipeline = + ds4_gpu_get_pipeline("kernel_glm_attention_indexed_batch_lora_group8_vec_causal"); + g_glm_attention_indexed_batch_lora_group8_vec_causal_fullheads_pipeline = + ds4_gpu_get_pipeline("kernel_glm_attention_indexed_batch_lora_group8_vec_causal_fullheads"); + g_glm_q4_k_pair_swiglu_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q4_K_pair_swiglu_f32"); + g_glm_q4_k_pair_swiglu2_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q4_K_pair_swiglu2_f32"); + g_glm_q4_k_pair_swiglu4_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q4_K_pair_swiglu4_f32"); + g_glm_q4_k_pair_swiglu2_mapped_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q4_K_pair_swiglu2_mapped_f32"); + g_glm_q4_k_pair_swiglu2_mapped_row_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q4_K_pair_swiglu2_mapped_row_f32"); + g_glm_q2_k_pair_swiglu_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q2_K_pair_swiglu_f32"); + g_glm_q2_k_addr_pair_swiglu2_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q2_K_addr_pair_swiglu2_f32"); + g_glm_q2_k_addr_pair_swiglu2_masked_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q2_K_addr_pair_swiglu2_f32_masked"); + g_glm_q4_k_addr_pair_swiglu_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q4_K_addr_pair_swiglu_f32"); + g_glm_q4_k_addr_pair_swiglu_masked_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q4_K_addr_pair_swiglu_f32_masked"); + g_glm_q2_k_down_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q2_K_down_f32"); + g_glm_q4_k_down_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q4_K_down_simd_f32"); + g_glm_q2_k_addr_down_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q2_K_addr_down_f32"); + g_glm_q4_k_addr_down_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q4_K_addr_down_simd_f32"); + g_glm_q5_k_pair_swiglu_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q5_K_pair_swiglu_f32"); + g_glm_q5_k_pair_swiglu_mapped_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q5_K_pair_swiglu_mapped_f32"); + g_glm_q5_k_pair_swiglu_mapped_row_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q5_K_pair_swiglu_mapped_row_f32"); + g_glm_q5_k_down_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q5_K_down_f32"); + g_glm_q6_k_down_f32_pipeline = + ds4_gpu_get_pipeline("kernel_glm_q6_K_down_f32"); g_dsv4_hc_expand4_pipeline = ds4_gpu_get_pipeline("kernel_dsv4_hc_expand4"); if (!g_dsv4_indexer_score_one_direct_pipeline || @@ -6216,6 +7195,65 @@ int ds4_gpu_init(void) { !g_dsv4_softplus_sqrt_pipeline || !g_dsv4_router_finalize_one_pipeline || !g_dsv4_router_weights_one_pipeline || + !g_glm_router_select_one_pipeline || + !g_glm_kv_lora_rms_norm_pipeline || + !g_glm_k_b_project_pipeline || + !g_glm_store_compact_kv_pipeline || + !g_glm_qkv_norm_store_compact_kv_pipeline || + !g_glm_store_indexer_k_pipeline || + !g_glm_build_kv_cache_pipeline || + !g_glm_build_kv_cache_decode_group4_pipeline || + !g_glm_build_kv_cache_flash_pipeline || + !g_glm_attention_full_pipeline || + !g_glm_fill_selected_range_pipeline || + !g_glm_fill_selected_range_batch_pipeline || + !g_glm_indexer_rope_tail_pipeline || + !g_glm_indexer_score_one_pipeline || + !g_glm_indexer_score_one_direct_pipeline || + !g_glm_indexer_scores_batch_pipeline || + !g_glm_indexer_scores_tiled_pipeline || + !g_glm_indexer_scores_tiled_f32_pipeline || + !g_glm_qk_lowrank_pipeline || + !g_glm_qk_lowrank_glm52_pipeline || + !g_glm_qk_lowrank_glm52_sg_pipeline || + !g_glm_qk_lowrank_batch_pipeline || + !g_glm_qk_lowrank_batch_glm52_t4_pipeline || + !g_glm_value_project_q8_0_pipeline || + !g_glm_value_project_q8_0_batch_heads_pipeline || + !g_glm_value_project_q8_0_batch_heads_mma_pipeline || + !g_glm_attention_indexed_decode_pipeline || + !g_glm_attention_indexed_decode_split_group8_partial_pipeline || + !g_glm_attention_indexed_decode_split_group8_partial_valid_fullheads_pipeline || + !g_glm_attention_indexed_decode_split_group8_reduce_pipeline || + !g_glm_attention_indexed_decode_split_group8_reduce16_pipeline || + !g_glm_attention_indexed_batch_pipeline || + !g_glm_attention_indexed_batch_group2_pipeline || + !g_glm_attention_indexed_batch_q2_group4_pipeline || + !g_glm_attention_indexed_batch_group8_pipeline || + !g_glm_attention_indexed_batch_lora_group8_vec_pipeline || + !g_glm_attention_indexed_batch_lora_group8_vec_valid_pipeline || + !g_glm_attention_indexed_batch_lora_group8_vec_valid_fullheads_pipeline || + !g_glm_attention_indexed_batch_lora_group8_vec_causal_pipeline || + !g_glm_attention_indexed_batch_lora_group8_vec_causal_fullheads_pipeline || + !g_glm_q4_k_pair_swiglu_f32_pipeline || + !g_glm_q4_k_pair_swiglu2_f32_pipeline || + !g_glm_q4_k_pair_swiglu4_f32_pipeline || + !g_glm_q4_k_pair_swiglu2_mapped_f32_pipeline || + !g_glm_q4_k_pair_swiglu2_mapped_row_f32_pipeline || + !g_glm_q2_k_pair_swiglu_f32_pipeline || + !g_glm_q2_k_addr_pair_swiglu2_f32_pipeline || + !g_glm_q2_k_addr_pair_swiglu2_masked_f32_pipeline || + !g_glm_q4_k_addr_pair_swiglu_f32_pipeline || + !g_glm_q4_k_addr_pair_swiglu_masked_f32_pipeline || + !g_glm_q2_k_down_f32_pipeline || + !g_glm_q4_k_down_f32_pipeline || + !g_glm_q2_k_addr_down_f32_pipeline || + !g_glm_q4_k_addr_down_f32_pipeline || + !g_glm_q5_k_pair_swiglu_f32_pipeline || + !g_glm_q5_k_pair_swiglu_mapped_f32_pipeline || + !g_glm_q5_k_pair_swiglu_mapped_row_f32_pipeline || + !g_glm_q5_k_down_f32_pipeline || + !g_glm_q6_k_down_f32_pipeline || !g_dsv4_hc_expand4_pipeline) { g_queue = nil; g_device = nil; @@ -6387,6 +7425,7 @@ int ds4_gpu_tensor_copy(ds4_gpu_tensor *dst, uint64_t dst_offset, if (!g_batch_cb) return 0; ds4_gpu_close_batch_encoder(); + g_batch_has_work = YES; id blit = [g_batch_cb blitCommandEncoder]; if (!blit) return 0; [blit copyFromBuffer:s.buffer @@ -6508,10 +7547,18 @@ int ds4_gpu_begin_commands(void) { if (!g_initialized && !ds4_gpu_init()) return 0; if (g_batch_cb) return 0; g_batch_cb = ds4_gpu_new_command_buffer(); + g_batch_has_work = NO; if (g_batch_cb) ds4_gpu_stream_expert_cache_note_batch_created(); return g_batch_cb != nil; } +int ds4_gpu_flush_encoder(void) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!g_batch_cb) return 0; + ds4_gpu_close_batch_encoder(); + return 1; +} + int ds4_gpu_flush_commands(void) { if (!g_initialized && !ds4_gpu_init()) return 0; if (!g_batch_cb) return 0; @@ -6519,11 +7566,13 @@ int ds4_gpu_flush_commands(void) { ds4_gpu_close_batch_encoder(); id cb = g_batch_cb; g_batch_cb = nil; + g_batch_has_work = NO; [cb commit]; [g_pending_cbs addObject:cb]; ds4_gpu_stream_expert_cache_note_batch_committed(); g_batch_cb = ds4_gpu_new_command_buffer(); + g_batch_has_work = NO; if (g_batch_cb) ds4_gpu_stream_expert_cache_note_batch_created(); if (!g_batch_cb) { (void)ds4_gpu_wait_pending_command_buffers("command batch"); @@ -6533,6 +7582,10 @@ int ds4_gpu_flush_commands(void) { return 1; } +int ds4_gpu_commands_active(void) { + return g_batch_cb != nil; +} + static int ds4_gpu_stream_expert_cache_wait_inflight(const char *label) { const char *what = label ? label : "streaming expert cache in-flight"; if (g_batch_cb && ds4_gpu_flush_commands() == 0) return 0; @@ -6561,6 +7614,7 @@ int ds4_gpu_signal_selected_readback_ready(uint64_t *event_value) { ds4_gpu_close_batch_encoder(); const uint64_t value = ++g_selected_readback_event_value; [g_batch_cb encodeSignalEvent:g_selected_readback_event value:value]; + g_batch_has_work = YES; *event_value = value; return 1; } @@ -6579,6 +7633,7 @@ int ds4_gpu_commit_and_wait_selected_readback(uint64_t event_value, const char * ds4_gpu_close_batch_encoder(); id cb = g_batch_cb; g_batch_cb = nil; + g_batch_has_work = NO; [cb commit]; ds4_gpu_stream_expert_cache_note_batch_committed(); @@ -6602,6 +7657,7 @@ int ds4_gpu_commit_and_wait_selected_readback(uint64_t event_value, const char * } g_batch_cb = ds4_gpu_new_command_buffer(); + g_batch_has_work = NO; if (g_batch_cb) ds4_gpu_stream_expert_cache_note_batch_created(); if (!g_batch_cb) { (void)ds4_gpu_wait_pending_command_buffers(what); @@ -6637,6 +7693,11 @@ typedef struct { uint32_t gate; uint32_t rows; /* 0 = row gate; >0 = verify-block batch gate */ uint64_t seq; + /* Big batch gates (prefill): exchange big_bytes from big_out into + * big_in directly (CPU-visible bounce buffers), bypassing the slab. */ + const void *big_out; + void *big_in; + uint64_t big_bytes; } ds4_gpu_tp_request; enum { DS4_GPU_TP_QUEUE = 1024 }; @@ -6653,10 +7714,56 @@ static uint64_t g_tp_batch_seq; /* Batch flag values are tagged so a stale row-gate seq in the reused FFN * flag word can never satisfy a batch arrival spin (and vice versa). */ #define DS4_TP_BATCH_FLAG_TAG 0x80000000u -/* Expert-ownership split parameters for the routed decode kernels. World 1 - * (null-split bring-up) keeps kernels computing full outputs. */ +/* Expert-ownership split parameters for routed kernels. World 1 means TP is + * not bound; world 2 assigns each rank one contiguous expert range. */ static int32_t g_tp_split_rank; static int32_t g_tp_split_world = 1; + +static int ds4_gpu_tp_world_is_two(void) { + return g_tp_split_world == 2; +} + +/* Return the contiguous routed-expert range backed by this process. Rank 1 + * owns the high range and receives any odd-count remainder. */ +static void ds4_gpu_tp_expert_range(uint32_t n_total_expert, + uint32_t *first_expert, + uint32_t *n_expert) { + *first_expert = 0; + *n_expert = n_total_expert; + if (g_tp_split_world != 2) return; + + const uint32_t low_experts = n_total_expert / 2u; + if (g_tp_split_rank == 1) { + *first_expert = low_experts; + *n_expert = n_total_expert - low_experts; + } else { + *n_expert = low_experts; + } +} + +/* Attention head split for GLM batch prefill: each rank computes a + * contiguous half of the heads in the qk-low / attention-lora / + * value-project batch kernels; the caller zeroes the unowned head range + * of the heads buffer and combines the attn-output partials over the + * TP big-gate exchange. */ +static int32_t g_tp_attn_head_split; + +void ds4_gpu_tp_set_attn_head_split(int enabled) { + g_tp_attn_head_split = enabled ? 1 : 0; +} + +static void ds4_gpu_tp_attn_head_range(uint32_t n_head, + uint32_t group, + uint32_t *head_base, + uint32_t *head_count) { + *head_base = 0; + *head_count = n_head; + if (!g_tp_attn_head_split || g_tp_split_world != 2) return; + const uint32_t half = n_head / 2u; + if (half == 0u || (half % group) != 0u || (n_head % 2u) != 0u) return; + *head_count = half; + *head_base = g_tp_split_rank == 1 ? half : 0u; +} /* Flag gates (DS4_TP_FLAG_GATES): the GPU publishes gate arrival by storing * the sequence number into a slab word instead of signaling the shared * event; the service thread spin-reads it from shared memory, which wakes @@ -6670,6 +7777,12 @@ static uint64_t g_tp_gpu_flags_off; static uint64_t g_tp_seq; static ds4_gpu_tp_exchange_fn g_tp_exchange_fn; static ds4_gpu_tp_batch_exchange_fn g_tp_batch_exchange_fn; +static ds4_gpu_tp_big_exchange_fn g_tp_big_exchange_fn; + +void ds4_gpu_tp_set_big_exchange(ds4_gpu_tp_big_exchange_fn fn) { + g_tp_big_exchange_fn = fn; +} + static void *g_tp_exchange_ud; static pthread_t g_tp_thread; static int g_tp_thread_running; @@ -6692,7 +7805,7 @@ static id g_tp_keepalive_buffer; static pthread_t g_tp_keepalive_thread; static int g_tp_keepalive_running; -/* Nonzero while a replicated verify block runs: the GPU is genuinely busy +/* Nonzero while a verify block runs: the GPU is genuinely busy * there, so the keep-alive is a pure parasite (~2.3ms per 5-row block * measured against the single-machine verify). */ static volatile int g_tp_keepalive_paused; @@ -6701,13 +7814,29 @@ void ds4_gpu_tp_keepalive_pause(int paused) { g_tp_keepalive_paused = paused; } +static uint32_t ds4_gpu_tp_keepalive_tgs_from_env(void) { + uint32_t ka_tgs = 1; + const char *tgs_env = getenv("DS4_TP_KEEPALIVE_TGS"); + if (tgs_env) { + int v = atoi(tgs_env); + if (v > 0 && v <= 2048) ka_tgs = (uint32_t)v; + } + return ka_tgs; +} + static void *ds4_gpu_tp_keepalive_thread(void *arg) { (void)arg; - /* Swept on the M5 Max pair: 2k iters lets clocks sag (30.7 t/s), 20k - * reaches 32.4, 400k the ~37.3 plateau (1.2M measures the same). */ - uint32_t iters = 400000; + /* Swept on the M5 Max pair: too few iterations lets clocks sag. Current + * TP split-resident Flash runs show 1.2M is a small Q4/Q2 decode win over + * 800k, while two threadgroups waste work. */ + uint32_t iters = 1200000; const char *env = getenv("DS4_TP_KEEPALIVE_ITERS"); if (env) iters = (uint32_t)atoi(env); + /* One ALU-only threadgroup keeps the GPU from power-gating but does + * not push the frequency governor; solo-vs-engine kernel gaps + * (~1.7x) suggest decode runs well below max clocks. More TGs raise + * apparent utilization without eating memory bandwidth. */ + uint32_t ka_tgs = ds4_gpu_tp_keepalive_tgs_from_env(); id pipeline = ds4_gpu_get_pipeline("kernel_dsv4_tp_keepalive"); if (!pipeline) { @@ -6725,7 +7854,7 @@ static void *ds4_gpu_tp_keepalive_thread(void *arg) { [enc setComputePipelineState:pipeline]; [enc setBuffer:g_tp_keepalive_buffer offset:0 atIndex:0]; [enc setBytes:&iters length:sizeof(iters) atIndex:1]; - [enc dispatchThreadgroups:MTLSizeMake(1, 1, 1) + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)ka_tgs, 1, 1) threadsPerThreadgroup:MTLSizeMake(256, 1, 1)]; [enc endEncoding]; [cb commit]; @@ -6756,7 +7885,16 @@ static void *ds4_gpu_tp_service_thread(void *arg) { * out; yielding here measurably delays the release wake-up. */ const double t0 = profile ? ds4_gpu_now_ms() : 0.0; uint32_t spins = 0; - if (g_tp_flag_gates) { + if (req.big_bytes > 0) { + /* Big gates always signal arrival through the batch shared + * event (see ds4_gpu_tp_big_gate_kick): the event completion + * semantics are what guarantee the bounce payload is visible + * before the exchange reads it. */ + while (g_tp_batch_gpu_event.signaledValue < req.seq) { + if (g_tp_shutdown) break; + if (++spins > (1u << 16)) sched_yield(); + } + } else if (g_tp_flag_gates) { const uint32_t slot = req.layer * 2u + req.gate; uint32_t want = (uint32_t)req.seq; if (req.rows > 0) @@ -6782,7 +7920,12 @@ static void *ds4_gpu_tp_service_thread(void *arg) { const double t1 = profile ? ds4_gpu_now_ms() : 0.0; int ok = 0; if (!g_tp_shutdown && !g_tp_failed_flag) { - if (req.rows > 0) { + if (req.big_bytes > 0) { + if (g_tp_big_exchange_fn) + ok = g_tp_big_exchange_fn(g_tp_exchange_ud, req.layer, + req.seq, req.big_out, + req.big_in, req.big_bytes); + } else if (req.rows > 0) { if (g_tp_batch_exchange_fn) ok = g_tp_batch_exchange_fn(g_tp_exchange_ud, req.layer, req.rows, req.seq); @@ -6815,13 +7958,13 @@ static void *ds4_gpu_tp_service_thread(void *arg) { return NULL; } -int ds4_gpu_tp_init(uint32_t rank, uint32_t split_world, +int ds4_gpu_tp_init(uint32_t rank, ds4_gpu_tensor *slab, uint64_t gpu_flags_off, ds4_gpu_tp_exchange_fn fn, void *ud) { if (!g_initialized && !ds4_gpu_init()) return 0; - if (g_tp_thread_running) return 0; + if (g_tp_thread_running || rank > 1) return 0; g_tp_split_rank = (int32_t)rank; - g_tp_split_world = split_world > 1 ? (int32_t)split_world : 1; + g_tp_split_world = 2; g_tp_slab_buffer = slab ? ds4_gpu_tensor_buffer(slab) : nil; g_tp_slab_buffer_off = slab ? ds4_gpu_tensor_offset(slab) : 0; g_tp_gpu_flags_off = gpu_flags_off; @@ -6860,8 +8003,9 @@ int ds4_gpu_tp_init(uint32_t rank, uint32_t split_world, pthread_attr_destroy(&attr); g_tp_thread_running = 1; if (getenv("DS4_TP_NO_KEEPALIVE") == NULL) { + uint32_t ka_tgs = ds4_gpu_tp_keepalive_tgs_from_env(); g_tp_keepalive_queue = [g_device newCommandQueue]; - g_tp_keepalive_buffer = [g_device newBufferWithLength:256 * sizeof(float) + g_tp_keepalive_buffer = [g_device newBufferWithLength:(NSUInteger)ka_tgs * 256u * sizeof(float) options:MTLResourceStorageModeShared]; if (g_tp_keepalive_queue && g_tp_keepalive_buffer && pthread_create(&g_tp_keepalive_thread, NULL, @@ -6895,9 +8039,21 @@ void ds4_gpu_tp_shutdown(void) { g_tp_split_world = 1; } +void ds4_gpu_tp_suspend_expert_sharding(int suspend) { + if (!g_tp_thread_running) return; + g_tp_split_world = suspend ? 1 : 2; +} + int ds4_gpu_tp_gate_encode(uint32_t layer, uint32_t gate) { - if (!g_batch_cb) return 0; - if (!g_tp_thread_running) return 0; + if (!g_batch_cb) { + fprintf(stderr, "ds4: TP gate encode without an open command batch (layer %u gate %u)\n", + layer, gate); + return 0; + } + if (!g_tp_thread_running) { + fprintf(stderr, "ds4: TP gate encode without the gate service (layer %u)\n", layer); + return 0; + } const uint64_t seq = ++g_tp_seq; if (g_tp_flag_gates) { /* Publish arrival through the slab word; the buffer hazard against @@ -6936,6 +8092,9 @@ int ds4_gpu_tp_gate_encode(uint32_t layer, uint32_t gate) { g_tp_queue[tail].gate = gate; g_tp_queue[tail].rows = 0; g_tp_queue[tail].seq = seq; + g_tp_queue[tail].big_out = NULL; + g_tp_queue[tail].big_in = NULL; + g_tp_queue[tail].big_bytes = 0; g_tp_queue_count++; pthread_cond_signal(&g_tp_cond); pthread_mutex_unlock(&g_tp_mutex); @@ -6989,12 +8148,84 @@ int ds4_gpu_tp_batch_gate_encode(uint32_t layer, uint32_t rows) { g_tp_queue[tail].gate = 1u; /* FFN */ g_tp_queue[tail].rows = rows; g_tp_queue[tail].seq = seq; + g_tp_queue[tail].big_out = NULL; + g_tp_queue[tail].big_in = NULL; + g_tp_queue[tail].big_bytes = 0; g_tp_queue_count++; pthread_cond_signal(&g_tp_cond); pthread_mutex_unlock(&g_tp_mutex); return 1; } +/* Prefill batch gate kick: same seq space and release event as the verify + * batch gate, but the service thread exchanges big_bytes directly between + * the two shared bounce buffers instead of slab slots. The kick only + * publishes the GPU arrival marker and queues the exchange; the caller + * encodes the release wait later through ds4_gpu_tp_big_gate_wait, which + * lets it interleave more GPU work with the wire exchange. Arrival always + * uses the batch shared event, NOT the flag word: a flag write carries no + * memory-visibility guarantee for the payload buffer, and once the GPU + * keeps running past the kick (no event wait right behind it) the service + * thread can observe the flag before the producing kernels' stores reach + * CPU-visible memory (measured: stale rows in the first sub-kick). The + * shared-event signal only fires after every preceding command completes, + * which is exactly the payload ordering the exchange needs; the ~10 us + * slower arrival detection is noise against a multi-ms exchange. */ +uint64_t ds4_gpu_tp_big_gate_kick(uint32_t layer, uint32_t rows, + const ds4_gpu_tensor *out_t, + ds4_gpu_tensor *in_t, + uint64_t bytes) { + if (!g_batch_cb) return 0; + if (!g_tp_thread_running || rows == 0 || bytes == 0) return 0; + const void *out_ptr = ds4_gpu_tensor_contents((ds4_gpu_tensor *)out_t); + void *in_ptr = ds4_gpu_tensor_contents(in_t); + if (!out_ptr || !in_ptr) { + fprintf(stderr, "ds4: TP big gate needs CPU-visible bounce buffers\n"); + return 0; + } + const uint64_t seq = ++g_tp_batch_seq; + ds4_gpu_close_batch_encoder(); + [g_batch_cb encodeSignalEvent:g_tp_batch_gpu_event value:seq]; + pthread_mutex_lock(&g_tp_mutex); + if (g_tp_queue_count >= DS4_GPU_TP_QUEUE) { + pthread_mutex_unlock(&g_tp_mutex); + fprintf(stderr, "ds4: TP gate queue overflow\n"); + return 0; + } + uint32_t tail = (g_tp_queue_head + g_tp_queue_count) % DS4_GPU_TP_QUEUE; + g_tp_queue[tail].layer = layer; + g_tp_queue[tail].gate = 1u; + g_tp_queue[tail].rows = rows; + g_tp_queue[tail].seq = seq; + g_tp_queue[tail].big_out = out_ptr; + g_tp_queue[tail].big_in = in_ptr; + g_tp_queue[tail].big_bytes = bytes; + g_tp_queue_count++; + pthread_cond_signal(&g_tp_cond); + pthread_mutex_unlock(&g_tp_mutex); + return seq; +} + +/* Encode the GPU-side release wait for a previously kicked big gate. The + * batch release event is monotonic and the service thread completes queued + * exchanges in kick order, so waiting on the LAST kicked seq of a stage + * also covers every earlier kick. */ +int ds4_gpu_tp_big_gate_wait(uint64_t seq) { + if (!g_batch_cb || seq == 0) return 0; + ds4_gpu_close_batch_encoder(); + [g_batch_cb encodeWaitForEvent:g_tp_batch_cpu_event value:seq]; + return 1; +} + +int ds4_gpu_tp_big_gate_encode(uint32_t layer, uint32_t rows, + const ds4_gpu_tensor *out_t, + ds4_gpu_tensor *in_t, + uint64_t bytes) { + const uint64_t seq = ds4_gpu_tp_big_gate_kick(layer, rows, out_t, in_t, bytes); + if (seq == 0) return 0; + return ds4_gpu_tp_big_gate_wait(seq); +} + int ds4_gpu_tp_failed(void) { return g_tp_failed_flag; } @@ -7039,6 +8270,7 @@ static int ds4_gpu_signal_batch_and_wait_event(const char *label) { g_batch_cb = nil; const uint64_t value = ++g_selected_readback_event_value; [cb encodeSignalEvent:g_selected_readback_event value:value]; + g_batch_has_work = YES; [cb commit]; ds4_gpu_stream_expert_cache_note_batch_committed(); @@ -7061,6 +8293,7 @@ static int ds4_gpu_signal_batch_and_wait_event(const char *label) { } g_batch_cb = ds4_gpu_new_command_buffer(); + g_batch_has_work = NO; if (g_batch_cb) ds4_gpu_stream_expert_cache_note_batch_created(); if (!g_batch_cb) { (void)ds4_gpu_wait_pending_command_buffers(label ? label : "selected-id readback"); @@ -7072,6 +8305,7 @@ static int ds4_gpu_signal_batch_and_wait_event(const char *label) { ds4_gpu_close_batch_encoder(); id cb = g_batch_cb; g_batch_cb = nil; + g_batch_has_work = NO; if (ds4_gpu_finish_command_buffer(cb, 1, label ? label : "selected-id readback") == 0) { return 0; } @@ -7084,6 +8318,7 @@ int ds4_gpu_end_commands(void) { ds4_gpu_close_batch_encoder(); id cb = g_batch_cb; g_batch_cb = nil; + g_batch_has_work = NO; g_stream_expert_cache_owned_seq = g_stream_expert_cache_batch_seq; g_stream_expert_cache_batch_seq = 0; return ds4_gpu_finish_command_buffer(cb, 1, "command batch"); @@ -7163,6 +8398,10 @@ void ds4_gpu_cleanup(void) { g_stream_expert_cache_batch_seq = 0; } (void)ds4_gpu_wait_pending_command_buffers("cleanup"); + if (ds4_gpu_stream_expert_timing_summary_enabled() && + getenv("DS4_METAL_MEMORY_REPORT") == NULL) { + ds4_gpu_print_memory_report("at cleanup"); + } g_selected_readback_event = nil; g_selected_readback_event_value = 0; [g_transient_buffers removeAllObjects]; @@ -7182,14 +8421,22 @@ void ds4_gpu_cleanup(void) { g_get_rows_f32_pipeline = nil; g_get_rows_f16_pipeline = nil; g_get_rows_i32_pipeline = nil; + g_get_rows_q8_0_pipeline = nil; + g_get_rows_q4_0_pipeline = nil; + g_get_rows_q4_K_pipeline = nil; g_repeat_f32_pipeline = nil; g_concat_pipeline = nil; g_cpy_f32_f32_pipeline = nil; g_cpy_f32_f16_pipeline = nil; g_cpy_f16_f32_pipeline = nil; + g_cpy_f16_f16_pipeline = nil; g_swiglu_pipeline = nil; + g_swiglu_flat_pipeline = nil; g_add_pipeline = nil; + g_add2_pipeline = nil; + g_add3_pipeline = nil; g_moe_sum6_pipeline = nil; + g_moe_sum8_pipeline = nil; g_mul_pipeline = nil; g_bin_mul_scalar_pipeline = nil; g_bin_div_row_pipeline = nil; @@ -7203,6 +8450,7 @@ void ds4_gpu_cleanup(void) { g_unary_fill_f16_pipeline = nil; g_rms_norm_pipeline = nil; g_rms_norm_plain_pipeline = nil; + g_add_rms_norm_pipeline = nil; g_dsv4_qkv_rms_norm_pipeline = nil; g_hc_split_sinkhorn_pipeline = nil; g_hc_split_weighted_sum_pipeline = nil; @@ -7214,6 +8462,7 @@ void ds4_gpu_cleanup(void) { g_moe_mul_mv_id_iq2_xxs_pair_swiglu_pipeline = nil; g_moe_mul_mv_id_q2_k_pipeline = nil; g_moe_mul_mv_id_q2_k_sum6_pipeline = nil; + g_moe_mul_mv_id_iq2_xxs_sum6_pipeline = nil; g_moe_mul_mv_id_q4_k_pipeline = nil; g_moe_mul_mv_id_q4_k_pair_pipeline = nil; g_moe_mul_mv_id_q4_k_pair_swiglu_pipeline = nil; @@ -7231,6 +8480,7 @@ void ds4_gpu_cleanup(void) { g_moe_mul_mv_slots6_q4_k_pair_swiglu_pipeline = nil; g_moe_mul_mv_slots6_q4_k_sum6_pipeline = nil; g_moe_mul_mv_addr_iq2_xxs_pair_swiglu_pipeline = nil; + g_moe_mul_mv_addr_iq2_xxs_pipeline = nil; g_moe_mul_mv_addr_q2_k_sum6_pipeline = nil; g_moe_mul_mv_addr_iq2_xxs_pair_swiglu_masked_pipeline = nil; g_moe_mul_mv_addr_q2_k_sum6_masked_pipeline = nil; @@ -7265,6 +8515,65 @@ void ds4_gpu_cleanup(void) { g_dsv4_softplus_sqrt_pipeline = nil; g_dsv4_router_finalize_one_pipeline = nil; g_dsv4_router_weights_one_pipeline = nil; + g_glm_router_select_one_pipeline = nil; + g_glm_kv_lora_rms_norm_pipeline = nil; + g_glm_k_b_project_pipeline = nil; + g_glm_store_compact_kv_pipeline = nil; + g_glm_qkv_norm_store_compact_kv_pipeline = nil; + g_glm_store_indexer_k_pipeline = nil; + g_glm_build_kv_cache_pipeline = nil; + g_glm_build_kv_cache_decode_group4_pipeline = nil; + g_glm_build_kv_cache_flash_pipeline = nil; + g_glm_attention_full_pipeline = nil; + g_glm_fill_selected_range_pipeline = nil; + g_glm_fill_selected_range_batch_pipeline = nil; + g_glm_indexer_rope_tail_pipeline = nil; + g_glm_indexer_score_one_pipeline = nil; + g_glm_indexer_score_one_direct_pipeline = nil; + g_glm_indexer_scores_batch_pipeline = nil; + g_glm_indexer_scores_tiled_pipeline = nil; + g_glm_indexer_scores_tiled_f32_pipeline = nil; + g_glm_qk_lowrank_pipeline = nil; + g_glm_qk_lowrank_glm52_pipeline = nil; + g_glm_qk_lowrank_glm52_sg_pipeline = nil; + g_glm_qk_lowrank_batch_pipeline = nil; + g_glm_qk_lowrank_batch_glm52_t4_pipeline = nil; + g_glm_value_project_q8_0_pipeline = nil; + g_glm_value_project_q8_0_batch_heads_pipeline = nil; + g_glm_value_project_q8_0_batch_heads_mma_pipeline = nil; + g_glm_attention_indexed_decode_pipeline = nil; + g_glm_attention_indexed_decode_split_group8_partial_pipeline = nil; + g_glm_attention_indexed_decode_split_group8_partial_valid_fullheads_pipeline = nil; + g_glm_attention_indexed_decode_split_group8_reduce_pipeline = nil; + g_glm_attention_indexed_decode_split_group8_reduce16_pipeline = nil; + g_glm_attention_indexed_batch_pipeline = nil; + g_glm_attention_indexed_batch_group2_pipeline = nil; + g_glm_attention_indexed_batch_q2_group4_pipeline = nil; + g_glm_attention_indexed_batch_group8_pipeline = nil; + g_glm_attention_indexed_batch_lora_group8_vec_pipeline = nil; + g_glm_attention_indexed_batch_lora_group8_vec_valid_pipeline = nil; + g_glm_attention_indexed_batch_lora_group8_vec_valid_fullheads_pipeline = nil; + g_glm_attention_indexed_batch_lora_group8_vec_causal_pipeline = nil; + g_glm_attention_indexed_batch_lora_group8_vec_causal_fullheads_pipeline = nil; + g_glm_q4_k_pair_swiglu_f32_pipeline = nil; + g_glm_q4_k_pair_swiglu2_f32_pipeline = nil; + g_glm_q4_k_pair_swiglu4_f32_pipeline = nil; + g_glm_q4_k_pair_swiglu2_mapped_f32_pipeline = nil; + g_glm_q4_k_pair_swiglu2_mapped_row_f32_pipeline = nil; + g_glm_q2_k_pair_swiglu_f32_pipeline = nil; + g_glm_q2_k_addr_pair_swiglu2_f32_pipeline = nil; + g_glm_q2_k_addr_pair_swiglu2_masked_f32_pipeline = nil; + g_glm_q4_k_addr_pair_swiglu_f32_pipeline = nil; + g_glm_q4_k_addr_pair_swiglu_masked_f32_pipeline = nil; + g_glm_q2_k_down_f32_pipeline = nil; + g_glm_q4_k_down_f32_pipeline = nil; + g_glm_q2_k_addr_down_f32_pipeline = nil; + g_glm_q4_k_addr_down_f32_pipeline = nil; + g_glm_q5_k_pair_swiglu_f32_pipeline = nil; + g_glm_q5_k_pair_swiglu_mapped_f32_pipeline = nil; + g_glm_q5_k_pair_swiglu_mapped_row_f32_pipeline = nil; + g_glm_q5_k_down_f32_pipeline = nil; + g_glm_q6_k_down_f32_pipeline = nil; g_dsv4_hc_expand4_pipeline = nil; g_flash_attn_mask_buffer = nil; g_flash_attn_pad_buffer = nil; @@ -7272,6 +8581,7 @@ void ds4_gpu_cleanup(void) { g_flash_attn_blk_buffer = nil; g_flash_attn_ring_buffer = nil; g_flash_attn_kv_buffer = nil; + g_glm_flash_attn_mask_buffer = nil; g_compressor_pool_kv_buffer = nil; g_compressor_pool_score_buffer = nil; g_compressor_pool_score_cont_buffer = nil; @@ -7308,6 +8618,11 @@ void ds4_gpu_cleanup(void) { g_flash_attn_blk_bytes = 0; g_flash_attn_ring_bytes = 0; g_flash_attn_kv_bytes = 0; + g_glm_flash_attn_mask_bytes = 0; + g_glm_flash_attn_mask_valid = 0; + g_glm_flash_attn_mask_pos0 = 0; + g_glm_flash_attn_mask_tokens = 0; + g_glm_flash_attn_mask_cache_len = 0; g_compressor_pool_kv_bytes = 0; g_compressor_pool_score_bytes = 0; g_compressor_pool_score_cont_bytes = 0; @@ -7406,6 +8721,182 @@ static int ds4_gpu_encode_get_rows_f16( return 1; } +static uint64_t ds4_gpu_q8_0_row_bytes(uint32_t n_embd) { + return (((uint64_t)n_embd + 31u) / 32u) * 34u; +} + +static int ds4_gpu_quant_row_bytes( + uint32_t type, + uint32_t n_embd, + uint64_t *row_bytes_out) { + if (!row_bytes_out || n_embd == 0) return 0; + switch (type) { + case DS4_METAL_TENSOR_Q8_0: + *row_bytes_out = (((uint64_t)n_embd + 31u) / 32u) * 34u; + return 1; + case DS4_METAL_TENSOR_Q4_0: + *row_bytes_out = (((uint64_t)n_embd + 31u) / 32u) * 18u; + return 1; + case DS4_METAL_TENSOR_Q4_K: + if ((n_embd % 256u) != 0) return 0; + *row_bytes_out = ((uint64_t)n_embd / 256u) * 144u; + return 1; + default: + return 0; + } +} + +static int ds4_gpu_q8_0_table_bytes( + uint32_t n_vocab, + uint32_t n_embd, + uint64_t *bytes_out) { + if (!bytes_out || n_vocab == 0 || n_embd == 0) return 0; + const uint64_t row_bytes = ds4_gpu_q8_0_row_bytes(n_embd); + if (row_bytes != 0 && (uint64_t)n_vocab > UINT64_MAX / row_bytes) return 0; + *bytes_out = (uint64_t)n_vocab * row_bytes; + return 1; +} + +static int ds4_gpu_quant_table_bytes( + uint32_t type, + uint32_t n_vocab, + uint32_t n_embd, + uint64_t *bytes_out) { + if (!bytes_out || n_vocab == 0 || n_embd == 0) return 0; + uint64_t row_bytes = 0; + if (!ds4_gpu_quant_row_bytes(type, n_embd, &row_bytes)) return 0; + if (row_bytes != 0 && (uint64_t)n_vocab > UINT64_MAX / row_bytes) return 0; + *bytes_out = (uint64_t)n_vocab * row_bytes; + return 1; +} + +static int ds4_gpu_encode_get_rows_q8_0( + id cb, + id weight, + NSUInteger weight_offset, + id tokens, + NSUInteger tokens_offset, + const int32_t *single_token, + id out, + NSUInteger out_offset, + uint32_t n_vocab, + uint32_t n_tokens, + uint32_t n_embd) { + if (!cb || !weight || !out || n_vocab == 0 || n_tokens == 0 || n_embd == 0) { + return 0; + } + if (!tokens && (!single_token || n_tokens != 1)) { + return 0; + } + + ds4_gpu_get_rows_q8_0_args args = { + .n_embd = (int32_t)n_embd, + .n_vocab = (int32_t)n_vocab, + .n_tokens = (int32_t)n_tokens, + .src_row_bytes = ds4_gpu_q8_0_row_bytes(n_embd), + .dst_row_bytes = (uint64_t)n_embd * sizeof(float), + .token_stride = sizeof(int32_t), + }; + + NSUInteger nth = 32u; + const NSUInteger max_threads = g_get_rows_q8_0_pipeline.maxTotalThreadsPerThreadgroup; + if (nth > max_threads) nth = max_threads; + if (nth == 0) nth = 1; + const NSUInteger nblocks = ((NSUInteger)n_embd + 31u) / 32u; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:g_get_rows_q8_0_pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:weight offset:weight_offset atIndex:1]; + if (tokens) { + [enc setBuffer:tokens offset:tokens_offset atIndex:2]; + } else { + [enc setBytes:single_token length:sizeof(*single_token) atIndex:2]; + } + [enc setBuffer:out offset:out_offset atIndex:3]; + [enc dispatchThreadgroups:MTLSizeMake(nblocks, n_tokens, 1) + threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + return 1; +} + +static int ds4_gpu_encode_get_rows_quant( + id cb, + id weight, + NSUInteger weight_offset, + uint32_t weight_type, + id tokens, + NSUInteger tokens_offset, + const int32_t *single_token, + id out, + NSUInteger out_offset, + uint32_t n_vocab, + uint32_t n_tokens, + uint32_t n_embd) { + if (weight_type == DS4_METAL_TENSOR_Q8_0) { + return ds4_gpu_encode_get_rows_q8_0(cb, + weight, + weight_offset, + tokens, + tokens_offset, + single_token, + out, + out_offset, + n_vocab, + n_tokens, + n_embd); + } + if (!cb || !weight || !out || n_vocab == 0 || n_tokens == 0 || n_embd == 0) { + return 0; + } + if (!tokens && (!single_token || n_tokens != 1)) { + return 0; + } + + uint64_t src_row_bytes = 0; + if (!ds4_gpu_quant_row_bytes(weight_type, n_embd, &src_row_bytes)) return 0; + ds4_gpu_get_rows_q8_0_args args = { + .n_embd = (int32_t)n_embd, + .n_vocab = (int32_t)n_vocab, + .n_tokens = (int32_t)n_tokens, + .src_row_bytes = src_row_bytes, + .dst_row_bytes = (uint64_t)n_embd * sizeof(float), + .token_stride = sizeof(int32_t), + }; + + id pipeline = nil; + NSUInteger block_width = 0; + if (weight_type == DS4_METAL_TENSOR_Q4_0) { + pipeline = g_get_rows_q4_0_pipeline; + block_width = 32u; + } else if (weight_type == DS4_METAL_TENSOR_Q4_K) { + pipeline = g_get_rows_q4_K_pipeline; + block_width = 256u; + } + if (!pipeline || block_width == 0) return 0; + + NSUInteger nth = block_width; + const NSUInteger max_threads = pipeline.maxTotalThreadsPerThreadgroup; + if (nth > max_threads) nth = max_threads; + if (nth == 0) nth = 1; + const NSUInteger nblocks = ((NSUInteger)n_embd + block_width - 1u) / block_width; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:weight offset:weight_offset atIndex:1]; + if (tokens) { + [enc setBuffer:tokens offset:tokens_offset atIndex:2]; + } else { + [enc setBytes:single_token length:sizeof(*single_token) atIndex:2]; + } + [enc setBuffer:out offset:out_offset atIndex:3]; + [enc dispatchThreadgroups:MTLSizeMake(nblocks, n_tokens, 1) + threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + return 1; +} + static int ds4_gpu_encode_repeat_hc_embedding( id cb, id rows, @@ -7453,6 +8944,315 @@ static int ds4_gpu_encode_repeat_hc_embedding( return 1; } +int ds4_gpu_embed_token_q8_0_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t n_vocab, + uint32_t token, + uint32_t n_embd) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!out || !model_map || n_vocab == 0 || token >= n_vocab || n_embd == 0) { + return 0; + } + + @autoreleasepool { + id outbuf = ds4_gpu_tensor_buffer(out); + const uint64_t out_bytes = (uint64_t)n_embd * sizeof(float); + if (!outbuf || ds4_gpu_tensor_bytes(out) < out_bytes) { + fprintf(stderr, "ds4: Metal Q8_0 embedding received undersized output buffer\n"); + return 0; + } + + uint64_t weight_bytes = 0; + if (!ds4_gpu_q8_0_table_bytes(n_vocab, n_embd, &weight_bytes) || + weight_offset > model_size || + weight_bytes > model_size - weight_offset) { + fprintf(stderr, "ds4: Metal Q8_0 embedding range is outside the mapped model\n"); + return 0; + } + + uint64_t inner_offset = 0; + uint32_t token_for_kernel = token; + id wbuf = nil; + const bool exact_token_row = + getenv("DS4_METAL_DISABLE_TOKEN_EMBED_EXACT_VIEW") == NULL; + if (exact_token_row) { + const uint64_t row_bytes = ds4_gpu_q8_0_row_bytes(n_embd); + const uint64_t token_rel = (uint64_t)token * row_bytes; + if (token_rel > weight_bytes || row_bytes > weight_bytes - token_rel) { + fprintf(stderr, "ds4: Metal Q8_0 embedding token row is outside the mapped table\n"); + return 0; + } + wbuf = ds4_gpu_wrap_model_exact_range(model_map, + model_size, + weight_offset + token_rel, + row_bytes, + &inner_offset); + token_for_kernel = 0; + } else { + wbuf = ds4_gpu_wrap_model_range(model_map, + model_size, + weight_offset, + weight_bytes, + &inner_offset); + } + if (!wbuf) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + const int32_t token_i32 = (int32_t)token_for_kernel; + if (!ds4_gpu_encode_get_rows_q8_0(cb, + wbuf, + (NSUInteger)inner_offset, + nil, + 0, + &token_i32, + outbuf, + ds4_gpu_tensor_offset(out), + n_vocab, + 1, + n_embd)) { + return 0; + } + + if (!ds4_gpu_finish_command_buffer(cb, owned, "q8_0 embed token")) return 0; + } + + return 1; +} + +int ds4_gpu_embed_tokens_q8_0_tensor( + ds4_gpu_tensor *out, + const ds4_gpu_tensor *tokens, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t n_vocab, + uint32_t n_tokens, + uint32_t n_embd) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!out || !tokens || !model_map || n_vocab == 0 || n_tokens == 0 || n_embd == 0) { + return 0; + } + + @autoreleasepool { + id outbuf = ds4_gpu_tensor_buffer(out); + id tokbuf = ds4_gpu_tensor_buffer(tokens); + const uint64_t out_bytes = (uint64_t)n_tokens * n_embd * sizeof(float); + const uint64_t token_bytes = (uint64_t)n_tokens * sizeof(int32_t); + if (!outbuf || !tokbuf || + ds4_gpu_tensor_bytes(out) < out_bytes || + ds4_gpu_tensor_bytes(tokens) < token_bytes) { + fprintf(stderr, "ds4: Metal Q8_0 batched embedding received undersized buffers\n"); + return 0; + } + + uint64_t weight_bytes = 0; + if (!ds4_gpu_q8_0_table_bytes(n_vocab, n_embd, &weight_bytes) || + weight_offset > model_size || + weight_bytes > model_size - weight_offset) { + fprintf(stderr, "ds4: Metal Q8_0 batched embedding range is outside the mapped model\n"); + return 0; + } + + uint64_t inner_offset = 0; + id wbuf = + ds4_gpu_wrap_model_range(model_map, + model_size, + weight_offset, + weight_bytes, + &inner_offset); + if (!wbuf) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + if (!ds4_gpu_encode_get_rows_q8_0(cb, + wbuf, + (NSUInteger)inner_offset, + tokbuf, + ds4_gpu_tensor_offset(tokens), + NULL, + outbuf, + ds4_gpu_tensor_offset(out), + n_vocab, + n_tokens, + n_embd)) { + return 0; + } + + if (!ds4_gpu_finish_command_buffer(cb, owned, "q8_0 embed tokens")) return 0; + } + + return 1; +} + +int ds4_gpu_embed_token_quant_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint32_t n_vocab, + uint32_t token, + uint32_t n_embd) { + if (weight_type == DS4_METAL_TENSOR_Q8_0) { + return ds4_gpu_embed_token_q8_0_tensor(out, + model_map, + model_size, + weight_offset, + n_vocab, + token, + n_embd); + } + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!out || !model_map || n_vocab == 0 || token >= n_vocab || n_embd == 0) { + return 0; + } + + @autoreleasepool { + id outbuf = ds4_gpu_tensor_buffer(out); + const uint64_t out_bytes = (uint64_t)n_embd * sizeof(float); + if (!outbuf || ds4_gpu_tensor_bytes(out) < out_bytes) { + fprintf(stderr, "ds4: Metal quant embedding received undersized output buffer\n"); + return 0; + } + + uint64_t weight_bytes = 0; + uint64_t row_bytes = 0; + if (!ds4_gpu_quant_table_bytes(weight_type, n_vocab, n_embd, &weight_bytes) || + !ds4_gpu_quant_row_bytes(weight_type, n_embd, &row_bytes) || + weight_offset > model_size || + weight_bytes > model_size - weight_offset) { + fprintf(stderr, "ds4: Metal quant embedding range is outside the mapped model\n"); + return 0; + } + + const uint64_t token_rel = (uint64_t)token * row_bytes; + if (token_rel > weight_bytes || row_bytes > weight_bytes - token_rel) { + fprintf(stderr, "ds4: Metal quant embedding token row is outside the mapped table\n"); + return 0; + } + + uint64_t inner_offset = 0; + id wbuf = + ds4_gpu_wrap_model_exact_range(model_map, + model_size, + weight_offset + token_rel, + row_bytes, + &inner_offset); + if (!wbuf) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + const int32_t token_i32 = 0; + if (!ds4_gpu_encode_get_rows_quant(cb, + wbuf, + (NSUInteger)inner_offset, + weight_type, + nil, + 0, + &token_i32, + outbuf, + ds4_gpu_tensor_offset(out), + n_vocab, + 1, + n_embd)) { + return 0; + } + + if (!ds4_gpu_finish_command_buffer(cb, owned, "quant embed token")) return 0; + } + + return 1; +} + +int ds4_gpu_embed_tokens_quant_tensor( + ds4_gpu_tensor *out, + const ds4_gpu_tensor *tokens, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint32_t n_vocab, + uint32_t n_tokens, + uint32_t n_embd) { + if (weight_type == DS4_METAL_TENSOR_Q8_0) { + return ds4_gpu_embed_tokens_q8_0_tensor(out, + tokens, + model_map, + model_size, + weight_offset, + n_vocab, + n_tokens, + n_embd); + } + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!out || !tokens || !model_map || n_vocab == 0 || n_tokens == 0 || n_embd == 0) { + return 0; + } + + @autoreleasepool { + id outbuf = ds4_gpu_tensor_buffer(out); + id tokbuf = ds4_gpu_tensor_buffer(tokens); + const uint64_t out_bytes = (uint64_t)n_tokens * n_embd * sizeof(float); + const uint64_t token_bytes = (uint64_t)n_tokens * sizeof(int32_t); + if (!outbuf || !tokbuf || + ds4_gpu_tensor_bytes(out) < out_bytes || + ds4_gpu_tensor_bytes(tokens) < token_bytes) { + fprintf(stderr, "ds4: Metal quant batched embedding received undersized buffers\n"); + return 0; + } + + uint64_t weight_bytes = 0; + if (!ds4_gpu_quant_table_bytes(weight_type, n_vocab, n_embd, &weight_bytes) || + weight_offset > model_size || + weight_bytes > model_size - weight_offset) { + fprintf(stderr, "ds4: Metal quant batched embedding range is outside the mapped model\n"); + return 0; + } + + uint64_t inner_offset = 0; + id wbuf = + ds4_gpu_wrap_model_range(model_map, + model_size, + weight_offset, + weight_bytes, + &inner_offset); + if (!wbuf) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + if (!ds4_gpu_encode_get_rows_quant(cb, + wbuf, + (NSUInteger)inner_offset, + weight_type, + tokbuf, + ds4_gpu_tensor_offset(tokens), + NULL, + outbuf, + ds4_gpu_tensor_offset(out), + n_vocab, + n_tokens, + n_embd)) { + return 0; + } + + if (!ds4_gpu_finish_command_buffer(cb, owned, "quant embed tokens")) return 0; + } + + return 1; +} + int ds4_gpu_embed_token_hc_tensor( ds4_gpu_tensor *out_hc, const void *model_map, @@ -7482,7 +9282,12 @@ int ds4_gpu_embed_token_hc_tensor( } uint64_t inner_offset = 0; - id wbuf = ds4_gpu_wrap_model_range(model_map, model_size, weight_offset, weight_bytes, &inner_offset); + id wbuf = + ds4_gpu_wrap_model_range(model_map, + model_size, + weight_offset, + weight_bytes, + &inner_offset); if (!wbuf) return 0; const NSUInteger row_bytes = (NSUInteger)n_embd * sizeof(float); @@ -7580,7 +9385,12 @@ int ds4_gpu_embed_tokens_hc_tensor( } uint64_t inner_offset = 0; - id wbuf = ds4_gpu_wrap_model_range(model_map, model_size, weight_offset, weight_bytes, &inner_offset); + id wbuf = + ds4_gpu_wrap_model_range(model_map, + model_size, + weight_offset, + weight_bytes, + &inner_offset); if (!wbuf) return 0; const NSUInteger rows_bytes = (NSUInteger)n_tokens * n_embd * sizeof(float); @@ -7960,6 +9770,70 @@ static id ds4_gpu_wrap_model_exact_range_owned( DS4_GPU_EXACT_VIEW_OWNED); } +static id ds4_gpu_wrap_q8_decode_model_range( + const void *model_map, + uint64_t model_size, + uint64_t offset, + uint64_t len, + uint64_t n_tokens, + uint64_t *inner_offset) { + const uint64_t exact_decode_max_mib = + ds4_gpu_env_u64("DS4_METAL_Q8_DECODE_EXACT_VIEW_MAX_MIB", + 1024u, + 1u, + 4096u); + const uint64_t exact_decode_max_bytes = + exact_decode_max_mib * 1024ull * 1024ull; + const bool exact_decode_weight_view = + n_tokens == 1u && + len <= exact_decode_max_bytes && + getenv("DS4_METAL_ENABLE_Q8_DECODE_EXACT_VIEWS") != NULL && + getenv("DS4_METAL_DISABLE_Q8_DECODE_EXACT_VIEWS") == NULL; + return exact_decode_weight_view ? + ds4_gpu_wrap_model_exact_range(model_map, + model_size, + offset, + len, + inner_offset) : + ds4_gpu_wrap_model_range(model_map, + model_size, + offset, + len, + inner_offset); +} + +static id ds4_gpu_wrap_f32_decode_model_range( + const void *model_map, + uint64_t model_size, + uint64_t offset, + uint64_t len, + uint64_t n_tokens, + uint64_t *inner_offset) { + const uint64_t exact_decode_max_mib = + ds4_gpu_env_u64("DS4_METAL_F32_DECODE_EXACT_VIEW_MAX_MIB", + 64u, + 1u, + 4096u); + const uint64_t exact_decode_max_bytes = + exact_decode_max_mib * 1024ull * 1024ull; + const bool exact_decode_weight_view = + n_tokens == 1u && + len <= exact_decode_max_bytes && + getenv("DS4_METAL_ENABLE_F32_DECODE_EXACT_VIEWS") != NULL && + getenv("DS4_METAL_DISABLE_F32_DECODE_EXACT_VIEWS") == NULL; + return exact_decode_weight_view ? + ds4_gpu_wrap_model_exact_range(model_map, + model_size, + offset, + len, + inner_offset) : + ds4_gpu_wrap_model_range(model_map, + model_size, + offset, + len, + inner_offset); +} + uint32_t ds4_gpu_stream_expert_cache_configured_count(void) { uint32_t budget = ds4_gpu_stream_expert_cache_configured_budget(); if (budget > DS4_METAL_STREAM_EXPERT_CACHE_MAX_ENTRIES) { @@ -7996,7 +9870,7 @@ static int ds4_gpu_stream_expert_cache_note_expert_size( * class) and off-size layers are REJECTED rather than adopted. A rejected * layer (mixed-precision boost: Q4_K experts among IQ2 layers) falls back * to the mapped-model per-expert path; last-writer-wins here would instead - * poison the slot budget and deadlock slab reuse after an mlock cap. + * poison the slab size class and deadlock slab reuse. */ const uint64_t bytes = gate_expert_bytes * 2ull + down_expert_bytes; if (g_stream_expert_cache_expert_bytes == 0) { @@ -8015,13 +9889,7 @@ static uint32_t ds4_gpu_stream_expert_cache_requested_budget(void) { } static uint32_t ds4_gpu_stream_expert_cache_configured_budget(void) { - uint32_t budget = ds4_gpu_stream_expert_cache_requested_budget(); - if (budget != 0 && - g_stream_expert_cache_mlock_budget_cap != 0 && - budget > g_stream_expert_cache_mlock_budget_cap) { - budget = g_stream_expert_cache_mlock_budget_cap; - } - return budget; + return ds4_gpu_stream_expert_cache_requested_budget(); } static uint32_t ds4_gpu_stream_expert_cache_effective_cap( @@ -8058,16 +9926,32 @@ static int ds4_gpu_stream_expert_timing_summary_enabled(void) { return enabled; } -static uint32_t ds4_gpu_stream_expert_popcount6(uint32_t mask) { - return (uint32_t)__builtin_popcount(mask & 0x3fu); +static uint32_t ds4_gpu_stream_expert_popcount(uint32_t mask) { + return (uint32_t)__builtin_popcount(mask); +} + +static int ds4_gpu_stream_expert_split_worthwhile( + uint32_t resident_mask, + uint32_t missing_mask) { + if (resident_mask == 0 || missing_mask == 0) return 0; + /* + * The split path pays an extra command stage and a second routed-expert + * bind. It is worthwhile when several experts are missing and their SSD + * reads can be hidden by resident expert work. With one or two misses, + * especially in large caches, a single unsplit routed pass is faster. + */ + return ds4_gpu_stream_expert_popcount(missing_mask) >= 3u; } static void ds4_gpu_stream_expert_timing_note_selected( - double read_ms, + double sync_ms, + double copy_ms, double bind_ms) { if (!ds4_gpu_stream_expert_timing_summary_enabled()) return; g_stream_expert_timing_selected_calls++; - g_stream_expert_timing_selected_read_ms += read_ms; + g_stream_expert_timing_selected_sync_ms += sync_ms; + g_stream_expert_timing_selected_copy_ms += copy_ms; + g_stream_expert_timing_selected_read_ms += sync_ms + copy_ms; g_stream_expert_timing_selected_bind_ms += bind_ms; } @@ -8079,9 +9963,9 @@ static void ds4_gpu_stream_expert_timing_note_split( if (!ds4_gpu_stream_expert_timing_summary_enabled()) return; g_stream_expert_timing_split_layers++; g_stream_expert_timing_split_resident_experts += - ds4_gpu_stream_expert_popcount6(resident_mask); + ds4_gpu_stream_expert_popcount(resident_mask); g_stream_expert_timing_split_missing_experts += - ds4_gpu_stream_expert_popcount6(missing_mask); + ds4_gpu_stream_expert_popcount(missing_mask); g_stream_expert_timing_split_resident_ms += resident_ms; g_stream_expert_timing_split_missing_ms += missing_ms; } @@ -8113,12 +9997,46 @@ static void ds4_gpu_stream_expert_timing_note_load_detail( g_stream_expert_timing_load_install_ms += install_ms; } +static void ds4_gpu_stream_expert_timing_note_prepare_batch_reuse(double ms) { + if (!ds4_gpu_stream_expert_timing_summary_enabled()) return; + g_stream_expert_timing_prepare_batch_reuse_calls++; + g_stream_expert_timing_prepare_batch_reuse_ms += ms; +} + +static void ds4_gpu_stream_expert_timing_note_prepare_buffer(double ms) { + if (!ds4_gpu_stream_expert_timing_summary_enabled()) return; + g_stream_expert_timing_prepare_buffer_calls++; + g_stream_expert_timing_prepare_buffer_ms += ms; +} + +static void ds4_gpu_stream_expert_timing_note_prepare_task( + uint32_t experts, + double ms) { + if (!ds4_gpu_stream_expert_timing_summary_enabled()) return; + g_stream_expert_timing_prepare_task_experts += experts; + g_stream_expert_timing_prepare_task_ms += ms; +} + +static void ds4_gpu_stream_expert_timing_note_reuse_scan( + uint64_t entries, + double ms) { + if (!ds4_gpu_stream_expert_timing_summary_enabled()) return; + g_stream_expert_timing_reuse_scan_calls++; + g_stream_expert_timing_reuse_scan_entries += entries; + g_stream_expert_timing_reuse_scan_ms += ms; +} + +static void ds4_gpu_stream_expert_timing_note_reuse_clear(double ms) { + if (!ds4_gpu_stream_expert_timing_summary_enabled()) return; + g_stream_expert_timing_reuse_clear_ms += ms; +} + static void ds4_gpu_stream_expert_timing_note_cache_class( uint32_t resident_mask, uint32_t missing_mask) { if (!ds4_gpu_stream_expert_timing_summary_enabled()) return; - const uint32_t resident = ds4_gpu_stream_expert_popcount6(resident_mask); - const uint32_t missing = ds4_gpu_stream_expert_popcount6(missing_mask); + const uint32_t resident = ds4_gpu_stream_expert_popcount(resident_mask); + const uint32_t missing = ds4_gpu_stream_expert_popcount(missing_mask); if (missing == 0) { g_stream_expert_timing_cache_all_resident_layers++; } else if (resident == 0) { @@ -8141,6 +10059,8 @@ static void ds4_gpu_stream_expert_readahead_range(uint64_t offset, uint64_t len) } #if defined(F_RDADVISE) + const int timing = ds4_gpu_stream_expert_timing_summary_enabled(); + const double t0 = timing ? ds4_gpu_now_ms() : 0.0; uint64_t pos = offset; uint64_t rem = len; while (rem > 0) { @@ -8156,6 +10076,11 @@ static void ds4_gpu_stream_expert_readahead_range(uint64_t offset, uint64_t len) pos += chunk64; rem -= chunk64; } + if (timing) { + g_stream_expert_timing_readahead_calls++; + g_stream_expert_timing_readahead_bytes += len; + g_stream_expert_timing_readahead_ms += ds4_gpu_now_ms() - t0; + } #else (void)offset; (void)len; @@ -8179,28 +10104,46 @@ typedef struct { uint32_t n_total_expert; uint32_t n_selected; uint32_t missing_mask; - uint32_t load_slots[6]; - uint32_t source_slots[6]; + uint32_t load_slots[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + uint32_t source_slots[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; uint32_t n_loads; uint32_t n_tasks; uint64_t gate_expert_bytes; uint64_t down_expert_bytes; - int32_t selected_ids[6]; - uint64_t gate_abs_offsets[6]; - uint64_t up_abs_offsets[6]; - uint64_t down_abs_offsets[6]; - __strong id gate_bufs[6]; - __strong id up_bufs[6]; - __strong id down_bufs[6]; - NSUInteger gate_inners[6]; - NSUInteger up_inners[6]; - NSUInteger down_inners[6]; - ds4_gpu_stream_expert_pread_task tasks[18]; + int32_t selected_ids[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + uint64_t gate_abs_offsets[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + uint64_t up_abs_offsets[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + uint64_t down_abs_offsets[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + __strong id gate_bufs[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + __strong id up_bufs[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + __strong id down_bufs[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + NSUInteger gate_inners[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + NSUInteger up_inners[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + NSUInteger down_inners[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + ds4_gpu_stream_expert_pread_task tasks[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED * 3u]; double start_ms; + double prepare_ms; } ds4_gpu_stream_expert_pending_load; static ds4_gpu_stream_expert_pending_load g_stream_expert_pending_load; +typedef struct { + int active; + const void *model_map; + uint64_t model_size; + uint32_t layer; + uint32_t n_total_expert; + uint32_t n_selected; + uint64_t gate_offset; + uint64_t up_offset; + uint64_t down_offset; + uint64_t gate_expert_bytes; + uint64_t down_expert_bytes; + int32_t selected_ids[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; +} ds4_gpu_glm_stream_selected_prefetch; + +static ds4_gpu_glm_stream_selected_prefetch g_glm_stream_selected_prefetch; + typedef struct { ds4_gpu_stream_expert_pread_task *tasks; uint32_t n_tasks; @@ -8582,104 +10525,6 @@ static int ds4_gpu_stream_expert_pread_tasks( return ok; } -static void ds4_gpu_stream_expert_cache_warn_mlock_failure( - uint64_t failed_len, - int err) { - if (g_stream_expert_cache_mlock_warned) return; - g_stream_expert_cache_mlock_warned = 1; - - const uint64_t gib = 1024ull * 1024ull * 1024ull; - const uint32_t budget = ds4_gpu_stream_expert_cache_requested_budget(); - uint64_t requested = 0; - if (budget != 0 && g_stream_expert_cache_expert_bytes != 0) { - requested = - budget > UINT64_MAX / g_stream_expert_cache_expert_bytes ? - UINT64_MAX : - (uint64_t)budget * g_stream_expert_cache_expert_bytes; - } - - uint64_t suggested_gib = g_stream_expert_cache_mlock_bytes / gib; - if (suggested_gib > 1) suggested_gib--; - - fprintf(stderr, - "ds4: warning: streaming expert cache could not mlock all buffers\n"); - if (requested != 0) { - fprintf(stderr, - "ds4: requested cache: %u experts / %.2f GiB\n", - budget, - ds4_gpu_gib(requested)); - } else { - fprintf(stderr, - "ds4: requested cache: %u experts\n", - budget); - } - fprintf(stderr, - "ds4: locked so far: %.2f GiB\n", - ds4_gpu_gib(g_stream_expert_cache_mlock_bytes)); - fprintf(stderr, - "ds4: failed buffer: %.2f MiB (%s)\n", - ds4_gpu_mib(failed_len), - err != 0 ? strerror(err) : "mlock unavailable"); - fprintf(stderr, - "ds4: macOS may page unlocked expert buffers, causing poor or unstable speed\n"); - if (g_stream_expert_cache_mlock_budget_cap != 0 && - g_stream_expert_cache_expert_bytes != 0) { - const uint64_t capped_bytes = - g_stream_expert_cache_mlock_budget_cap > - UINT64_MAX / g_stream_expert_cache_expert_bytes ? - UINT64_MAX : - (uint64_t)g_stream_expert_cache_mlock_budget_cap * - g_stream_expert_cache_expert_bytes; - fprintf(stderr, - "ds4: using locked cache cap: %u experts / %.2f GiB\n", - g_stream_expert_cache_mlock_budget_cap, - ds4_gpu_gib(capped_bytes)); - } - if (suggested_gib != 0) { - fprintf(stderr, - "ds4: try: --ssd-streaming-cache-experts %" PRIu64 "GB\n", - suggested_gib); - } else { - fprintf(stderr, - "ds4: try a smaller --ssd-streaming-cache-experts NGB budget\n"); - } -} - -static uint32_t ds4_gpu_stream_expert_slab_locked_slot_count(void) { - uint32_t count = 0; - uint32_t total = g_stream_expert_cache_slab_total_slots; - if (total > DS4_METAL_STREAM_EXPERT_CACHE_MAX_ENTRIES) { - total = DS4_METAL_STREAM_EXPERT_CACHE_MAX_ENTRIES; - } - for (uint32_t slot = 0; slot < total; slot++) { - if (g_stream_expert_cache_slab_slot_locked[slot]) count++; - } - return count; -} - -static void ds4_gpu_stream_expert_cache_cap_budget_to_locked(void) { - uint32_t cap = g_stream_expert_cache_entry_count; - const uint32_t locked_slots = ds4_gpu_stream_expert_slab_locked_slot_count(); - if (locked_slots != 0 && locked_slots < cap) cap = locked_slots; - const uint64_t gib = 1024ull * 1024ull * 1024ull; - uint64_t safe_gib = g_stream_expert_cache_mlock_bytes / gib; - if (safe_gib > 1) safe_gib--; - if (safe_gib != 0 && g_stream_expert_cache_expert_bytes != 0) { - uint64_t safe_bytes = - safe_gib > UINT64_MAX / gib ? UINT64_MAX : safe_gib * gib; - uint64_t safe_cap64 = safe_bytes / g_stream_expert_cache_expert_bytes; - if (safe_cap64 > UINT32_MAX) safe_cap64 = UINT32_MAX; - if (safe_cap64 != 0 && safe_cap64 < cap) { - cap = (uint32_t)safe_cap64; - } - } - if (cap == 0) return; - if (g_stream_expert_cache_mlock_budget_cap == 0 || - cap < g_stream_expert_cache_mlock_budget_cap) { - g_stream_expert_cache_mlock_budget_cap = cap; - } -} - static id ds4_gpu_stream_expert_alloc_buffer( uint64_t len, NSString *label) { @@ -8699,43 +10544,12 @@ static id ds4_gpu_stream_expert_alloc_buffer( } buffer.label = label; g_stream_expert_cache_buffer_allocs++; - if (g_ssd_streaming_mode) { - void *ptr = [buffer contents]; - const NSUInteger n = [buffer length]; - const double t0 = ds4_gpu_now_ms(); - if (ptr && n != 0 && mlock(ptr, (size_t)n) == 0) { - const double dt = ds4_gpu_now_ms() - t0; - g_stream_expert_cache_mlock_ms += dt; - if (g_stream_expert_cache_mlock_bytes > UINT64_MAX - (uint64_t)n) { - g_stream_expert_cache_mlock_bytes = UINT64_MAX; - } else { - g_stream_expert_cache_mlock_bytes += (uint64_t)n; - } - } else { - const double dt = ds4_gpu_now_ms() - t0; - g_stream_expert_cache_mlock_ms += dt; - g_stream_expert_cache_mlock_failures++; - if (g_stream_expert_cache_mlock_fail_bytes > UINT64_MAX - (uint64_t)n) { - g_stream_expert_cache_mlock_fail_bytes = UINT64_MAX; - } else { - g_stream_expert_cache_mlock_fail_bytes += (uint64_t)n; - } - const int err = ptr && n != 0 ? errno : 0; - ds4_gpu_stream_expert_cache_cap_budget_to_locked(); - ds4_gpu_stream_expert_cache_warn_mlock_failure((uint64_t)n, err); - if (getenv("DS4_METAL_STREAMING_EXPERT_BUFFER_MLOCK_PROFILE") != NULL) { - fprintf(stderr, - "ds4: Metal streaming expert buffer mlock failed len=%.2f MiB: %s\n", - ds4_gpu_mib((uint64_t)n), - err != 0 ? strerror(err) : "mlock unavailable"); - } - } - } return buffer; } static int ds4_gpu_stream_expert_combined_buffer_enabled(void) { - return g_ssd_streaming_mode; + return g_ssd_streaming_mode && + getenv("DS4_METAL_DISABLE_STREAMING_EXPERT_COMBINED_BUFFER") == NULL; } static int ds4_gpu_stream_expert_slab_enabled(void) { @@ -8835,87 +10649,6 @@ static void ds4_gpu_stream_expert_slab_push_free_slot(uint32_t slot) { slot; } -static int ds4_gpu_stream_expert_slab_lock_slot(uint32_t slot) { - if (slot >= DS4_METAL_STREAM_EXPERT_CACHE_MAX_ENTRIES || - g_stream_expert_cache_slab_slot_locked[slot]) { - return 1; - } - uint32_t slab = UINT32_MAX; - uint64_t base = 0; - if (!ds4_gpu_stream_expert_slab_slot_range(slot, &slab, &base) || - slab >= g_stream_expert_cache_slab_count || - !g_stream_expert_cache_slabs[slab] || - g_stream_expert_cache_slab_slot_bytes == 0 || - base > (uint64_t)NSUIntegerMax) { - return 0; - } - - void *contents = [g_stream_expert_cache_slabs[slab] contents]; - if (!contents) return 0; - const double t0 = ds4_gpu_now_ms(); - void *ptr = (uint8_t *)contents + (NSUInteger)base; - const size_t n = (size_t)g_stream_expert_cache_slab_slot_bytes; - if (mlock(ptr, n) == 0) { - const double dt = ds4_gpu_now_ms() - t0; - g_stream_expert_cache_mlock_ms += dt; - if (g_stream_expert_cache_mlock_bytes > - UINT64_MAX - g_stream_expert_cache_slab_slot_bytes) { - g_stream_expert_cache_mlock_bytes = UINT64_MAX; - } else { - g_stream_expert_cache_mlock_bytes += - g_stream_expert_cache_slab_slot_bytes; - } - g_stream_expert_cache_slab_slot_locked[slot] = 1; - return 1; - } - - const double dt = ds4_gpu_now_ms() - t0; - g_stream_expert_cache_mlock_ms += dt; - g_stream_expert_cache_mlock_failures++; - if (g_stream_expert_cache_mlock_fail_bytes > - UINT64_MAX - g_stream_expert_cache_slab_slot_bytes) { - g_stream_expert_cache_mlock_fail_bytes = UINT64_MAX; - } else { - g_stream_expert_cache_mlock_fail_bytes += - g_stream_expert_cache_slab_slot_bytes; - } - ds4_gpu_stream_expert_cache_cap_budget_to_locked(); - ds4_gpu_stream_expert_cache_warn_mlock_failure( - g_stream_expert_cache_slab_slot_bytes, - errno); - return 0; -} - -static int ds4_gpu_stream_expert_slab_unlock_slot(uint32_t slot) { - if (slot >= DS4_METAL_STREAM_EXPERT_CACHE_MAX_ENTRIES || - !g_stream_expert_cache_slab_slot_locked[slot]) { - return 1; - } - uint32_t slab = UINT32_MAX; - uint64_t base = 0; - if (!ds4_gpu_stream_expert_slab_slot_range(slot, &slab, &base) || - slab >= g_stream_expert_cache_slab_count || - !g_stream_expert_cache_slabs[slab] || - g_stream_expert_cache_slab_slot_bytes == 0 || - base > (uint64_t)NSUIntegerMax) { - return 0; - } - - void *contents = [g_stream_expert_cache_slabs[slab] contents]; - if (!contents) return 0; - void *ptr = (uint8_t *)contents + (NSUInteger)base; - const size_t n = (size_t)g_stream_expert_cache_slab_slot_bytes; - if (munlock(ptr, n) != 0) return 0; - - g_stream_expert_cache_slab_slot_locked[slot] = 0; - if (g_stream_expert_cache_mlock_bytes >= g_stream_expert_cache_slab_slot_bytes) { - g_stream_expert_cache_mlock_bytes -= g_stream_expert_cache_slab_slot_bytes; - } else { - g_stream_expert_cache_mlock_bytes = 0; - } - return 1; -} - static int ds4_gpu_stream_expert_slab_slot_buffers( uint32_t slot, uint64_t gate_expert_bytes, @@ -8940,7 +10673,6 @@ static int ds4_gpu_stream_expert_slab_slot_buffers( return 0; } id b = g_stream_expert_cache_slabs[slab]; - if (!ds4_gpu_stream_expert_slab_lock_slot(slot)) return 0; *gate_buf = b; *up_buf = b; *down_buf = b; @@ -9255,6 +10987,15 @@ static void ds4_gpu_stream_expert_cache_note_token(uint32_t layer_index) { ds4_gpu_stream_expert_cache_maybe_decay_route_hotness(); } +static void ds4_gpu_stream_expert_cache_note_decode_token(void) { + if (!g_ssd_streaming_mode || + g_stream_expert_cache_decode_tokens == UINT64_MAX) { + return; + } + g_stream_expert_cache_decode_tokens++; + ds4_gpu_stream_expert_cache_maybe_decay_route_hotness(); +} + static int ds4_gpu_stream_compact_addr_requested(void) { return g_ssd_streaming_mode && getenv("DS4_METAL_ENABLE_STREAMING_COMPACT_ADDR") != NULL && @@ -9268,6 +11009,7 @@ static int ds4_gpu_stream_expert_addr_table_requested(void) { getenv("DS4_METAL_ENABLE_STREAMING_EXPERT_HIT_VALIDATOR") != NULL || getenv("DS4_METAL_ENABLE_STREAMING_EXPERT_MASKED_ADDR") != NULL || g_stream_prefill_batch_selected_addr_building || + g_glm_stream_expert_addr_table_building || (getenv("DS4_METAL_ENABLE_STREAMING_PREFILL_BATCH_SELECTED_ADDR") != NULL && getenv("DS4_METAL_DISABLE_STREAMING_PREFILL_BATCH_SELECTED_ADDR") == NULL) || ds4_gpu_stream_expert_split_requested()) && @@ -9370,6 +11112,11 @@ static int ds4_gpu_stream_prefill_batch_selected_addr_enabled( return max_tokens != 0 && n_tokens >= min_tokens && n_tokens <= max_tokens; } +static int ds4_gpu_glm_streaming_prefill_full_layer_active(void) { + return g_glm_streaming_prefill_full_layer_runtime || + getenv("DS4_METAL_GLM_STREAMING_PREFILL_FULL_LAYER") != NULL; +} + static int ds4_gpu_stream_full_expert_addr_table_requested(void) { return g_ssd_streaming_mode && getenv("DS4_METAL_ENABLE_STREAMING_FULL_EXPERT_ADDR_TABLE") != NULL && @@ -9510,11 +11257,12 @@ static int ds4_gpu_stream_selected_ids_prepare( !selected_off || layer >= DS4_METAL_STREAM_EXPERT_CACHE_MAX_LAYER || n_selected == 0 || - n_selected > 6) { + n_selected > DS4_METAL_MAX_ROUTED_EXPERT_USED) { return 0; } - const NSUInteger bytes = 6u * sizeof(int32_t); + const NSUInteger bytes = + (NSUInteger)DS4_METAL_MAX_ROUTED_EXPERT_USED * sizeof(int32_t); id b = g_stream_selected_id_buffers[layer]; if (!b) { b = [g_device newBufferWithLength:bytes @@ -9527,7 +11275,7 @@ static int ds4_gpu_stream_selected_ids_prepare( g_stream_selected_id_buffers[layer] = b; } - int32_t ids[6] = {0, 0, 0, 0, 0, 0}; + int32_t ids[DS4_METAL_MAX_ROUTED_EXPERT_USED] = {0}; memcpy(ids, selected_ids, (size_t)n_selected * sizeof(ids[0])); memcpy([b contents], ids, bytes); [b didModifyRange:NSMakeRange(0, bytes)]; @@ -9538,10 +11286,6 @@ static int ds4_gpu_stream_selected_ids_prepare( } static int ds4_gpu_stream_expert_cache_ensure_addr_buffers(uint32_t layer) { - if (!ds4_gpu_stream_expert_addr_table_requested() && - !ds4_gpu_stream_full_expert_addr_table_requested()) { - return 0; - } if (!g_device || layer >= DS4_METAL_STREAM_EXPERT_CACHE_MAX_LAYER) { return 0; @@ -9599,7 +11343,7 @@ static void ds4_gpu_stream_expert_cache_zero_addr_slot(uint32_t layer, uint32_t } } -static int ds4_gpu_stream_expert_cache_set_addr_slot( +static int ds4_gpu_stream_expert_cache_set_addr_slot_raw( uint32_t layer, uint32_t expert, id gate_buffer, @@ -9608,7 +11352,6 @@ static int ds4_gpu_stream_expert_cache_set_addr_slot( NSUInteger up_inner, id down_buffer, NSUInteger down_inner) { - if (!ds4_gpu_stream_expert_addr_table_requested()) return 1; if (!ds4_gpu_stream_expert_cache_ensure_addr_buffers(layer)) return 0; const uint64_t values[3] = { @@ -9635,6 +11378,26 @@ static int ds4_gpu_stream_expert_cache_set_addr_slot( return 1; } +static int ds4_gpu_stream_expert_cache_set_addr_slot( + uint32_t layer, + uint32_t expert, + id gate_buffer, + NSUInteger gate_inner, + id up_buffer, + NSUInteger up_inner, + id down_buffer, + NSUInteger down_inner) { + if (!ds4_gpu_stream_expert_addr_table_requested()) return 1; + return ds4_gpu_stream_expert_cache_set_addr_slot_raw(layer, + expert, + gate_buffer, + gate_inner, + up_buffer, + up_inner, + down_buffer, + down_inner); +} + static int ds4_gpu_stream_expert_cache_addr_buffers( uint32_t layer, id *gate, @@ -10066,9 +11829,6 @@ static void ds4_gpu_stream_expert_cache_clear_all(int reset_stats) { g_stream_expert_cache_slab_total_slots = 0; g_stream_expert_cache_free_slot_count = 0; g_stream_expert_cache_slab_slot_bytes = 0; - memset(g_stream_expert_cache_slab_slot_locked, - 0, - sizeof(g_stream_expert_cache_slab_slot_locked)); if (reset_stats) { g_stream_expert_cache_hits = 0; g_stream_expert_cache_misses = 0; @@ -10079,13 +11839,6 @@ static void ds4_gpu_stream_expert_cache_clear_all(int reset_stats) { g_stream_expert_cache_willneed_advise_bytes = 0; g_stream_expert_cache_pread_bytes = 0; g_stream_expert_cache_pread_ms = 0.0; - g_stream_expert_cache_mlock_bytes = 0; - g_stream_expert_cache_mlock_fail_bytes = 0; - g_stream_expert_cache_mlock_failures = 0; - g_stream_expert_cache_mlock_ms = 0.0; - g_stream_expert_cache_mlock_warned = 0; - g_stream_expert_cache_mlock_budget_cap = 0; - g_stream_expert_cache_mlock_relief_applied = 0; g_stream_expert_cache_buffer_allocs = 0; g_stream_expert_cache_buffer_reuses = 0; g_stream_expert_cache_decode_tokens = 0; @@ -10095,6 +11848,8 @@ static void ds4_gpu_stream_expert_cache_clear_all(int reset_stats) { sizeof(g_stream_expert_cache_route_hotness)); g_stream_expert_timing_selected_calls = 0; g_stream_expert_timing_selected_read_ms = 0.0; + g_stream_expert_timing_selected_sync_ms = 0.0; + g_stream_expert_timing_selected_copy_ms = 0.0; g_stream_expert_timing_selected_bind_ms = 0.0; g_stream_expert_timing_split_layers = 0; g_stream_expert_timing_split_resident_experts = 0; @@ -10111,6 +11866,19 @@ static void ds4_gpu_stream_expert_cache_clear_all(int reset_stats) { g_stream_expert_timing_load_pread_ms = 0.0; g_stream_expert_timing_load_modify_ms = 0.0; g_stream_expert_timing_load_install_ms = 0.0; + g_stream_expert_timing_prepare_batch_reuse_calls = 0; + g_stream_expert_timing_prepare_batch_reuse_ms = 0.0; + g_stream_expert_timing_prepare_buffer_calls = 0; + g_stream_expert_timing_prepare_buffer_ms = 0.0; + g_stream_expert_timing_prepare_task_experts = 0; + g_stream_expert_timing_prepare_task_ms = 0.0; + g_stream_expert_timing_reuse_scan_calls = 0; + g_stream_expert_timing_reuse_scan_entries = 0; + g_stream_expert_timing_reuse_scan_ms = 0.0; + g_stream_expert_timing_reuse_clear_ms = 0.0; + g_stream_expert_timing_readahead_calls = 0; + g_stream_expert_timing_readahead_bytes = 0; + g_stream_expert_timing_readahead_ms = 0.0; g_stream_expert_timing_cache_all_resident_layers = 0; g_stream_expert_timing_cache_all_missing_layers = 0; g_stream_expert_timing_cache_mixed_layers = 0; @@ -10253,12 +12021,16 @@ retry: uint32_t lowest_hotness = UINT32_MAX; uint64_t oldest = UINT64_MAX; int skipped_inflight = 0; + const int timing = ds4_gpu_stream_expert_timing_summary_enabled(); + const double scan_t0 = timing ? ds4_gpu_now_ms() : 0.0; + uint64_t scan_entries = 0; for (uint32_t layer = 0; layer < DS4_METAL_STREAM_EXPERT_CACHE_MAX_LAYER; layer++) { for (uint32_t expert = 0; expert < DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT; expert++) { + scan_entries++; ds4_gpu_stream_expert_cache_entry *e = &g_stream_expert_cache[layer][expert]; if (!ds4_gpu_stream_expert_cache_entry_reusable(e, @@ -10288,6 +12060,10 @@ retry: } } } + if (timing) { + ds4_gpu_stream_expert_timing_note_reuse_scan(scan_entries, + ds4_gpu_now_ms() - scan_t0); + } if (victim_layer == UINT32_MAX || victim_expert == UINT32_MAX) { if (skipped_inflight && !waited_inflight && @@ -10301,11 +12077,16 @@ retry: } return 0; } + const double clear_t0 = timing ? ds4_gpu_now_ms() : 0.0; ds4_gpu_stream_expert_cache_clear_entry_internal(victim_layer, victim_expert, 1, 1, reuse); + if (timing) { + ds4_gpu_stream_expert_timing_note_reuse_clear(ds4_gpu_now_ms() - + clear_t0); + } if (!reuse->gate_buffer || !reuse->up_buffer || !reuse->down_buffer) { reuse->gate_buffer = nil; reuse->up_buffer = nil; @@ -10322,98 +12103,175 @@ retry: return 1; } -static uint32_t ds4_gpu_stream_expert_cache_release_mlock_margin( - uint32_t protect_layer, - const int32_t *protect_ids, - uint32_t n_protect) { - if (g_stream_expert_cache_mlock_relief_applied || - g_stream_expert_cache_slab_slot_bytes == 0) { +static uint32_t ds4_gpu_stream_expert_cache_take_reusable_batch( + uint32_t n_needed, + uint32_t protect_layer, + const int32_t *protect_ids, + uint32_t n_protect, + uint64_t gate_expert_bytes, + uint64_t down_expert_bytes, + ds4_gpu_stream_expert_reusable_buffers *reuses) { + if (!reuses || n_needed == 0) return 0; + if (n_needed > DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED) { + n_needed = DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED; + } + for (uint32_t i = 0; i < n_needed; i++) { + reuses[i].gate_buffer = nil; + reuses[i].up_buffer = nil; + reuses[i].down_buffer = nil; + reuses[i].gate_inner = 0; + reuses[i].up_inner = 0; + reuses[i].down_inner = 0; + } + + const uint32_t budget = ds4_gpu_stream_expert_cache_configured_budget(); + if (budget == 0 || g_stream_expert_cache_entry_count < budget) { return 0; } - const uint32_t locked_before = - ds4_gpu_stream_expert_slab_locked_slot_count(); - if (locked_before == 0) return 0; + int waited_inflight = 0; +retry: + ; + uint32_t victim_layers[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + uint32_t victim_experts[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + uint32_t victim_hotness[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + uint64_t victim_last_used[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + uint32_t victim_count = 0; + int skipped_inflight = 0; + const int timing = ds4_gpu_stream_expert_timing_summary_enabled(); + const double scan_t0 = timing ? ds4_gpu_now_ms() : 0.0; + uint64_t scan_entries = 0; + for (uint32_t i = 0; i < n_needed; i++) { + victim_layers[i] = UINT32_MAX; + victim_experts[i] = UINT32_MAX; + victim_hotness[i] = UINT32_MAX; + victim_last_used[i] = UINT64_MAX; + } - const uint32_t target_release = (locked_before + 9u) / 10u; - uint32_t released = 0; - while (released < target_release) { - uint32_t victim_layer = UINT32_MAX; - uint32_t victim_expert = UINT32_MAX; - uint32_t victim_slot = UINT32_MAX; - uint32_t lowest_hotness = UINT32_MAX; - uint64_t oldest = UINT64_MAX; + for (uint32_t layer = 0; + layer < DS4_METAL_STREAM_EXPERT_CACHE_MAX_LAYER; + layer++) { + for (uint32_t expert = 0; + expert < DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT; + expert++) { + scan_entries++; + ds4_gpu_stream_expert_cache_entry *e = + &g_stream_expert_cache[layer][expert]; + if (!ds4_gpu_stream_expert_cache_entry_reusable(e, + gate_expert_bytes, + down_expert_bytes)) { + continue; + } + if (ds4_gpu_stream_expert_cache_entry_inflight(e)) { + skipped_inflight = 1; + continue; + } + if (ds4_gpu_stream_expert_cache_entry_protected(layer, + expert, + protect_layer, + protect_ids, + n_protect)) { + continue; + } - for (uint32_t layer = 0; - layer < DS4_METAL_STREAM_EXPERT_CACHE_MAX_LAYER; - layer++) { - for (uint32_t expert = 0; - expert < DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT; - expert++) { - ds4_gpu_stream_expert_cache_entry *e = - &g_stream_expert_cache[layer][expert]; - if (!e->valid || - !e->slab_backed || - e->slab_slot >= DS4_METAL_STREAM_EXPERT_CACHE_MAX_ENTRIES || - !g_stream_expert_cache_slab_slot_locked[e->slab_slot] || - ds4_gpu_stream_expert_cache_entry_protected(layer, - expert, - protect_layer, - protect_ids, - n_protect)) { - continue; - } - const uint32_t hotness = - g_stream_expert_cache_route_hotness[layer][expert]; - if (hotness < lowest_hotness || - (hotness == lowest_hotness && e->last_used < oldest)) { - lowest_hotness = hotness; - oldest = e->last_used; - victim_layer = layer; - victim_expert = expert; - victim_slot = e->slab_slot; + const uint32_t hotness = + g_stream_expert_cache_route_hotness[layer][expert]; + const uint64_t last_used = e->last_used; + if (victim_count < n_needed) { + victim_layers[victim_count] = layer; + victim_experts[victim_count] = expert; + victim_hotness[victim_count] = hotness; + victim_last_used[victim_count] = last_used; + victim_count++; + continue; + } + + uint32_t worst = 0; + for (uint32_t i = 1; i < victim_count; i++) { + if (victim_hotness[i] > victim_hotness[worst] || + (victim_hotness[i] == victim_hotness[worst] && + victim_last_used[i] > victim_last_used[worst])) { + worst = i; } } + if (hotness < victim_hotness[worst] || + (hotness == victim_hotness[worst] && + last_used < victim_last_used[worst])) { + victim_layers[worst] = layer; + victim_experts[worst] = expert; + victim_hotness[worst] = hotness; + victim_last_used[worst] = last_used; + } } + } + if (timing) { + ds4_gpu_stream_expert_timing_note_reuse_scan(scan_entries, + ds4_gpu_now_ms() - scan_t0); + } - if (victim_layer == UINT32_MAX || - victim_expert == UINT32_MAX || - victim_slot == UINT32_MAX) { - break; + if (victim_count == 0) { + if (skipped_inflight && !waited_inflight) { + waited_inflight = 1; + if (!ds4_gpu_stream_expert_cache_wait_inflight( + "streaming expert cache batch reuse")) { + return 0; + } + goto retry; } + return 0; + } - ds4_gpu_stream_expert_cache_clear_entry_internal(victim_layer, - victim_expert, + uint32_t reuse_count = 0; + const double clear_t0 = timing ? ds4_gpu_now_ms() : 0.0; + for (uint32_t i = 0; i < victim_count; i++) { + if (victim_layers[i] == UINT32_MAX || + victim_experts[i] == UINT32_MAX) { + continue; + } + ds4_gpu_stream_expert_cache_clear_entry_internal(victim_layers[i], + victim_experts[i], 1, - 0, - NULL); - if (ds4_gpu_stream_expert_slab_unlock_slot(victim_slot)) { - released++; + 1, + &reuses[reuse_count]); + if (!reuses[reuse_count].gate_buffer || + !reuses[reuse_count].up_buffer || + !reuses[reuse_count].down_buffer) { + reuses[reuse_count].gate_buffer = nil; + reuses[reuse_count].up_buffer = nil; + reuses[reuse_count].down_buffer = nil; + reuses[reuse_count].gate_inner = 0; + reuses[reuse_count].up_inner = 0; + reuses[reuse_count].down_inner = 0; + continue; } + g_stream_expert_cache_buffer_reuses += + ds4_gpu_stream_expert_buffer_object_count( + reuses[reuse_count].gate_buffer, + reuses[reuse_count].up_buffer, + reuses[reuse_count].down_buffer); + reuse_count++; } - - if (released == 0) return 0; - g_stream_expert_cache_mlock_relief_applied = 1; - - uint32_t cap = g_stream_expert_cache_entry_count; - const uint32_t locked_after = - ds4_gpu_stream_expert_slab_locked_slot_count(); - if (locked_after != 0 && locked_after < cap) cap = locked_after; - if (cap != 0 && - (g_stream_expert_cache_mlock_budget_cap == 0 || - cap < g_stream_expert_cache_mlock_budget_cap)) { - g_stream_expert_cache_mlock_budget_cap = cap; + if (timing) { + ds4_gpu_stream_expert_timing_note_reuse_clear(ds4_gpu_now_ms() - + clear_t0); } + return reuse_count; +} - const uint64_t released_bytes = - (uint64_t)released * g_stream_expert_cache_slab_slot_bytes; - fprintf(stderr, - "ds4: released locked cache margin: %u experts / %.2f GiB; " - "runtime cache cap now %u experts\n", - released, - ds4_gpu_gib(released_bytes), - g_stream_expert_cache_mlock_budget_cap); - return released; +static int ds4_gpu_stream_expert_batch_reuse_enabled( + uint64_t gate_expert_bytes, + uint64_t down_expert_bytes) { + if (gate_expert_bytes > (UINT64_MAX - down_expert_bytes) / 2ull) { + return 0; + } + const uint64_t slot_bytes = gate_expert_bytes * 2ull + down_expert_bytes; + /* + * One global victim scan per selected miss is measurable for GLM Q2-size + * slots, but batching larger Q4-size slots regressed short decode on M5. + * Keep larger slots on the older single-victim path until profiling says + * otherwise. + */ + return slot_bytes <= 16ull * 1024ull * 1024ull; } static int ds4_gpu_stream_expert_cache_prepare_load_buffers( @@ -10507,27 +12365,6 @@ static int ds4_gpu_stream_expert_cache_prepare_load_buffers( (uint64_t)NSUIntegerMax) { return 0; } - if (g_stream_expert_cache_mlock_budget_cap != 0) { - ds4_gpu_stream_expert_cache_release_mlock_margin(protect_layer, - protect_ids, - n_protect); - if (!ds4_gpu_stream_expert_cache_take_reusable(1, - protect_layer, - protect_ids, - n_protect, - gate_expert_bytes, - down_expert_bytes, - &reuse)) { - return 0; - } - *gate_buf = reuse.gate_buffer; - *up_buf = reuse.up_buffer; - *down_buf = reuse.down_buffer; - *gate_inner = reuse.gate_inner; - *up_inner = reuse.up_inner; - *down_inner = reuse.down_inner; - return *gate_buf && *up_buf && *down_buf; - } if (ds4_gpu_stream_expert_alloc_slab_slot(gate_expert_bytes, down_expert_bytes, gate_buf, @@ -10538,27 +12375,6 @@ static int ds4_gpu_stream_expert_cache_prepare_load_buffers( down_inner)) { return 1; } - if (g_stream_expert_cache_mlock_budget_cap != 0) { - ds4_gpu_stream_expert_cache_release_mlock_margin(protect_layer, - protect_ids, - n_protect); - if (!ds4_gpu_stream_expert_cache_take_reusable(1, - protect_layer, - protect_ids, - n_protect, - gate_expert_bytes, - down_expert_bytes, - &reuse)) { - return 0; - } - *gate_buf = reuse.gate_buffer; - *up_buf = reuse.up_buffer; - *down_buf = reuse.down_buffer; - *gate_inner = reuse.gate_inner; - *up_inner = reuse.up_inner; - *down_inner = reuse.down_inner; - return *gate_buf && *up_buf && *down_buf; - } const uint64_t up_off = gate_expert_bytes; const uint64_t down_off = gate_expert_bytes * 2ull; const uint64_t combined_bytes = down_off + down_expert_bytes; @@ -10966,7 +12782,7 @@ static int ds4_gpu_stream_expert_pending_load_profile_enabled(void) { static void ds4_gpu_stream_expert_pending_load_release_buffers( ds4_gpu_stream_expert_pending_load *p) { if (!p) return; - for (uint32_t i = 0; i < 6; i++) { + for (uint32_t i = 0; i < DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED; i++) { p->gate_bufs[i] = nil; p->up_bufs[i] = nil; p->down_bufs[i] = nil; @@ -10978,7 +12794,7 @@ static void ds4_gpu_stream_expert_pending_load_release_buffers( static int ds4_gpu_stream_expert_pending_load_install( ds4_gpu_stream_expert_pending_load *p, - ds4_gpu_stream_expert_cache_entry *entries[6], + ds4_gpu_stream_expert_cache_entry *entries[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED], double elapsed_ms) { if (!p || p->n_loads == 0) return 1; @@ -10995,15 +12811,26 @@ static int ds4_gpu_stream_expert_pending_load_install( if (!ok) return 0; ds4_gpu_stream_expert_cache_note_pread(p->layer, read_bytes, elapsed_ms); + const int load_timing = ds4_gpu_stream_expert_timing_summary_enabled(); + double load_t0 = load_timing ? ds4_gpu_now_ms() : 0.0; + double load_modify_ms = 0.0; + double load_install_ms = 0.0; for (uint32_t load_i = 0; load_i < p->n_loads; load_i++) { [p->gate_bufs[load_i] didModifyRange:NSMakeRange(p->gate_inners[load_i], (NSUInteger)p->gate_expert_bytes)]; [p->up_bufs[load_i] didModifyRange:NSMakeRange(p->up_inners[load_i], (NSUInteger)p->gate_expert_bytes)]; [p->down_bufs[load_i] didModifyRange:NSMakeRange(p->down_inners[load_i], (NSUInteger)p->down_expert_bytes)]; } + if (load_timing) { + const double now_ms = ds4_gpu_now_ms(); + load_modify_ms = now_ms - load_t0; + load_t0 = now_ms; + } - ds4_gpu_stream_expert_cache_entry *loaded_entries[6] = { - NULL, NULL, NULL, NULL, NULL, NULL - }; + ds4_gpu_stream_expert_cache_entry + *loaded_entries[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + for (uint32_t i = 0; i < DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED; i++) { + loaded_entries[i] = NULL; + } for (uint32_t load_i = 0; load_i < p->n_loads; load_i++) { const uint32_t slot = p->load_slots[load_i]; const uint32_t expert = (uint32_t)p->selected_ids[slot]; @@ -11038,6 +12865,13 @@ static int ds4_gpu_stream_expert_pending_load_install( entry->use_count++; if (entries) entries[i] = entry; } + if (load_timing) { + load_install_ms = ds4_gpu_now_ms() - load_t0; + ds4_gpu_stream_expert_timing_note_load_detail(p->prepare_ms, + elapsed_ms, + load_modify_ms, + load_install_ms); + } if (ds4_gpu_stream_expert_pending_load_profile_enabled()) { fprintf(stderr, "ds4: Metal streaming expert early-load finish layer=%u experts=%u tensors=%u bytes=%.2f GiB wall=%.3f ms\n", @@ -11051,7 +12885,7 @@ static int ds4_gpu_stream_expert_pending_load_install( } static int ds4_gpu_stream_expert_pending_load_finish( - ds4_gpu_stream_expert_cache_entry *entries[6]) { + ds4_gpu_stream_expert_cache_entry *entries[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]) { ds4_gpu_stream_expert_pending_load *p = &g_stream_expert_pending_load; if (!p->active) return 1; @@ -11069,6 +12903,7 @@ static int ds4_gpu_stream_expert_pending_load_finish( ds4_gpu_stream_expert_pending_load_release_buffers(p); p->n_tasks = 0; p->n_loads = 0; + p->prepare_ms = 0.0; return ok; } @@ -11085,7 +12920,7 @@ static int ds4_gpu_stream_expert_pending_load_matches( const void *model_map, uint64_t model_size, uint32_t layer, - const int32_t selected_ids[6], + const int32_t *selected_ids, uint32_t n_total_expert, uint32_t n_selected, uint64_t gate_expert_bytes, @@ -11128,7 +12963,7 @@ int ds4_gpu_stream_expert_cache_begin_selected_load( if (!model_map || !selected_ids || layer >= DS4_METAL_STREAM_EXPERT_CACHE_MAX_LAYER || n_selected == 0 || - n_selected > 6 || + n_selected > DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED || n_total_expert == 0 || n_total_expert > DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT || !ds4_gpu_stream_expert_cache_note_expert_size(gate_expert_bytes, @@ -11164,7 +12999,10 @@ int ds4_gpu_stream_expert_cache_begin_selected_load( p->n_tasks = 0; p->gate_expert_bytes = gate_expert_bytes; p->down_expert_bytes = down_expert_bytes; - for (uint32_t i = 0; i < 6; i++) { + p->prepare_ms = 0.0; + const int load_timing = ds4_gpu_stream_expert_timing_summary_enabled(); + const double load_prepare_t0 = load_timing ? ds4_gpu_now_ms() : 0.0; + for (uint32_t i = 0; i < DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED; i++) { p->selected_ids[i] = -1; p->load_slots[i] = 0; p->source_slots[i] = UINT32_MAX; @@ -11246,6 +13084,33 @@ int ds4_gpu_stream_expert_cache_begin_selected_load( const uint32_t cache_budget = ds4_gpu_stream_expert_cache_configured_budget(); uint32_t reserved_entries = g_stream_expert_cache_entry_count; + ds4_gpu_stream_expert_reusable_buffers + batch_reuse[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + for (uint32_t i = 0; i < DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED; i++) { + batch_reuse[i] = + (ds4_gpu_stream_expert_reusable_buffers){ nil, nil, nil, 0, 0, 0 }; + } + uint32_t batch_reuse_count = 0; + if (cache_budget != 0 && + reserved_entries >= cache_budget && + p->n_loads > 1 && + ds4_gpu_stream_expert_batch_reuse_enabled(gate_expert_bytes, + down_expert_bytes)) { + const double reuse_t0 = load_timing ? ds4_gpu_now_ms() : 0.0; + batch_reuse_count = + ds4_gpu_stream_expert_cache_take_reusable_batch( + p->n_loads, + layer, + selected_ids, + n_selected, + gate_expert_bytes, + down_expert_bytes, + batch_reuse); + if (load_timing) { + ds4_gpu_stream_expert_timing_note_prepare_batch_reuse( + ds4_gpu_now_ms() - reuse_t0); + } + } for (uint32_t load_i = 0; load_i < p->n_loads; load_i++) { const uint32_t slot = p->load_slots[load_i]; const uint32_t expert = (uint32_t)p->selected_ids[slot]; @@ -11259,22 +13124,41 @@ int ds4_gpu_stream_expert_cache_begin_selected_load( ds4_gpu_stream_expert_readahead_range(p->down_abs_offsets[slot], down_expert_bytes); - if (!ds4_gpu_stream_expert_cache_prepare_load_buffers(layer, - expert, - layer, - selected_ids, - n_selected, - gate_expert_bytes, - down_expert_bytes, - force_reuse, - &p->gate_bufs[load_i], - &p->up_bufs[load_i], - &p->down_bufs[load_i], - &p->gate_inners[load_i], - &p->up_inners[load_i], - &p->down_inners[load_i])) { - ds4_gpu_stream_expert_pending_load_release_buffers(p); - return 0; + if (load_i < batch_reuse_count && + batch_reuse[load_i].gate_buffer && + batch_reuse[load_i].up_buffer && + batch_reuse[load_i].down_buffer) { + p->gate_bufs[load_i] = batch_reuse[load_i].gate_buffer; + p->up_bufs[load_i] = batch_reuse[load_i].up_buffer; + p->down_bufs[load_i] = batch_reuse[load_i].down_buffer; + p->gate_inners[load_i] = batch_reuse[load_i].gate_inner; + p->up_inners[load_i] = batch_reuse[load_i].up_inner; + p->down_inners[load_i] = batch_reuse[load_i].down_inner; + } else { + const double buffer_t0 = load_timing ? ds4_gpu_now_ms() : 0.0; + const int prepared = + ds4_gpu_stream_expert_cache_prepare_load_buffers(layer, + expert, + layer, + selected_ids, + n_selected, + gate_expert_bytes, + down_expert_bytes, + force_reuse, + &p->gate_bufs[load_i], + &p->up_bufs[load_i], + &p->down_bufs[load_i], + &p->gate_inners[load_i], + &p->up_inners[load_i], + &p->down_inners[load_i]); + if (load_timing) { + ds4_gpu_stream_expert_timing_note_prepare_buffer( + ds4_gpu_now_ms() - buffer_t0); + } + if (!prepared) { + ds4_gpu_stream_expert_pending_load_release_buffers(p); + return 0; + } } if (!force_reuse && reserved_entries < UINT32_MAX) { reserved_entries++; @@ -11289,6 +13173,7 @@ int ds4_gpu_stream_expert_cache_begin_selected_load( ds4_gpu_stream_expert_pending_load_release_buffers(p); return 0; } + const double task_t0 = load_timing ? ds4_gpu_now_ms() : 0.0; p->tasks[p->n_tasks++] = (ds4_gpu_stream_expert_pread_task) { .offset = p->gate_abs_offsets[slot], .len = gate_expert_bytes, @@ -11304,11 +13189,19 @@ int ds4_gpu_stream_expert_cache_begin_selected_load( .len = down_expert_bytes, .dst = down_dst, }; + if (load_timing) { + ds4_gpu_stream_expert_timing_note_prepare_task( + 1, + ds4_gpu_now_ms() - task_t0); + } } const uint32_t n_workers = ds4_gpu_stream_expert_pread_thread_count(p->n_tasks); p->start_ms = ds4_gpu_now_ms(); + if (load_timing) { + p->prepare_ms = p->start_ms - load_prepare_t0; + } if (ds4_gpu_stream_expert_pread_pool_begin(p->tasks, p->n_tasks, n_workers)) { @@ -11341,6 +13234,7 @@ int ds4_gpu_stream_expert_cache_begin_selected_load( ds4_gpu_stream_expert_pending_load_release_buffers(p); p->n_tasks = 0; p->n_loads = 0; + p->prepare_ms = 0.0; return 1; } @@ -11348,16 +13242,16 @@ static int ds4_gpu_stream_expert_cache_load_selected_missing( const void *model_map, uint64_t model_size, uint32_t layer, - const int32_t selected_ids[6], + const int32_t *selected_ids, uint32_t n_total_expert, uint32_t n_selected, - const uint64_t gate_abs_offsets[6], - const uint64_t up_abs_offsets[6], - const uint64_t down_abs_offsets[6], + const uint64_t *gate_abs_offsets, + const uint64_t *up_abs_offsets, + const uint64_t *down_abs_offsets, uint64_t gate_expert_bytes, uint64_t down_expert_bytes, uint32_t missing_mask, - ds4_gpu_stream_expert_cache_entry *entries[6]) { + ds4_gpu_stream_expert_cache_entry **entries) { if (!g_ssd_streaming_mode || !model_map || !selected_ids || @@ -11367,7 +13261,7 @@ static int ds4_gpu_stream_expert_cache_load_selected_missing( !entries || layer >= DS4_METAL_STREAM_EXPERT_CACHE_MAX_LAYER || n_selected == 0 || - n_selected > 6 || + n_selected > DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED || n_total_expert == 0 || n_total_expert > DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT || !ds4_gpu_stream_expert_cache_note_expert_size(gate_expert_bytes, @@ -11379,7 +13273,8 @@ static int ds4_gpu_stream_expert_cache_load_selected_missing( } missing_mask &= (1u << n_selected) - 1u; if (missing_mask == 0) return 1; - if (g_stream_expert_pending_load.active) { + if (g_stream_expert_pending_load.active && + n_selected <= DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED) { if (ds4_gpu_stream_expert_pending_load_matches(model_map, model_size, layer, @@ -11398,6 +13293,8 @@ static int ds4_gpu_stream_expert_cache_load_selected_missing( } else { ds4_gpu_stream_expert_pending_load_clear(); } + } else if (g_stream_expert_pending_load.active) { + ds4_gpu_stream_expert_pending_load_clear(); } const int load_timing = ds4_gpu_stream_expert_timing_summary_enabled(); @@ -11406,11 +13303,12 @@ static int ds4_gpu_stream_expert_cache_load_selected_missing( double load_modify_ms = 0.0; double load_install_ms = 0.0; - uint32_t load_slots[6] = { 0, 0, 0, 0, 0, 0 }; - uint32_t source_slots[6] = { - UINT32_MAX, UINT32_MAX, UINT32_MAX, - UINT32_MAX, UINT32_MAX, UINT32_MAX - }; + uint32_t load_slots[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + uint32_t source_slots[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + for (uint32_t i = 0; i < DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED; i++) { + load_slots[i] = 0; + source_slots[i] = UINT32_MAX; + } uint32_t n_loads = 0; for (uint32_t i = 0; i < n_selected; i++) { if ((missing_mask & (1u << i)) == 0) continue; @@ -11455,18 +13353,53 @@ static int ds4_gpu_stream_expert_cache_load_selected_missing( return 1; } - __strong id gate_bufs[6] = { nil, nil, nil, nil, nil, nil }; - __strong id up_bufs[6] = { nil, nil, nil, nil, nil, nil }; - __strong id down_bufs[6] = { nil, nil, nil, nil, nil, nil }; - NSUInteger gate_inners[6] = { 0, 0, 0, 0, 0, 0 }; - NSUInteger up_inners[6] = { 0, 0, 0, 0, 0, 0 }; - NSUInteger down_inners[6] = { 0, 0, 0, 0, 0, 0 }; - ds4_gpu_stream_expert_pread_task tasks[18]; + __strong id gate_bufs[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + __strong id up_bufs[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + __strong id down_bufs[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + NSUInteger gate_inners[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + NSUInteger up_inners[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + NSUInteger down_inners[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + for (uint32_t i = 0; i < DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED; i++) { + gate_bufs[i] = nil; + up_bufs[i] = nil; + down_bufs[i] = nil; + gate_inners[i] = 0; + up_inners[i] = 0; + down_inners[i] = 0; + } + ds4_gpu_stream_expert_pread_task tasks[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED * 3u]; memset(tasks, 0, sizeof(tasks)); uint32_t n_tasks = 0; const uint32_t cache_budget = ds4_gpu_stream_expert_cache_configured_budget(); uint32_t reserved_entries = g_stream_expert_cache_entry_count; + ds4_gpu_stream_expert_reusable_buffers + batch_reuse[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + for (uint32_t i = 0; i < DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED; i++) { + batch_reuse[i] = + (ds4_gpu_stream_expert_reusable_buffers){ nil, nil, nil, 0, 0, 0 }; + } + uint32_t batch_reuse_count = 0; + if (cache_budget != 0 && + reserved_entries >= cache_budget && + n_loads > 1 && + ds4_gpu_stream_expert_batch_reuse_enabled(gate_expert_bytes, + down_expert_bytes)) { + const double reuse_t0 = load_timing ? ds4_gpu_now_ms() : 0.0; + batch_reuse_count = + ds4_gpu_stream_expert_cache_take_reusable_batch( + n_loads, + layer, + selected_ids, + n_selected, + gate_expert_bytes, + down_expert_bytes, + batch_reuse); + if (load_timing) { + ds4_gpu_stream_expert_timing_note_prepare_batch_reuse( + ds4_gpu_now_ms() - reuse_t0); + } + } for (uint32_t load_i = 0; load_i < n_loads; load_i++) { const uint32_t slot = load_slots[load_i]; @@ -11481,21 +13414,40 @@ static int ds4_gpu_stream_expert_cache_load_selected_missing( ds4_gpu_stream_expert_readahead_range(down_abs_offsets[slot], down_expert_bytes); - if (!ds4_gpu_stream_expert_cache_prepare_load_buffers(layer, - expert, - layer, - selected_ids, - n_selected, - gate_expert_bytes, - down_expert_bytes, - force_reuse, - &gate_bufs[load_i], - &up_bufs[load_i], - &down_bufs[load_i], - &gate_inners[load_i], - &up_inners[load_i], - &down_inners[load_i])) { - return 0; + if (load_i < batch_reuse_count && + batch_reuse[load_i].gate_buffer && + batch_reuse[load_i].up_buffer && + batch_reuse[load_i].down_buffer) { + gate_bufs[load_i] = batch_reuse[load_i].gate_buffer; + up_bufs[load_i] = batch_reuse[load_i].up_buffer; + down_bufs[load_i] = batch_reuse[load_i].down_buffer; + gate_inners[load_i] = batch_reuse[load_i].gate_inner; + up_inners[load_i] = batch_reuse[load_i].up_inner; + down_inners[load_i] = batch_reuse[load_i].down_inner; + } else { + const double buffer_t0 = load_timing ? ds4_gpu_now_ms() : 0.0; + const int prepared = + ds4_gpu_stream_expert_cache_prepare_load_buffers(layer, + expert, + layer, + selected_ids, + n_selected, + gate_expert_bytes, + down_expert_bytes, + force_reuse, + &gate_bufs[load_i], + &up_bufs[load_i], + &down_bufs[load_i], + &gate_inners[load_i], + &up_inners[load_i], + &down_inners[load_i]); + if (load_timing) { + ds4_gpu_stream_expert_timing_note_prepare_buffer( + ds4_gpu_now_ms() - buffer_t0); + } + if (!prepared) { + return 0; + } } if (!force_reuse && reserved_entries < UINT32_MAX) { reserved_entries++; @@ -11512,6 +13464,7 @@ static int ds4_gpu_stream_expert_cache_load_selected_missing( down_inners[load_i]; if (!gate_dst || !up_dst || !down_dst) return 0; + const double task_t0 = load_timing ? ds4_gpu_now_ms() : 0.0; tasks[n_tasks++] = (ds4_gpu_stream_expert_pread_task) { .offset = gate_abs_offsets[slot], .len = gate_expert_bytes, @@ -11527,6 +13480,11 @@ static int ds4_gpu_stream_expert_cache_load_selected_missing( .len = down_expert_bytes, .dst = down_dst, }; + if (load_timing) { + ds4_gpu_stream_expert_timing_note_prepare_task( + 1, + ds4_gpu_now_ms() - task_t0); + } } if (load_timing) { @@ -11612,6 +13570,126 @@ static int ds4_gpu_stream_expert_cache_load_selected_missing( return 1; } +static void ds4_gpu_glm_stream_selected_prefetch_set( + const ds4_gpu_stream_expert_table *table, + const int32_t *selected_ids, + uint32_t n_selected) { + g_glm_stream_selected_prefetch.active = 0; + if (!table || !selected_ids || + n_selected == 0 || + n_selected > DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED) { + return; + } + g_glm_stream_selected_prefetch.model_map = table->model_map; + g_glm_stream_selected_prefetch.model_size = table->model_size; + g_glm_stream_selected_prefetch.layer = table->layer; + g_glm_stream_selected_prefetch.n_total_expert = table->n_total_expert; + g_glm_stream_selected_prefetch.n_selected = n_selected; + g_glm_stream_selected_prefetch.gate_offset = table->gate_offset; + g_glm_stream_selected_prefetch.up_offset = table->up_offset; + g_glm_stream_selected_prefetch.down_offset = table->down_offset; + g_glm_stream_selected_prefetch.gate_expert_bytes = table->gate_expert_bytes; + g_glm_stream_selected_prefetch.down_expert_bytes = table->down_expert_bytes; + for (uint32_t i = 0; i < n_selected; i++) { + g_glm_stream_selected_prefetch.selected_ids[i] = selected_ids[i]; + } + g_glm_stream_selected_prefetch.active = 1; +} + +static int ds4_gpu_glm_stream_selected_prefetch_take( + const void *model_map, + uint64_t model_size, + uint32_t layer, + uint32_t n_total_expert, + uint32_t n_selected, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t down_offset, + uint64_t gate_expert_bytes, + uint64_t down_expert_bytes, + int32_t *selected_ids_out) { + if (!selected_ids_out || !g_glm_stream_selected_prefetch.active) return 0; + ds4_gpu_glm_stream_selected_prefetch *p = &g_glm_stream_selected_prefetch; + if (p->model_map != model_map || + p->model_size != model_size || + p->layer != layer || + p->n_total_expert != n_total_expert || + p->n_selected != n_selected || + p->gate_offset != gate_offset || + p->up_offset != up_offset || + p->down_offset != down_offset || + p->gate_expert_bytes != gate_expert_bytes || + p->down_expert_bytes != down_expert_bytes) { + return 0; + } + for (uint32_t i = 0; i < n_selected; i++) { + selected_ids_out[i] = p->selected_ids[i]; + } + p->active = 0; + return 1; +} + +int ds4_gpu_glm_stream_expert_cache_begin_selected_load_tensor( + const ds4_gpu_stream_expert_table *table, + const ds4_gpu_tensor *selected, + uint32_t n_selected) { + g_glm_stream_selected_prefetch.active = 0; + if (!g_ssd_streaming_mode || + getenv("DS4_METAL_DISABLE_GLM_STREAMING_EXPERT_EARLY_LOAD") != NULL) { + return 1; + } + if (!table || !selected || + n_selected == 0 || + n_selected > DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED) { + return 1; + } + + const int timing = ds4_gpu_stream_expert_timing_summary_enabled(); + double t0 = timing ? ds4_gpu_now_ms() : 0.0; + double selected_sync_ms = 0.0; + double selected_copy_ms = 0.0; + double selected_bind_ms = 0.0; + const int had_batch = g_batch_cb != nil; + if (had_batch) { + if (ds4_gpu_end_commands() == 0) return 0; + if (timing) { + selected_sync_ms = ds4_gpu_now_ms() - t0; + t0 = ds4_gpu_now_ms(); + } + } + + int32_t selected_ids[DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED]; + for (uint32_t i = 0; i < DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED; i++) { + selected_ids[i] = -1; + } + int ok = ds4_gpu_tensor_read(selected, + 0, + selected_ids, + (uint64_t)n_selected * sizeof(selected_ids[0])) != 0; + if (timing) { + selected_copy_ms = ds4_gpu_now_ms() - t0; + t0 = ds4_gpu_now_ms(); + } + if (ok) { + ok = ds4_gpu_stream_expert_cache_begin_selected_load(table, + selected_ids, + n_selected) != 0; + } + if (timing) { + selected_bind_ms = ds4_gpu_now_ms() - t0; + ds4_gpu_stream_expert_timing_note_selected(selected_sync_ms, + selected_copy_ms, + selected_bind_ms); + } + if (ok) { + ds4_gpu_glm_stream_selected_prefetch_set(table, + selected_ids, + n_selected); + } + if (had_batch && ds4_gpu_begin_commands() == 0) ok = 0; + return ok; +} + static void ds4_gpu_stream_expert_cache_clear_layer(uint32_t layer) { if (layer >= DS4_METAL_STREAM_EXPERT_CACHE_MAX_LAYER) return; for (uint32_t expert = 0; @@ -11662,7 +13740,7 @@ static int ds4_gpu_stream_expert_cache_prepare_selected_batch( layer >= DS4_METAL_STREAM_EXPERT_CACHE_MAX_LAYER || n_tokens == 0 || n_selected == 0 || - n_selected > 6 || + n_selected > DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED || n_total_expert == 0 || n_total_expert > DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT || gate_expert_bytes == 0 || @@ -11722,17 +13800,63 @@ static int ds4_gpu_stream_expert_cache_prepare_selected_batch( } /* * When the layer's unique selected set does not fit the cache budget, the - * overflow experts are addressed straight into whole-tensor mapped model - * views instead: the address-table kernels read identical bytes either - * way, so the cache/view partition never changes the computed logits. - * Falling back to a different kernel path here (the old behavior) made - * the output silently depend on the cache size. + * extra experts are addressed straight into whole-tensor mapped model views + * instead of falling back to a different MoE kernel path. The address-table + * kernels read identical expert bytes either way, so the cache/view split + * does not change the computed logits. */ uint32_t view_served = 0; uint64_t overflow_gate_inner = 0; uint64_t overflow_up_inner = 0; uint64_t overflow_down_inner = 0; + + uint64_t unique_gate_offsets[DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT]; + uint64_t unique_up_offsets[DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT]; + uint64_t unique_down_offsets[DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT]; + ds4_gpu_stream_expert_cache_entry + *unique_entries[DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT]; + uint32_t load_unique[DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT]; + __strong id + gate_bufs[DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT]; + __strong id + up_bufs[DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT]; + __strong id + down_bufs[DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT]; + NSUInteger gate_inners[DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT]; + NSUInteger up_inners[DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT]; + NSUInteger down_inners[DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT]; + for (uint32_t i = 0; i < DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT; i++) { + unique_gate_offsets[i] = 0; + unique_up_offsets[i] = 0; + unique_down_offsets[i] = 0; + unique_entries[i] = NULL; + load_unique[i] = 0; + gate_bufs[i] = nil; + up_bufs[i] = nil; + down_bufs[i] = nil; + gate_inners[i] = 0; + up_inners[i] = 0; + down_inners[i] = 0; + } + + ds4_gpu_stream_expert_pread_task *tasks = NULL; + uint32_t n_loads = 0; + uint32_t n_tasks = 0; + double load_prepare_ms = 0.0; + double load_modify_ms = 0.0; + double load_install_ms = 0.0; + double load_timing_t0 = ds4_gpu_stream_expert_timing_summary_enabled() ? + ds4_gpu_now_ms() : 0.0; + const int load_timing = load_timing_t0 != 0.0; + if (ok && unique_count != 0) { + tasks = calloc((size_t)unique_count * 3u, sizeof(tasks[0])); + if (!tasks) ok = 0; + } if (ok) { + const uint32_t cache_budget = + ds4_gpu_stream_expert_cache_configured_budget(); + uint32_t reserved_entries = g_stream_expert_cache_entry_count; + for (uint32_t u = 0; u < unique_count; u++) { const uint32_t expert = (uint32_t)unique_ids[u]; @@ -11751,22 +13875,193 @@ static int ds4_gpu_stream_expert_cache_prepare_selected_batch( ok = 0; break; } + unique_gate_offsets[u] = gate_offset + gate_rel; + unique_up_offsets[u] = up_offset + gate_rel; + unique_down_offsets[u] = down_offset + down_rel; ds4_gpu_stream_expert_cache_entry *entry = - ds4_gpu_stream_expert_cache_get_protected(model_map, - model_size, - layer, - expert, - n_total_expert, - n_selected, - gate_offset + gate_rel, - up_offset + gate_rel, - down_offset + down_rel, - gate_expert_bytes, - down_expert_bytes, - unique_ids, - unique_count); + ds4_gpu_stream_expert_cache_peek(model_map, + model_size, + layer, + expert, + n_total_expert, + n_selected, + unique_gate_offsets[u], + unique_up_offsets[u], + unique_down_offsets[u], + gate_expert_bytes, + down_expert_bytes); + if (entry) { + unique_entries[u] = entry; + continue; + } + + if (cache_budget != 0 && reserved_entries >= cache_budget) { + unique_entries[u] = NULL; + continue; + } + + const int force_reuse = 0; + ds4_gpu_stream_expert_readahead_range(unique_gate_offsets[u], + gate_expert_bytes); + ds4_gpu_stream_expert_readahead_range(unique_up_offsets[u], + gate_expert_bytes); + ds4_gpu_stream_expert_readahead_range(unique_down_offsets[u], + down_expert_bytes); + const double buffer_t0 = load_timing ? ds4_gpu_now_ms() : 0.0; + const int prepared = + ds4_gpu_stream_expert_cache_prepare_load_buffers(layer, + expert, + layer, + unique_ids, + unique_count, + gate_expert_bytes, + down_expert_bytes, + force_reuse, + &gate_bufs[n_loads], + &up_bufs[n_loads], + &down_bufs[n_loads], + &gate_inners[n_loads], + &up_inners[n_loads], + &down_inners[n_loads]); + if (load_timing) { + ds4_gpu_stream_expert_timing_note_prepare_buffer( + ds4_gpu_now_ms() - buffer_t0); + } + if (!prepared) { + ok = 0; + break; + } + if (reserved_entries < UINT32_MAX) { + reserved_entries++; + } + if (!gate_bufs[n_loads] || + !up_bufs[n_loads] || + !down_bufs[n_loads]) { + ok = 0; + break; + } + + uint8_t *gate_dst = (uint8_t *)[gate_bufs[n_loads] contents] + + gate_inners[n_loads]; + uint8_t *up_dst = (uint8_t *)[up_bufs[n_loads] contents] + + up_inners[n_loads]; + uint8_t *down_dst = (uint8_t *)[down_bufs[n_loads] contents] + + down_inners[n_loads]; + if (!gate_dst || !up_dst || !down_dst) { + ok = 0; + break; + } + + load_unique[n_loads] = u; + const double task_t0 = load_timing ? ds4_gpu_now_ms() : 0.0; + tasks[n_tasks++] = (ds4_gpu_stream_expert_pread_task) { + .offset = unique_gate_offsets[u], + .len = gate_expert_bytes, + .dst = gate_dst, + }; + tasks[n_tasks++] = (ds4_gpu_stream_expert_pread_task) { + .offset = unique_up_offsets[u], + .len = gate_expert_bytes, + .dst = up_dst, + }; + tasks[n_tasks++] = (ds4_gpu_stream_expert_pread_task) { + .offset = unique_down_offsets[u], + .len = down_expert_bytes, + .dst = down_dst, + }; + if (load_timing) { + ds4_gpu_stream_expert_timing_note_prepare_task( + 1, + ds4_gpu_now_ms() - task_t0); + } + n_loads++; + } + } + if (ok && n_loads != 0) { + if (load_timing_t0 != 0.0) { + const double now_ms = ds4_gpu_now_ms(); + load_prepare_ms = now_ms - load_timing_t0; + load_timing_t0 = now_ms; + } + uint64_t read_bytes = 0; + double read_ms = 0.0; + ok = ds4_gpu_stream_expert_pread_tasks(tasks, + n_tasks, + &read_bytes, + &read_ms); + if (ok) { + ds4_gpu_stream_expert_cache_note_pread(layer, read_bytes, read_ms); + } + if (load_timing_t0 != 0.0) { + load_timing_t0 = ds4_gpu_now_ms(); + } + if (ok) { + for (uint32_t load_i = 0; load_i < n_loads; load_i++) { + [gate_bufs[load_i] didModifyRange:NSMakeRange(gate_inners[load_i], (NSUInteger)gate_expert_bytes)]; + [up_bufs[load_i] didModifyRange:NSMakeRange(up_inners[load_i], (NSUInteger)gate_expert_bytes)]; + [down_bufs[load_i] didModifyRange:NSMakeRange(down_inners[load_i], (NSUInteger)down_expert_bytes)]; + } + } + if (load_timing_t0 != 0.0) { + const double now_ms = ds4_gpu_now_ms(); + load_modify_ms = now_ms - load_timing_t0; + load_timing_t0 = now_ms; + } + if (ok && getenv("DS4_METAL_STREAMING_EXPERT_PREAD_PROFILE") != NULL) { + fprintf(stderr, + "ds4: Metal streaming batch expert parallel pread layer=%u experts=%u tensors=%u " + "threads=%u bytes=%.2f GiB wall=%.3f ms\n", + layer, + n_loads, + n_tasks, + ds4_gpu_stream_expert_pread_thread_count(n_tasks), + ds4_gpu_gib(read_bytes), + read_ms); + } + if (ok) { + for (uint32_t load_i = 0; load_i < n_loads; load_i++) { + const uint32_t u = load_unique[load_i]; + const uint32_t expert = (uint32_t)unique_ids[u]; + ds4_gpu_stream_expert_cache_entry *entry = + ds4_gpu_stream_expert_cache_install_loaded(model_map, + model_size, + layer, + expert, + unique_gate_offsets[u], + unique_up_offsets[u], + unique_down_offsets[u], + gate_expert_bytes, + down_expert_bytes, + gate_bufs[load_i], + up_bufs[load_i], + down_bufs[load_i], + gate_inners[load_i], + up_inners[load_i], + down_inners[load_i]); + if (!entry) { + ok = 0; + break; + } + unique_entries[u] = entry; + } + } + if (load_timing_t0 != 0.0) { + load_install_ms = ds4_gpu_now_ms() - load_timing_t0; + ds4_gpu_stream_expert_timing_note_load_detail(load_prepare_ms, + read_ms, + load_modify_ms, + load_install_ms); + } + } + if (tasks) free(tasks); + if (ok) { + for (uint32_t u = 0; u < unique_count; u++) { + ds4_gpu_stream_expert_cache_entry *entry = unique_entries[u]; + const uint32_t expert = (uint32_t)unique_ids[u]; if (!entry) { + const uint64_t gate_rel = unique_gate_offsets[u] - gate_offset; + const uint64_t down_rel = unique_down_offsets[u] - down_offset; if (!*overflow_gate) { const uint64_t gate_tensor_bytes = (uint64_t)n_total_expert * gate_expert_bytes; @@ -12144,7 +14439,9 @@ static bool ds4_gpu_q4_non_streaming_opt_in_enabled(void) { } static bool ds4_gpu_q4_selected_paths_allowed(void) { - return g_ssd_streaming_mode || ds4_gpu_q4_non_streaming_opt_in_enabled(); + if (g_ssd_streaming_mode) return true; + if (g_glm_model_mode) return false; + return ds4_gpu_q4_non_streaming_opt_in_enabled(); } int ds4_gpu_pro_q4_expert_table_auto_available(void) { @@ -13280,7 +15577,9 @@ static int ds4_gpu_matmul_q8_0_legacy_tensor( uint64_t in_dim, uint64_t out_dim, const ds4_gpu_tensor *x, - uint64_t n_tok) { + uint64_t n_tok, + bool prefer_decode_mpp, + bool force_model_view) { if (!g_initialized && !ds4_gpu_init()) return 0; if ((in_dim & 31u) != 0 || in_dim > UINT32_MAX || out_dim > UINT32_MAX || n_tok > UINT32_MAX) { @@ -13308,7 +15607,18 @@ static int ds4_gpu_matmul_q8_0_legacy_tensor( } uint64_t inner_offset = 0; - id wbuf = ds4_gpu_wrap_model_range(model_map, model_size, weight_offset, weight_bytes, &inner_offset); + id wbuf = force_model_view ? + ds4_gpu_wrap_model_range(model_map, + model_size, + weight_offset, + weight_bytes, + &inner_offset) : + ds4_gpu_wrap_q8_decode_model_range(model_map, + model_size, + weight_offset, + weight_bytes, + n_tok, + &inner_offset); if (!wbuf) { return 0; } @@ -13318,6 +15628,38 @@ static int ds4_gpu_matmul_q8_0_legacy_tensor( if (!cb) return 0; if (n_tok == 1) { + if (ds4_gpu_mpp_available() && + (prefer_decode_mpp || getenv("DS4_METAL_Q8_DECODE_MPP") != NULL) && + getenv("DS4_METAL_DISABLE_Q8_DECODE_MPP") == NULL && + (in_dim % 64u) == 0) { + const char *nax_fn = "kernel_mul_mm_q8_0_f32_nax_direct_rhs"; + id mpp_pipeline = + ds4_gpu_get_mul_mm_pipeline(nax_fn, false, false); + if (mpp_pipeline) { + ds4_gpu_mul_mm_args args = + ds4_gpu_make_mm_args(in_dim, out_dim, n_tok, row_bytes); + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:mpp_pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:wbuf offset:(NSUInteger)inner_offset atIndex:1]; + [enc setBuffer:xbuf offset:ds4_gpu_tensor_offset(x) atIndex:2]; + [enc setBuffer:outbuf offset:ds4_gpu_tensor_offset(out) atIndex:3]; + [enc setThreadgroupMemoryLength:64u * 32u * sizeof(uint16_t) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake(1u, + ((NSUInteger)out_dim + 63u) / 64u, + 1u) + threadsPerThreadgroup:MTLSizeMake(128, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "Q8_0 decode MPP matmul")) { + return 0; + } + return 1; + } + ds4_gpu_warn_mpp_fallback(); + } + ds4_gpu_q8_0_matvec_args mv_args = ds4_gpu_make_q8_0_mv_args(in_dim, out_dim); ds4_gpu_mv_dispatch mv_dispatch = ds4_gpu_make_q8_0_mv_dispatch(); if (out_dim > 65536u) mv_dispatch.nsg = 8; @@ -13345,7 +15687,9 @@ static int ds4_gpu_matmul_q8_0_legacy_tensor( return 1; } - if (n_tok <= 8 && (in_dim % 128u) == 0) { + const uint64_t mv_ext_max_tokens = + ds4_gpu_env_u64("DS4_METAL_Q8_MV_EXT_MAX_TOKENS", 16u, 2u, 128u); + if (n_tok <= mv_ext_max_tokens && (in_dim % 128u) == 0) { const int16_t nsg = 2; const int16_t nxpsg = ds4_gpu_mv_ext_nxpsg(in_dim, n_tok); const int16_t r1ptg = ds4_gpu_mv_ext_r1ptg(n_tok); @@ -13504,8 +15848,8 @@ int ds4_gpu_matmul_q8_0_tensor( const double profile_t0 = profile_prefill ? ds4_gpu_now_ms() : 0.0; int ok = ds4_gpu_matmul_q8_0_legacy_tensor(out, model_map, model_size, - weight_offset, in_dim, out_dim, - x, n_tok); + weight_offset, in_dim, out_dim, + x, n_tok, false, false); if (profile_prefill) { if (split_batch_for_profile && ds4_gpu_end_commands() == 0) { ok = 0; @@ -13525,6 +15869,481 @@ int ds4_gpu_matmul_q8_0_tensor( return ok; } +int ds4_gpu_matmul_q8_0_decode_mpp_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok) { + return ds4_gpu_matmul_q8_0_legacy_tensor(out, model_map, model_size, + weight_offset, in_dim, out_dim, + x, n_tok, true, false); +} + +int ds4_gpu_matmul_q8_0_decode_mpp_model_view_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok) { + return ds4_gpu_matmul_q8_0_legacy_tensor(out, model_map, model_size, + weight_offset, in_dim, out_dim, + x, n_tok, true, true); +} + +static const char *ds4_gpu_q4_mv_ext_name(uint32_t weight_type, int16_t r1ptg) { + const char *prefix = NULL; + if (weight_type == DS4_METAL_TENSOR_Q4_K) { + prefix = "kernel_mul_mv_ext_q4_K_f32_r1_"; + } else if (weight_type == DS4_METAL_TENSOR_Q4_0) { + prefix = "kernel_mul_mv_ext_q4_0_f32_r1_"; + } else { + return NULL; + } + switch (r1ptg) { + case 1: return weight_type == DS4_METAL_TENSOR_Q4_K ? + "kernel_mul_mv_ext_q4_K_f32_r1_1" : "kernel_mul_mv_ext_q4_0_f32_r1_1"; + case 2: return weight_type == DS4_METAL_TENSOR_Q4_K ? + "kernel_mul_mv_ext_q4_K_f32_r1_2" : "kernel_mul_mv_ext_q4_0_f32_r1_2"; + case 3: return weight_type == DS4_METAL_TENSOR_Q4_K ? + "kernel_mul_mv_ext_q4_K_f32_r1_3" : "kernel_mul_mv_ext_q4_0_f32_r1_3"; + case 4: return weight_type == DS4_METAL_TENSOR_Q4_K ? + "kernel_mul_mv_ext_q4_K_f32_r1_4" : "kernel_mul_mv_ext_q4_0_f32_r1_4"; + case 5: return weight_type == DS4_METAL_TENSOR_Q4_K ? + "kernel_mul_mv_ext_q4_K_f32_r1_5" : "kernel_mul_mv_ext_q4_0_f32_r1_5"; + default: + (void)prefix; + return NULL; + } +} + +static const char *ds4_gpu_q4_mm_name(uint32_t weight_type) { + switch (weight_type) { + case DS4_METAL_TENSOR_Q4_0: return "kernel_mul_mm_q4_0_f32"; + case DS4_METAL_TENSOR_Q4_K: return "kernel_mul_mm_q4_K_f32"; + default: return NULL; + } +} + +static const char *ds4_gpu_q4_nax_name(uint32_t weight_type, uint64_t tile_n) { + if (weight_type == DS4_METAL_TENSOR_Q4_0) { + return tile_n == 128u ? "kernel_mul_mm_q4_0_f32_nax_direct_rhs_n128" : + tile_n == 64u ? "kernel_mul_mm_q4_0_f32_nax_direct_rhs_n64" : + "kernel_mul_mm_q4_0_f32_nax_direct_rhs"; + } + if (weight_type == DS4_METAL_TENSOR_Q4_K) { + return tile_n == 128u ? "kernel_mul_mm_q4_K_f32_nax_direct_rhs_n128" : + tile_n == 64u ? "kernel_mul_mm_q4_K_f32_nax_direct_rhs_n64" : + "kernel_mul_mm_q4_K_f32_nax_direct_rhs"; + } + return NULL; +} + +static int ds4_gpu_matmul_quant_impl_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok, + bool prefer_decode_mpp, + bool force_model_view) { + if (weight_type == DS4_METAL_TENSOR_Q8_0) { + return ds4_gpu_matmul_q8_0_legacy_tensor(out, + model_map, + model_size, + weight_offset, + in_dim, + out_dim, + x, + n_tok, + prefer_decode_mpp, + force_model_view); + } + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!out || !x || !model_map || + in_dim == 0 || out_dim == 0 || n_tok == 0 || + in_dim > UINT32_MAX || out_dim > UINT32_MAX || n_tok > UINT32_MAX) { + return 0; + } + + uint64_t row_bytes = 0; + if (!ds4_gpu_quant_row_bytes(weight_type, (uint32_t)in_dim, &row_bytes)) { + fprintf(stderr, "ds4: Metal quant matmul received unsupported type/dim (%u, in=%llu)\n", + weight_type, + (unsigned long long)in_dim); + return 0; + } + + @autoreleasepool { + id xbuf = ds4_gpu_tensor_buffer(x); + id outbuf = ds4_gpu_tensor_buffer(out); + const uint64_t x_bytes = n_tok * in_dim * sizeof(float); + const uint64_t out_bytes = n_tok * out_dim * sizeof(float); + if (!xbuf || !outbuf || + ds4_gpu_tensor_bytes(x) < x_bytes || + ds4_gpu_tensor_bytes(out) < out_bytes) { + fprintf(stderr, "ds4: Metal quant tensor matmul received undersized activation buffers\n"); + return 0; + } + + if (out_dim > UINT64_MAX / row_bytes) return 0; + const uint64_t weight_bytes = out_dim * row_bytes; + if (weight_offset > model_size || weight_bytes > model_size - weight_offset) { + fprintf(stderr, "ds4: Metal quant tensor matmul range is outside the mapped model\n"); + return 0; + } + + uint64_t inner_offset = 0; + id wbuf = force_model_view ? + ds4_gpu_wrap_model_range(model_map, + model_size, + weight_offset, + weight_bytes, + &inner_offset) : + ds4_gpu_wrap_model_range(model_map, + model_size, + weight_offset, + weight_bytes, + &inner_offset); + if (!wbuf) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + /* + * Small-batch Q4_K goes to the classic (llama.cpp-style) matvec: + * the mul_mv_ext family tops out around 220 GB/s on M5 for the GLM + * DenseQ4 decode shapes while this impl streams 530-650 GB/s + * (misc/q4mv_bench.m). Falls through to ext when unavailable. + */ + if (weight_type == DS4_METAL_TENSOR_Q4_K && + n_tok <= 8u && + (in_dim % 256u) == 0 && + getenv("DS4_METAL_DISABLE_Q4_MV_CLASSIC") == NULL) { + const int16_t nsg = 2; + id pipeline = + ds4_gpu_get_mul_mv_ext_pipeline("kernel_mul_mv_q4_K_dense_f32", nsg, 8); + if (pipeline) { + ds4_gpu_q8_0_matvec_args args = { + .ne00 = (int32_t)in_dim, + .ne01 = (int32_t)out_dim, + .ne02 = 1, + .nb00 = 1, + .nb01 = row_bytes, + .nb02 = row_bytes * out_dim, + .nb03 = row_bytes * out_dim, + .ne10 = (int32_t)in_dim, + .ne11 = (int32_t)n_tok, + .ne12 = 1, + .nb10 = sizeof(float), + .nb11 = in_dim * sizeof(float), + .nb12 = in_dim * n_tok * sizeof(float), + .nb13 = in_dim * n_tok * sizeof(float), + .ne0 = (int32_t)out_dim, + .ne1 = (int32_t)n_tok, + .nr0 = 2, + .r2 = 1, + .r3 = 1, + }; + const uint64_t rows_ptg = (uint64_t)nsg * 2u; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:wbuf offset:(NSUInteger)inner_offset atIndex:1]; + [enc setBuffer:xbuf offset:ds4_gpu_tensor_offset(x) atIndex:2]; + [enc setBuffer:outbuf offset:ds4_gpu_tensor_offset(out) atIndex:3]; + [enc setThreadgroupMemoryLength:32 atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)out_dim + rows_ptg - 1u) / rows_ptg, + (NSUInteger)n_tok, + 1) + threadsPerThreadgroup:MTLSizeMake(32, (NSUInteger)nsg, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "Q4_K classic mul_mv")) return 0; + return 1; + } + } + + if (n_tok <= 8u && (in_dim % 128u) == 0) { + const int16_t nsg = 2; + const int16_t nxpsg = ds4_gpu_mv_ext_nxpsg(in_dim, n_tok); + const int16_t r1ptg = (n_tok == 1u) ? 1 : ds4_gpu_mv_ext_r1ptg(n_tok); + const char *fn_name = ds4_gpu_q4_mv_ext_name(weight_type, r1ptg); + id pipeline = + fn_name ? ds4_gpu_get_mul_mv_ext_pipeline(fn_name, nsg, nxpsg) : nil; + if (pipeline) { + const int16_t nypsg = 32 / nxpsg; + const uint64_t r0ptg = (uint64_t)nypsg * (uint64_t)nsg; + ds4_gpu_mul_mv_ext_args args = + ds4_gpu_make_mv_ext_args(in_dim, out_dim, n_tok, row_bytes, row_bytes); + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:wbuf offset:(NSUInteger)inner_offset atIndex:1]; + [enc setBuffer:xbuf offset:ds4_gpu_tensor_offset(x) atIndex:2]; + [enc setBuffer:outbuf offset:ds4_gpu_tensor_offset(out) atIndex:3]; + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)out_dim + (NSUInteger)r0ptg - 1u) / (NSUInteger)r0ptg, + ((NSUInteger)n_tok + (NSUInteger)r1ptg - 1u) / (NSUInteger)r1ptg, + 1) + threadsPerThreadgroup:MTLSizeMake(32, (NSUInteger)nsg, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "Q4 tensor mul_mv_ext")) return 0; + return 1; + } + } + + if (ds4_gpu_mpp_available() && + n_tok >= 32u && + (in_dim % 64u) == 0 && + (out_dim % 64u) == 0 && + (n_tok % 32u) == 0) { + uint64_t nax_tile_n = 32u; + if ((n_tok % 128u) == 0) { + nax_tile_n = 128u; + } else if ((n_tok % 64u) == 0) { + nax_tile_n = 64u; + } + const char *nax_fn = ds4_gpu_q4_nax_name(weight_type, nax_tile_n); + id pipeline = + nax_fn ? ds4_gpu_get_mul_mm_pipeline(nax_fn, false, false) : nil; + if (pipeline) { + ds4_gpu_mul_mm_args args = ds4_gpu_make_mm_args(in_dim, out_dim, n_tok, row_bytes); + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:wbuf offset:(NSUInteger)inner_offset atIndex:1]; + [enc setBuffer:xbuf offset:ds4_gpu_tensor_offset(x) atIndex:2]; + [enc setBuffer:outbuf offset:ds4_gpu_tensor_offset(out) atIndex:3]; + [enc setThreadgroupMemoryLength:64u * 32u * sizeof(uint16_t) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)(n_tok / nax_tile_n), + (NSUInteger)out_dim / 64u, + 1) + threadsPerThreadgroup:MTLSizeMake(128, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "Q4 NAX tensor matmul")) return 0; + return 1; + } + ds4_gpu_warn_mpp_fallback(); + } + + const char *mm_fn = ds4_gpu_q4_mm_name(weight_type); + const bool bc_inp = (in_dim % 32u) != 0; + const bool bc_out = (out_dim % 64u) != 0 || (n_tok % 32u) != 0; + id pipeline = + mm_fn ? ds4_gpu_get_mul_mm_pipeline(mm_fn, bc_inp, bc_out) : nil; + if (!pipeline) return 0; + + ds4_gpu_mul_mm_args args = ds4_gpu_make_mm_args(in_dim, out_dim, n_tok, row_bytes); + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:wbuf offset:(NSUInteger)inner_offset atIndex:1]; + [enc setBuffer:xbuf offset:ds4_gpu_tensor_offset(x) atIndex:2]; + [enc setBuffer:outbuf offset:ds4_gpu_tensor_offset(out) atIndex:3]; + [enc setThreadgroupMemoryLength:(bc_out ? 8192u : 6144u) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)n_tok + 31u) / 32u, + ((NSUInteger)out_dim + 63u) / 64u, + 1) + threadsPerThreadgroup:MTLSizeMake(128, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "Q4 tensor matmul")) return 0; + } + + return 1; +} + +int ds4_gpu_matmul_quant_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok) { + return ds4_gpu_matmul_quant_impl_tensor(out, + model_map, + model_size, + weight_offset, + weight_type, + in_dim, + out_dim, + x, + n_tok, + false, + false); +} + +int ds4_gpu_matmul_quant_decode_mpp_model_view_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok) { + /* GLM decode dense matvecs: the classic Q8_0 kernels stream 570-613 + * GB/s on the GLM shapes while the MPP/nax matrix path measures ~150 + * GB/s at n_tok=1 (TP decode 8.75 -> 16.64 t/s on the IQ2+Q8 gguf). + * MPP stays available as an opt-in via DS4_METAL_Q8_DECODE_MPP. */ + const bool prefer_mpp = getenv("DS4_METAL_Q8_DECODE_MPP") != NULL; + return ds4_gpu_matmul_quant_impl_tensor(out, + model_map, + model_size, + weight_offset, + weight_type, + in_dim, + out_dim, + x, + n_tok, + prefer_mpp, + true); +} + +int ds4_gpu_matmul_quant_rows_scalar_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok) { + return ds4_gpu_matmul_quant_tensor(out, + model_map, + model_size, + weight_offset, + weight_type, + in_dim, + out_dim, + x, + n_tok); +} + +int ds4_gpu_matmul_q8_0_rows_scalar_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok) { + if (n_tok == 1) { + return ds4_gpu_matmul_q8_0_tensor(out, + model_map, + model_size, + weight_offset, + in_dim, + out_dim, + x, + 1); + } + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!out || !x || !model_map || + n_tok == 0 || + (in_dim & 31u) != 0 || + in_dim > UINT32_MAX || out_dim > UINT32_MAX || n_tok > UINT32_MAX || + in_dim > UINT64_MAX / sizeof(float) || + out_dim > UINT64_MAX / sizeof(float)) { + return 0; + } + + const uint64_t x_row_bytes = in_dim * sizeof(float); + const uint64_t out_row_bytes = out_dim * sizeof(float); + if ((x_row_bytes != 0 && n_tok > UINT64_MAX / x_row_bytes) || + (out_row_bytes != 0 && n_tok > UINT64_MAX / out_row_bytes)) { + return 0; + } + + @autoreleasepool { + id xbuf = ds4_gpu_tensor_buffer(x); + id outbuf = ds4_gpu_tensor_buffer(out); + const uint64_t x_bytes = n_tok * x_row_bytes; + const uint64_t out_bytes = n_tok * out_row_bytes; + if (!xbuf || !outbuf || + ds4_gpu_tensor_bytes(x) < x_bytes || + ds4_gpu_tensor_bytes(out) < out_bytes) { + fprintf(stderr, "ds4: Metal Q8_0 scalar-row matmul received undersized activation buffers\n"); + return 0; + } + + const uint64_t blocks = in_dim / 32; + if (blocks > UINT64_MAX / 34u) return 0; + const uint64_t row_bytes = blocks * 34u; + if (out_dim > UINT64_MAX / row_bytes) return 0; + const uint64_t weight_bytes = out_dim * row_bytes; + if (weight_offset > model_size || weight_bytes > model_size - weight_offset) { + fprintf(stderr, "ds4: Metal Q8_0 scalar-row matmul range is outside the mapped model\n"); + return 0; + } + + uint64_t inner_offset = 0; + id wbuf = + ds4_gpu_wrap_model_range(model_map, model_size, weight_offset, weight_bytes, &inner_offset); + if (!wbuf) return 0; + + ds4_gpu_q8_0_matvec_args mv_args = ds4_gpu_make_q8_0_mv_args(in_dim, out_dim); + ds4_gpu_mv_dispatch mv_dispatch = ds4_gpu_make_q8_0_mv_dispatch(); + if (out_dim > 65536u) mv_dispatch.nsg = 8; + mv_args.nr0 = mv_dispatch.nr0; + id pipeline = + ds4_gpu_get_mul_mv_pipeline(mv_dispatch.function_name, mv_dispatch.nsg); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&mv_args length:sizeof(mv_args) atIndex:0]; + [enc setBuffer:wbuf offset:(NSUInteger)inner_offset atIndex:1]; + [enc setThreadgroupMemoryLength:mv_dispatch.smem atIndex:0]; + + const NSUInteger x_base = ds4_gpu_tensor_offset(x); + const NSUInteger out_base = ds4_gpu_tensor_offset(out); + for (uint64_t t = 0; t < n_tok; t++) { + [enc setBuffer:xbuf offset:x_base + (NSUInteger)(t * x_row_bytes) atIndex:2]; + [enc setBuffer:outbuf offset:out_base + (NSUInteger)(t * out_row_bytes) atIndex:3]; + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)out_dim + (NSUInteger)mv_dispatch.nr0 - 1u) / + (NSUInteger)mv_dispatch.nr0, + 1, + 1) + threadsPerThreadgroup:MTLSizeMake(32, (NSUInteger)mv_dispatch.nsg, 1)]; + } + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "Q8_0 scalar-row matvecs")) { + return 0; + } + } + + return 1; +} + int ds4_gpu_matmul_q8_0_pair_tensor( ds4_gpu_tensor *out0, ds4_gpu_tensor *out1, @@ -13557,7 +16376,7 @@ int ds4_gpu_matmul_q8_0_f16_out_tensor( return 0; } -int ds4_gpu_shared_gate_up_swiglu_q8_0_tensor( +static int ds4_gpu_shared_gate_up_swiglu_q8_0_impl( ds4_gpu_tensor *gate, ds4_gpu_tensor *up, ds4_gpu_tensor *mid, @@ -13568,9 +16387,12 @@ int ds4_gpu_shared_gate_up_swiglu_q8_0_tensor( uint64_t in_dim, uint64_t out_dim, const ds4_gpu_tensor *x, - float clamp) { + float clamp, + int store_gate_up, + bool force_model_view) { if (!g_initialized && !ds4_gpu_init()) return 0; - if (!gate || !up || !mid || !x || !model_map || + if (!mid || !x || !model_map || + (store_gate_up && (!gate || !up)) || (in_dim & 31u) != 0 || in_dim > UINT32_MAX || out_dim > UINT32_MAX || !isfinite(clamp) || clamp < 0.0f) { @@ -13579,15 +16401,17 @@ int ds4_gpu_shared_gate_up_swiglu_q8_0_tensor( @autoreleasepool { id xbuf = ds4_gpu_tensor_buffer(x); - id gatebuf = ds4_gpu_tensor_buffer(gate); - id upbuf = ds4_gpu_tensor_buffer(up); id midbuf = ds4_gpu_tensor_buffer(mid); + id gatebuf = store_gate_up ? + ds4_gpu_tensor_buffer(gate) : midbuf; + id upbuf = store_gate_up ? + ds4_gpu_tensor_buffer(up) : midbuf; const uint64_t x_bytes = in_dim * sizeof(float); const uint64_t out_bytes = out_dim * sizeof(float); if (!xbuf || !gatebuf || !upbuf || !midbuf || ds4_gpu_tensor_bytes(x) < x_bytes || - ds4_gpu_tensor_bytes(gate) < out_bytes || - ds4_gpu_tensor_bytes(up) < out_bytes || + (store_gate_up && ds4_gpu_tensor_bytes(gate) < out_bytes) || + (store_gate_up && ds4_gpu_tensor_bytes(up) < out_bytes) || ds4_gpu_tensor_bytes(mid) < out_bytes) { fprintf(stderr, "ds4: Metal shared expert fused gate/up received undersized activation buffers\n"); return 0; @@ -13602,6 +16426,231 @@ int ds4_gpu_shared_gate_up_swiglu_q8_0_tensor( return 0; } + const bool exact_decode_views = + !force_model_view && + getenv("DS4_METAL_ENABLE_Q8_DECODE_EXACT_VIEWS") != NULL && + getenv("DS4_METAL_DISABLE_Q8_DECODE_EXACT_VIEWS") == NULL; + uint64_t gate_inner = 0; + uint64_t up_inner = 0; + id gate_wbuf = exact_decode_views ? + ds4_gpu_wrap_model_exact_range(model_map, + model_size, + gate_offset, + weight_bytes, + &gate_inner) : + ds4_gpu_wrap_model_range(model_map, + model_size, + gate_offset, + weight_bytes, + &gate_inner); + id up_wbuf = exact_decode_views ? + ds4_gpu_wrap_model_exact_range(model_map, + model_size, + up_offset, + weight_bytes, + &up_inner) : + ds4_gpu_wrap_model_range(model_map, + model_size, + up_offset, + weight_bytes, + &up_inner); + if (!gate_wbuf || !up_wbuf) return 0; + + ds4_gpu_q8_0_matvec_args args = ds4_gpu_make_q8_0_mv_args(in_dim, out_dim); + ds4_gpu_mv_dispatch mv_dispatch = ds4_gpu_make_q8_0_mv_dispatch(); + args.nr0 = mv_dispatch.nr0; + const char *fn_name = store_gate_up ? + (mv_dispatch.nr0 >= 4 ? + "kernel_dsv4_shared_gate_up_swiglu_q8_0_r4" : + "kernel_dsv4_shared_gate_up_swiglu_q8_0") : + (mv_dispatch.nr0 >= 4 ? + "kernel_dsv4_shared_mid_swiglu_q8_0_r4" : + "kernel_dsv4_shared_mid_swiglu_q8_0"); + id pipeline = + ds4_gpu_get_mul_mv_pipeline(fn_name, mv_dispatch.nsg); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:gate_wbuf offset:(NSUInteger)gate_inner atIndex:1]; + [enc setBuffer:up_wbuf offset:(NSUInteger)up_inner atIndex:2]; + [enc setBuffer:xbuf offset:ds4_gpu_tensor_offset(x) atIndex:3]; + [enc setBuffer:gatebuf offset:(store_gate_up ? + ds4_gpu_tensor_offset(gate) : + ds4_gpu_tensor_offset(mid)) atIndex:4]; + [enc setBuffer:upbuf offset:(store_gate_up ? + ds4_gpu_tensor_offset(up) : + ds4_gpu_tensor_offset(mid)) atIndex:5]; + [enc setBuffer:midbuf offset:ds4_gpu_tensor_offset(mid) atIndex:6]; + [enc setBytes:&clamp length:sizeof(clamp) atIndex:7]; + [enc setThreadgroupMemoryLength:2u * mv_dispatch.smem atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)out_dim + (NSUInteger)mv_dispatch.nr0 - 1u) / + (NSUInteger)mv_dispatch.nr0, + 1, + 1) + threadsPerThreadgroup:MTLSizeMake(32, (NSUInteger)mv_dispatch.nsg, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, + owned, + store_gate_up ? + "shared expert fused gate/up" : + "shared expert fused mid")) { + return 0; + } + } + + return 1; +} + +int ds4_gpu_shared_gate_up_swiglu_q8_0_tensor( + ds4_gpu_tensor *gate, + ds4_gpu_tensor *up, + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + float clamp) { + return ds4_gpu_shared_gate_up_swiglu_q8_0_impl(gate, + up, + mid, + model_map, + model_size, + gate_offset, + up_offset, + in_dim, + out_dim, + x, + clamp, + 1, + false); +} + +int ds4_gpu_shared_mid_swiglu_q8_0_tensor( + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + float clamp) { + return ds4_gpu_shared_gate_up_swiglu_q8_0_impl(NULL, + NULL, + mid, + model_map, + model_size, + gate_offset, + up_offset, + in_dim, + out_dim, + x, + clamp, + 0, + true); +} + +int ds4_gpu_shared_gate_up_swiglu_q8_0_model_view_tensor( + ds4_gpu_tensor *gate, + ds4_gpu_tensor *up, + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + float clamp) { + return ds4_gpu_shared_gate_up_swiglu_q8_0_impl(gate, + up, + mid, + model_map, + model_size, + gate_offset, + up_offset, + in_dim, + out_dim, + x, + clamp, + 1, + true); +} + +int ds4_gpu_shared_gate_up_swiglu_q8_0_rows_tensor( + ds4_gpu_tensor *gate, + ds4_gpu_tensor *up, + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok, + float clamp) { + if (n_tok == 1) { + return ds4_gpu_shared_gate_up_swiglu_q8_0_tensor(gate, + up, + mid, + model_map, + model_size, + gate_offset, + up_offset, + in_dim, + out_dim, + x, + clamp); + } + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!gate || !up || !mid || !x || !model_map || + n_tok == 0 || + (in_dim & 31u) != 0 || (in_dim % 128u) != 0 || + in_dim > UINT32_MAX || out_dim > UINT32_MAX || n_tok > UINT32_MAX || + !isfinite(clamp) || clamp < 0.0f) { + return 0; + } + + const uint64_t mv_ext_max_tokens = + ds4_gpu_env_u64("DS4_METAL_Q8_MV_EXT_MAX_TOKENS", 16u, 2u, 128u); + if (n_tok > mv_ext_max_tokens) return 0; + + @autoreleasepool { + id xbuf = ds4_gpu_tensor_buffer(x); + id gatebuf = ds4_gpu_tensor_buffer(gate); + id upbuf = ds4_gpu_tensor_buffer(up); + id midbuf = ds4_gpu_tensor_buffer(mid); + const uint64_t x_bytes = n_tok * in_dim * sizeof(float); + const uint64_t out_bytes = n_tok * out_dim * sizeof(float); + if (!xbuf || !gatebuf || !upbuf || !midbuf || + ds4_gpu_tensor_bytes(x) < x_bytes || + ds4_gpu_tensor_bytes(gate) < out_bytes || + ds4_gpu_tensor_bytes(up) < out_bytes || + ds4_gpu_tensor_bytes(mid) < out_bytes) { + fprintf(stderr, "ds4: Metal fused Q8_0 gate/up rows received undersized activation buffers\n"); + return 0; + } + + const uint64_t blocks = in_dim / 32; + const uint64_t row_bytes = blocks * 34; + const uint64_t weight_bytes = out_dim * row_bytes; + if (gate_offset > model_size || weight_bytes > model_size - gate_offset || + up_offset > model_size || weight_bytes > model_size - up_offset) { + fprintf(stderr, "ds4: Metal fused Q8_0 gate/up rows range is outside the mapped model\n"); + return 0; + } + uint64_t gate_inner = 0; uint64_t up_inner = 0; id gate_wbuf = @@ -13610,14 +16659,19 @@ int ds4_gpu_shared_gate_up_swiglu_q8_0_tensor( ds4_gpu_wrap_model_range(model_map, model_size, up_offset, weight_bytes, &up_inner); if (!gate_wbuf || !up_wbuf) return 0; - ds4_gpu_q8_0_matvec_args args = ds4_gpu_make_q8_0_mv_args(in_dim, out_dim); - ds4_gpu_mv_dispatch mv_dispatch = ds4_gpu_make_q8_0_mv_dispatch(); - args.nr0 = mv_dispatch.nr0; + const int16_t nsg = 2; + const int16_t nxpsg = ds4_gpu_mv_ext_nxpsg(in_dim, n_tok); + const int16_t r1ptg = ds4_gpu_mv_ext_r1ptg(n_tok); + const char *fn_name = ds4_gpu_mv_ext_q8_pair_swiglu_name(r1ptg); id pipeline = - ds4_gpu_get_mul_mv_pipeline("kernel_dsv4_shared_gate_up_swiglu_q8_0", - mv_dispatch.nsg); + fn_name ? ds4_gpu_get_mul_mv_ext_pipeline(fn_name, nsg, nxpsg) : nil; if (!pipeline) return 0; + const int16_t nypsg = 32 / nxpsg; + const uint64_t r0ptg = (uint64_t)nypsg * (uint64_t)nsg; + ds4_gpu_mul_mv_ext_args args = + ds4_gpu_make_mv_ext_args(in_dim, out_dim, n_tok, 34, row_bytes); + int owned = 0; id cb = ds4_gpu_command_buffer(&owned); if (!cb) return 0; @@ -13632,15 +16686,142 @@ int ds4_gpu_shared_gate_up_swiglu_q8_0_tensor( [enc setBuffer:upbuf offset:ds4_gpu_tensor_offset(up) atIndex:5]; [enc setBuffer:midbuf offset:ds4_gpu_tensor_offset(mid) atIndex:6]; [enc setBytes:&clamp length:sizeof(clamp) atIndex:7]; - [enc setThreadgroupMemoryLength:2u * mv_dispatch.smem atIndex:0]; - [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)out_dim + (NSUInteger)mv_dispatch.nr0 - 1u) / - (NSUInteger)mv_dispatch.nr0, - 1, + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)out_dim + (NSUInteger)r0ptg - 1u) / + (NSUInteger)r0ptg, + ((NSUInteger)n_tok + (NSUInteger)r1ptg - 1u) / + (NSUInteger)r1ptg, 1) - threadsPerThreadgroup:MTLSizeMake(32, (NSUInteger)mv_dispatch.nsg, 1)]; + threadsPerThreadgroup:MTLSizeMake(32, (NSUInteger)nsg, 1)]; ds4_gpu_end_compute_encoder(cb, enc); - if (!ds4_gpu_finish_command_buffer(cb, owned, "shared expert fused gate/up")) { + if (!ds4_gpu_finish_command_buffer(cb, owned, "fused Q8_0 gate/up rows")) { + return 0; + } + } + + return 1; +} + +int ds4_gpu_shared_gate_up_swiglu_q8_0_rows_scalar_tensor( + ds4_gpu_tensor *gate, + ds4_gpu_tensor *up, + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t in_dim, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t n_tok, + float clamp) { + if (n_tok == 1) { + return ds4_gpu_shared_gate_up_swiglu_q8_0_tensor(gate, + up, + mid, + model_map, + model_size, + gate_offset, + up_offset, + in_dim, + out_dim, + x, + clamp); + } + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!gate || !up || !mid || !x || !model_map || + n_tok == 0 || + (in_dim & 31u) != 0 || + in_dim > UINT32_MAX || out_dim > UINT32_MAX || n_tok > UINT32_MAX || + in_dim > UINT64_MAX / sizeof(float) || + out_dim > UINT64_MAX / sizeof(float) || + !isfinite(clamp) || clamp < 0.0f) { + return 0; + } + + const uint64_t x_row_bytes = in_dim * sizeof(float); + const uint64_t out_row_bytes = out_dim * sizeof(float); + if ((x_row_bytes != 0 && n_tok > UINT64_MAX / x_row_bytes) || + (out_row_bytes != 0 && n_tok > UINT64_MAX / out_row_bytes)) { + return 0; + } + + @autoreleasepool { + id xbuf = ds4_gpu_tensor_buffer(x); + id gatebuf = ds4_gpu_tensor_buffer(gate); + id upbuf = ds4_gpu_tensor_buffer(up); + id midbuf = ds4_gpu_tensor_buffer(mid); + const uint64_t x_bytes = n_tok * x_row_bytes; + const uint64_t out_bytes = n_tok * out_row_bytes; + if (!xbuf || !gatebuf || !upbuf || !midbuf || + ds4_gpu_tensor_bytes(x) < x_bytes || + ds4_gpu_tensor_bytes(gate) < out_bytes || + ds4_gpu_tensor_bytes(up) < out_bytes || + ds4_gpu_tensor_bytes(mid) < out_bytes) { + fprintf(stderr, "ds4: Metal shared expert scalar-row fused gate/up received undersized activation buffers\n"); + return 0; + } + + const uint64_t blocks = in_dim / 32; + if (blocks > UINT64_MAX / 34u) return 0; + const uint64_t row_bytes = blocks * 34u; + if (out_dim > UINT64_MAX / row_bytes) return 0; + const uint64_t weight_bytes = out_dim * row_bytes; + if (gate_offset > model_size || weight_bytes > model_size - gate_offset || + up_offset > model_size || weight_bytes > model_size - up_offset) { + fprintf(stderr, "ds4: Metal shared expert scalar-row fused gate/up range is outside the mapped model\n"); + return 0; + } + + uint64_t gate_inner = 0; + uint64_t up_inner = 0; + id gate_wbuf = + ds4_gpu_wrap_model_range(model_map, model_size, gate_offset, weight_bytes, &gate_inner); + id up_wbuf = + ds4_gpu_wrap_model_range(model_map, model_size, up_offset, weight_bytes, &up_inner); + if (!gate_wbuf || !up_wbuf) return 0; + + ds4_gpu_q8_0_matvec_args args = ds4_gpu_make_q8_0_mv_args(in_dim, out_dim); + ds4_gpu_mv_dispatch mv_dispatch = ds4_gpu_make_q8_0_mv_dispatch(); + args.nr0 = mv_dispatch.nr0; + const char *fn_name = mv_dispatch.nr0 >= 4 ? + "kernel_dsv4_shared_gate_up_swiglu_q8_0_r4" : + "kernel_dsv4_shared_gate_up_swiglu_q8_0"; + id pipeline = + ds4_gpu_get_mul_mv_pipeline(fn_name, mv_dispatch.nsg); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:gate_wbuf offset:(NSUInteger)gate_inner atIndex:1]; + [enc setBuffer:up_wbuf offset:(NSUInteger)up_inner atIndex:2]; + [enc setBytes:&clamp length:sizeof(clamp) atIndex:7]; + [enc setThreadgroupMemoryLength:2u * mv_dispatch.smem atIndex:0]; + + const NSUInteger x_base = ds4_gpu_tensor_offset(x); + const NSUInteger gate_base = ds4_gpu_tensor_offset(gate); + const NSUInteger up_base = ds4_gpu_tensor_offset(up); + const NSUInteger mid_base = ds4_gpu_tensor_offset(mid); + for (uint64_t t = 0; t < n_tok; t++) { + const NSUInteger out_offset = (NSUInteger)(t * out_row_bytes); + [enc setBuffer:xbuf offset:x_base + (NSUInteger)(t * x_row_bytes) atIndex:3]; + [enc setBuffer:gatebuf offset:gate_base + out_offset atIndex:4]; + [enc setBuffer:upbuf offset:up_base + out_offset atIndex:5]; + [enc setBuffer:midbuf offset:mid_base + out_offset atIndex:6]; + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)out_dim + (NSUInteger)mv_dispatch.nr0 - 1u) / + (NSUInteger)mv_dispatch.nr0, + 1, + 1) + threadsPerThreadgroup:MTLSizeMake(32, (NSUInteger)mv_dispatch.nsg, 1)]; + } + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "shared expert scalar-row fused gate/up")) { return 0; } } @@ -13680,7 +16861,13 @@ int ds4_gpu_matmul_f16_tensor( } uint64_t inner_offset = 0; - id wbuf = ds4_gpu_wrap_model_range(model_map, model_size, weight_offset, weight_bytes, &inner_offset); + id wbuf = + ds4_gpu_wrap_f32_decode_model_range(model_map, + model_size, + weight_offset, + weight_bytes, + n_tok, + &inner_offset); if (!wbuf) return 0; int owned = 0; @@ -13918,7 +17105,11 @@ int ds4_gpu_matmul_f32_tensor( const ds4_gpu_tensor *x, uint64_t n_tok) { if (!g_initialized && !ds4_gpu_init()) return 0; - if (in_dim > UINT32_MAX || out_dim > UINT32_MAX || n_tok > UINT32_MAX) return 0; + if (in_dim > UINT32_MAX || out_dim > UINT32_MAX || n_tok == 0 || n_tok > UINT32_MAX) return 0; + if (in_dim > UINT64_MAX / n_tok / sizeof(float) || + out_dim > UINT64_MAX / n_tok / sizeof(float)) { + return 0; + } @autoreleasepool { id xbuf = ds4_gpu_tensor_buffer(x); @@ -13940,7 +17131,13 @@ int ds4_gpu_matmul_f32_tensor( } uint64_t inner_offset = 0; - id wbuf = ds4_gpu_wrap_model_range(model_map, model_size, weight_offset, weight_bytes, &inner_offset); + id wbuf = + ds4_gpu_wrap_f32_decode_model_range(model_map, + model_size, + weight_offset, + weight_bytes, + n_tok, + &inner_offset); if (!wbuf) return 0; int owned = 0; @@ -14004,7 +17201,33 @@ int ds4_gpu_matmul_f32_tensor( return 1; } - return 0; + /* Generic multi-row path (GLM prefill shapes: one grid row per + * token through the plain matvec pipeline). */ + { + ds4_gpu_q8_0_matvec_args mv_args = ds4_gpu_make_f32_mv_args(in_dim, out_dim, n_tok); + ds4_gpu_mv_dispatch mv_dispatch = ds4_gpu_make_plain_mv_dispatch(in_dim, 1); + mv_args.nr0 = mv_dispatch.nr0; + id pipeline = + ds4_gpu_get_mul_mv_pipeline(mv_dispatch.function_name, mv_dispatch.nsg); + if (!pipeline) return 0; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&mv_args length:sizeof(mv_args) atIndex:0]; + [enc setBuffer:wbuf offset:(NSUInteger)inner_offset atIndex:1]; + [enc setBuffer:xbuf offset:ds4_gpu_tensor_offset(x) atIndex:2]; + [enc setBuffer:outbuf offset:ds4_gpu_tensor_offset(out) atIndex:3]; + if (mv_dispatch.smem) { + [enc setThreadgroupMemoryLength:mv_dispatch.smem atIndex:0]; + } + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)out_dim + (NSUInteger)mv_dispatch.nr0 - 1u) / (NSUInteger)mv_dispatch.nr0, + (NSUInteger)n_tok, + 1) + threadsPerThreadgroup:MTLSizeMake(32, (NSUInteger)mv_dispatch.nsg, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "F32 tensor matmul")) return 0; + } } return 1; @@ -14180,8 +17403,23 @@ int ds4_gpu_rms_norm_weight_rows_tensor( return 0; } + const bool exact_decode_weight_view = + rows == 1u && + row_bytes <= (1ull << 20) && + getenv("DS4_METAL_ENABLE_DECODE_NORM_EXACT_VIEWS") != NULL && + getenv("DS4_METAL_DISABLE_DECODE_NORM_EXACT_VIEWS") == NULL; uint64_t inner_offset = 0; - id wbuf = ds4_gpu_wrap_model_range(model_map, model_size, weight_offset, row_bytes, &inner_offset); + id wbuf = exact_decode_weight_view ? + ds4_gpu_wrap_model_exact_range(model_map, + model_size, + weight_offset, + row_bytes, + &inner_offset) : + ds4_gpu_wrap_model_range(model_map, + model_size, + weight_offset, + row_bytes, + &inner_offset); if (!wbuf) return 0; ds4_gpu_rms_norm_args args = ds4_gpu_make_rms_norm_args(n, rows, eps); @@ -14207,6 +17445,80 @@ int ds4_gpu_rms_norm_weight_rows_tensor( return 1; } +int ds4_gpu_add_rms_norm_weight_tensor( + ds4_gpu_tensor *norm_out, + ds4_gpu_tensor *sum_out, + const ds4_gpu_tensor *a, + const ds4_gpu_tensor *b, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t n, + float eps) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!norm_out || !sum_out || !a || !b || n == 0 || (n & 3u) != 0) return 0; + + @autoreleasepool { + id abuf = ds4_gpu_tensor_buffer(a); + id bbuf = ds4_gpu_tensor_buffer(b); + id sumbuf = ds4_gpu_tensor_buffer(sum_out); + id normbuf = ds4_gpu_tensor_buffer(norm_out); + const uint64_t row_bytes = (uint64_t)n * sizeof(float); + if (!abuf || !bbuf || !sumbuf || !normbuf || + ds4_gpu_tensor_bytes(a) < row_bytes || + ds4_gpu_tensor_bytes(b) < row_bytes || + ds4_gpu_tensor_bytes(sum_out) < row_bytes || + ds4_gpu_tensor_bytes(norm_out) < row_bytes) { + fprintf(stderr, "ds4: Metal add+RMS norm received undersized activation buffers\n"); + return 0; + } + if (weight_offset > model_size || row_bytes > model_size - weight_offset) { + fprintf(stderr, "ds4: Metal add+RMS norm range is outside the mapped model\n"); + return 0; + } + + const bool exact_decode_weight_view = + row_bytes <= (1ull << 20) && + getenv("DS4_METAL_ENABLE_DECODE_NORM_EXACT_VIEWS") != NULL && + getenv("DS4_METAL_DISABLE_DECODE_NORM_EXACT_VIEWS") == NULL; + uint64_t inner_offset = 0; + id wbuf = exact_decode_weight_view ? + ds4_gpu_wrap_model_exact_range(model_map, + model_size, + weight_offset, + row_bytes, + &inner_offset) : + ds4_gpu_wrap_model_range(model_map, + model_size, + weight_offset, + row_bytes, + &inner_offset); + if (!wbuf) return 0; + + ds4_gpu_rms_norm_args args = ds4_gpu_make_rms_norm_args(n, 1, eps); + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:g_add_rms_norm_pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:abuf offset:ds4_gpu_tensor_offset(a) atIndex:1]; + [enc setBuffer:bbuf offset:ds4_gpu_tensor_offset(b) atIndex:2]; + [enc setBuffer:wbuf offset:(NSUInteger)inner_offset atIndex:3]; + [enc setBuffer:sumbuf offset:ds4_gpu_tensor_offset(sum_out) atIndex:4]; + [enc setBuffer:normbuf offset:ds4_gpu_tensor_offset(norm_out) atIndex:5]; + [enc setThreadgroupMemoryLength:32u * sizeof(float) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake(1, 1, 1) + threadsPerThreadgroup:MTLSizeMake(ds4_gpu_rms_norm_threads(n), 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "add+RMS norm")) return 0; + } + + return 1; +} + int ds4_gpu_dsv4_qkv_rms_norm_rows_tensor( ds4_gpu_tensor *q_out, const ds4_gpu_tensor *q, @@ -14695,50 +18007,20 @@ static int ds4_gpu_encode_add_f32_1d( uint32_t n) { if (!cb || !a || !b || !out || n == 0) return 0; - const uint64_t row_bytes = (uint64_t)n * sizeof(float); - ds4_gpu_bin_args args = { - .ne00 = (int32_t)n, - .ne01 = 1, - .ne02 = 1, - .ne03 = 1, - .nb00 = sizeof(float), - .nb01 = row_bytes, - .nb02 = row_bytes, - .nb03 = row_bytes, - .ne10 = (int32_t)n, - .ne11 = 1, - .ne12 = 1, - .ne13 = 1, - .nb10 = sizeof(float), - .nb11 = row_bytes, - .nb12 = row_bytes, - .nb13 = row_bytes, - .ne0 = (int32_t)n, - .ne1 = 1, - .ne2 = 1, - .ne3 = 1, - .nb0 = sizeof(float), - .nb1 = row_bytes, - .nb2 = row_bytes, - .nb3 = row_bytes, - .offs = 0, - .o1 = { 0 }, - }; - - NSUInteger nth_max = g_add_pipeline.maxTotalThreadsPerThreadgroup; - if (nth_max > 256u) nth_max = 256u; - NSUInteger nth = 1u; - while (2u * nth < (NSUInteger)n && nth < nth_max) { - nth *= 2u; - } + ds4_gpu_add_flat_args args = { .n = n }; + NSUInteger nth = g_add2_pipeline.maxTotalThreadsPerThreadgroup; + if (nth > 256u) nth = 256u; + if (nth > (NSUInteger)n) nth = (NSUInteger)n; + if (nth == 0u) nth = 1u; + const NSUInteger groups = ((NSUInteger)n + nth - 1u) / nth; id enc = ds4_gpu_compute_encoder(cb); - [enc setComputePipelineState:g_add_pipeline]; + [enc setComputePipelineState:g_add2_pipeline]; [enc setBytes:&args length:sizeof(args) atIndex:0]; [enc setBuffer:a offset:a_off atIndex:1]; [enc setBuffer:b offset:b_off atIndex:2]; [enc setBuffer:out offset:out_off atIndex:3]; - [enc dispatchThreadgroups:MTLSizeMake(1, 1, 1) + [enc dispatchThreadgroups:MTLSizeMake(groups, 1, 1) threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; ds4_gpu_end_compute_encoder(cb, enc); return 1; @@ -16959,7 +20241,8 @@ int ds4_gpu_attention_output_q8_batch_tensor( ds4_gpu_tensor_buffer(low), ds4_gpu_tensor_offset(low), 32u * 2u * sizeof(float), - 4) != 0; + 4, + true) != 0; } else { ds4_gpu_mul_mv_id_args args = { .nei0 = (int32_t)n_groups, @@ -17018,6 +20301,152 @@ int ds4_gpu_attention_output_q8_batch_tensor( } } +int ds4_gpu_attention_output_q4_K_batch_tensor( + ds4_gpu_tensor *out, + ds4_gpu_tensor *low, + ds4_gpu_tensor *group_tmp, + ds4_gpu_tensor *low_tmp, + const void *model_map, + uint64_t model_size, + uint64_t out_a_offset, + uint64_t out_b_offset, + uint32_t out_b_type, + uint64_t group_dim, + uint64_t rank, + uint32_t n_groups, + uint64_t out_dim, + const ds4_gpu_tensor *heads, + uint32_t n_tokens) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!out || !low || !heads || !model_map || + group_dim == 0 || rank == 0 || n_groups == 0 || out_dim == 0 || n_tokens == 0 || + group_dim > UINT32_MAX || rank > UINT32_MAX || out_dim > UINT32_MAX) { + return 0; + } + if (n_tokens < 32u) return 0; + + @autoreleasepool { + const uint64_t low_dim = (uint64_t)n_groups * rank; + if ((group_dim % 256u) != 0 || (low_dim % 256u) != 0 || low_dim > UINT32_MAX) { + return 0; + } + + uint64_t row_a_bytes = 0; + uint64_t row_b_bytes = 0; + if (!ds4_gpu_quant_row_bytes(DS4_METAL_TENSOR_Q4_K, (uint32_t)group_dim, &row_a_bytes) || + !ds4_gpu_quant_row_bytes(out_b_type, (uint32_t)low_dim, &row_b_bytes)) { + return 0; + } + + const uint64_t out_a_bytes = (uint64_t)n_groups * rank * row_a_bytes; + const uint64_t out_b_bytes = out_dim * row_b_bytes; + if (out_a_offset > model_size || out_a_bytes > model_size - out_a_offset || + out_b_offset > model_size || out_b_bytes > model_size - out_b_offset) { + fprintf(stderr, "ds4: Metal Q4 attention output batch weights are outside the mapped model\n"); + return 0; + } + + const uint64_t heads_bytes = (uint64_t)n_tokens * n_groups * group_dim * sizeof(float); + const uint64_t low_bytes = (uint64_t)n_tokens * low_dim * sizeof(float); + const uint64_t out_bytes = (uint64_t)n_tokens * out_dim * sizeof(float); + if (ds4_gpu_tensor_bytes(heads) < heads_bytes || + ds4_gpu_tensor_bytes(low) < low_bytes || + ds4_gpu_tensor_bytes(out) < out_bytes) { + fprintf(stderr, "ds4: Metal Q4 attention output batch received undersized buffers\n"); + return 0; + } + (void)group_tmp; + (void)low_tmp; + + const NSUInteger ids_bytes = (NSUInteger)n_tokens * (NSUInteger)n_groups * sizeof(int32_t); + id group_ids_buffer = nil; + if (getenv("DS4_METAL_DISABLE_ATTN_OUT_IDS_CACHE") != NULL) { + group_ids_buffer = + ds4_gpu_new_transient_buffer(ids_bytes, "attention output Q4 group ids"); + } else if (ds4_gpu_ensure_scratch_buffer(&g_attn_out_group_ids_buffer, + &g_attn_out_group_ids_bytes, + ids_bytes, + "ds4_attention_output_group_ids")) { + group_ids_buffer = g_attn_out_group_ids_buffer; + } + if (!group_ids_buffer) return 0; + + int32_t *ids = (int32_t *)[group_ids_buffer contents]; + for (uint32_t t = 0; t < n_tokens; t++) { + for (uint32_t group = 0; group < n_groups; group++) { + ids[(uint64_t)t * n_groups + group] = (int32_t)group; + } + } + + uint64_t out_a_inner = 0; + id out_a_buf = + ds4_gpu_wrap_model_range(model_map, model_size, + out_a_offset, out_a_bytes, + &out_a_inner); + if (!out_a_buf) return 0; + + const bool had_batch = g_batch_cb != nil; + if (!had_batch && ds4_gpu_begin_commands() == 0) return 0; + + bool ok = true; + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb || owned) ok = false; + + if (ok) { + ds4_gpu_mul_mm_id_map_args map_args = + ds4_gpu_make_mul_mm_id_map_args((uint32_t)group_dim, + n_groups, + n_groups, + n_groups, + n_tokens); + ds4_gpu_mul_mm_id_args mm_args = + ds4_gpu_make_mul_mm_id_args((uint32_t)group_dim, + (uint32_t)rank, + n_groups, + row_a_bytes, + (uint64_t)rank * row_a_bytes, + n_groups, + n_groups, + n_tokens); + id map_pipeline = + ds4_gpu_get_pipeline(ds4_gpu_mul_mm_id_map0_name(n_groups)); + id mm_pipeline = + ds4_gpu_get_mul_mm_id_pipeline("kernel_mul_mm_id_q4_K_f32", false); + ok = ds4_gpu_encode_mul_mm_id(cb, + map_pipeline, + mm_pipeline, + &map_args, + &mm_args, + out_a_buf, + (NSUInteger)out_a_inner, + ds4_gpu_tensor_buffer(heads), + ds4_gpu_tensor_offset(heads), + ds4_gpu_tensor_buffer(low), + ds4_gpu_tensor_offset(low), + group_ids_buffer, + 0) != 0; + } + + if (ok) { + ok = ds4_gpu_matmul_quant_tensor(out, + model_map, + model_size, + out_b_offset, + out_b_type, + low_dim, + out_dim, + low, + n_tokens) != 0; + } + + if (!had_batch) { + ok = ds4_gpu_end_commands() != 0 && ok; + } + return ok ? 1 : 0; + } +} + int ds4_gpu_attention_output_q8_batch_f16_tensor( ds4_gpu_tensor *out_h, ds4_gpu_tensor *low, @@ -17114,6 +20543,140 @@ int ds4_gpu_matmul_q8_0_kslice_tensor( } } +int ds4_gpu_matmul_quant_kslice_tensor( + ds4_gpu_tensor *out, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint64_t full_in_dim, + uint64_t k_off, + uint64_t k_cnt, + uint64_t out_dim, + const ds4_gpu_tensor *x, + uint64_t x_elem_off) { + if (weight_type == DS4_METAL_TENSOR_Q8_0) { + return ds4_gpu_matmul_q8_0_kslice_tensor(out, + model_map, + model_size, + weight_offset, + full_in_dim, + k_off, + k_cnt, + out_dim, + x, + x_elem_off); + } + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!out || !x || !model_map || + full_in_dim == 0 || k_cnt == 0 || out_dim == 0 || + k_off + k_cnt > full_in_dim || + full_in_dim > UINT32_MAX || k_cnt > UINT32_MAX || + out_dim > UINT32_MAX) { + return 0; + } + + uint64_t block_elems = 0; + uint64_t block_bytes = 0; + if (weight_type == DS4_METAL_TENSOR_Q4_K) { + block_elems = 256u; + block_bytes = 144u; + } else if (weight_type == DS4_METAL_TENSOR_Q4_0) { + block_elems = 32u; + block_bytes = 18u; + } else { + fprintf(stderr, "ds4: Metal quant kslice received unsupported type %u\n", weight_type); + return 0; + } + if ((full_in_dim % block_elems) != 0 || + (k_off % block_elems) != 0 || + (k_cnt % block_elems) != 0) { + fprintf(stderr, "ds4: Metal quant kslice dimensions are not block aligned\n"); + return 0; + } + + @autoreleasepool { + id xbuf = ds4_gpu_tensor_buffer(x); + id outbuf = ds4_gpu_tensor_buffer(out); + if (!xbuf || !outbuf || + ds4_gpu_tensor_bytes(x) < (x_elem_off + k_cnt) * sizeof(float) || + ds4_gpu_tensor_bytes(out) < out_dim * sizeof(float)) { + fprintf(stderr, "ds4: Metal quant kslice matmul received undersized buffers\n"); + return 0; + } + + const uint64_t row_bytes = (full_in_dim / block_elems) * block_bytes; + const uint64_t weight_bytes = out_dim * row_bytes; + if (weight_offset > model_size || weight_bytes > model_size - weight_offset) { + fprintf(stderr, "ds4: Metal quant kslice weights are outside the mapped model\n"); + return 0; + } + uint64_t inner = 0; + id wbuf = ds4_gpu_wrap_model_range(model_map, model_size, + weight_offset, weight_bytes, &inner); + if (!wbuf) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + if (weight_type == DS4_METAL_TENSOR_Q4_K && + (k_cnt % 256u) == 0 && + getenv("DS4_METAL_DISABLE_Q4_MV_CLASSIC") == NULL) { + const int16_t nsg = 2; + id pipeline = + ds4_gpu_get_mul_mv_ext_pipeline("kernel_mul_mv_q4_K_dense_f32", nsg, 8); + if (pipeline) { + ds4_gpu_q8_0_matvec_args args = { + .ne00 = (int32_t)k_cnt, + .ne01 = (int32_t)out_dim, + .ne02 = 1, + .nb00 = 1, + .nb01 = row_bytes, + .nb02 = row_bytes * out_dim, + .nb03 = row_bytes * out_dim, + .ne10 = (int32_t)k_cnt, + .ne11 = 1, + .ne12 = 1, + .nb10 = sizeof(float), + .nb11 = k_cnt * sizeof(float), + .nb12 = k_cnt * sizeof(float), + .nb13 = k_cnt * sizeof(float), + .ne0 = (int32_t)out_dim, + .ne1 = 1, + .nr0 = 2, + .r2 = 1, + .r3 = 1, + }; + const uint64_t rows_ptg = (uint64_t)nsg * 2u; + const uint64_t w_skip = (k_off / block_elems) * block_bytes; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:wbuf offset:(NSUInteger)(inner + w_skip) atIndex:1]; + [enc setBuffer:xbuf + offset:(NSUInteger)(ds4_gpu_tensor_offset(x) + x_elem_off * sizeof(float)) + atIndex:2]; + [enc setBuffer:outbuf offset:ds4_gpu_tensor_offset(out) atIndex:3]; + [enc setThreadgroupMemoryLength:32 atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)out_dim + rows_ptg - 1u) / rows_ptg, + 1, + 1) + threadsPerThreadgroup:MTLSizeMake(32, (NSUInteger)nsg, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "Q4_K kslice matvec")) return 0; + return 1; + } + } + + fprintf(stderr, "ds4: Metal quant kslice has no kernel for type %u\n", + weight_type); + return 0; + } +} + int ds4_gpu_attention_output_q8_tp_tensor( ds4_gpu_tensor *out, ds4_gpu_tensor *low, @@ -17203,7 +20766,8 @@ int ds4_gpu_attention_output_q8_tp_tensor( ds4_gpu_tensor_buffer(low), ds4_gpu_tensor_offset(low), 32u * 2u * sizeof(float), - 4); + 4, + true); if (!ok) return 0; /* Expand projection over the owned k window only; the result is this @@ -17306,7 +20870,124 @@ int ds4_gpu_attention_output_low_q8_tensor( ds4_gpu_tensor_buffer(low), ds4_gpu_tensor_offset(low), 32u * 2u * sizeof(float), - 4) != 0; + 4, + true) != 0; + } + + if (!had_batch) { + ok = ds4_gpu_end_commands() != 0 && ok; + } + return ok ? 1 : 0; + } +} + +int ds4_gpu_attention_output_low_q4_K_slice_tensor( + ds4_gpu_tensor *low, + const void *model_map, + uint64_t model_size, + uint64_t out_a_offset, + uint64_t group_dim, + uint64_t rank, + uint32_t group0, + uint32_t group_cnt, + const ds4_gpu_tensor *heads) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!low || !heads || !model_map || group_dim == 0 || rank == 0 || + group_cnt == 0 || group_dim > UINT32_MAX || rank > UINT32_MAX) { + return 0; + } + + @autoreleasepool { + if ((group_dim % 256u) != 0) { + fprintf(stderr, "ds4: Metal attention output low received invalid Q4_K dimensions\n"); + return 0; + } + + uint64_t row_a_bytes = 0; + if (!ds4_gpu_quant_row_bytes(DS4_METAL_TENSOR_Q4_K, + (uint32_t)group_dim, + &row_a_bytes)) { + return 0; + } + if (rank > UINT64_MAX / row_a_bytes) return 0; + const uint64_t group_weight_bytes = rank * row_a_bytes; + if (group0 > UINT64_MAX / group_weight_bytes || + group_cnt > UINT64_MAX / group_weight_bytes) { + return 0; + } + const uint64_t group_skip = (uint64_t)group0 * group_weight_bytes; + const uint64_t out_a_bytes = (uint64_t)group_cnt * group_weight_bytes; + if (out_a_offset > UINT64_MAX - group_skip || + out_a_offset + group_skip > model_size || + out_a_bytes > model_size - (out_a_offset + group_skip)) { + fprintf(stderr, "ds4: Metal Q4 attention output low weights are outside the mapped model\n"); + return 0; + } + + const uint64_t heads_bytes = (uint64_t)group_cnt * group_dim * sizeof(float); + const uint64_t low_bytes = (uint64_t)group_cnt * rank * sizeof(float); + if (ds4_gpu_tensor_bytes(heads) < heads_bytes || + ds4_gpu_tensor_bytes(low) < low_bytes) { + fprintf(stderr, "ds4: Metal Q4 attention output low received undersized buffers\n"); + return 0; + } + + uint64_t out_a_inner = 0; + id out_a_buf = + ds4_gpu_wrap_model_range(model_map, model_size, + out_a_offset + group_skip, + out_a_bytes, + &out_a_inner); + if (!out_a_buf) return 0; + + const bool had_batch = g_batch_cb != nil; + if (!had_batch && ds4_gpu_begin_commands() == 0) return 0; + + bool ok = true; + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb || owned) { + ok = false; + } + + if (ok) { + ds4_gpu_mul_mv_id_args args = { + .nei0 = (int32_t)group_cnt, + .nei1 = 1, + .nbi1 = 0, + .ne00 = (int32_t)group_dim, + .ne01 = (int32_t)rank, + .ne02 = (int32_t)group_cnt, + .nb00 = 1, + .nb01 = row_a_bytes, + .nb02 = group_weight_bytes, + .ne10 = (int32_t)group_dim, + .ne11 = (int32_t)group_cnt, + .ne12 = 1, + .ne13 = 1, + .nb10 = sizeof(float), + .nb11 = (uint64_t)group_dim * sizeof(float), + .nb12 = (uint64_t)group_cnt * group_dim * sizeof(float), + .ne0 = (int32_t)rank, + .ne1 = (int32_t)group_cnt, + .nb1 = (uint64_t)rank * sizeof(float), + .nr0 = 2, + }; + const NSUInteger nsg = 2; + id pipeline = + ds4_gpu_get_mul_mv_pipeline("kernel_dsv4_attn_out_low_q4_K_f32", (int16_t)nsg); + ok = ds4_gpu_encode_attn_out_low_q8_direct(cb, + pipeline, + &args, + out_a_buf, + (NSUInteger)out_a_inner, + ds4_gpu_tensor_buffer(heads), + ds4_gpu_tensor_offset(heads), + ds4_gpu_tensor_buffer(low), + ds4_gpu_tensor_offset(low), + 32u, + nsg, + false) != 0; } if (!had_batch) { @@ -17517,6 +21198,104 @@ static int ds4_gpu_encode_cpy_f32_f16_2d( return 1; } +static int ds4_gpu_encode_cpy_f32_f16_3d( + id cb, + id src, + NSUInteger src_off, + id dst, + NSUInteger dst_off, + uint32_t cols, + uint32_t rows, + uint32_t planes, + uint64_t src_row_stride, + uint64_t src_plane_stride, + uint64_t dst_row_stride, + uint64_t dst_plane_stride) { + if (!cb || !src || !dst || cols == 0 || rows == 0 || planes == 0) return 0; + + ds4_gpu_cpy_args args = { + .nk0 = (int64_t)cols, + .ne00 = (int64_t)cols, + .ne01 = (int64_t)rows, + .ne02 = (int64_t)planes, + .ne03 = 1, + .nb00 = sizeof(float), + .nb01 = src_row_stride, + .nb02 = src_plane_stride, + .nb03 = (uint64_t)planes * src_plane_stride, + .ne0 = (int64_t)cols, + .ne1 = (int64_t)rows, + .ne2 = (int64_t)planes, + .ne3 = 1, + .nb0 = sizeof(uint16_t), + .nb1 = dst_row_stride, + .nb2 = dst_plane_stride, + .nb3 = (uint64_t)planes * dst_plane_stride, + }; + const NSUInteger nth = ds4_gpu_cpy_threads(cols, g_cpy_f32_f16_pipeline); + const NSUInteger col_groups = ((NSUInteger)cols + nth - 1u) / nth; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:g_cpy_f32_f16_pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:src offset:src_off atIndex:1]; + [enc setBuffer:dst offset:dst_off atIndex:2]; + [enc dispatchThreadgroups:MTLSizeMake(col_groups * rows, planes, 1) + threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + return 1; +} + +static int ds4_gpu_encode_cpy_f16_f16_3d( + id cb, + id src, + NSUInteger src_off, + id dst, + NSUInteger dst_off, + uint32_t cols, + uint32_t rows, + uint32_t planes, + uint64_t src_row_stride, + uint64_t src_plane_stride, + uint64_t dst_row_stride, + uint64_t dst_plane_stride) { + if (!cb || !src || !dst || cols == 0 || rows == 0 || planes == 0) return 0; + + ds4_gpu_cpy_args args = { + .nk0 = (int64_t)cols, + .ne00 = (int64_t)cols, + .ne01 = (int64_t)rows, + .ne02 = (int64_t)planes, + .ne03 = 1, + .nb00 = sizeof(uint16_t), + .nb01 = src_row_stride, + .nb02 = src_plane_stride, + .nb03 = (uint64_t)planes * src_plane_stride, + .ne0 = (int64_t)cols, + .ne1 = (int64_t)rows, + .ne2 = (int64_t)planes, + .ne3 = 1, + .nb0 = sizeof(uint16_t), + .nb1 = dst_row_stride, + .nb2 = dst_plane_stride, + .nb3 = (uint64_t)planes * dst_plane_stride, + }; + const NSUInteger nth = ds4_gpu_cpy_threads(cols, g_cpy_f16_f16_pipeline); + const NSUInteger col_groups = ((NSUInteger)cols + nth - 1u) / nth; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:g_cpy_f16_f16_pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:src offset:src_off atIndex:1]; + [enc setBuffer:dst offset:dst_off atIndex:2]; + [enc dispatchThreadgroups:MTLSizeMake(col_groups * rows, planes, 1) + threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + return 1; +} + static int ds4_gpu_encode_cpy_f16_f32_1d( id cb, id src, @@ -17824,18 +21603,80 @@ static int ds4_gpu_encode_flash_attention_raw_heads( return 1; } -static void ds4_gpu_fill_raw_prefill_mask(uint16_t *mask, uint32_t n_tokens, uint32_t window) { +/* Rectangular causal/window mask for raw prefill: q covers rows + * [q_row0, q_row0 + n_q) of an n_kv-token block whose keys all live in + * rows [0, n_kv). The square prefill case is q_row0 == 0, n_q == n_kv. */ +static void ds4_gpu_fill_raw_prefill_mask( + uint16_t *mask, + uint32_t q_row0, + uint32_t n_q, + uint32_t n_kv, + uint32_t window) { const uint16_t neg_inf_half = 0xfc00u; - for (uint32_t q = 0; q < n_tokens; q++) { - uint16_t *row = mask + (uint64_t)q * n_tokens; - for (uint32_t k = 0; k < n_tokens; k++) { - const bool causal = k <= q; - const bool in_window = window == 0 || q - k < window; + for (uint32_t q = 0; q < n_q; q++) { + const uint32_t qpos = q_row0 + q; + uint16_t *row = mask + (uint64_t)q * n_kv; + for (uint32_t k = 0; k < n_kv; k++) { + const bool causal = k <= qpos; + const bool in_window = window == 0 || qpos - k < window; row[k] = causal && in_window ? 0u : neg_inf_half; } } } +static void ds4_gpu_fill_glm_prefill_mask( + uint16_t *mask, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_len) { + const uint16_t neg_inf_half = 0xfc00u; + for (uint32_t q = 0; q < n_tokens; q++) { + const uint32_t qpos = pos0 + q; + uint16_t *row = mask + (uint64_t)q * cache_len; + for (uint32_t k = 0; k < cache_len; k++) { + row[k] = k <= qpos ? 0u : neg_inf_half; + } + } +} + +static id ds4_gpu_glm_prefill_mask_buffer( + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_len, + NSUInteger mask_bytes) { + const int same_shape = + g_glm_flash_attn_mask_valid && + g_glm_flash_attn_mask_buffer && + g_glm_flash_attn_mask_bytes >= mask_bytes && + g_glm_flash_attn_mask_pos0 == pos0 && + g_glm_flash_attn_mask_tokens == n_tokens && + g_glm_flash_attn_mask_cache_len == cache_len; + if (same_shape) return g_glm_flash_attn_mask_buffer; + + if (g_glm_flash_attn_mask_buffer) { + [g_transient_buffers addObject:g_glm_flash_attn_mask_buffer]; + g_glm_flash_attn_mask_buffer = nil; + } + g_glm_flash_attn_mask_bytes = 0; + g_glm_flash_attn_mask_valid = 0; + if (!ds4_gpu_ensure_scratch_buffer(&g_glm_flash_attn_mask_buffer, + &g_glm_flash_attn_mask_bytes, + mask_bytes, + "ds4_glm_flash_attn_mask")) { + return nil; + } + + ds4_gpu_fill_glm_prefill_mask((uint16_t *)[g_glm_flash_attn_mask_buffer contents], + pos0, + n_tokens, + cache_len); + g_glm_flash_attn_mask_pos0 = pos0; + g_glm_flash_attn_mask_tokens = n_tokens; + g_glm_flash_attn_mask_cache_len = cache_len; + g_glm_flash_attn_mask_valid = 1; + return g_glm_flash_attn_mask_buffer; +} + static void ds4_gpu_fill_raw_decode_batch_mask( uint16_t *mask, uint32_t n_tokens, @@ -17888,29 +21729,40 @@ static void ds4_gpu_fill_mixed_decode_batch_mask( } } +/* Rectangular causal/window + compressed-key visibility mask: q covers rows + * [q_row0, q_row0 + n_q) of an n_tokens-token chunk whose raw keys all stay + * resident, followed by n_comp compressed keys. The square prefill case is + * q_row0 == 0, n_q == n_tokens. */ static void ds4_gpu_fill_static_mixed_prefill_mask( uint16_t *mask, + uint32_t q_row0, + uint32_t n_q, uint32_t n_tokens, uint32_t n_comp, uint32_t window, uint32_t ratio) { const uint16_t neg_inf_half = 0xfc00u; const uint32_t n_keys = n_tokens + n_comp; - for (uint32_t q = 0; q < n_tokens; q++) { + for (uint32_t q = 0; q < n_q; q++) { + const uint32_t qpos = q_row0 + q; uint16_t *row = mask + (uint64_t)q * n_keys; for (uint32_t k = 0; k < n_tokens; k++) { - const bool causal = k <= q; - const bool in_window = window == 0 || q - k < window; + const bool causal = k <= qpos; + const bool in_window = window == 0 || qpos - k < window; row[k] = causal && in_window ? 0u : neg_inf_half; } - const uint32_t n_visible = (q + 1u) / ratio; + const uint32_t n_visible = (qpos + 1u) / ratio; for (uint32_t c = 0; c < n_comp; c++) { row[n_tokens + c] = c < n_visible ? 0u : neg_inf_half; } } } +/* Static-mixed prefill FlashAttention over a rectangular problem: q holds + * n_q query rows for token positions [q_row0, q_row0 + n_q) of the chunk, + * while the keys stay full (all n_tokens raw rows plus n_comp compressed + * rows). The classic square prefill is q_row0 == 0, n_q == n_tokens. */ static int ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_nonvec_long( id __strong *cbp, ds4_gpu_tensor *heads, @@ -17922,6 +21774,8 @@ static int ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_nonvec_long uint32_t comp_kv_f16, const ds4_gpu_tensor *comp_mask, uint32_t use_comp_mask, + uint32_t q_row0, + uint32_t n_q, uint32_t n_tokens, uint32_t n_comp, uint32_t window, @@ -17930,7 +21784,7 @@ static int ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_nonvec_long uint32_t head_dim) { if (!cbp || !*cbp) return 0; id cb = *cbp; - if (head_dim != 512 || n_head == 0 || n_tokens == 0 || ratio == 0) { + if (head_dim != 512 || n_head == 0 || n_q == 0 || n_tokens == 0 || ratio == 0) { return 0; } @@ -17940,11 +21794,12 @@ static int ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_nonvec_long id compbuf = n_comp ? ds4_gpu_tensor_buffer(comp_kv) : rawbuf; id maskbuf = use_comp_mask ? ds4_gpu_tensor_buffer(comp_mask) : rawbuf; id headsbuf = ds4_gpu_tensor_buffer(heads); - const uint64_t q_bytes = (uint64_t)n_tokens * n_head * head_dim * sizeof(float); + const uint64_t q_bytes = (uint64_t)n_q * n_head * head_dim * sizeof(float); const uint64_t raw_bytes = (uint64_t)n_tokens * head_dim * sizeof(float); const uint64_t comp_bytes = (uint64_t)n_comp * head_dim * (comp_kv_f16 ? sizeof(uint16_t) : sizeof(float)); - const uint64_t comp_mask_bytes = use_comp_mask ? (uint64_t)n_comp * n_tokens * sizeof(float) : 0u; + const uint64_t comp_mask_bytes = use_comp_mask + ? (uint64_t)n_comp * (q_row0 + n_q) * sizeof(float) : 0u; if (!qbuf || !rawbuf || !compbuf || !maskbuf || !headsbuf || !sinks_buf || ds4_gpu_tensor_bytes(q) < q_bytes || ds4_gpu_tensor_bytes(raw_kv) < raw_bytes || @@ -17959,16 +21814,16 @@ static int ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_nonvec_long const uint32_t ncpsg = 64; const uint32_t nsg = head_dim >= 512 ? 8u : 4u; const bool has_kvpad = (n_keys % ncpsg) != 0; - const bool bc_mask = (n_tokens % nqptg) != 0; + const bool bc_mask = (n_q % nqptg) != 0; const NSUInteger row_bytes = (NSUInteger)head_dim * sizeof(float); const NSUInteger row_bytes_f16 = (NSUInteger)head_dim * sizeof(uint16_t); - const NSUInteger mask_bytes = (NSUInteger)n_keys * (NSUInteger)n_tokens * sizeof(uint16_t); + const NSUInteger mask_bytes = (NSUInteger)n_keys * (NSUInteger)n_q * sizeof(uint16_t); const NSUInteger kv_bytes = (NSUInteger)n_keys * row_bytes_f16; const NSUInteger pad_bytes = has_kvpad - ? (NSUInteger)ncpsg * (2u * row_bytes_f16 + (NSUInteger)n_tokens * sizeof(uint16_t)) + ? (NSUInteger)ncpsg * (2u * row_bytes_f16 + (NSUInteger)n_q * sizeof(uint16_t)) : 1u; const NSUInteger nblk0 = ((NSUInteger)n_keys + ncpsg - 1u) / ncpsg; - const NSUInteger nblk1 = ((NSUInteger)n_tokens + nqptg - 1u) / nqptg; + const NSUInteger nblk1 = ((NSUInteger)n_q + nqptg - 1u) / nqptg; const NSUInteger blk_bytes = ds4_gpu_align_up_ns(nblk0 * nblk1, 32u); id mask_buffer = ds4_gpu_new_transient_buffer(mask_bytes, "ds4_flash_attn_mask"); @@ -18004,7 +21859,7 @@ static int ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_nonvec_long #define DS4_METAL_PROFILE_FLASH_ATTN_STAGE(name) do { \ if (flash_stage_profile) { \ if (!ds4_gpu_flash_attn_stage_profile_boundary(cbp, \ - "static_mixed_nonvec", (name), n_tokens, n_comp, n_keys, \ + "static_mixed_nonvec", (name), n_q, n_comp, n_keys, \ n_head, head_dim, window, ratio, &flash_stage_t0)) { \ return 0; \ } \ @@ -18036,6 +21891,8 @@ static int ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_nonvec_long } ds4_gpu_fill_static_mixed_prefill_mask((uint16_t *)[mask_buffer contents], + q_row0, + n_q, n_tokens, n_comp, window, @@ -18044,11 +21901,12 @@ static int ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_nonvec_long if (use_comp_mask && n_comp != 0) { if (!ds4_gpu_encode_cpy_f32_f16_2d(cb, maskbuf, - ds4_gpu_tensor_offset(comp_mask), + ds4_gpu_tensor_offset(comp_mask) + + (NSUInteger)((uint64_t)q_row0 * n_comp * sizeof(float)), mask_buffer, (NSUInteger)n_tokens * sizeof(uint16_t), n_comp, - n_tokens, + n_q, (uint64_t)n_comp * sizeof(float), (uint64_t)n_keys * sizeof(uint16_t))) { return 0; @@ -18082,7 +21940,7 @@ static int ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_nonvec_long .nb21 = row_bytes_f16, .nb22 = (uint64_t)n_keys * row_bytes_f16, .nb23 = (uint64_t)n_keys * row_bytes_f16, - .ne31 = (int32_t)n_tokens, + .ne31 = (int32_t)n_q, .ne32 = 1, .ne33 = 1, .nb31 = (uint64_t)n_keys * sizeof(uint16_t), @@ -18104,9 +21962,9 @@ static int ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_nonvec_long } ds4_gpu_flash_attn_blk_args blk_args = { - .ne01 = (int32_t)n_tokens, + .ne01 = (int32_t)n_q, .ne30 = (int32_t)n_keys, - .ne31 = (int32_t)n_tokens, + .ne31 = (int32_t)n_q, .ne32 = 1, .ne33 = 1, .nb31 = (uint64_t)n_keys * sizeof(uint16_t), @@ -18126,12 +21984,12 @@ static int ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_nonvec_long DS4_METAL_PROFILE_FLASH_ATTN_STAGE("block_map"); ds4_gpu_flash_attn_vec_args args = { - .ne01 = (int32_t)n_tokens, + .ne01 = (int32_t)n_q, .ne02 = (int32_t)n_head, .ne03 = 1, .nb01 = (uint64_t)n_head * row_bytes, .nb02 = row_bytes, - .nb03 = (uint64_t)n_tokens * n_head * row_bytes, + .nb03 = (uint64_t)n_q * n_head * row_bytes, .ne11 = (int32_t)n_keys, .ne_12_2 = 1, .ne_12_3 = 1, @@ -18143,14 +22001,14 @@ static int ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_nonvec_long .nb21 = row_bytes_f16, .nb22 = (uint64_t)n_keys * row_bytes_f16, .nb23 = (uint64_t)n_keys * row_bytes_f16, - .ne31 = (int32_t)n_tokens, + .ne31 = (int32_t)n_q, .ne32 = 1, .ne33 = 1, .nb31 = (uint64_t)n_keys * sizeof(uint16_t), .nb32 = mask_bytes, .nb33 = mask_bytes, .ne1 = (int32_t)n_head, - .ne2 = (int32_t)n_tokens, + .ne2 = (int32_t)n_q, .ne3 = 1, .scale = 1.0f / sqrtf((float)head_dim), .max_bias = 0.0f, @@ -18310,6 +22168,8 @@ static int ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_vec( } ds4_gpu_fill_static_mixed_prefill_mask((uint16_t *)[mask_buffer contents], + 0, + n_tokens, n_tokens, n_comp, window, @@ -18463,13 +22323,17 @@ static int ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_nonvec( uint32_t comp_kv_f16, const ds4_gpu_tensor *comp_mask, uint32_t use_comp_mask, + uint32_t q_row0, + uint32_t n_q, uint32_t n_tokens, uint32_t n_comp, uint32_t window, uint32_t ratio, uint32_t n_head, uint32_t head_dim) { - if (n_tokens >= 20) { + /* The vector sibling below only handles the small square case; every + * rectangular (TP row-split) problem goes through the long path. */ + if (n_tokens >= 20 || q_row0 != 0 || n_q != n_tokens) { return ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_nonvec_long(cbp, heads, sinks_buf, @@ -18480,6 +22344,8 @@ static int ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_nonvec( comp_kv_f16, comp_mask, use_comp_mask, + q_row0, + n_q, n_tokens, n_comp, window, @@ -18505,6 +22371,10 @@ static int ds4_gpu_encode_flash_attention_prefill_static_mixed_heads_nonvec( head_dim); } +/* Raw prefill FlashAttention over a rectangular problem: q holds n_q query + * rows that correspond to token positions [q_row0, q_row0 + n_q) of the + * chunk, raw_kv holds all n_kv key rows, and heads receives one output row + * per query row. The classic square prefill is q_row0 == 0, n_q == n_kv. */ static int ds4_gpu_encode_flash_attention_prefill_raw_heads_nonvec( id __strong *cbp, ds4_gpu_tensor *heads, @@ -18512,21 +22382,23 @@ static int ds4_gpu_encode_flash_attention_prefill_raw_heads_nonvec( NSUInteger sinks_offset, const ds4_gpu_tensor *q, const ds4_gpu_tensor *raw_kv, - uint32_t n_tokens, + uint32_t q_row0, + uint32_t n_q, + uint32_t n_kv, uint32_t window, uint32_t n_head, uint32_t head_dim) { if (!cbp || !*cbp) return 0; id cb = *cbp; - if (head_dim != 512 || n_head == 0 || n_tokens == 0) { + if (head_dim != 512 || n_head == 0 || n_q == 0 || n_kv == 0) { return 0; } id qbuf = ds4_gpu_tensor_buffer(q); id rawbuf = ds4_gpu_tensor_buffer(raw_kv); id headsbuf = ds4_gpu_tensor_buffer(heads); - const uint64_t q_bytes = (uint64_t)n_tokens * n_head * head_dim * sizeof(float); - const uint64_t raw_bytes = (uint64_t)n_tokens * head_dim * sizeof(float); + const uint64_t q_bytes = (uint64_t)n_q * n_head * head_dim * sizeof(float); + const uint64_t raw_bytes = (uint64_t)n_kv * head_dim * sizeof(float); if (!qbuf || !rawbuf || !headsbuf || !sinks_buf || ds4_gpu_tensor_bytes(q) < q_bytes || ds4_gpu_tensor_bytes(raw_kv) < raw_bytes || @@ -18538,17 +22410,17 @@ static int ds4_gpu_encode_flash_attention_prefill_raw_heads_nonvec( const uint32_t nqptg = 8; const uint32_t ncpsg = 64; const uint32_t nsg = head_dim >= 512 ? 8u : 4u; - const bool has_kvpad = (n_tokens % ncpsg) != 0; - const bool bc_mask = (n_tokens % nqptg) != 0; + const bool has_kvpad = (n_kv % ncpsg) != 0; + const bool bc_mask = (n_q % nqptg) != 0; const NSUInteger row_bytes = (NSUInteger)head_dim * sizeof(float); const NSUInteger row_bytes_f16 = (NSUInteger)head_dim * sizeof(uint16_t); - const NSUInteger mask_bytes = (NSUInteger)n_tokens * (NSUInteger)n_tokens * sizeof(uint16_t); - const NSUInteger kv_bytes = (NSUInteger)n_tokens * row_bytes_f16; + const NSUInteger mask_bytes = (NSUInteger)n_q * (NSUInteger)n_kv * sizeof(uint16_t); + const NSUInteger kv_bytes = (NSUInteger)n_kv * row_bytes_f16; const NSUInteger pad_bytes = has_kvpad - ? (NSUInteger)ncpsg * (2u * row_bytes_f16 + (NSUInteger)n_tokens * sizeof(uint16_t)) + ? (NSUInteger)ncpsg * (2u * row_bytes_f16 + (NSUInteger)n_q * sizeof(uint16_t)) : 1u; - const NSUInteger nblk0 = ((NSUInteger)n_tokens + ncpsg - 1u) / ncpsg; - const NSUInteger nblk1 = ((NSUInteger)n_tokens + nqptg - 1u) / nqptg; + const NSUInteger nblk0 = ((NSUInteger)n_kv + ncpsg - 1u) / ncpsg; + const NSUInteger nblk1 = ((NSUInteger)n_q + nqptg - 1u) / nqptg; const NSUInteger blk_bytes = ds4_gpu_align_up_ns(nblk0 * nblk1, 32u); id mask_buffer = @@ -18585,7 +22457,7 @@ static int ds4_gpu_encode_flash_attention_prefill_raw_heads_nonvec( #define DS4_METAL_PROFILE_FLASH_ATTN_STAGE(name) do { \ if (flash_stage_profile) { \ if (!ds4_gpu_flash_attn_stage_profile_boundary(cbp, \ - "raw_nonvec", (name), n_tokens, 0, n_tokens, \ + "raw_nonvec", (name), n_q, 0, n_kv, \ n_head, head_dim, window, 0, &flash_stage_t0)) { \ return 0; \ } \ @@ -18593,7 +22465,7 @@ static int ds4_gpu_encode_flash_attention_prefill_raw_heads_nonvec( } \ } while (0) - ds4_gpu_fill_raw_prefill_mask((uint16_t *)[mask_buffer contents], n_tokens, window); + ds4_gpu_fill_raw_prefill_mask((uint16_t *)[mask_buffer contents], q_row0, n_q, n_kv, window); DS4_METAL_PROFILE_FLASH_ATTN_STAGE("mask_fill"); id pad_pipeline = nil; @@ -18616,26 +22488,26 @@ static int ds4_gpu_encode_flash_attention_prefill_raw_heads_nonvec( ds4_gpu_tensor_offset(raw_kv), g_flash_attn_kv_buffer, 0, - n_tokens * head_dim)) { + n_kv * head_dim)) { return 0; } DS4_METAL_PROFILE_FLASH_ATTN_STAGE("copy_raw"); if (has_kvpad) { ds4_gpu_flash_attn_pad_args pad_args = { - .ne11 = (int32_t)n_tokens, + .ne11 = (int32_t)n_kv, .ne_12_2 = 1, .ne_12_3 = 1, .nb11 = row_bytes_f16, - .nb12 = (uint64_t)n_tokens * row_bytes_f16, - .nb13 = (uint64_t)n_tokens * row_bytes_f16, + .nb12 = (uint64_t)n_kv * row_bytes_f16, + .nb13 = (uint64_t)n_kv * row_bytes_f16, .nb21 = row_bytes_f16, - .nb22 = (uint64_t)n_tokens * row_bytes_f16, - .nb23 = (uint64_t)n_tokens * row_bytes_f16, - .ne31 = (int32_t)n_tokens, + .nb22 = (uint64_t)n_kv * row_bytes_f16, + .nb23 = (uint64_t)n_kv * row_bytes_f16, + .ne31 = (int32_t)n_q, .ne32 = 1, .ne33 = 1, - .nb31 = (uint64_t)n_tokens * sizeof(uint16_t), + .nb31 = (uint64_t)n_kv * sizeof(uint16_t), .nb32 = mask_bytes, .nb33 = mask_bytes, }; @@ -18654,12 +22526,12 @@ static int ds4_gpu_encode_flash_attention_prefill_raw_heads_nonvec( } ds4_gpu_flash_attn_blk_args blk_args = { - .ne01 = (int32_t)n_tokens, - .ne30 = (int32_t)n_tokens, - .ne31 = (int32_t)n_tokens, + .ne01 = (int32_t)n_q, + .ne30 = (int32_t)n_kv, + .ne31 = (int32_t)n_q, .ne32 = 1, .ne33 = 1, - .nb31 = (uint64_t)n_tokens * sizeof(uint16_t), + .nb31 = (uint64_t)n_kv * sizeof(uint16_t), .nb32 = mask_bytes, .nb33 = mask_bytes, }; @@ -18675,31 +22547,31 @@ static int ds4_gpu_encode_flash_attention_prefill_raw_heads_nonvec( DS4_METAL_PROFILE_FLASH_ATTN_STAGE("block_map"); ds4_gpu_flash_attn_vec_args args = { - .ne01 = (int32_t)n_tokens, + .ne01 = (int32_t)n_q, .ne02 = (int32_t)n_head, .ne03 = 1, .nb01 = (uint64_t)n_head * row_bytes, .nb02 = row_bytes, - .nb03 = (uint64_t)n_tokens * n_head * row_bytes, - .ne11 = (int32_t)n_tokens, + .nb03 = (uint64_t)n_q * n_head * row_bytes, + .ne11 = (int32_t)n_kv, .ne_12_2 = 1, .ne_12_3 = 1, .ns10 = (int32_t)head_dim, .nb11 = row_bytes_f16, - .nb12 = (uint64_t)n_tokens * row_bytes_f16, - .nb13 = (uint64_t)n_tokens * row_bytes_f16, + .nb12 = (uint64_t)n_kv * row_bytes_f16, + .nb13 = (uint64_t)n_kv * row_bytes_f16, .ns20 = (int32_t)head_dim, .nb21 = row_bytes_f16, - .nb22 = (uint64_t)n_tokens * row_bytes_f16, - .nb23 = (uint64_t)n_tokens * row_bytes_f16, - .ne31 = (int32_t)n_tokens, + .nb22 = (uint64_t)n_kv * row_bytes_f16, + .nb23 = (uint64_t)n_kv * row_bytes_f16, + .ne31 = (int32_t)n_q, .ne32 = 1, .ne33 = 1, - .nb31 = (uint64_t)n_tokens * sizeof(uint16_t), + .nb31 = (uint64_t)n_kv * sizeof(uint16_t), .nb32 = mask_bytes, .nb33 = mask_bytes, .ne1 = (int32_t)n_head, - .ne2 = (int32_t)n_tokens, + .ne2 = (int32_t)n_q, .ne3 = 1, .scale = 1.0f / sqrtf((float)head_dim), .max_bias = 0.0f, @@ -18742,27 +22614,34 @@ static int ds4_gpu_encode_flash_attention_prefill_raw_heads( NSUInteger sinks_offset, const ds4_gpu_tensor *q, const ds4_gpu_tensor *raw_kv, - uint32_t n_tokens, + uint32_t q_row0, + uint32_t n_q, + uint32_t n_kv, uint32_t window, uint32_t n_head, uint32_t head_dim) { if (!cbp || !*cbp) return 0; id cb = *cbp; - if (head_dim != 512 || n_head == 0 || n_tokens == 0) { + if (head_dim != 512 || n_head == 0 || n_q == 0 || n_kv == 0) { return 0; } - if (n_tokens >= 20) { + /* The vector sibling below only handles the small square case; every + * rectangular (TP row-split) problem goes through the non-vector path. */ + if (n_kv >= 20 || q_row0 != 0 || n_q != n_kv) { return ds4_gpu_encode_flash_attention_prefill_raw_heads_nonvec(cbp, heads, sinks_buf, sinks_offset, q, raw_kv, - n_tokens, + q_row0, + n_q, + n_kv, window, n_head, head_dim); } + const uint32_t n_tokens = n_q; id qbuf = ds4_gpu_tensor_buffer(q); id rawbuf = ds4_gpu_tensor_buffer(raw_kv); @@ -18833,7 +22712,7 @@ static int ds4_gpu_encode_flash_attention_prefill_raw_heads( } \ } while (0) - ds4_gpu_fill_raw_prefill_mask((uint16_t *)[mask_buffer contents], n_tokens, window); + ds4_gpu_fill_raw_prefill_mask((uint16_t *)[mask_buffer contents], 0, n_tokens, n_tokens, window); DS4_METAL_PROFILE_FLASH_ATTN_STAGE("mask_fill"); id pad_pipeline = nil; @@ -19767,19 +23646,21 @@ static int ds4_gpu_encode_flash_attention_decode_mixed_batch_heads( return 1; } -int ds4_gpu_attention_prefill_raw_heads_tensor( +int ds4_gpu_attention_prefill_raw_heads_range_tensor( ds4_gpu_tensor *heads, const void *model_map, uint64_t model_size, uint64_t sinks_offset, const ds4_gpu_tensor *q, const ds4_gpu_tensor *raw_kv, - uint32_t n_tokens, + uint32_t q_row0, + uint32_t n_q, + uint32_t n_kv, uint32_t window, uint32_t n_head, uint32_t head_dim) { if (!g_initialized && !ds4_gpu_init()) return 0; - if (!heads || !q || !raw_kv || !model_map || n_tokens == 0) return 0; + if (!heads || !q || !raw_kv || !model_map || n_q == 0 || n_kv == 0) return 0; @autoreleasepool { if (sinks_offset > model_size || (uint64_t)n_head * sizeof(float) > model_size - sinks_offset) { @@ -19804,7 +23685,9 @@ int ds4_gpu_attention_prefill_raw_heads_tensor( (NSUInteger)sinks_inner, q, raw_kv, - n_tokens, + q_row0, + n_q, + n_kv, window, n_head, head_dim)) { @@ -19817,6 +23700,31 @@ int ds4_gpu_attention_prefill_raw_heads_tensor( return 1; } +int ds4_gpu_attention_prefill_raw_heads_tensor( + ds4_gpu_tensor *heads, + const void *model_map, + uint64_t model_size, + uint64_t sinks_offset, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *raw_kv, + uint32_t n_tokens, + uint32_t window, + uint32_t n_head, + uint32_t head_dim) { + return ds4_gpu_attention_prefill_raw_heads_range_tensor(heads, + model_map, + model_size, + sinks_offset, + q, + raw_kv, + 0, + n_tokens, + n_tokens, + window, + n_head, + head_dim); +} + int ds4_gpu_attention_decode_raw_batch_heads_tensor( ds4_gpu_tensor *heads, const void *model_map, @@ -20182,7 +24090,7 @@ int ds4_gpu_attention_indexed_mixed_batch_heads_tensor( return 1; } -int ds4_gpu_attention_prefill_static_mixed_heads_tensor( +int ds4_gpu_attention_prefill_static_mixed_heads_range_tensor( ds4_gpu_tensor *heads, const void *model_map, uint64_t model_size, @@ -20191,6 +24099,8 @@ int ds4_gpu_attention_prefill_static_mixed_heads_tensor( const ds4_gpu_tensor *raw_kv, const ds4_gpu_tensor *comp_kv, uint32_t comp_kv_f16, + uint32_t q_row0, + uint32_t n_q, uint32_t n_tokens, uint32_t n_comp, uint32_t window, @@ -20198,7 +24108,7 @@ int ds4_gpu_attention_prefill_static_mixed_heads_tensor( uint32_t n_head, uint32_t head_dim) { if (!g_initialized && !ds4_gpu_init()) return 0; - if (!heads || !q || !raw_kv || !model_map || n_tokens == 0 || + if (!heads || !q || !raw_kv || !model_map || n_q == 0 || n_tokens == 0 || ratio == 0 || (n_comp != 0 && !comp_kv)) { return 0; } @@ -20230,6 +24140,8 @@ int ds4_gpu_attention_prefill_static_mixed_heads_tensor( comp_kv_f16, NULL, 0, + q_row0, + n_q, n_tokens, n_comp, window, @@ -20245,6 +24157,39 @@ int ds4_gpu_attention_prefill_static_mixed_heads_tensor( return 1; } +int ds4_gpu_attention_prefill_static_mixed_heads_tensor( + ds4_gpu_tensor *heads, + const void *model_map, + uint64_t model_size, + uint64_t sinks_offset, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *raw_kv, + const ds4_gpu_tensor *comp_kv, + uint32_t comp_kv_f16, + uint32_t n_tokens, + uint32_t n_comp, + uint32_t window, + uint32_t ratio, + uint32_t n_head, + uint32_t head_dim) { + return ds4_gpu_attention_prefill_static_mixed_heads_range_tensor(heads, + model_map, + model_size, + sinks_offset, + q, + raw_kv, + comp_kv, + comp_kv_f16, + 0, + n_tokens, + n_tokens, + n_comp, + window, + ratio, + n_head, + head_dim); +} + int ds4_gpu_attention_prefill_masked_mixed_heads_tensor( ds4_gpu_tensor *heads, const void *model_map, @@ -20294,6 +24239,8 @@ int ds4_gpu_attention_prefill_masked_mixed_heads_tensor( comp_kv_f16, comp_mask, 1, + 0, + n_tokens, n_tokens, n_comp, window, @@ -20459,18 +24406,19 @@ int ds4_gpu_swiglu_tensor( .alpha = weight, .limit = clamp, }; - NSUInteger nth = g_swiglu_pipeline.maxTotalThreadsPerThreadgroup; - const NSUInteger ds4_nth = n > 1 ? (NSUInteger)n / 2u : 1u; - if (nth > ds4_nth) nth = ds4_nth; - if (nth == 0) nth = 1; + NSUInteger nth = g_swiglu_flat_pipeline.maxTotalThreadsPerThreadgroup; + if (nth > 256u) nth = 256u; + if (nth > (NSUInteger)n) nth = (NSUInteger)n; + if (nth == 0u) nth = 1u; + const NSUInteger groups = ((NSUInteger)n + nth - 1u) / nth; id enc = ds4_gpu_compute_encoder(cb); - [enc setComputePipelineState:g_swiglu_pipeline]; + [enc setComputePipelineState:g_swiglu_flat_pipeline]; [enc setBytes:&args length:sizeof(args) atIndex:0]; [enc setBuffer:gatebuf offset:ds4_gpu_tensor_offset(gate) atIndex:1]; [enc setBuffer:upbuf offset:ds4_gpu_tensor_offset(up) atIndex:2]; [enc setBuffer:outbuf offset:ds4_gpu_tensor_offset(out) atIndex:3]; - [enc dispatchThreadgroups:MTLSizeMake(1, 1, 1) + [enc dispatchThreadgroups:MTLSizeMake(groups, 1, 1) threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; ds4_gpu_end_compute_encoder(cb, enc); @@ -20505,49 +24453,20 @@ int ds4_gpu_add_tensor( id cb = ds4_gpu_command_buffer(&owned); if (!cb) return 0; - const uint64_t row_bytes = (uint64_t)n * sizeof(float); - ds4_gpu_bin_args args = { - .ne00 = (int32_t)n, - .ne01 = 1, - .ne02 = 1, - .ne03 = 1, - .nb00 = sizeof(float), - .nb01 = row_bytes, - .nb02 = row_bytes, - .nb03 = row_bytes, - .ne10 = (int32_t)n, - .ne11 = 1, - .ne12 = 1, - .ne13 = 1, - .nb10 = sizeof(float), - .nb11 = row_bytes, - .nb12 = row_bytes, - .nb13 = row_bytes, - .ne0 = (int32_t)n, - .ne1 = 1, - .ne2 = 1, - .ne3 = 1, - .nb0 = sizeof(float), - .nb1 = row_bytes, - .nb2 = row_bytes, - .nb3 = row_bytes, - .offs = 0, - .o1 = { 0 }, - }; - NSUInteger nth_max = g_add_pipeline.maxTotalThreadsPerThreadgroup; - if (nth_max > 256u) nth_max = 256u; - NSUInteger nth = 1; - while (2u * nth < (NSUInteger)args.ne0 && nth < nth_max) { - nth *= 2u; - } + ds4_gpu_add_flat_args args = { .n = n }; + NSUInteger nth = g_add2_pipeline.maxTotalThreadsPerThreadgroup; + if (nth > 256u) nth = 256u; + if (nth > (NSUInteger)n) nth = (NSUInteger)n; + if (nth == 0u) nth = 1u; + const NSUInteger groups = ((NSUInteger)n + nth - 1u) / nth; id enc = ds4_gpu_compute_encoder(cb); - [enc setComputePipelineState:g_add_pipeline]; + [enc setComputePipelineState:g_add2_pipeline]; [enc setBytes:&args length:sizeof(args) atIndex:0]; [enc setBuffer:abuf offset:ds4_gpu_tensor_offset(a) atIndex:1]; [enc setBuffer:bbuf offset:ds4_gpu_tensor_offset(b) atIndex:2]; [enc setBuffer:outbuf offset:ds4_gpu_tensor_offset(out) atIndex:3]; - [enc dispatchThreadgroups:MTLSizeMake(1, 1, 1) + [enc dispatchThreadgroups:MTLSizeMake(groups, 1, 1) threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; ds4_gpu_end_compute_encoder(cb, enc); @@ -20557,6 +24476,58 @@ int ds4_gpu_add_tensor( return 1; } +int ds4_gpu_add3_tensor( + ds4_gpu_tensor *out, + const ds4_gpu_tensor *a, + const ds4_gpu_tensor *b, + const ds4_gpu_tensor *c, + uint32_t n) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!out || !a || !b || !c || n == 0) return 0; + + @autoreleasepool { + id abuf = ds4_gpu_tensor_buffer(a); + id bbuf = ds4_gpu_tensor_buffer(b); + id cbuf = ds4_gpu_tensor_buffer(c); + id outbuf = ds4_gpu_tensor_buffer(out); + const uint64_t bytes = (uint64_t)n * sizeof(float); + if (!abuf || !bbuf || !cbuf || !outbuf || + ds4_gpu_tensor_bytes(a) < bytes || + ds4_gpu_tensor_bytes(b) < bytes || + ds4_gpu_tensor_bytes(c) < bytes || + ds4_gpu_tensor_bytes(out) < bytes) { + fprintf(stderr, "ds4: Metal tensor add3 received undersized buffers\n"); + return 0; + } + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_add_flat_args args = { .n = n }; + NSUInteger nth = g_add3_pipeline.maxTotalThreadsPerThreadgroup; + if (nth > 256u) nth = 256u; + if (nth > (NSUInteger)n) nth = (NSUInteger)n; + if (nth == 0u) nth = 1u; + const NSUInteger groups = ((NSUInteger)n + nth - 1u) / nth; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:g_add3_pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:abuf offset:ds4_gpu_tensor_offset(a) atIndex:1]; + [enc setBuffer:bbuf offset:ds4_gpu_tensor_offset(b) atIndex:2]; + [enc setBuffer:cbuf offset:ds4_gpu_tensor_offset(c) atIndex:3]; + [enc setBuffer:outbuf offset:ds4_gpu_tensor_offset(out) atIndex:4]; + [enc dispatchThreadgroups:MTLSizeMake(groups, 1, 1) + threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "tensor add3")) return 0; + } + + return 1; +} + typedef struct { uint32_t width; uint32_t rows; @@ -20854,10 +24825,86 @@ static const char *ds4_gpu_metal_tensor_type_name(uint32_t type) { case DS4_METAL_TENSOR_IQ2_XXS: return "iq2_xxs"; case DS4_METAL_TENSOR_Q2_K: return "q2_k"; case DS4_METAL_TENSOR_Q4_K: return "q4_k"; + case DS4_METAL_TENSOR_Q5_K: return "q5_k"; + case DS4_METAL_TENSOR_Q6_K: return "q6_k"; default: return "unknown"; } } +static const char *ds4_gpu_trim_env_value(const char *env, size_t *len_out) { + if (len_out) *len_out = 0; + if (!env) return NULL; + + while (isspace((unsigned char)*env)) env++; + size_t n = strlen(env); + while (n > 0 && isspace((unsigned char)env[n - 1])) n--; + if (len_out) *len_out = n; + return env; +} + +static bool ds4_gpu_profile_layer_value_match(const char *env, uint32_t layer_index) { + size_t env_len = 0; + env = ds4_gpu_trim_env_value(env, &env_len); + if (!env || env_len == 0) return true; + if (ds4_gpu_env_value_eq(env, env_len, "all")) return true; + + const char *p = env; + const char *end_env = env + env_len; + while (p < end_env) { + while (p < end_env && (*p == ' ' || *p == '\t' || *p == ',')) p++; + if (p >= end_env) break; + + char *end = NULL; + const unsigned long first = strtoul(p, &end, 10); + if (end == p || end > end_env || first > UINT32_MAX) return false; + + unsigned long last = first; + p = end; + if (p < end_env && *p == '-') { + p++; + last = strtoul(p, &end, 10); + if (end == p || end > end_env || last > UINT32_MAX) return false; + p = end; + } + + if (first <= layer_index && layer_index <= last) return true; + while (p < end_env && (*p == ' ' || *p == '\t')) p++; + if (p < end_env && *p != ',') return false; + } + return false; +} + +static bool ds4_gpu_stage_profile_enabled_for_layer(const char *flag_env_name, + const char *layer_env_name, + uint32_t layer_index) { + size_t flag_len = 0; + const char *flag = ds4_gpu_trim_env_value(getenv(flag_env_name), &flag_len); + if (!flag) return false; + + size_t layer_len = 0; + const char *layer = ds4_gpu_trim_env_value(getenv(layer_env_name), &layer_len); + const bool has_layer_filter = layer && layer_len != 0; + + if (flag_len != 0) { + if (ds4_gpu_env_value_eq(flag, flag_len, "0") || + ds4_gpu_env_value_eq(flag, flag_len, "false") || + ds4_gpu_env_value_eq(flag, flag_len, "no") || + ds4_gpu_env_value_eq(flag, flag_len, "off")) { + return false; + } + if (!has_layer_filter && + !ds4_gpu_env_value_eq(flag, flag_len, "1") && + !ds4_gpu_env_value_eq(flag, flag_len, "true") && + !ds4_gpu_env_value_eq(flag, flag_len, "yes") && + !ds4_gpu_env_value_eq(flag, flag_len, "on") && + !ds4_gpu_env_value_eq(flag, flag_len, "all")) { + return ds4_gpu_profile_layer_value_match(flag, layer_index); + } + } + + return ds4_gpu_profile_layer_value_match(layer, layer_index); +} + static NSUInteger ds4_gpu_routed_mv_smem(uint32_t type) { if (type == DS4_METAL_TENSOR_IQ2_XXS) { return 256u * sizeof(uint64_t) + 128u * sizeof(uint8_t); @@ -20882,6 +24929,21 @@ static id ds4_gpu_routed_mm_pipeline(uint32_t type) { return ds4_gpu_get_mul_mm_id_pipeline("kernel_mul_mm_id_q2_K_f32", false); case DS4_METAL_TENSOR_Q4_K: return ds4_gpu_get_mul_mm_id_pipeline("kernel_mul_mm_id_q4_K_f32", false); + case DS4_METAL_TENSOR_Q5_K: + return ds4_gpu_get_mul_mm_id_pipeline("kernel_mul_mm_id_q5_K_f32", false); + case DS4_METAL_TENSOR_Q6_K: + return ds4_gpu_get_mul_mm_id_pipeline("kernel_mul_mm_id_q6_K_f32", false); + default: + return nil; + } +} + +static id ds4_gpu_routed_mm_addr_pipeline(uint32_t type) { + switch (type) { + case DS4_METAL_TENSOR_Q2_K: + return ds4_gpu_get_mul_mm_id_pipeline("kernel_mul_mm_id_addr_q2_K_f32", false); + case DS4_METAL_TENSOR_Q4_K: + return ds4_gpu_get_mul_mm_id_pipeline("kernel_mul_mm_id_addr_q4_K_f32", false); default: return nil; } @@ -20895,6 +24957,21 @@ static id ds4_gpu_routed_mm_f16_rhs_pipeline(uint32_t t return ds4_gpu_get_mul_mm_id_pipeline("kernel_mul_mm_id_q2_K_f16", false); case DS4_METAL_TENSOR_Q4_K: return ds4_gpu_get_mul_mm_id_pipeline("kernel_mul_mm_id_q4_K_f16", false); + case DS4_METAL_TENSOR_Q5_K: + return ds4_gpu_get_mul_mm_id_pipeline("kernel_mul_mm_id_q5_K_f16", false); + case DS4_METAL_TENSOR_Q6_K: + return ds4_gpu_get_mul_mm_id_pipeline("kernel_mul_mm_id_q6_K_f16", false); + default: + return nil; + } +} + +static id ds4_gpu_routed_mm_addr_f16_rhs_pipeline(uint32_t type) { + switch (type) { + case DS4_METAL_TENSOR_Q2_K: + return ds4_gpu_get_mul_mm_id_pipeline("kernel_mul_mm_id_addr_q2_K_f16", false); + case DS4_METAL_TENSOR_Q4_K: + return ds4_gpu_get_mul_mm_id_pipeline("kernel_mul_mm_id_addr_q4_K_f16", false); default: return nil; } @@ -20952,13 +25029,20 @@ static int ds4_gpu_encode_attn_out_low_q8_direct( id dst, NSUInteger dst_off, NSUInteger threadgroup_bytes, - NSUInteger nsg) { + NSUInteger nsg, + bool rows_per_group_is_nr0) { if (!cb || !pipeline || !args || !src0 || !src1 || !dst || args->ne00 <= 0 || args->ne01 <= 0 || args->nei0 <= 0 || args->nei1 <= 0) { return 0; } - const NSUInteger rows_per_group = (NSUInteger)args->nr0; + /* Two row conventions in the classic matvec family: Q8_0 k-splits one + * nr0-row group across all nsg simdgroups (cross-simdgroup reduce), so a + * threadgroup covers nr0 rows; Q4_K gives each simdgroup its own nr0 + * rows, covering nr0*nsg. Dispatching Q8 with the Q4 stride leaves + * (nsg-1)/nsg of the output rows unwritten. */ + const NSUInteger rows_per_group = rows_per_group_is_nr0 ? + (NSUInteger)args->nr0 : (NSUInteger)args->nr0 * nsg; const NSUInteger row_groups = ((NSUInteger)args->ne01 + rows_per_group - 1u) / rows_per_group; const NSUInteger pairs = (NSUInteger)args->nei0 * (NSUInteger)args->nei1; @@ -21432,7 +25516,8 @@ static int ds4_gpu_encode_mul_mv_id_sum6( NSUInteger threadgroup_bytes, NSUInteger nsg) { if (!cb || !pipeline || !args || !src0 || !src1 || !dst || !ids || - args->ne00 <= 0 || args->ne01 <= 0 || args->nei0 != 6 || args->nei1 <= 0) { + args->ne00 <= 0 || args->ne01 <= 0 || + args->nei0 <= 0 || args->nei0 > 8 || args->nei1 <= 0) { return 0; } @@ -21733,7 +25818,9 @@ static int ds4_gpu_encode_mul_mv_addr_iq2_pair_swiglu( (n_entries == 0 && !overflow_gate) || !gate_addrs || !up_addrs || !src1 || !dst_a || !dst_b || !dst_mid || !ids || !weights || - args->ne00 <= 0 || args->ne01 <= 0 || args->nei0 != 6 || args->nei1 <= 0 || + args->ne00 <= 0 || args->ne01 <= 0 || + args->nei0 <= 0 || args->nei0 > DS4_METAL_MAX_ROUTED_EXPERT_USED || + args->nei1 <= 0 || args->ne02 <= 0 || args->ne02 > 384) { return 0; } @@ -21780,6 +25867,64 @@ static int ds4_gpu_encode_mul_mv_addr_iq2_pair_swiglu( return 1; } +static int ds4_gpu_encode_mul_mv_addr_iq2( + id cb, + id pipeline, + const ds4_gpu_mul_mv_id_args *args, + ds4_gpu_stream_expert_cache_entry * const *entries, + uint32_t n_entries, + id addrs, + id src1, + NSUInteger src1_off, + id dst, + NSUInteger dst_off, + id ids, + NSUInteger ids_off, + NSUInteger threadgroup_bytes, + NSUInteger nsg, + bool rows_per_group_is_nr0) { + if (!cb || !pipeline || !args || !entries || n_entries == 0 || + n_entries > DS4_METAL_MAX_ROUTED_EXPERT_USED || + !addrs || !src1 || !dst || !ids || + args->ne00 <= 0 || args->ne01 <= 0 || + args->nei0 <= 0 || args->nei0 > DS4_METAL_MAX_ROUTED_EXPERT_USED || + args->nei1 <= 0 || + args->ne02 <= 0 || args->ne02 > 384) { + return 0; + } + for (uint32_t i = 0; i < n_entries; i++) { + if (!entries[i] || !entries[i]->down_buffer) return 0; + } + if (!ds4_gpu_stream_expert_cache_mark_entries_inflight(entries, + n_entries, + 0)) { + return 0; + } + + const NSUInteger nr0 = (NSUInteger)args->nr0; + const NSUInteger rows_per_group = rows_per_group_is_nr0 ? nr0 : nr0 * nsg; + const NSUInteger row_groups = ((NSUInteger)args->ne01 + rows_per_group - 1u) / rows_per_group; + const NSUInteger pairs = (NSUInteger)args->nei0 * (NSUInteger)args->nei1; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:args length:sizeof(*args) atIndex:0]; + [enc setBuffer:addrs offset:0 atIndex:1]; + [enc setBuffer:src1 offset:src1_off atIndex:2]; + [enc setBuffer:dst offset:dst_off atIndex:3]; + [enc setBuffer:ids offset:ids_off atIndex:4]; + for (uint32_t i = 0; i < n_entries; i++) { + [enc useResource:entries[i]->down_buffer usage:MTLResourceUsageRead]; + } + if (threadgroup_bytes != 0) { + [enc setThreadgroupMemoryLength:threadgroup_bytes atIndex:0]; + } + [enc dispatchThreadgroups:MTLSizeMake(row_groups, 1, pairs) + threadsPerThreadgroup:MTLSizeMake(32, nsg, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + return 1; +} + static int ds4_gpu_encode_mul_mv_addr_q2_sum6( id cb, id pipeline, @@ -22244,7 +26389,8 @@ static int ds4_gpu_encode_mul_mm_id_mapped_tile( id src1, NSUInteger src1_off, id dst, - NSUInteger dst_off) { + NSUInteger dst_off, + NSUInteger threadgroup_bytes) { if (!cb || !mm_pipeline || !mm_args || !src0 || !src1 || !dst || !g_moe_id_map_buffer || mm_args->ne00 <= 0 || mm_args->ne0 <= 0 || @@ -22279,7 +26425,67 @@ static int ds4_gpu_encode_mul_mm_id_mapped_tile( if (use_resource_hints) { [enc useResource:src0 usage:MTLResourceUsageRead]; } - [enc setThreadgroupMemoryLength:8192u atIndex:0]; + [enc setThreadgroupMemoryLength:threadgroup_bytes atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)mm_args->ne21 + tile_n - 1u) / tile_n, + ((NSUInteger)mm_args->ne0 + 63u) / 64u, + (NSUInteger)mm_args->ne02) + threadsPerThreadgroup:MTLSizeMake(128, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + return 1; +} + +static int ds4_gpu_encode_mul_mm_id_addr_mapped_tile( + id cb, + id mm_pipeline, + const ds4_gpu_mul_mm_id_args *mm_args, + id src0_addrs, + id src1, + NSUInteger src1_off, + id dst, + NSUInteger dst_off, + NSUInteger threadgroup_bytes, + ds4_gpu_stream_expert_cache_entry * const *resources, + uint32_t resource_count, + uint32_t resource_kind, + id overflow_resource) { + if (!cb || !mm_pipeline || !mm_args || !src0_addrs || !src1 || !dst || + !g_moe_id_map_buffer || + mm_args->ne00 <= 0 || mm_args->ne0 <= 0 || + mm_args->ne20 <= 0 || mm_args->ne21 <= 0 || mm_args->ne02 <= 0) { + return 0; + } + + const NSUInteger tile_n = 32u; + const NSUInteger tpe_bytes = (NSUInteger)mm_args->ne02 * sizeof(int32_t); + const NSUInteger hids_bytes = + (NSUInteger)mm_args->ne02 * (NSUInteger)mm_args->ne21 * sizeof(int32_t); + if (tpe_bytes > NSUIntegerMax - hids_bytes || + g_moe_id_map_bytes < tpe_bytes + hids_bytes) { + return 0; + } + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:mm_pipeline]; + [enc setBytes:mm_args length:sizeof(*mm_args) atIndex:0]; + [enc setBuffer:src0_addrs offset:0 atIndex:1]; + [enc setBuffer:src1 offset:src1_off atIndex:2]; + [enc setBuffer:g_moe_id_map_buffer offset:0 atIndex:3]; + [enc setBuffer:g_moe_id_map_buffer offset:tpe_bytes atIndex:4]; + [enc setBuffer:dst offset:dst_off atIndex:5]; + [enc useResource:src0_addrs usage:MTLResourceUsageRead]; + for (uint32_t i = 0; resources && i < resource_count; i++) { + ds4_gpu_stream_expert_cache_entry *entry = resources[i]; + if (!entry) continue; + id b = + resource_kind == 0 ? entry->gate_buffer : + resource_kind == 1 ? entry->up_buffer : + entry->down_buffer; + if (b) [enc useResource:b usage:MTLResourceUsageRead]; + } + if (overflow_resource) { + [enc useResource:overflow_resource usage:MTLResourceUsageRead]; + } + [enc setThreadgroupMemoryLength:threadgroup_bytes atIndex:0]; [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)mm_args->ne21 + tile_n - 1u) / tile_n, ((NSUInteger)mm_args->ne0 + 63u) / 64u, (NSUInteger)mm_args->ne02) @@ -22356,7 +26562,8 @@ static int ds4_gpu_encode_mul_mm_id_mapped( src1, src1_off, dst, - dst_off); + dst_off, + 8192u); } static int ds4_gpu_encode_attn_out_low_q8_mpp( @@ -22415,18 +26622,19 @@ static int ds4_gpu_encode_swiglu_flat( .alpha = 1.0f, .limit = 0.0f, }; - NSUInteger nth = g_swiglu_pipeline.maxTotalThreadsPerThreadgroup; - const NSUInteger ds4_nth = n > 1 ? (NSUInteger)n / 2u : 1u; - if (nth > ds4_nth) nth = ds4_nth; - if (nth == 0) nth = 1u; + NSUInteger nth = g_swiglu_flat_pipeline.maxTotalThreadsPerThreadgroup; + if (nth > 256u) nth = 256u; + if (nth > (NSUInteger)n) nth = (NSUInteger)n; + if (nth == 0u) nth = 1u; + const NSUInteger groups = ((NSUInteger)n + nth - 1u) / nth; id enc = ds4_gpu_compute_encoder(cb); - [enc setComputePipelineState:g_swiglu_pipeline]; + [enc setComputePipelineState:g_swiglu_flat_pipeline]; [enc setBytes:&args length:sizeof(args) atIndex:0]; [enc setBuffer:gate offset:gate_off atIndex:1]; [enc setBuffer:up offset:up_off atIndex:2]; [enc setBuffer:out offset:out_off atIndex:3]; - [enc dispatchThreadgroups:MTLSizeMake(1, 1, 1) + [enc dispatchThreadgroups:MTLSizeMake(groups, 1, 1) threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; ds4_gpu_end_compute_encoder(cb, enc); return 1; @@ -22518,6 +26726,42 @@ static int ds4_gpu_encode_moe_sum6( return 1; } +static int ds4_gpu_encode_moe_sum8( + id cb, + id experts, + NSUInteger experts_off, + id out, + NSUInteger out_off, + uint32_t out_dim, + uint32_t n_tokens) { + if (!cb || !experts || !out || out_dim == 0 || n_tokens == 0) return 0; + + if (!g_moe_sum8_pipeline) return 0; + + const uint64_t out_row_bytes = (uint64_t)out_dim * sizeof(float); + ds4_gpu_dsv4_moe_sum6_args args = { + .width = out_dim, + .tokens = n_tokens, + .src_token_stride = 8u * out_row_bytes, + .dst_token_stride = out_row_bytes, + }; + + NSUInteger nth = g_moe_sum8_pipeline.maxTotalThreadsPerThreadgroup; + if (nth > 256u) nth = 256u; + if (nth > out_dim) nth = out_dim; + if (nth == 0) nth = 1u; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:g_moe_sum8_pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:experts offset:experts_off atIndex:1]; + [enc setBuffer:out offset:out_off atIndex:2]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_tokens, 1, 1) + threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + return 1; +} + static ds4_gpu_bin_args ds4_gpu_make_moe_add_args( uint32_t out_dim, uint32_t n_tokens, @@ -22579,6 +26823,17 @@ static int ds4_gpu_encode_moe_sum_experts( return 1; } + if (n_expert == 8 && + ds4_gpu_encode_moe_sum8(cb, + experts, + experts_off, + out, + out_off, + out_dim, + n_tokens)) { + return 1; + } + ds4_gpu_bin_args first = ds4_gpu_make_moe_add_args(out_dim, n_tokens, expert_token_stride, expert_token_stride, out_row_bytes); if (!ds4_gpu_encode_bin_f32_rows(cb, @@ -23050,6 +27305,5345 @@ static int ds4_gpu_encode_router_select( return 1; } +int ds4_gpu_glm_kv_lora_rms_norm_tensor( + ds4_gpu_tensor *out, + const ds4_gpu_tensor *kv_raw, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t n_tokens, + uint32_t kv_raw_dim, + uint32_t kv_lora_dim, + float eps) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!out || !kv_raw || !model_map || + n_tokens == 0 || kv_raw_dim == 0 || kv_lora_dim == 0 || + kv_lora_dim > kv_raw_dim || (kv_lora_dim & 3u) != 0 || + !isfinite(eps) || eps < 0.0f) { + return 0; + } + + @autoreleasepool { + id rawbuf = ds4_gpu_tensor_buffer(kv_raw); + id outbuf = ds4_gpu_tensor_buffer(out); + const uint64_t raw_bytes = (uint64_t)n_tokens * kv_raw_dim * sizeof(float); + const uint64_t out_bytes = (uint64_t)n_tokens * kv_lora_dim * sizeof(float); + const uint64_t weight_bytes = (uint64_t)kv_lora_dim * sizeof(float); + if (!rawbuf || !outbuf || + ds4_gpu_tensor_bytes(kv_raw) < raw_bytes || + ds4_gpu_tensor_bytes(out) < out_bytes) { + fprintf(stderr, "ds4: Metal GLM KV RMS norm received undersized buffers\n"); + return 0; + } + if (weight_offset > model_size || weight_bytes > model_size - weight_offset) { + fprintf(stderr, "ds4: Metal GLM KV RMS norm weight range is outside the mapped model\n"); + return 0; + } + + const bool exact_decode_weight_view = + n_tokens == 1u && + weight_bytes <= (1ull << 20) && + getenv("DS4_METAL_DISABLE_DECODE_NORM_EXACT_VIEWS") == NULL; + uint64_t weight_inner = 0; + id weightbuf = exact_decode_weight_view ? + ds4_gpu_wrap_model_exact_range(model_map, + model_size, + weight_offset, + weight_bytes, + &weight_inner) : + ds4_gpu_wrap_model_range(model_map, + model_size, + weight_offset, + weight_bytes, + &weight_inner); + if (!weightbuf) return 0; + + id pipeline = + ds4_gpu_hot_pipeline(g_glm_kv_lora_rms_norm_pipeline, + "kernel_glm_kv_lora_rms_norm"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_kv_lora_rms_norm_args args = { + .n_tokens = n_tokens, + .kv_raw_dim = kv_raw_dim, + .kv_lora_dim = kv_lora_dim, + .eps = eps, + }; + const NSUInteger nth = ds4_gpu_rms_norm_threads(kv_lora_dim); + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:rawbuf offset:ds4_gpu_tensor_offset(kv_raw) atIndex:1]; + [enc setBuffer:weightbuf offset:(NSUInteger)weight_inner atIndex:2]; + [enc setBuffer:outbuf offset:ds4_gpu_tensor_offset(out) atIndex:3]; + [enc setThreadgroupMemoryLength:nth * sizeof(float) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_tokens, 1, 1) + threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM KV RMS norm")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_k_b_project_typed_tensor( + ds4_gpu_tensor *out, + const ds4_gpu_tensor *kv_norm, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint32_t n_tokens, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t n_head) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!out || !kv_norm || !model_map || + n_tokens == 0 || kv_lora_dim == 0 || + qk_nope == 0 || n_head == 0) { + return 0; + } + + @autoreleasepool { + id outbuf = ds4_gpu_tensor_buffer(out); + id kvbuf = ds4_gpu_tensor_buffer(kv_norm); + uint64_t row_bytes = 0; + if (!ds4_gpu_quant_row_bytes(weight_type, qk_nope, &row_bytes)) { + fprintf(stderr, "ds4: Metal GLM k_b projection received unsupported weight type\n"); + return 0; + } + const uint64_t weight_rows = (uint64_t)n_head * kv_lora_dim; + const uint64_t weight_bytes = weight_rows * row_bytes; + const uint64_t kv_bytes = (uint64_t)n_tokens * kv_lora_dim * sizeof(float); + const uint64_t out_bytes = (uint64_t)n_tokens * n_head * qk_nope * sizeof(float); + if (!outbuf || !kvbuf || + ds4_gpu_tensor_bytes(kv_norm) < kv_bytes || + ds4_gpu_tensor_bytes(out) < out_bytes) { + fprintf(stderr, "ds4: Metal GLM k_b projection received undersized buffers\n"); + return 0; + } + if (weight_offset > model_size || weight_bytes > model_size - weight_offset) { + fprintf(stderr, "ds4: Metal GLM k_b projection range is outside the mapped model\n"); + return 0; + } + const NSUInteger q_blocks = ((NSUInteger)qk_nope + 31u) / 32u; + if (q_blocks > 8u) { + fprintf(stderr, "ds4: Metal GLM k_b projection q width is too large for the tiled kernel\n"); + return 0; + } + + uint64_t weight_inner = 0; + id weightbuf = + ds4_gpu_wrap_model_range(model_map, + model_size, + weight_offset, + weight_bytes, + &weight_inner); + if (!weightbuf) return 0; + + id pipeline = + ds4_gpu_hot_pipeline(g_glm_k_b_project_pipeline, + "kernel_glm_k_b_project_q8_0"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_k_b_project_args args = { + .n_tokens = n_tokens, + .kv_lora_dim = kv_lora_dim, + .qk_nope = qk_nope, + .n_head = n_head, + .row_bytes = (uint32_t)row_bytes, + .weight_type = weight_type, + .pad1 = 0, + .pad2 = 0, + }; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:weightbuf offset:(NSUInteger)weight_inner atIndex:1]; + [enc setBuffer:kvbuf offset:ds4_gpu_tensor_offset(kv_norm) atIndex:2]; + [enc setBuffer:outbuf offset:ds4_gpu_tensor_offset(out) atIndex:3]; + [enc setThreadgroupMemoryLength:(NSUInteger)kv_lora_dim * sizeof(float) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_tokens, (NSUInteger)n_head, 1) + threadsPerThreadgroup:MTLSizeMake(32, q_blocks, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM k_b projection")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_k_b_project_tensor( + ds4_gpu_tensor *out, + const ds4_gpu_tensor *kv_norm, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t n_tokens, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t n_head) { + return ds4_gpu_glm_k_b_project_typed_tensor(out, + kv_norm, + model_map, + model_size, + weight_offset, + DS4_METAL_TENSOR_Q8_0, + n_tokens, + kv_lora_dim, + qk_nope, + n_head); +} + +int ds4_gpu_glm_store_compact_kv_tensor( + ds4_gpu_tensor *kv_lora_cache, + ds4_gpu_tensor *k_rope_cache, + const ds4_gpu_tensor *kv_norm, + const ds4_gpu_tensor *kv_raw, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_cap, + uint32_t kv_raw_dim, + uint32_t kv_lora_dim, + uint32_t qk_rope, + bool cache_f16) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!kv_lora_cache || !k_rope_cache || !kv_norm || !kv_raw || + n_tokens == 0 || cache_cap == 0 || + kv_raw_dim == 0 || kv_lora_dim == 0 || qk_rope == 0 || + kv_lora_dim > kv_raw_dim || + qk_rope > kv_raw_dim - kv_lora_dim || + pos0 > cache_cap || n_tokens > cache_cap - pos0) { + return 0; + } + + @autoreleasepool { + id kvcachebuf = ds4_gpu_tensor_buffer(kv_lora_cache); + id ropecachebuf = ds4_gpu_tensor_buffer(k_rope_cache); + id kvnormbuf = ds4_gpu_tensor_buffer(kv_norm); + id kvrawbuf = ds4_gpu_tensor_buffer(kv_raw); + const uint64_t cache_elem_bytes = cache_f16 ? sizeof(uint16_t) : sizeof(float); + const uint64_t kv_cache_bytes = + (uint64_t)cache_cap * kv_lora_dim * cache_elem_bytes; + const uint64_t rope_cache_bytes = + (uint64_t)cache_cap * qk_rope * cache_elem_bytes; + const uint64_t kv_norm_bytes = + (uint64_t)n_tokens * kv_lora_dim * sizeof(float); + const uint64_t kv_raw_bytes = + (uint64_t)n_tokens * kv_raw_dim * sizeof(float); + if (!kvcachebuf || !ropecachebuf || !kvnormbuf || !kvrawbuf || + ds4_gpu_tensor_bytes(kv_lora_cache) < kv_cache_bytes || + ds4_gpu_tensor_bytes(k_rope_cache) < rope_cache_bytes || + ds4_gpu_tensor_bytes(kv_norm) < kv_norm_bytes || + ds4_gpu_tensor_bytes(kv_raw) < kv_raw_bytes) { + fprintf(stderr, "ds4: Metal GLM compact KV store received undersized buffers\n"); + return 0; + } + + id pipeline = + ds4_gpu_hot_pipeline(g_glm_store_compact_kv_pipeline, + "kernel_glm_store_compact_kv"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_store_compact_kv_args args = { + .pos0 = pos0, + .n_tokens = n_tokens, + .cache_cap = cache_cap, + .kv_raw_dim = kv_raw_dim, + .kv_lora_dim = kv_lora_dim, + .qk_rope = qk_rope, + .cache_f16 = cache_f16 ? 1u : 0u, + .pad1 = 0, + }; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:kvnormbuf offset:ds4_gpu_tensor_offset(kv_norm) atIndex:1]; + [enc setBuffer:kvrawbuf offset:ds4_gpu_tensor_offset(kv_raw) atIndex:2]; + [enc setBuffer:kvcachebuf offset:ds4_gpu_tensor_offset(kv_lora_cache) atIndex:3]; + [enc setBuffer:ropecachebuf offset:ds4_gpu_tensor_offset(k_rope_cache) atIndex:4]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_tokens, 2, 1) + threadsPerThreadgroup:MTLSizeMake(256, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM compact KV store")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_qkv_norm_store_compact_kv_tensor( + ds4_gpu_tensor *q_out, + const ds4_gpu_tensor *q, + const void *model_map, + uint64_t model_size, + uint64_t q_weight_offset, + uint32_t q_n, + ds4_gpu_tensor *kv_lora_cache, + ds4_gpu_tensor *k_rope_cache, + const ds4_gpu_tensor *kv_raw, + uint64_t kv_weight_offset, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_cap, + uint32_t kv_raw_dim, + uint32_t kv_lora_dim, + uint32_t qk_rope, + bool cache_f16, + float eps) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!q_out || !q || !kv_lora_cache || !k_rope_cache || !kv_raw || + !model_map || n_tokens == 0 || cache_cap == 0 || + q_n == 0 || kv_raw_dim == 0 || kv_lora_dim == 0 || qk_rope == 0 || + (q_n & 3u) != 0 || (kv_lora_dim & 3u) != 0 || + kv_lora_dim > kv_raw_dim || + qk_rope > kv_raw_dim - kv_lora_dim || + pos0 > cache_cap || n_tokens > cache_cap - pos0) { + return 0; + } + + @autoreleasepool { + id qbuf = ds4_gpu_tensor_buffer(q); + id qoutbuf = ds4_gpu_tensor_buffer(q_out); + id kvcachebuf = ds4_gpu_tensor_buffer(kv_lora_cache); + id ropecachebuf = ds4_gpu_tensor_buffer(k_rope_cache); + id kvrawbuf = ds4_gpu_tensor_buffer(kv_raw); + const uint64_t cache_elem_bytes = cache_f16 ? sizeof(uint16_t) : sizeof(float); + const uint64_t q_row_bytes = (uint64_t)q_n * sizeof(float); + const uint64_t kv_weight_bytes = (uint64_t)kv_lora_dim * sizeof(float); + const uint64_t kv_cache_bytes = + (uint64_t)cache_cap * kv_lora_dim * cache_elem_bytes; + const uint64_t rope_cache_bytes = + (uint64_t)cache_cap * qk_rope * cache_elem_bytes; + const uint64_t kv_raw_bytes = + (uint64_t)n_tokens * kv_raw_dim * sizeof(float); + if (!qbuf || !qoutbuf || !kvcachebuf || !ropecachebuf || !kvrawbuf || + ds4_gpu_tensor_bytes(q) < q_row_bytes * n_tokens || + ds4_gpu_tensor_bytes(q_out) < q_row_bytes * n_tokens || + ds4_gpu_tensor_bytes(kv_lora_cache) < kv_cache_bytes || + ds4_gpu_tensor_bytes(k_rope_cache) < rope_cache_bytes || + ds4_gpu_tensor_bytes(kv_raw) < kv_raw_bytes) { + fprintf(stderr, "ds4: Metal GLM fused q/kv norm compact store received undersized buffers\n"); + return 0; + } + if (q_weight_offset > model_size || q_row_bytes > model_size - q_weight_offset || + kv_weight_offset > model_size || kv_weight_bytes > model_size - kv_weight_offset) { + fprintf(stderr, "ds4: Metal GLM fused q/kv norm compact store weight range is outside the mapped model\n"); + return 0; + } + + uint64_t q_weight_inner = 0; + id q_weightbuf = ds4_gpu_wrap_model_range(model_map, model_size, + q_weight_offset, q_row_bytes, + &q_weight_inner); + if (!q_weightbuf) return 0; + uint64_t kv_weight_inner = 0; + id kv_weightbuf = ds4_gpu_wrap_model_range(model_map, model_size, + kv_weight_offset, kv_weight_bytes, + &kv_weight_inner); + if (!kv_weightbuf) return 0; + + id pipeline = + ds4_gpu_hot_pipeline(g_glm_qkv_norm_store_compact_kv_pipeline, + "kernel_glm_qkv_norm_store_compact_kv"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_qkv_norm_store_compact_kv_args args = { + .pos0 = pos0, + .n_tokens = n_tokens, + .cache_cap = cache_cap, + .q_n = q_n, + .q_n4 = q_n / 4u, + .kv_raw_dim = kv_raw_dim, + .kv_lora_dim = kv_lora_dim, + .kv_lora_n4 = kv_lora_dim / 4u, + .qk_rope = qk_rope, + .cache_f16 = cache_f16 ? 1u : 0u, + .eps = eps, + .pad0 = 0, + }; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:qbuf offset:ds4_gpu_tensor_offset(q) atIndex:1]; + [enc setBuffer:q_weightbuf offset:(NSUInteger)q_weight_inner atIndex:2]; + [enc setBuffer:qoutbuf offset:ds4_gpu_tensor_offset(q_out) atIndex:3]; + [enc setBuffer:kvrawbuf offset:ds4_gpu_tensor_offset(kv_raw) atIndex:4]; + [enc setBuffer:kv_weightbuf offset:(NSUInteger)kv_weight_inner atIndex:5]; + [enc setBuffer:kvcachebuf offset:ds4_gpu_tensor_offset(kv_lora_cache) atIndex:6]; + [enc setBuffer:ropecachebuf offset:ds4_gpu_tensor_offset(k_rope_cache) atIndex:7]; + [enc setThreadgroupMemoryLength:32u * sizeof(float) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_tokens, 3, 1) + threadsPerThreadgroup:MTLSizeMake(ds4_gpu_rms_norm_threads(q_n), 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM fused q/kv norm compact store")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_store_indexer_k_tensor( + ds4_gpu_tensor *indexer_key_cache, + const ds4_gpu_tensor *raw_k, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint64_t bias_offset, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_cap, + uint32_t head_dim, + uint32_t rot_dim, + uint32_t n_ctx_orig, + float eps, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow, + bool cache_f16) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!indexer_key_cache || !raw_k || !model_map || + n_tokens == 0 || cache_cap == 0 || + head_dim == 0 || rot_dim == 0 || + rot_dim > head_dim || (rot_dim & 1u) != 0 || + pos0 > cache_cap || n_tokens > cache_cap - pos0) { + return 0; + } + + @autoreleasepool { + id cachebuf = ds4_gpu_tensor_buffer(indexer_key_cache); + id rawbuf = ds4_gpu_tensor_buffer(raw_k); + const uint64_t cache_elem_bytes = cache_f16 ? sizeof(uint16_t) : sizeof(float); + const uint64_t cache_bytes = + (uint64_t)cache_cap * head_dim * cache_elem_bytes; + const uint64_t raw_bytes = + (uint64_t)n_tokens * head_dim * sizeof(float); + const uint64_t norm_bytes = (uint64_t)head_dim * sizeof(float); + if (!cachebuf || !rawbuf || + ds4_gpu_tensor_bytes(indexer_key_cache) < cache_bytes || + ds4_gpu_tensor_bytes(raw_k) < raw_bytes) { + fprintf(stderr, "ds4: Metal GLM indexer K store received undersized buffers\n"); + return 0; + } + if (weight_offset > model_size || norm_bytes > model_size - weight_offset || + bias_offset > model_size || norm_bytes > model_size - bias_offset) { + fprintf(stderr, "ds4: Metal GLM indexer K norm range is outside the mapped model\n"); + return 0; + } + + uint64_t weight_inner = 0; + uint64_t bias_inner = 0; + id weightbuf = + ds4_gpu_wrap_model_range(model_map, model_size, + weight_offset, norm_bytes, + &weight_inner); + id biasbuf = + ds4_gpu_wrap_model_range(model_map, model_size, + bias_offset, norm_bytes, + &bias_inner); + if (!weightbuf || !biasbuf) return 0; + + id pipeline = + ds4_gpu_hot_pipeline(g_glm_store_indexer_k_pipeline, + "kernel_glm_store_indexer_k"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_store_indexer_k_args args = { + .pos0 = pos0, + .n_tokens = n_tokens, + .cache_cap = cache_cap, + .head_dim = head_dim, + .rot_dim = rot_dim, + .n_ctx_orig = n_ctx_orig, + .cache_f16 = cache_f16 ? 1u : 0u, + .pad0 = 0, + .eps = eps, + .freq_base = freq_base, + .freq_scale = freq_scale, + .ext_factor = ext_factor, + .attn_factor = attn_factor, + .beta_fast = beta_fast, + .beta_slow = beta_slow, + .pad1 = 0.0f, + }; + const NSUInteger nth = ds4_gpu_rms_norm_threads(head_dim); + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:rawbuf offset:ds4_gpu_tensor_offset(raw_k) atIndex:1]; + [enc setBuffer:weightbuf offset:(NSUInteger)weight_inner atIndex:2]; + [enc setBuffer:biasbuf offset:(NSUInteger)bias_inner atIndex:3]; + [enc setBuffer:cachebuf offset:ds4_gpu_tensor_offset(indexer_key_cache) atIndex:4]; + [enc setThreadgroupMemoryLength:nth * sizeof(float) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_tokens, 1, 1) + threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM indexer K store")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_build_kv_cache_tensor( + ds4_gpu_tensor *key_cache, + ds4_gpu_tensor *value_cache, + const ds4_gpu_tensor *kv_raw, + const ds4_gpu_tensor *k_nope, + const ds4_gpu_tensor *value, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_cap, + uint32_t n_head, + uint32_t kv_raw_dim, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t value_dim, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow, + bool cache_f16) { + if (!g_initialized && !ds4_gpu_init()) return 0; + const uint32_t qk_dim = qk_nope + qk_rope; + if (!key_cache || !value_cache || !kv_raw || !k_nope || !value || + n_tokens == 0 || cache_cap == 0 || n_head == 0 || + kv_raw_dim == 0 || kv_lora_dim == 0 || + qk_nope == 0 || qk_rope == 0 || value_dim == 0 || + kv_lora_dim + qk_rope > kv_raw_dim || + qk_dim < qk_nope || (qk_rope & 1u) != 0 || + pos0 > cache_cap || n_tokens > cache_cap - pos0 || + !isfinite(freq_base) || freq_base <= 0.0f || + !isfinite(freq_scale) || freq_scale <= 0.0f || + !isfinite(ext_factor) || !isfinite(attn_factor) || + !isfinite(beta_fast) || !isfinite(beta_slow)) { + return 0; + } + + @autoreleasepool { + id keybuf = ds4_gpu_tensor_buffer(key_cache); + id valbuf = ds4_gpu_tensor_buffer(value_cache); + id rawbuf = ds4_gpu_tensor_buffer(kv_raw); + id knbuf = ds4_gpu_tensor_buffer(k_nope); + id vbuf = ds4_gpu_tensor_buffer(value); + const uint64_t cache_elem_bytes = cache_f16 ? sizeof(uint16_t) : sizeof(float); + const uint64_t key_bytes = (uint64_t)cache_cap * n_head * qk_dim * cache_elem_bytes; + const uint64_t cache_value_bytes = (uint64_t)cache_cap * n_head * value_dim * cache_elem_bytes; + const uint64_t raw_bytes = (uint64_t)n_tokens * kv_raw_dim * sizeof(float); + const uint64_t kn_bytes = (uint64_t)n_tokens * n_head * qk_nope * sizeof(float); + const uint64_t value_bytes = (uint64_t)n_tokens * n_head * value_dim * sizeof(float); + if (!keybuf || !valbuf || !rawbuf || !knbuf || !vbuf || + ds4_gpu_tensor_bytes(key_cache) < key_bytes || + ds4_gpu_tensor_bytes(value_cache) < cache_value_bytes || + ds4_gpu_tensor_bytes(kv_raw) < raw_bytes || + ds4_gpu_tensor_bytes(k_nope) < kn_bytes || + ds4_gpu_tensor_bytes(value) < value_bytes) { + fprintf(stderr, "ds4: Metal GLM KV cache builder received undersized buffers\n"); + return 0; + } + + const bool decode_group4 = + n_tokens == 1u && + n_head >= 4u && + ds4_gpu_env_bool("DS4_METAL_DISABLE_GLM_DECODE_KV_GROUP4") <= 0; + id pipeline = + decode_group4 ? + ds4_gpu_hot_pipeline(g_glm_build_kv_cache_decode_group4_pipeline, + "kernel_glm_build_kv_cache_decode_group4") : + ds4_gpu_hot_pipeline(g_glm_build_kv_cache_pipeline, + "kernel_glm_build_kv_cache"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_build_kv_cache_args args = { + .pos0 = pos0, + .n_tokens = n_tokens, + .cache_cap = cache_cap, + .n_head = n_head, + .kv_raw_dim = kv_raw_dim, + .kv_lora_dim = kv_lora_dim, + .qk_nope = qk_nope, + .qk_rope = qk_rope, + .value_dim = value_dim, + .n_ctx_orig = n_ctx_orig, + .cache_f16 = cache_f16 ? 1u : 0u, + .pad0 = 0u, + .freq_base = freq_base, + .freq_scale = freq_scale, + .ext_factor = ext_factor, + .attn_factor = attn_factor, + .beta_fast = beta_fast, + .beta_slow = beta_slow, + }; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:rawbuf offset:ds4_gpu_tensor_offset(kv_raw) atIndex:1]; + [enc setBuffer:knbuf offset:ds4_gpu_tensor_offset(k_nope) atIndex:2]; + [enc setBuffer:vbuf offset:ds4_gpu_tensor_offset(value) atIndex:3]; + [enc setBuffer:keybuf offset:ds4_gpu_tensor_offset(key_cache) atIndex:4]; + [enc setBuffer:valbuf offset:ds4_gpu_tensor_offset(value_cache) atIndex:5]; + const NSUInteger group_y = decode_group4 ? + ((NSUInteger)n_head + 3u) / 4u : + (NSUInteger)n_head; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_tokens, group_y, 1) + threadsPerThreadgroup:MTLSizeMake(256, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM KV cache build")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_build_kv_cache_flash_tensor( + ds4_gpu_tensor *key_cache, + ds4_gpu_tensor *value_cache, + const ds4_gpu_tensor *kv_raw, + const ds4_gpu_tensor *k_nope, + const ds4_gpu_tensor *value, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_cap, + uint32_t n_head, + uint32_t kv_raw_dim, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t value_dim, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow, + bool cache_f16) { + if (!g_initialized && !ds4_gpu_init()) return 0; + const uint32_t qk_dim = qk_nope + qk_rope; + if (!key_cache || !value_cache || !kv_raw || !k_nope || !value || + pos0 != 0 || n_tokens == 0 || cache_cap == 0 || n_head == 0 || + kv_raw_dim == 0 || kv_lora_dim == 0 || + qk_nope == 0 || qk_rope == 0 || value_dim == 0 || + kv_lora_dim + qk_rope > kv_raw_dim || + qk_dim < qk_nope || (qk_rope & 1u) != 0 || + n_tokens > cache_cap || + !isfinite(freq_base) || freq_base <= 0.0f || + !isfinite(freq_scale) || freq_scale <= 0.0f || + !isfinite(ext_factor) || !isfinite(attn_factor) || + !isfinite(beta_fast) || !isfinite(beta_slow)) { + return 0; + } + + @autoreleasepool { + id keybuf = ds4_gpu_tensor_buffer(key_cache); + id valbuf = ds4_gpu_tensor_buffer(value_cache); + id rawbuf = ds4_gpu_tensor_buffer(kv_raw); + id knbuf = ds4_gpu_tensor_buffer(k_nope); + id vbuf = ds4_gpu_tensor_buffer(value); + const uint64_t cache_elem_bytes = cache_f16 ? sizeof(uint16_t) : sizeof(float); + const uint64_t key_bytes = (uint64_t)cache_cap * n_head * qk_dim * cache_elem_bytes; + const uint64_t cache_value_bytes = (uint64_t)cache_cap * n_head * value_dim * cache_elem_bytes; + const uint64_t raw_bytes = (uint64_t)n_tokens * kv_raw_dim * sizeof(float); + const uint64_t kn_bytes = (uint64_t)n_tokens * n_head * qk_nope * sizeof(float); + const uint64_t value_bytes = (uint64_t)n_tokens * n_head * value_dim * sizeof(float); + if (!keybuf || !valbuf || !rawbuf || !knbuf || !vbuf || + ds4_gpu_tensor_bytes(key_cache) < key_bytes || + ds4_gpu_tensor_bytes(value_cache) < cache_value_bytes || + ds4_gpu_tensor_bytes(kv_raw) < raw_bytes || + ds4_gpu_tensor_bytes(k_nope) < kn_bytes || + ds4_gpu_tensor_bytes(value) < value_bytes) { + fprintf(stderr, "ds4: Metal GLM staged KV cache builder received undersized buffers\n"); + return 0; + } + + const NSUInteger q_row_bytes_f16 = (NSUInteger)qk_dim * sizeof(uint16_t); + const NSUInteger v_row_bytes_f16 = (NSUInteger)value_dim * sizeof(uint16_t); + const NSUInteger key_f16_offset = 0; + const NSUInteger key_f16_bytes = + (NSUInteger)n_tokens * (NSUInteger)n_head * q_row_bytes_f16; + const NSUInteger value_f16_offset = key_f16_bytes; + const NSUInteger value_f16_bytes = + (NSUInteger)n_tokens * (NSUInteger)n_head * v_row_bytes_f16; + const NSUInteger kv_f16_bytes = key_f16_bytes + value_f16_bytes; + if (!ds4_gpu_ensure_scratch_buffer(&g_flash_attn_kv_buffer, + &g_flash_attn_kv_bytes, + kv_f16_bytes, + "ds4_glm_flash_attn_kv_f16")) { + return 0; + } + + id pipeline = + ds4_gpu_hot_pipeline(g_glm_build_kv_cache_flash_pipeline, + "kernel_glm_build_kv_cache_flash"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_build_kv_cache_args args = { + .pos0 = pos0, + .n_tokens = n_tokens, + .cache_cap = cache_cap, + .n_head = n_head, + .kv_raw_dim = kv_raw_dim, + .kv_lora_dim = kv_lora_dim, + .qk_nope = qk_nope, + .qk_rope = qk_rope, + .value_dim = value_dim, + .n_ctx_orig = n_ctx_orig, + .cache_f16 = cache_f16 ? 1u : 0u, + .pad0 = 0u, + .freq_base = freq_base, + .freq_scale = freq_scale, + .ext_factor = ext_factor, + .attn_factor = attn_factor, + .beta_fast = beta_fast, + .beta_slow = beta_slow, + }; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:rawbuf offset:ds4_gpu_tensor_offset(kv_raw) atIndex:1]; + [enc setBuffer:knbuf offset:ds4_gpu_tensor_offset(k_nope) atIndex:2]; + [enc setBuffer:vbuf offset:ds4_gpu_tensor_offset(value) atIndex:3]; + [enc setBuffer:keybuf offset:ds4_gpu_tensor_offset(key_cache) atIndex:4]; + [enc setBuffer:valbuf offset:ds4_gpu_tensor_offset(value_cache) atIndex:5]; + [enc setBuffer:g_flash_attn_kv_buffer offset:key_f16_offset atIndex:6]; + [enc setBuffer:g_flash_attn_kv_buffer offset:value_f16_offset atIndex:7]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_tokens, (NSUInteger)n_head, 1) + threadsPerThreadgroup:MTLSizeMake(256, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM staged KV cache build")) return 0; + } + + return 1; +} + +static int ds4_gpu_glm_attention_flash_tensor_impl( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *key_cache, + const ds4_gpu_tensor *value_cache, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_len, + uint32_t cache_cap, + uint32_t n_head, + uint32_t qk_dim, + uint32_t value_dim, + bool cache_f16, + int kv_pre_staged) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!heads || !q || !key_cache || !value_cache || + n_tokens == 0 || cache_len == 0 || cache_cap == 0 || + n_head == 0 || qk_dim != 256u || value_dim != 256u || + cache_len > cache_cap || + pos0 > cache_len || n_tokens > cache_len - pos0 || + cache_len > ds4_gpu_glm_flash_attention_max_cache_len()) { + return 0; + } + + @autoreleasepool { + id headsbuf = ds4_gpu_tensor_buffer(heads); + id qbuf = ds4_gpu_tensor_buffer(q); + id keybuf = ds4_gpu_tensor_buffer(key_cache); + id valbuf = ds4_gpu_tensor_buffer(value_cache); + const uint64_t heads_bytes = (uint64_t)n_tokens * n_head * value_dim * sizeof(float); + const uint64_t q_bytes = (uint64_t)n_tokens * n_head * qk_dim * sizeof(float); + const uint64_t cache_elem_bytes = cache_f16 ? sizeof(uint16_t) : sizeof(float); + const uint64_t key_bytes = (uint64_t)cache_cap * n_head * qk_dim * cache_elem_bytes; + const uint64_t value_bytes = (uint64_t)cache_cap * n_head * value_dim * cache_elem_bytes; + if (!headsbuf || !qbuf || !keybuf || !valbuf || + ds4_gpu_tensor_bytes(heads) < heads_bytes || + ds4_gpu_tensor_bytes(q) < q_bytes || + ds4_gpu_tensor_bytes(key_cache) < key_bytes || + ds4_gpu_tensor_bytes(value_cache) < value_bytes) { + fprintf(stderr, "ds4: Metal GLM FlashAttention received undersized buffers\n"); + return 0; + } + const uint64_t key_elems = (uint64_t)cache_len * n_head * qk_dim; + const uint64_t value_elems = (uint64_t)cache_len * n_head * value_dim; + if (key_elems > UINT32_MAX || value_elems > UINT32_MAX) { + return 0; + } + + const uint32_t nqptg = 8; + const uint32_t ncpsg = 64; + const uint32_t nsg = 4; + const bool has_kvpad = (cache_len % ncpsg) != 0; + const bool bc_mask = (n_tokens % nqptg) != 0; + const NSUInteger q_row_bytes = (NSUInteger)qk_dim * sizeof(float); + const NSUInteger q_row_bytes_f16 = (NSUInteger)qk_dim * sizeof(uint16_t); + const NSUInteger v_row_bytes = (NSUInteger)value_dim * sizeof(float); + const NSUInteger v_row_bytes_f16 = (NSUInteger)value_dim * sizeof(uint16_t); + const NSUInteger mask_bytes = (NSUInteger)n_tokens * (NSUInteger)cache_len * sizeof(uint16_t); + const NSUInteger key_f16_offset = 0; + const NSUInteger key_f16_bytes = + (NSUInteger)cache_len * (NSUInteger)n_head * q_row_bytes_f16; + const NSUInteger value_f16_offset = key_f16_bytes; + const NSUInteger value_f16_bytes = + (NSUInteger)cache_len * (NSUInteger)n_head * v_row_bytes_f16; + const NSUInteger kv_f16_bytes = key_f16_bytes + value_f16_bytes; + const NSUInteger pad_bytes = has_kvpad + ? (NSUInteger)ncpsg * ((NSUInteger)n_head * (q_row_bytes_f16 + v_row_bytes_f16) + + (NSUInteger)n_tokens * sizeof(uint16_t)) + : 1u; + const NSUInteger nblk0 = ((NSUInteger)cache_len + ncpsg - 1u) / ncpsg; + const NSUInteger nblk1 = ((NSUInteger)n_tokens + nqptg - 1u) / nqptg; + const NSUInteger blk_bytes = ds4_gpu_align_up_ns(nblk0 * nblk1, 32u); + + id mask_buffer = + ds4_gpu_glm_prefill_mask_buffer(pos0, n_tokens, cache_len, mask_bytes); + if (!mask_buffer) return 0; + if (kv_pre_staged) { + if (!g_flash_attn_kv_buffer || g_flash_attn_kv_bytes < kv_f16_bytes) { + fprintf(stderr, "ds4: GLM staged FlashAttention KV scratch is missing\n"); + return 0; + } + } else if (!ds4_gpu_ensure_scratch_buffer(&g_flash_attn_kv_buffer, + &g_flash_attn_kv_bytes, + kv_f16_bytes, + "ds4_glm_flash_attn_kv_f16")) { + return 0; + } + if (!ds4_gpu_ensure_scratch_buffer(&g_flash_attn_pad_buffer, + &g_flash_attn_pad_bytes, + pad_bytes, + "ds4_glm_flash_attn_pad") || + !ds4_gpu_ensure_scratch_buffer(&g_flash_attn_blk_buffer, + &g_flash_attn_blk_bytes, + blk_bytes, + "ds4_glm_flash_attn_blk")) { + return 0; + } + + id pad_pipeline = nil; + if (has_kvpad) { + pad_pipeline = ds4_gpu_get_flash_attn_pad_pipeline(true, (int32_t)ncpsg); + if (!pad_pipeline) return 0; + } + id blk_pipeline = + ds4_gpu_get_flash_attn_blk_pipeline((int32_t)nqptg, (int32_t)ncpsg); + id attn_pipeline = + ds4_gpu_get_flash_attn_pipeline("kernel_flash_attn_ext_f16_dk256_dv256", + true, false, false, false, has_kvpad, bc_mask, + (int32_t)qk_dim, + (int32_t)value_dim, + (int32_t)nsg); + if (!blk_pipeline || !attn_pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + if (!kv_pre_staged) { + const bool copied = cache_f16 ? + (ds4_gpu_encode_cpy_f16_f16_3d(cb, + keybuf, + ds4_gpu_tensor_offset(key_cache), + g_flash_attn_kv_buffer, + key_f16_offset, + qk_dim, + cache_len, + n_head, + (uint64_t)n_head * q_row_bytes_f16, + q_row_bytes_f16, + q_row_bytes_f16, + (uint64_t)cache_len * q_row_bytes_f16) && + ds4_gpu_encode_cpy_f16_f16_3d(cb, + valbuf, + ds4_gpu_tensor_offset(value_cache), + g_flash_attn_kv_buffer, + value_f16_offset, + value_dim, + cache_len, + n_head, + (uint64_t)n_head * v_row_bytes_f16, + v_row_bytes_f16, + v_row_bytes_f16, + (uint64_t)cache_len * v_row_bytes_f16)) : + (ds4_gpu_encode_cpy_f32_f16_3d(cb, + keybuf, + ds4_gpu_tensor_offset(key_cache), + g_flash_attn_kv_buffer, + key_f16_offset, + qk_dim, + cache_len, + n_head, + (uint64_t)n_head * q_row_bytes, + q_row_bytes, + q_row_bytes_f16, + (uint64_t)cache_len * q_row_bytes_f16) && + ds4_gpu_encode_cpy_f32_f16_3d(cb, + valbuf, + ds4_gpu_tensor_offset(value_cache), + g_flash_attn_kv_buffer, + value_f16_offset, + value_dim, + cache_len, + n_head, + (uint64_t)n_head * v_row_bytes, + v_row_bytes, + v_row_bytes_f16, + (uint64_t)cache_len * v_row_bytes_f16)); + if (!copied) { + return 0; + } + } + + if (has_kvpad) { + ds4_gpu_flash_attn_pad_args pad_args = { + .ne11 = (int32_t)cache_len, + .ne_12_2 = (int32_t)n_head, + .ne_12_3 = 1, + .nb11 = q_row_bytes_f16, + .nb12 = (uint64_t)cache_len * q_row_bytes_f16, + .nb13 = (uint64_t)cache_len * (uint64_t)n_head * q_row_bytes_f16, + .nb21 = v_row_bytes_f16, + .nb22 = (uint64_t)cache_len * v_row_bytes_f16, + .nb23 = (uint64_t)cache_len * (uint64_t)n_head * v_row_bytes_f16, + .ne31 = (int32_t)n_tokens, + .ne32 = 1, + .ne33 = 1, + .nb31 = (uint64_t)cache_len * sizeof(uint16_t), + .nb32 = mask_bytes, + .nb33 = mask_bytes, + }; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pad_pipeline]; + [enc setBytes:&pad_args length:sizeof(pad_args) atIndex:0]; + [enc setBuffer:g_flash_attn_kv_buffer offset:key_f16_offset atIndex:1]; + [enc setBuffer:g_flash_attn_kv_buffer offset:value_f16_offset atIndex:2]; + [enc setBuffer:mask_buffer offset:0 atIndex:3]; + [enc setBuffer:g_flash_attn_pad_buffer offset:0 atIndex:4]; + [enc dispatchThreadgroups:MTLSizeMake(ncpsg, n_head, 1) + threadsPerThreadgroup:MTLSizeMake(32, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + } + + ds4_gpu_flash_attn_blk_args blk_args = { + .ne01 = (int32_t)n_tokens, + .ne30 = (int32_t)cache_len, + .ne31 = (int32_t)n_tokens, + .ne32 = 1, + .ne33 = 1, + .nb31 = (uint64_t)cache_len * sizeof(uint16_t), + .nb32 = mask_bytes, + .nb33 = mask_bytes, + }; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:blk_pipeline]; + [enc setBytes:&blk_args length:sizeof(blk_args) atIndex:0]; + [enc setBuffer:mask_buffer offset:0 atIndex:1]; + [enc setBuffer:g_flash_attn_blk_buffer offset:0 atIndex:2]; + [enc dispatchThreadgroups:MTLSizeMake(nblk0, nblk1, 1) + threadsPerThreadgroup:MTLSizeMake(32, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + ds4_gpu_flash_attn_vec_args args = { + .ne01 = (int32_t)n_tokens, + .ne02 = (int32_t)n_head, + .ne03 = 1, + .nb01 = (uint64_t)n_head * q_row_bytes, + .nb02 = q_row_bytes, + .nb03 = (uint64_t)n_tokens * n_head * q_row_bytes, + .ne11 = (int32_t)cache_len, + .ne_12_2 = (int32_t)n_head, + .ne_12_3 = 1, + .ns10 = (int32_t)qk_dim, + .nb11 = q_row_bytes_f16, + .nb12 = (uint64_t)cache_len * q_row_bytes_f16, + .nb13 = (uint64_t)cache_len * (uint64_t)n_head * q_row_bytes_f16, + .ns20 = (int32_t)value_dim, + .nb21 = v_row_bytes_f16, + .nb22 = (uint64_t)cache_len * v_row_bytes_f16, + .nb23 = (uint64_t)cache_len * (uint64_t)n_head * v_row_bytes_f16, + .ne31 = (int32_t)n_tokens, + .ne32 = 1, + .ne33 = 1, + .nb31 = (uint64_t)cache_len * sizeof(uint16_t), + .nb32 = mask_bytes, + .nb33 = mask_bytes, + .ne1 = (int32_t)n_head, + .ne2 = (int32_t)n_tokens, + .ne3 = 1, + .scale = 1.0f / sqrtf((float)qk_dim), + .max_bias = 0.0f, + .m0 = 0.0f, + .m1 = 0.0f, + .n_head_log2 = 0, + .logit_softcap = 0.0f, + }; + + const NSUInteger padded_v = ds4_gpu_align_up_ns(value_dim, 64u); + const NSUInteger shared_elems = (NSUInteger)nqptg * + ((NSUInteger)qk_dim + 2u * padded_v + 2u * (2u * (NSUInteger)ncpsg)); + const NSUInteger shared_bytes = ds4_gpu_align_up_ns(shared_elems * (sizeof(float) / 2u), 16u); + + enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:attn_pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:qbuf offset:ds4_gpu_tensor_offset(q) atIndex:1]; + [enc setBuffer:g_flash_attn_kv_buffer offset:key_f16_offset atIndex:2]; + [enc setBuffer:g_flash_attn_kv_buffer offset:value_f16_offset atIndex:3]; + [enc setBuffer:mask_buffer offset:0 atIndex:4]; + [enc setBuffer:qbuf offset:ds4_gpu_tensor_offset(q) atIndex:5]; + [enc setBuffer:g_flash_attn_pad_buffer offset:0 atIndex:6]; + [enc setBuffer:g_flash_attn_blk_buffer offset:0 atIndex:7]; + [enc setBuffer:headsbuf offset:ds4_gpu_tensor_offset(heads) atIndex:8]; + [enc setThreadgroupMemoryLength:shared_bytes atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake(nblk1, n_head, 1) + threadsPerThreadgroup:MTLSizeMake(32, nsg, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM FlashAttention")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_attention_flash_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *key_cache, + const ds4_gpu_tensor *value_cache, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_len, + uint32_t cache_cap, + uint32_t n_head, + uint32_t qk_dim, + uint32_t value_dim, + bool cache_f16) { + return ds4_gpu_glm_attention_flash_tensor_impl(heads, + q, + key_cache, + value_cache, + pos0, + n_tokens, + cache_len, + cache_cap, + n_head, + qk_dim, + value_dim, + cache_f16, + 0); +} + +int ds4_gpu_glm_attention_flash_staged_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *key_cache, + const ds4_gpu_tensor *value_cache, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_len, + uint32_t cache_cap, + uint32_t n_head, + uint32_t qk_dim, + uint32_t value_dim, + bool cache_f16) { + if (pos0 != 0 || n_tokens != cache_len) return 0; + return ds4_gpu_glm_attention_flash_tensor_impl(heads, + q, + key_cache, + value_cache, + pos0, + n_tokens, + cache_len, + cache_cap, + n_head, + qk_dim, + value_dim, + cache_f16, + 1); +} + +int ds4_gpu_glm_attention_full_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *key_cache, + const ds4_gpu_tensor *value_cache, + uint32_t pos0, + uint32_t n_tokens, + uint32_t cache_len, + uint32_t cache_cap, + uint32_t n_head, + uint32_t qk_dim, + uint32_t value_dim, + bool cache_f16) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!heads || !q || !key_cache || !value_cache || + n_tokens == 0 || cache_len == 0 || cache_cap == 0 || + n_head == 0 || qk_dim == 0 || value_dim == 0 || + (qk_dim & 3u) != 0 || + cache_len > cache_cap || + pos0 > cache_len || n_tokens > cache_len - pos0 || + cache_len > ds4_gpu_glm_full_attention_max_cache_len()) { + return 0; + } + + @autoreleasepool { + id headsbuf = ds4_gpu_tensor_buffer(heads); + id qbuf = ds4_gpu_tensor_buffer(q); + id keybuf = ds4_gpu_tensor_buffer(key_cache); + id valbuf = ds4_gpu_tensor_buffer(value_cache); + const uint64_t heads_bytes = (uint64_t)n_tokens * n_head * value_dim * sizeof(float); + const uint64_t q_bytes = (uint64_t)n_tokens * n_head * qk_dim * sizeof(float); + const uint64_t cache_elem_bytes = cache_f16 ? sizeof(uint16_t) : sizeof(float); + const uint64_t key_bytes = (uint64_t)cache_cap * n_head * qk_dim * cache_elem_bytes; + const uint64_t value_bytes = (uint64_t)cache_cap * n_head * value_dim * cache_elem_bytes; + if (!headsbuf || !qbuf || !keybuf || !valbuf || + ds4_gpu_tensor_bytes(heads) < heads_bytes || + ds4_gpu_tensor_bytes(q) < q_bytes || + ds4_gpu_tensor_bytes(key_cache) < key_bytes || + ds4_gpu_tensor_bytes(value_cache) < value_bytes) { + fprintf(stderr, "ds4: Metal GLM attention received undersized buffers\n"); + return 0; + } + + id pipeline = + ds4_gpu_hot_pipeline(g_glm_attention_full_pipeline, + "kernel_glm_attention_full"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + const uint32_t full_attn_mode = 2u; + ds4_gpu_glm_attention_full_args args = { + .pos0 = pos0, + .n_tokens = n_tokens, + .cache_len = cache_len, + .cache_cap = cache_cap, + .n_head = n_head, + .qk_dim = qk_dim, + .value_dim = value_dim, + .pad0 = full_attn_mode, + .cache_f16 = cache_f16 ? 1u : 0u, + .pad1 = 0u, + .pad2 = 0u, + .scale = 1.0f / sqrtf((float)qk_dim), + }; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:qbuf offset:ds4_gpu_tensor_offset(q) atIndex:1]; + [enc setBuffer:keybuf offset:ds4_gpu_tensor_offset(key_cache) atIndex:2]; + [enc setBuffer:valbuf offset:ds4_gpu_tensor_offset(value_cache) atIndex:3]; + [enc setBuffer:headsbuf offset:ds4_gpu_tensor_offset(heads) atIndex:4]; + [enc setThreadgroupMemoryLength:(256u + (NSUInteger)cache_len) * sizeof(float) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_tokens, (NSUInteger)n_head, 1) + threadsPerThreadgroup:MTLSizeMake(256, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM full attention")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_fill_selected_range_tensor( + ds4_gpu_tensor *selected, + uint32_t n_selected) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!selected || n_selected == 0) return 0; + + @autoreleasepool { + id selectedbuf = ds4_gpu_tensor_buffer(selected); + const uint64_t selected_bytes = (uint64_t)n_selected * sizeof(uint32_t); + if (!selectedbuf || ds4_gpu_tensor_bytes(selected) < selected_bytes) { + fprintf(stderr, "ds4: Metal GLM selected range received undersized buffer\n"); + return 0; + } + + id pipeline = + ds4_gpu_hot_pipeline(g_glm_fill_selected_range_pipeline, + "kernel_glm_fill_selected_range"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_fill_selected_range_args args = { + .n_selected = n_selected, + }; + const NSUInteger nth = 256u; + const NSUInteger n_groups = ((NSUInteger)n_selected + nth - 1u) / nth; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:selectedbuf offset:ds4_gpu_tensor_offset(selected) atIndex:1]; + [enc dispatchThreadgroups:MTLSizeMake(n_groups, 1, 1) + threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM selected range")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_fill_selected_range_batch_tensor( + ds4_gpu_tensor *selected, + uint32_t n_tokens, + uint32_t pos0, + uint32_t n_selected, + uint32_t pad_row) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!selected || n_tokens == 0 || n_selected == 0) return 0; + + @autoreleasepool { + id selectedbuf = ds4_gpu_tensor_buffer(selected); + const uint64_t total = (uint64_t)n_tokens * n_selected; + if (n_tokens != 0 && total / n_tokens != n_selected) return 0; + if (total > UINT64_MAX / sizeof(uint32_t)) return 0; + const uint64_t selected_bytes = total * sizeof(uint32_t); + if (!selectedbuf || ds4_gpu_tensor_bytes(selected) < selected_bytes) { + fprintf(stderr, "ds4: Metal GLM selected range batch received undersized buffer\n"); + return 0; + } + + id pipeline = + ds4_gpu_hot_pipeline(g_glm_fill_selected_range_batch_pipeline, + "kernel_glm_fill_selected_range_batch"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_fill_selected_range_batch_args args = { + .n_tokens = n_tokens, + .pos0 = pos0, + .n_selected = n_selected, + .pad_row = pad_row, + }; + const NSUInteger nth = 256u; + const NSUInteger n_groups = ((NSUInteger)total + nth - 1u) / nth; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:selectedbuf offset:ds4_gpu_tensor_offset(selected) atIndex:1]; + [enc dispatchThreadgroups:MTLSizeMake(n_groups, 1, 1) + threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM selected range batch")) return 0; + } + + return 1; +} + +static int ds4_gpu_glm_rope_tail_offset_tensor( + ds4_gpu_tensor *x, + uint32_t n_tokens, + uint32_t n_head, + uint32_t head_dim, + uint32_t rot_dim, + uint32_t rot_offset, + uint32_t pos0, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow, + const char *label) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!x || n_tokens == 0 || n_head == 0 || head_dim == 0 || + rot_dim == 0 || rot_offset > head_dim || rot_dim > head_dim - rot_offset || + (rot_dim & 1u) != 0 || + pos0 > UINT32_MAX - n_tokens || + !isfinite(freq_base) || freq_base <= 0.0f || + !isfinite(freq_scale) || freq_scale <= 0.0f || + !isfinite(ext_factor) || !isfinite(attn_factor) || + !isfinite(beta_fast) || !isfinite(beta_slow)) { + return 0; + } + + @autoreleasepool { + id xbuf = ds4_gpu_tensor_buffer(x); + const uint64_t bytes = (uint64_t)n_tokens * n_head * head_dim * sizeof(float); + if (!xbuf || ds4_gpu_tensor_bytes(x) < bytes) { + fprintf(stderr, "ds4: Metal %s received undersized buffer\n", + label ? label : "GLM RoPE"); + return 0; + } + + id pipeline = + ds4_gpu_hot_pipeline(g_glm_indexer_rope_tail_pipeline, + "kernel_glm_indexer_rope_tail_f32"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_rope_tail_args args = { + .n_tokens = n_tokens, + .n_head = n_head, + .head_dim = head_dim, + .rot_dim = rot_dim, + .rot_offset = rot_offset, + .pos0 = pos0, + .n_ctx_orig = n_ctx_orig, + .freq_base = freq_base, + .freq_scale = freq_scale, + .ext_factor = ext_factor, + .attn_factor = attn_factor, + .beta_fast = beta_fast, + .beta_slow = beta_slow, + }; + const NSUInteger nth = ds4_gpu_rms_norm_threads(rot_dim); + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:xbuf offset:ds4_gpu_tensor_offset(x) atIndex:1]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_head, (NSUInteger)n_tokens, 1) + threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, label ? label : "GLM RoPE")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_rope_tail_tensor( + ds4_gpu_tensor *x, + uint32_t n_tokens, + uint32_t n_head, + uint32_t head_dim, + uint32_t rot_dim, + uint32_t pos0, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow) { + if (rot_dim > head_dim) return 0; + return ds4_gpu_glm_rope_tail_offset_tensor(x, + n_tokens, + n_head, + head_dim, + rot_dim, + head_dim - rot_dim, + pos0, + n_ctx_orig, + freq_base, + freq_scale, + ext_factor, + attn_factor, + beta_fast, + beta_slow, + "GLM RoPE"); +} + +int ds4_gpu_glm_indexer_rope_tail_tensor( + ds4_gpu_tensor *x, + uint32_t n_tokens, + uint32_t n_head, + uint32_t head_dim, + uint32_t rot_dim, + uint32_t pos0, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow) { + return ds4_gpu_glm_rope_tail_offset_tensor(x, + n_tokens, + n_head, + head_dim, + rot_dim, + 0, + pos0, + n_ctx_orig, + freq_base, + freq_scale, + ext_factor, + attn_factor, + beta_fast, + beta_slow, + "GLM indexer RoPE"); +} + +int ds4_gpu_glm_indexer_score_one_tensor( + ds4_gpu_tensor *scores, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *weights, + const ds4_gpu_tensor *indexer_key_cache, + uint32_t n_rows, + uint32_t n_head, + uint32_t head_dim, + float scale, + bool cache_f16) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!scores || !q || !weights || !indexer_key_cache || + n_rows == 0 || n_head == 0 || head_dim == 0 || + !isfinite(scale) || scale <= 0.0f) { + return 0; + } + + @autoreleasepool { + id scoresbuf = ds4_gpu_tensor_buffer(scores); + id qbuf = ds4_gpu_tensor_buffer(q); + id weightsbuf = ds4_gpu_tensor_buffer(weights); + id cachebuf = ds4_gpu_tensor_buffer(indexer_key_cache); + const uint64_t cache_elem_bytes = cache_f16 ? sizeof(uint16_t) : sizeof(float); + const uint64_t score_bytes = (uint64_t)n_rows * sizeof(float); + const uint64_t q_bytes = (uint64_t)n_head * head_dim * sizeof(float); + const uint64_t weights_bytes = (uint64_t)n_head * sizeof(float); + const uint64_t cache_bytes = (uint64_t)n_rows * head_dim * cache_elem_bytes; + if (!scoresbuf || !qbuf || !weightsbuf || !cachebuf || + ds4_gpu_tensor_bytes(scores) < score_bytes || + ds4_gpu_tensor_bytes(q) < q_bytes || + ds4_gpu_tensor_bytes(weights) < weights_bytes || + ds4_gpu_tensor_bytes(indexer_key_cache) < cache_bytes) { + fprintf(stderr, "ds4: Metal GLM indexer score received undersized buffers\n"); + return 0; + } + + ds4_gpu_glm_indexer_score_one_args args = { + .n_rows = n_rows, + .n_head = n_head, + .head_dim = head_dim, + .cache_f16 = cache_f16 ? 1u : 0u, + .scale = scale, + }; + + if (n_head == 32u && head_dim == 128u) { + id direct_pipeline = + ds4_gpu_hot_pipeline(g_glm_indexer_score_one_direct_pipeline, + "kernel_glm_indexer_score_one_direct"); + if (!direct_pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:direct_pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:qbuf offset:ds4_gpu_tensor_offset(q) atIndex:1]; + [enc setBuffer:weightsbuf offset:ds4_gpu_tensor_offset(weights) atIndex:2]; + [enc setBuffer:cachebuf offset:ds4_gpu_tensor_offset(indexer_key_cache) atIndex:3]; + [enc setBuffer:scoresbuf offset:ds4_gpu_tensor_offset(scores) atIndex:4]; + [enc setThreadgroupMemoryLength:(128u + 4u) * sizeof(float) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_rows, 1, 1) + threadsPerThreadgroup:MTLSizeMake(32, 4, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM indexer direct score")) return 0; + return 1; + } + + id pipeline = + ds4_gpu_hot_pipeline(g_glm_indexer_score_one_pipeline, + "kernel_glm_indexer_score_one"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + const NSUInteger nth = ds4_gpu_rms_norm_threads(head_dim); + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:qbuf offset:ds4_gpu_tensor_offset(q) atIndex:1]; + [enc setBuffer:weightsbuf offset:ds4_gpu_tensor_offset(weights) atIndex:2]; + [enc setBuffer:cachebuf offset:ds4_gpu_tensor_offset(indexer_key_cache) atIndex:3]; + [enc setBuffer:scoresbuf offset:ds4_gpu_tensor_offset(scores) atIndex:4]; + [enc setThreadgroupMemoryLength:nth * sizeof(float) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_rows, 1, 1) + threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM indexer score")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_indexer_scores_batch_tensor( + ds4_gpu_tensor *scores, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *weights, + const ds4_gpu_tensor *indexer_key_cache, + uint32_t n_rows, + uint32_t n_tokens, + uint32_t pos0, + uint32_t n_head, + uint32_t head_dim, + float scale, + bool cache_f16) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!scores || !q || !weights || !indexer_key_cache || + n_rows == 0 || n_tokens == 0 || n_head == 0 || head_dim != 128 || + pos0 >= n_rows || n_tokens > n_rows - pos0 || + !isfinite(scale) || scale <= 0.0f) { + return 0; + } + + @autoreleasepool { + id scoresbuf = ds4_gpu_tensor_buffer(scores); + id qbuf = ds4_gpu_tensor_buffer(q); + id weightsbuf = ds4_gpu_tensor_buffer(weights); + id cachebuf = ds4_gpu_tensor_buffer(indexer_key_cache); + const uint64_t cache_elem_bytes = cache_f16 ? sizeof(uint16_t) : sizeof(float); + const uint64_t score_bytes = (uint64_t)n_rows * n_tokens * sizeof(float); + const uint64_t q_bytes = (uint64_t)n_tokens * n_head * head_dim * sizeof(float); + const uint64_t weights_bytes = (uint64_t)n_tokens * n_head * sizeof(float); + const uint64_t cache_bytes = (uint64_t)n_rows * head_dim * cache_elem_bytes; + if (!scoresbuf || !qbuf || !weightsbuf || !cachebuf || + ds4_gpu_tensor_bytes(scores) < score_bytes || + ds4_gpu_tensor_bytes(q) < q_bytes || + ds4_gpu_tensor_bytes(weights) < weights_bytes || + ds4_gpu_tensor_bytes(indexer_key_cache) < cache_bytes) { + fprintf(stderr, "ds4: Metal GLM indexer batch scores received undersized buffers\n"); + return 0; + } + + const bool force_scalar = g_quality_mode; + const bool use_tiled_f32 = false; + const bool use_tiled = !force_scalar && n_tokens >= 8u && + n_head == 32u && head_dim == 128u; + id pipeline = + use_tiled + ? ds4_gpu_hot_pipeline(use_tiled_f32 ? g_glm_indexer_scores_tiled_f32_pipeline + : g_glm_indexer_scores_tiled_pipeline, + use_tiled_f32 ? "kernel_glm_indexer_scores_tiled_f32" + : "kernel_glm_indexer_scores_tiled") + : ds4_gpu_hot_pipeline(g_glm_indexer_scores_batch_pipeline, + "kernel_glm_indexer_scores_batch"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_indexer_scores_batch_args args = { + .n_rows = n_rows, + .n_tokens = n_tokens, + .n_head = n_head, + .head_dim = head_dim, + .pos0 = pos0, + .cache_f16 = cache_f16 ? 1u : 0u, + .q_token_stride = (uint64_t)n_head * head_dim * sizeof(float), + .q_head_stride = (uint64_t)head_dim * sizeof(float), + .weights_token_stride = (uint64_t)n_head * sizeof(float), + .score_token_stride = (uint64_t)n_rows * sizeof(float), + .scale = scale, + }; + const NSUInteger nth = ds4_gpu_rms_norm_threads(head_dim); + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:qbuf offset:ds4_gpu_tensor_offset(q) atIndex:1]; + [enc setBuffer:weightsbuf offset:ds4_gpu_tensor_offset(weights) atIndex:2]; + [enc setBuffer:cachebuf offset:ds4_gpu_tensor_offset(indexer_key_cache) atIndex:3]; + [enc setBuffer:scoresbuf offset:ds4_gpu_tensor_offset(scores) atIndex:4]; + if (use_tiled) { + const NSUInteger q_shared = 8u * 128u; + const NSUInteger k_shared = 32u * 128u; + const NSUInteger dot_shared = 8u * 32u; + if (use_tiled_f32) { + [enc setThreadgroupMemoryLength:(q_shared + k_shared + dot_shared) * + sizeof(float) atIndex:0]; + } else { + [enc setThreadgroupMemoryLength:(q_shared + k_shared) * sizeof(uint16_t) + + dot_shared * sizeof(float) atIndex:0]; + } + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)n_rows + 31u) / 32u, + ((NSUInteger)n_tokens + 7u) / 8u, + 1) + threadsPerThreadgroup:MTLSizeMake(32, 4, 1)]; + } else { + [enc setThreadgroupMemoryLength:nth * sizeof(float) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_rows, + (NSUInteger)n_tokens, + 1) + threadsPerThreadgroup:MTLSizeMake(nth, 1, 1)]; + } + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM indexer batch scores")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_qk_lowrank_typed_tensor( + ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *q, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_dim) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!qk_low || !q || !model_map || + n_head == 0 || kv_lora_dim == 0 || + qk_nope == 0 || qk_nope > qk_dim) { + return 0; + } + + @autoreleasepool { + id outbuf = ds4_gpu_tensor_buffer(qk_low); + id qbuf = ds4_gpu_tensor_buffer(q); + uint64_t row_bytes = 0; + if (!ds4_gpu_quant_row_bytes(weight_type, qk_nope, &row_bytes)) { + fprintf(stderr, "ds4: Metal GLM qk lowrank received unsupported weight type\n"); + return 0; + } + const uint64_t weight_rows = (uint64_t)n_head * kv_lora_dim; + const uint64_t weight_bytes = weight_rows * row_bytes; + const uint64_t out_bytes = (uint64_t)n_head * kv_lora_dim * sizeof(float); + const uint64_t q_bytes = (uint64_t)n_head * qk_dim * sizeof(float); + if (!outbuf || !qbuf || + ds4_gpu_tensor_bytes(qk_low) < out_bytes || + ds4_gpu_tensor_bytes(q) < q_bytes) { + fprintf(stderr, "ds4: Metal GLM qk lowrank received undersized buffers\n"); + return 0; + } + if (weight_offset > model_size || weight_bytes > model_size - weight_offset) { + fprintf(stderr, "ds4: Metal GLM qk lowrank range is outside the mapped model\n"); + return 0; + } + + uint64_t weight_inner = 0; + id weightbuf = + ds4_gpu_wrap_model_range(model_map, + model_size, + weight_offset, + weight_bytes, + &weight_inner); + if (!weightbuf) return 0; + + const int use_glm52 = + n_head == 64u && + kv_lora_dim == 512u && + qk_nope == 192u && + qk_dim == 256u && + row_bytes == 204u && + weight_type == DS4_METAL_TENSOR_Q8_0; + /* Coalesced simdgroup variant: lanes split the 192-dot so weight + * reads coalesce, and 2048 threadgroups replace 64. The thread- + * per-row kernels measured ~7.5x off the weight-bandwidth floor + * (7.2ms of the decode token by skip-ablation). Covers the GLM 5.2 + * shape for both Q8_0 k_b and the DenseQ4 GGUF's Q4_0 k_b (the Q8 + * fast path above never engaged there). */ + const int use_glm52_sg = + n_head == 64u && + kv_lora_dim == 512u && + qk_nope == 192u && + qk_dim == 256u && + ((weight_type == DS4_METAL_TENSOR_Q8_0 && row_bytes == 204u) || + (weight_type == DS4_METAL_TENSOR_Q4_0 && row_bytes == 108u)) && + getenv("DS4_METAL_DISABLE_GLM_QKLOW_SG") == NULL && + ds4_gpu_hot_pipeline(g_glm_qk_lowrank_glm52_sg_pipeline, + "kernel_glm_qk_lowrank_q8_0_glm52_sg") != nil; + if (getenv("DS4_METAL_GLM_QKLOW_DEBUG")) { + static int printed = 0; + if (!printed) { + printed = 1; + fprintf(stderr, "ds4: qk_lowrank decode path: use_glm52=%d sg=%d n_head=%u kv=%u nope=%u dim=%u rb=%llu type=%u\n", + use_glm52, use_glm52_sg, n_head, kv_lora_dim, qk_nope, qk_dim, + (unsigned long long)row_bytes, weight_type); + } + } + id pipeline = + use_glm52_sg ? + ds4_gpu_hot_pipeline(g_glm_qk_lowrank_glm52_sg_pipeline, + "kernel_glm_qk_lowrank_q8_0_glm52_sg") : + use_glm52 ? + ds4_gpu_hot_pipeline(g_glm_qk_lowrank_glm52_pipeline, + "kernel_glm_qk_lowrank_q8_0_glm52") : + ds4_gpu_hot_pipeline(g_glm_qk_lowrank_pipeline, + "kernel_glm_qk_lowrank_q8_0"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_qk_lowrank_args args = { + .n_head = n_head, + .kv_lora_dim = kv_lora_dim, + .qk_nope = qk_nope, + .qk_dim = qk_dim, + .row_bytes = (uint32_t)row_bytes, + .weight_type = weight_type, + .pad1 = 0, + .pad2 = 0, + }; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:weightbuf offset:(NSUInteger)weight_inner atIndex:1]; + [enc setBuffer:qbuf offset:ds4_gpu_tensor_offset(q) atIndex:2]; + [enc setBuffer:outbuf offset:ds4_gpu_tensor_offset(qk_low) atIndex:3]; + if (use_glm52_sg) { + /* 8 simdgroups x 2 rows per threadgroup: (64, 512/16) grid. */ + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_head, + (NSUInteger)(kv_lora_dim / 16u), + 1) + threadsPerThreadgroup:MTLSizeMake(32, 8, 1)]; + } else { + if (use_glm52) { + [enc setThreadgroupMemoryLength:192u * sizeof(float) atIndex:0]; + } + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_head, 1, 1) + threadsPerThreadgroup:MTLSizeMake(256, 1, 1)]; + } + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM qk lowrank")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_qk_lowrank_q8_0_tensor( + ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *q, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_dim) { + return ds4_gpu_glm_qk_lowrank_typed_tensor(qk_low, + q, + model_map, + model_size, + weight_offset, + DS4_METAL_TENSOR_Q8_0, + n_head, + kv_lora_dim, + qk_nope, + qk_dim); +} + +int ds4_gpu_glm_qk_lowrank_typed_batch_tensor( + ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *q, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint32_t n_tokens, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_dim) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!qk_low || !q || !model_map || + n_tokens == 0 || n_head == 0 || kv_lora_dim == 0 || + qk_nope == 0 || qk_nope > qk_dim) { + return 0; + } + + @autoreleasepool { + id outbuf = ds4_gpu_tensor_buffer(qk_low); + id qbuf = ds4_gpu_tensor_buffer(q); + uint64_t row_bytes = 0; + if (!ds4_gpu_quant_row_bytes(weight_type, qk_nope, &row_bytes)) { + fprintf(stderr, "ds4: Metal GLM batch qk lowrank received unsupported weight type\n"); + return 0; + } + const uint64_t weight_rows = (uint64_t)n_head * kv_lora_dim; + const uint64_t weight_bytes = weight_rows * row_bytes; + const uint64_t out_bytes = + (uint64_t)n_tokens * n_head * kv_lora_dim * sizeof(float); + const uint64_t q_bytes = + (uint64_t)n_tokens * n_head * qk_dim * sizeof(float); + if (!outbuf || !qbuf || + ds4_gpu_tensor_bytes(qk_low) < out_bytes || + ds4_gpu_tensor_bytes(q) < q_bytes) { + fprintf(stderr, "ds4: Metal GLM batch qk lowrank received undersized buffers\n"); + return 0; + } + if (weight_offset > model_size || weight_bytes > model_size - weight_offset) { + fprintf(stderr, "ds4: Metal GLM batch qk lowrank range is outside the mapped model\n"); + return 0; + } + + uint64_t weight_inner = 0; + id weightbuf = + ds4_gpu_wrap_model_range(model_map, + model_size, + weight_offset, + weight_bytes, + &weight_inner); + if (!weightbuf) return 0; + + const int use_glm52_t4 = + n_tokens >= 4u && + n_head == 64u && + kv_lora_dim == 512u && + qk_nope == 192u && + qk_dim == 256u && + row_bytes == 204u && + weight_type == DS4_METAL_TENSOR_Q8_0; + id pipeline = + use_glm52_t4 ? + ds4_gpu_hot_pipeline(g_glm_qk_lowrank_batch_glm52_t4_pipeline, + "kernel_glm_qk_lowrank_q8_0_batch_glm52_t4") : + ds4_gpu_hot_pipeline(g_glm_qk_lowrank_batch_pipeline, + "kernel_glm_qk_lowrank_q8_0_batch"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + uint32_t head_base = 0; + uint32_t head_count = n_head; + ds4_gpu_tp_attn_head_range(n_head, 8u, &head_base, &head_count); + ds4_gpu_glm_qk_lowrank_batch_args args = { + .n_tokens = n_tokens, + .n_head = n_head, + .kv_lora_dim = kv_lora_dim, + .qk_nope = qk_nope, + .qk_dim = qk_dim, + .row_bytes = (uint32_t)row_bytes, + .weight_type = weight_type, + .head_base = head_base, + }; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:weightbuf offset:(NSUInteger)weight_inner atIndex:1]; + [enc setBuffer:qbuf offset:ds4_gpu_tensor_offset(q) atIndex:2]; + [enc setBuffer:outbuf offset:ds4_gpu_tensor_offset(qk_low) atIndex:3]; + if (use_glm52_t4) { + [enc setThreadgroupMemoryLength:4u * 192u * sizeof(float) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)head_count, + ((NSUInteger)n_tokens + 3u) / 4u, + 1) + threadsPerThreadgroup:MTLSizeMake(256, 1, 1)]; + } else { + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)head_count, + (NSUInteger)n_tokens, + 1) + threadsPerThreadgroup:MTLSizeMake(256, 1, 1)]; + } + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM batch qk lowrank")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_qk_lowrank_q8_0_batch_tensor( + ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *q, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t n_tokens, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_dim) { + return ds4_gpu_glm_qk_lowrank_typed_batch_tensor(qk_low, + q, + model_map, + model_size, + weight_offset, + DS4_METAL_TENSOR_Q8_0, + n_tokens, + n_head, + kv_lora_dim, + qk_nope, + qk_dim); +} + +int ds4_gpu_glm_value_project_typed_batch_heads_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *lora, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t weight_type, + uint32_t n_tokens, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t value_dim) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!heads || !lora || !model_map || + n_tokens == 0 || n_head == 0 || + kv_lora_dim == 0 || value_dim == 0) { + return 0; + } + + @autoreleasepool { + id headsbuf = ds4_gpu_tensor_buffer(heads); + id lorabuf = ds4_gpu_tensor_buffer(lora); + uint64_t row_bytes = 0; + if (!ds4_gpu_quant_row_bytes(weight_type, kv_lora_dim, &row_bytes)) { + fprintf(stderr, "ds4: Metal GLM batch value project received unsupported weight type\n"); + return 0; + } + const uint64_t weight_rows = (uint64_t)n_head * value_dim; + const uint64_t weight_bytes = weight_rows * row_bytes; + const uint64_t heads_bytes = + (uint64_t)n_tokens * n_head * value_dim * sizeof(float); + const uint64_t lora_bytes = + (uint64_t)n_tokens * n_head * kv_lora_dim * sizeof(float); + if (!headsbuf || !lorabuf || + ds4_gpu_tensor_bytes(heads) < heads_bytes || + ds4_gpu_tensor_bytes(lora) < lora_bytes) { + fprintf(stderr, "ds4: Metal GLM batch value project received undersized buffers\n"); + return 0; + } + if (weight_offset > model_size || weight_bytes > model_size - weight_offset) { + fprintf(stderr, "ds4: Metal GLM batch value project range is outside the mapped model\n"); + return 0; + } + + uint64_t weight_inner = 0; + id weightbuf = + ds4_gpu_wrap_model_range(model_map, + model_size, + weight_offset, + weight_bytes, + &weight_inner); + if (!weightbuf) return 0; + + const int use_mma = + n_head == 64u && + kv_lora_dim == 512u && + value_dim == 256u && + row_bytes == 544u && + weight_type == DS4_METAL_TENSOR_Q8_0 && + n_tokens >= 32u; + id pipeline = + use_mma ? + ds4_gpu_hot_pipeline(g_glm_value_project_q8_0_batch_heads_mma_pipeline, + "kernel_glm_value_project_q8_0_batch_heads_mma") : + ds4_gpu_hot_pipeline(g_glm_value_project_q8_0_batch_heads_pipeline, + "kernel_glm_value_project_q8_0_batch_heads"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + uint32_t head_base = 0; + uint32_t head_count = n_head; + ds4_gpu_tp_attn_head_range(n_head, 8u, &head_base, &head_count); + ds4_gpu_glm_qk_lowrank_batch_args args = { + .n_tokens = n_tokens, + .n_head = n_head, + .kv_lora_dim = kv_lora_dim, + .qk_nope = 0, + .qk_dim = value_dim, + .row_bytes = (uint32_t)row_bytes, + .weight_type = weight_type, + .head_base = head_base, + }; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:weightbuf offset:(NSUInteger)weight_inner atIndex:1]; + [enc setBuffer:lorabuf offset:ds4_gpu_tensor_offset(lora) atIndex:2]; + [enc setBuffer:headsbuf offset:ds4_gpu_tensor_offset(heads) atIndex:3]; + if (use_mma) { + [enc setThreadgroupMemoryLength:16u * 1024u atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)n_tokens + 31u) / 32u, + ((NSUInteger)value_dim + 63u) / 64u, + (NSUInteger)head_count) + threadsPerThreadgroup:MTLSizeMake(128, 1, 1)]; + } else { + [enc setThreadgroupMemoryLength:(NSUInteger)kv_lora_dim * sizeof(float) + atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)head_count, + (NSUInteger)n_tokens, + 1) + threadsPerThreadgroup:MTLSizeMake(256, 1, 1)]; + } + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM batch value project")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_value_project_q8_0_batch_heads_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *lora, + const void *model_map, + uint64_t model_size, + uint64_t weight_offset, + uint32_t n_tokens, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t value_dim) { + return ds4_gpu_glm_value_project_typed_batch_heads_tensor(heads, + lora, + model_map, + model_size, + weight_offset, + DS4_METAL_TENSOR_Q8_0, + n_tokens, + n_head, + kv_lora_dim, + value_dim); +} + +int ds4_gpu_glm_attention_indexed_decode_typed_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const void *model_map, + uint64_t model_size, + uint64_t value_weight_offset, + uint32_t value_weight_type, + const ds4_gpu_tensor *selected, + uint32_t n_selected, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t value_dim, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow) { + if (!g_initialized && !ds4_gpu_init()) return 0; + const uint32_t qk_dim = qk_nope + qk_rope; + if (!heads || !q || !qk_low || !kv_lora_cache || !k_rope_cache || + !model_map || !selected || + n_selected == 0 || cache_cap == 0 || n_selected > cache_cap || + n_head == 0 || kv_lora_dim == 0 || + qk_nope == 0 || qk_rope == 0 || (qk_rope & 1u) != 0 || + value_dim == 0 || qk_dim < qk_nope || + !isfinite(freq_base) || freq_base <= 0.0f || + !isfinite(freq_scale) || freq_scale <= 0.0f || + !isfinite(ext_factor) || !isfinite(attn_factor) || + !isfinite(beta_fast) || !isfinite(beta_slow)) { + return 0; + } + + @autoreleasepool { + id headsbuf = ds4_gpu_tensor_buffer(heads); + id qbuf = ds4_gpu_tensor_buffer(q); + id lowbuf = ds4_gpu_tensor_buffer(qk_low); + id kvcachebuf = ds4_gpu_tensor_buffer(kv_lora_cache); + id ropecachebuf = ds4_gpu_tensor_buffer(k_rope_cache); + id selectedbuf = ds4_gpu_tensor_buffer(selected); + const uint64_t cache_elem_bytes = cache_f16 ? sizeof(uint16_t) : sizeof(float); + uint64_t value_row_bytes = 0; + if (!ds4_gpu_quant_row_bytes(value_weight_type, kv_lora_dim, &value_row_bytes)) { + fprintf(stderr, "ds4: Metal GLM indexed attention received unsupported value type\n"); + return 0; + } + const uint64_t value_weight_rows = (uint64_t)n_head * value_dim; + const uint64_t value_weight_bytes = value_weight_rows * value_row_bytes; + const uint64_t heads_bytes = (uint64_t)n_head * value_dim * sizeof(float); + const uint64_t q_bytes = (uint64_t)n_head * qk_dim * sizeof(float); + const uint64_t low_bytes = (uint64_t)n_head * kv_lora_dim * sizeof(float); + const uint64_t kv_cache_bytes = (uint64_t)cache_cap * kv_lora_dim * cache_elem_bytes; + const uint64_t rope_cache_bytes = (uint64_t)cache_cap * qk_rope * cache_elem_bytes; + const uint64_t selected_bytes = (uint64_t)n_selected * sizeof(uint32_t); + if (!headsbuf || !qbuf || !lowbuf || !kvcachebuf || !ropecachebuf || !selectedbuf || + ds4_gpu_tensor_bytes(heads) < heads_bytes || + ds4_gpu_tensor_bytes(q) < q_bytes || + ds4_gpu_tensor_bytes(qk_low) < low_bytes || + ds4_gpu_tensor_bytes(kv_lora_cache) < kv_cache_bytes || + ds4_gpu_tensor_bytes(k_rope_cache) < rope_cache_bytes || + ds4_gpu_tensor_bytes(selected) < selected_bytes) { + fprintf(stderr, "ds4: Metal GLM indexed attention received undersized buffers\n"); + return 0; + } + if (value_weight_offset > model_size || + value_weight_bytes > model_size - value_weight_offset) { + fprintf(stderr, "ds4: Metal GLM indexed attention value range is outside the mapped model\n"); + return 0; + } + + uint64_t value_inner = 0; + id valuebuf = + ds4_gpu_wrap_model_range(model_map, + model_size, + value_weight_offset, + value_weight_bytes, + &value_inner); + if (!valuebuf) return 0; + + id pipeline = + ds4_gpu_hot_pipeline(g_glm_attention_indexed_decode_pipeline, + "kernel_glm_attention_indexed_decode"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + ds4_gpu_glm_attention_indexed_decode_args args = { + .n_selected = n_selected, + .cache_cap = cache_cap, + .cache_f16 = cache_f16 ? 1u : 0u, + .n_head = n_head, + .kv_lora_dim = kv_lora_dim, + .qk_nope = qk_nope, + .qk_rope = qk_rope, + .value_dim = value_dim, + .n_ctx_orig = n_ctx_orig, + .value_row_bytes = (uint32_t)value_row_bytes, + .scale = 1.0f / sqrtf((float)qk_dim), + .freq_base = freq_base, + .freq_scale = freq_scale, + .ext_factor = ext_factor, + .attn_factor = attn_factor, + .beta_fast = beta_fast, + .beta_slow = beta_slow, + .value_type = value_weight_type, + }; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:qbuf offset:ds4_gpu_tensor_offset(q) atIndex:1]; + [enc setBuffer:lowbuf offset:ds4_gpu_tensor_offset(qk_low) atIndex:2]; + [enc setBuffer:kvcachebuf offset:ds4_gpu_tensor_offset(kv_lora_cache) atIndex:3]; + [enc setBuffer:ropecachebuf offset:ds4_gpu_tensor_offset(k_rope_cache) atIndex:4]; + [enc setBuffer:valuebuf offset:(NSUInteger)value_inner atIndex:5]; + [enc setBuffer:selectedbuf offset:ds4_gpu_tensor_offset(selected) atIndex:6]; + [enc setBuffer:headsbuf offset:ds4_gpu_tensor_offset(heads) atIndex:7]; + const NSUInteger scratch_floats = + 256u + (NSUInteger)n_selected + (NSUInteger)kv_lora_dim; + [enc setThreadgroupMemoryLength:scratch_floats * sizeof(float) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_head, 1, 1) + threadsPerThreadgroup:MTLSizeMake(256, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM indexed attention decode")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_attention_indexed_decode_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const void *model_map, + uint64_t model_size, + uint64_t value_weight_offset, + const ds4_gpu_tensor *selected, + uint32_t n_selected, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t value_dim, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow) { + return ds4_gpu_glm_attention_indexed_decode_typed_tensor(heads, + q, + qk_low, + kv_lora_cache, + k_rope_cache, + model_map, + model_size, + value_weight_offset, + DS4_METAL_TENSOR_Q8_0, + selected, + n_selected, + cache_cap, + cache_f16, + n_head, + kv_lora_dim, + qk_nope, + qk_rope, + value_dim, + n_ctx_orig, + freq_base, + freq_scale, + ext_factor, + attn_factor, + beta_fast, + beta_slow); +} + +int ds4_gpu_glm_attention_indexed_decode_split_group8_typed_tensor( + ds4_gpu_tensor *heads, + ds4_gpu_tensor *partial_lora, + ds4_gpu_tensor *partial_ms, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const void *model_map, + uint64_t model_size, + uint64_t value_weight_offset, + uint32_t value_weight_type, + const ds4_gpu_tensor *selected, + uint32_t n_selected, + bool selected_rows_valid, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t value_dim, + uint32_t n_ctx_orig, + uint32_t block_rows, + uint32_t n_blocks, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow) { + if (!g_initialized && !ds4_gpu_init()) return 0; + const uint32_t qk_dim = qk_nope + qk_rope; + const uint32_t needed_blocks = + block_rows != 0u ? (n_selected + block_rows - 1u) / block_rows : 0u; + if (!heads || !partial_lora || !partial_ms || !q || !qk_low || + !kv_lora_cache || !k_rope_cache || !model_map || !selected || + n_selected == 0 || cache_cap == 0 || n_selected > cache_cap || + n_head == 0 || (n_head % 8u) != 0 || + kv_lora_dim != 512u || + qk_nope == 0 || qk_rope != 64u || + value_dim == 0 || qk_dim < qk_nope || + block_rows == 0u || needed_blocks == 0u || + n_blocks < needed_blocks || n_blocks > 64u || + !cache_f16 || + !isfinite(freq_base) || freq_base <= 0.0f || + !isfinite(freq_scale) || freq_scale <= 0.0f || + !isfinite(ext_factor) || !isfinite(attn_factor) || + !isfinite(beta_fast) || !isfinite(beta_slow)) { + return 0; + } + + @autoreleasepool { + id headsbuf = ds4_gpu_tensor_buffer(heads); + id partial_lorabuf = ds4_gpu_tensor_buffer(partial_lora); + id partial_msbuf = ds4_gpu_tensor_buffer(partial_ms); + id qbuf = ds4_gpu_tensor_buffer(q); + id lowbuf = ds4_gpu_tensor_buffer(qk_low); + id kvcachebuf = ds4_gpu_tensor_buffer(kv_lora_cache); + id ropecachebuf = ds4_gpu_tensor_buffer(k_rope_cache); + id selectedbuf = ds4_gpu_tensor_buffer(selected); + const uint64_t cache_elem_bytes = sizeof(uint16_t); + uint64_t value_row_bytes = 0; + if (!ds4_gpu_quant_row_bytes(value_weight_type, kv_lora_dim, &value_row_bytes)) { + fprintf(stderr, "ds4: Metal GLM split grouped indexed attention received unsupported value type\n"); + return 0; + } + const uint64_t value_weight_rows = (uint64_t)n_head * value_dim; + const uint64_t value_weight_bytes = value_weight_rows * value_row_bytes; + const uint64_t heads_bytes = (uint64_t)n_head * value_dim * sizeof(float); + const uint64_t partial_lora_bytes = + (uint64_t)n_blocks * n_head * kv_lora_dim * sizeof(float); + const uint64_t partial_ms_bytes = + (uint64_t)n_blocks * n_head * 2u * sizeof(float); + const uint64_t q_bytes = (uint64_t)n_head * qk_dim * sizeof(float); + const uint64_t low_bytes = (uint64_t)n_head * kv_lora_dim * sizeof(float); + const uint64_t kv_cache_bytes = (uint64_t)cache_cap * kv_lora_dim * cache_elem_bytes; + const uint64_t rope_cache_bytes = (uint64_t)cache_cap * qk_rope * cache_elem_bytes; + const uint64_t selected_bytes = (uint64_t)n_selected * sizeof(uint32_t); + if (!headsbuf || !partial_lorabuf || !partial_msbuf || + !qbuf || !lowbuf || !kvcachebuf || !ropecachebuf || !selectedbuf || + ds4_gpu_tensor_bytes(heads) < heads_bytes || + ds4_gpu_tensor_bytes(partial_lora) < partial_lora_bytes || + ds4_gpu_tensor_bytes(partial_ms) < partial_ms_bytes || + ds4_gpu_tensor_bytes(q) < q_bytes || + ds4_gpu_tensor_bytes(qk_low) < low_bytes || + ds4_gpu_tensor_bytes(kv_lora_cache) < kv_cache_bytes || + ds4_gpu_tensor_bytes(k_rope_cache) < rope_cache_bytes || + ds4_gpu_tensor_bytes(selected) < selected_bytes) { + fprintf(stderr, "ds4: Metal GLM split grouped indexed attention received undersized buffers\n"); + return 0; + } + if (value_weight_offset > model_size || + value_weight_bytes > model_size - value_weight_offset) { + fprintf(stderr, "ds4: Metal GLM split grouped indexed attention value range is outside the mapped model\n"); + return 0; + } + + uint64_t value_inner = 0; + id valuebuf = + ds4_gpu_wrap_model_range(model_map, + model_size, + value_weight_offset, + value_weight_bytes, + &value_inner); + if (!valuebuf) return 0; + + const bool use_valid_fullheads = + selected_rows_valid && (n_head % 8u) == 0u; + id partial_pipeline = + ds4_gpu_hot_pipeline(use_valid_fullheads ? + g_glm_attention_indexed_decode_split_group8_partial_valid_fullheads_pipeline : + g_glm_attention_indexed_decode_split_group8_partial_pipeline, + use_valid_fullheads ? + "kernel_glm_attention_indexed_decode_split_group8_partial_valid_fullheads" : + "kernel_glm_attention_indexed_decode_split_group8_partial"); + const bool use_reduce16 = + n_blocks == 16u && block_rows == 128u && + n_selected == 2048u && value_dim == 256u; + id reduce_pipeline = + ds4_gpu_hot_pipeline(use_reduce16 ? + g_glm_attention_indexed_decode_split_group8_reduce16_pipeline : + g_glm_attention_indexed_decode_split_group8_reduce_pipeline, + use_reduce16 ? + "kernel_glm_attention_indexed_decode_split_group8_reduce16" : + "kernel_glm_attention_indexed_decode_split_group8_reduce"); + if (!partial_pipeline || !reduce_pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_attention_indexed_decode_split_args args = { + .n_selected = n_selected, + .cache_cap = cache_cap, + .cache_f16 = 1u, + .n_head = n_head, + .kv_lora_dim = kv_lora_dim, + .qk_nope = qk_nope, + .qk_rope = qk_rope, + .value_dim = value_dim, + .n_ctx_orig = n_ctx_orig, + .value_row_bytes = (uint32_t)value_row_bytes, + .block_rows = block_rows, + .n_blocks = n_blocks, + .scale = 1.0f / sqrtf((float)qk_dim), + .freq_base = freq_base, + .freq_scale = freq_scale, + .ext_factor = ext_factor, + .attn_factor = attn_factor, + .beta_fast = beta_fast, + .beta_slow = beta_slow, + .value_type = value_weight_type, + }; + const NSUInteger stage_rows = 16u; + const NSUInteger kv_vecs = (NSUInteger)kv_lora_dim / 4u; + const NSUInteger rope_vecs = (NSUInteger)qk_rope / 4u; + const NSUInteger partial_scratch_bytes = + stage_rows * kv_vecs * sizeof(uint16_t) * 4u + + stage_rows * rope_vecs * sizeof(float) * 4u; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:partial_pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:qbuf offset:ds4_gpu_tensor_offset(q) atIndex:1]; + [enc setBuffer:lowbuf offset:ds4_gpu_tensor_offset(qk_low) atIndex:2]; + [enc setBuffer:kvcachebuf offset:ds4_gpu_tensor_offset(kv_lora_cache) atIndex:3]; + [enc setBuffer:ropecachebuf offset:ds4_gpu_tensor_offset(k_rope_cache) atIndex:4]; + [enc setBuffer:selectedbuf offset:ds4_gpu_tensor_offset(selected) atIndex:5]; + [enc setBuffer:partial_lorabuf offset:ds4_gpu_tensor_offset(partial_lora) atIndex:6]; + [enc setBuffer:partial_msbuf offset:ds4_gpu_tensor_offset(partial_ms) atIndex:7]; + [enc setThreadgroupMemoryLength:partial_scratch_bytes atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_head / 8u, (NSUInteger)n_blocks, 1) + threadsPerThreadgroup:MTLSizeMake(32, 8, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + const NSUInteger reduce_scratch_floats = 256u + 64u + (NSUInteger)kv_lora_dim; + enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:reduce_pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:partial_lorabuf offset:ds4_gpu_tensor_offset(partial_lora) atIndex:1]; + [enc setBuffer:partial_msbuf offset:ds4_gpu_tensor_offset(partial_ms) atIndex:2]; + [enc setBuffer:valuebuf offset:(NSUInteger)value_inner atIndex:3]; + [enc setBuffer:headsbuf offset:ds4_gpu_tensor_offset(heads) atIndex:4]; + [enc setThreadgroupMemoryLength:reduce_scratch_floats * sizeof(float) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_head, 1, 1) + threadsPerThreadgroup:MTLSizeMake(256, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM split grouped indexed attention decode")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_attention_indexed_decode_split_group8_tensor( + ds4_gpu_tensor *heads, + ds4_gpu_tensor *partial_lora, + ds4_gpu_tensor *partial_ms, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const void *model_map, + uint64_t model_size, + uint64_t value_weight_offset, + const ds4_gpu_tensor *selected, + uint32_t n_selected, + bool selected_rows_valid, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t value_dim, + uint32_t n_ctx_orig, + uint32_t block_rows, + uint32_t n_blocks, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow) { + return ds4_gpu_glm_attention_indexed_decode_split_group8_typed_tensor(heads, + partial_lora, + partial_ms, + q, + qk_low, + kv_lora_cache, + k_rope_cache, + model_map, + model_size, + value_weight_offset, + DS4_METAL_TENSOR_Q8_0, + selected, + n_selected, + selected_rows_valid, + cache_cap, + cache_f16, + n_head, + kv_lora_dim, + qk_nope, + qk_rope, + value_dim, + n_ctx_orig, + block_rows, + n_blocks, + freq_base, + freq_scale, + ext_factor, + attn_factor, + beta_fast, + beta_slow); +} + +int ds4_gpu_glm_attention_indexed_batch_typed_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const void *model_map, + uint64_t model_size, + uint64_t value_weight_offset, + uint32_t value_weight_type, + const ds4_gpu_tensor *selected, + uint32_t n_tokens, + uint32_t n_selected, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t value_dim, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow) { + if (!g_initialized && !ds4_gpu_init()) return 0; + const uint32_t qk_dim = qk_nope + qk_rope; + if (!heads || !q || !qk_low || !kv_lora_cache || !k_rope_cache || + !model_map || !selected || + n_tokens == 0 || n_selected == 0 || cache_cap == 0 || n_selected > cache_cap || + n_head == 0 || kv_lora_dim == 0 || + qk_nope == 0 || qk_rope == 0 || (qk_rope & 1u) != 0 || + value_dim == 0 || qk_dim < qk_nope || + !isfinite(freq_base) || freq_base <= 0.0f || + !isfinite(freq_scale) || freq_scale <= 0.0f || + !isfinite(ext_factor) || !isfinite(attn_factor) || + !isfinite(beta_fast) || !isfinite(beta_slow)) { + return 0; + } + + @autoreleasepool { + id headsbuf = ds4_gpu_tensor_buffer(heads); + id qbuf = ds4_gpu_tensor_buffer(q); + id lowbuf = ds4_gpu_tensor_buffer(qk_low); + id kvcachebuf = ds4_gpu_tensor_buffer(kv_lora_cache); + id ropecachebuf = ds4_gpu_tensor_buffer(k_rope_cache); + id selectedbuf = ds4_gpu_tensor_buffer(selected); + const uint64_t cache_elem_bytes = cache_f16 ? sizeof(uint16_t) : sizeof(float); + uint64_t value_row_bytes = 0; + if (!ds4_gpu_quant_row_bytes(value_weight_type, kv_lora_dim, &value_row_bytes)) { + fprintf(stderr, "ds4: Metal GLM indexed batch attention received unsupported value type\n"); + return 0; + } + const uint64_t value_weight_rows = (uint64_t)n_head * value_dim; + const uint64_t value_weight_bytes = value_weight_rows * value_row_bytes; + const uint64_t heads_bytes = + (uint64_t)n_tokens * n_head * value_dim * sizeof(float); + const uint64_t q_bytes = + (uint64_t)n_tokens * n_head * qk_dim * sizeof(float); + const uint64_t low_bytes = + (uint64_t)n_tokens * n_head * kv_lora_dim * sizeof(float); + const uint64_t kv_cache_bytes = (uint64_t)cache_cap * kv_lora_dim * cache_elem_bytes; + const uint64_t rope_cache_bytes = (uint64_t)cache_cap * qk_rope * cache_elem_bytes; + const uint64_t selected_bytes = + (uint64_t)n_tokens * n_selected * sizeof(uint32_t); + if (!headsbuf || !qbuf || !lowbuf || !kvcachebuf || !ropecachebuf || !selectedbuf || + ds4_gpu_tensor_bytes(heads) < heads_bytes || + ds4_gpu_tensor_bytes(q) < q_bytes || + ds4_gpu_tensor_bytes(qk_low) < low_bytes || + ds4_gpu_tensor_bytes(kv_lora_cache) < kv_cache_bytes || + ds4_gpu_tensor_bytes(k_rope_cache) < rope_cache_bytes || + ds4_gpu_tensor_bytes(selected) < selected_bytes) { + fprintf(stderr, "ds4: Metal GLM indexed batch attention received undersized buffers\n"); + return 0; + } + if (value_weight_offset > model_size || + value_weight_bytes > model_size - value_weight_offset) { + fprintf(stderr, "ds4: Metal GLM indexed batch attention value range is outside the mapped model\n"); + return 0; + } + + uint64_t value_inner = 0; + id valuebuf = + ds4_gpu_wrap_model_range(model_map, model_size, + value_weight_offset, + value_weight_bytes, + &value_inner); + if (!valuebuf) return 0; + + const uint64_t grouped_attn = (n_tokens >= 128u) ? 8u : 2u; + const NSUInteger q2_bit_words = ((NSUInteger)cache_cap + 31u) / 32u; + const NSUInteger q2_scratch_bytes = + q2_bit_words * sizeof(uint32_t) + + 4u * ((NSUInteger)kv_lora_dim + (NSUInteger)qk_rope) * sizeof(uint16_t) + + 8u * (NSUInteger)kv_lora_dim * sizeof(float); + const NSUInteger max_tg_mem = [g_device maxThreadgroupMemoryLength]; + const bool q2_fits = max_tg_mem == 0 || q2_scratch_bytes <= max_tg_mem; + const bool use_q2_group4 = grouped_attn == 4u && n_tokens >= 2u && q2_fits; + const bool use_group8 = + grouped_attn == 8u || + (grouped_attn == 4u && !use_q2_group4); + const bool use_group2 = grouped_attn == 1u || grouped_attn == 2u; + id pipeline = use_q2_group4 ? + ds4_gpu_hot_pipeline(g_glm_attention_indexed_batch_q2_group4_pipeline, + "kernel_glm_attention_indexed_batch_q2_group4") : + (use_group8 ? + ds4_gpu_hot_pipeline(g_glm_attention_indexed_batch_group8_pipeline, + "kernel_glm_attention_indexed_batch_group8") : + (use_group2 ? + ds4_gpu_hot_pipeline(g_glm_attention_indexed_batch_group2_pipeline, + "kernel_glm_attention_indexed_batch_group2") : + ds4_gpu_hot_pipeline(g_glm_attention_indexed_batch_pipeline, + "kernel_glm_attention_indexed_batch"))); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_attention_indexed_batch_args args = { + .n_tokens = n_tokens, + .n_selected = n_selected, + .cache_cap = cache_cap, + .cache_f16 = cache_f16 ? 1u : 0u, + .n_head = n_head, + .kv_lora_dim = kv_lora_dim, + .qk_nope = qk_nope, + .qk_rope = qk_rope, + .value_dim = value_dim, + .n_ctx_orig = n_ctx_orig, + .value_row_bytes = (uint32_t)value_row_bytes, + .value_type = value_weight_type, + .scale = 1.0f / sqrtf((float)qk_dim), + .freq_base = freq_base, + .freq_scale = freq_scale, + .ext_factor = ext_factor, + .attn_factor = attn_factor, + .beta_fast = beta_fast, + .beta_slow = beta_slow, + .head_base = 0, + }; + const NSUInteger scratch_bytes = use_q2_group4 ? + q2_scratch_bytes : + (use_group8 ? + (8u * ((NSUInteger)kv_lora_dim + (NSUInteger)qk_rope) * sizeof(uint16_t) + + 8u * (NSUInteger)kv_lora_dim * sizeof(float)) : + ((use_group2 ? + (512u + 2u * (NSUInteger)n_selected + 2u * (NSUInteger)kv_lora_dim) : + (256u + (NSUInteger)n_selected + (NSUInteger)kv_lora_dim)) * sizeof(float))); + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:qbuf offset:ds4_gpu_tensor_offset(q) atIndex:1]; + [enc setBuffer:lowbuf offset:ds4_gpu_tensor_offset(qk_low) atIndex:2]; + [enc setBuffer:kvcachebuf offset:ds4_gpu_tensor_offset(kv_lora_cache) atIndex:3]; + [enc setBuffer:ropecachebuf offset:ds4_gpu_tensor_offset(k_rope_cache) atIndex:4]; + [enc setBuffer:valuebuf offset:(NSUInteger)value_inner atIndex:5]; + [enc setBuffer:selectedbuf offset:ds4_gpu_tensor_offset(selected) atIndex:6]; + [enc setBuffer:headsbuf offset:ds4_gpu_tensor_offset(heads) atIndex:7]; + [enc setThreadgroupMemoryLength:scratch_bytes atIndex:0]; + if (use_q2_group4) { + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)n_head + 3u) / 4u, + ((NSUInteger)n_tokens + 1u) / 2u, + 1) + threadsPerThreadgroup:MTLSizeMake(32, 4, 1)]; + } else if (use_group8) { + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)n_head + 7u) / 8u, + (NSUInteger)n_tokens, + 1) + threadsPerThreadgroup:MTLSizeMake(32, 8, 1)]; + } else if (use_group2) { + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)n_head + 1u) / 2u, + (NSUInteger)n_tokens, + 1) + threadsPerThreadgroup:MTLSizeMake(256, 1, 1)]; + } else { + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_head, (NSUInteger)n_tokens, 1) + threadsPerThreadgroup:MTLSizeMake(256, 1, 1)]; + } + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM indexed batch attention")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_attention_indexed_batch_tensor( + ds4_gpu_tensor *heads, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const void *model_map, + uint64_t model_size, + uint64_t value_weight_offset, + const ds4_gpu_tensor *selected, + uint32_t n_tokens, + uint32_t n_selected, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t value_dim, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow) { + return ds4_gpu_glm_attention_indexed_batch_typed_tensor(heads, + q, + qk_low, + kv_lora_cache, + k_rope_cache, + model_map, + model_size, + value_weight_offset, + DS4_METAL_TENSOR_Q8_0, + selected, + n_tokens, + n_selected, + cache_cap, + cache_f16, + n_head, + kv_lora_dim, + qk_nope, + qk_rope, + value_dim, + n_ctx_orig, + freq_base, + freq_scale, + ext_factor, + attn_factor, + beta_fast, + beta_slow); +} + +int ds4_gpu_sort_i32_rows_asc_tensor( + ds4_gpu_tensor *dst, + const ds4_gpu_tensor *src, + uint32_t row_width, + uint32_t n_rows) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!dst || !src || row_width == 0 || n_rows == 0 || + (row_width & (row_width - 1u)) != 0) { + return 0; + } + + @autoreleasepool { + id pipeline = + ds4_gpu_hot_pipeline(g_dsv4_sort_i32_rows_asc_pipeline, + "kernel_dsv4_sort_i32_rows_asc"); + if (!pipeline) return 0; + + const uint64_t bytes = (uint64_t)row_width * n_rows * sizeof(int32_t); + id srcbuf = ds4_gpu_tensor_buffer(src); + id dstbuf = ds4_gpu_tensor_buffer(dst); + if (!srcbuf || !dstbuf || + ds4_gpu_tensor_bytes(src) < bytes || + ds4_gpu_tensor_bytes(dst) < bytes) { + fprintf(stderr, "ds4: Metal row sort received undersized buffers\n"); + return 0; + } + + NSUInteger threads = (NSUInteger)row_width; + const NSUInteger max_threads = pipeline.maxTotalThreadsPerThreadgroup; + if (max_threads != 0 && threads > max_threads) threads = max_threads; + if (threads == 0) return 0; + + const NSUInteger scratch_bytes = (NSUInteger)row_width * sizeof(int32_t); + const NSUInteger max_tg_mem = [g_device maxThreadgroupMemoryLength]; + if (max_tg_mem != 0 && scratch_bytes > max_tg_mem) { + fprintf(stderr, "ds4: Metal row sort scratch exceeds threadgroup memory limit\n"); + return 0; + } + + ds4_gpu_dsv4_topk_mask_args args = { + .ne00 = (int64_t)row_width, + .ne01 = (int64_t)n_rows, + .nb00 = sizeof(int32_t), + .nb01 = (uint64_t)row_width * sizeof(int32_t), + .ne0 = (int64_t)row_width, + .ne1 = (int64_t)n_rows, + .nb0 = sizeof(int32_t), + .nb1 = (uint64_t)row_width * sizeof(int32_t), + }; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:srcbuf offset:ds4_gpu_tensor_offset(src) atIndex:1]; + [enc setBuffer:dstbuf offset:ds4_gpu_tensor_offset(dst) atIndex:2]; + [enc setThreadgroupMemoryLength:scratch_bytes atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_rows, 1, 1) + threadsPerThreadgroup:MTLSizeMake(threads, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "sort i32 rows asc")) return 0; + } + + return 1; +} + +static int ds4_gpu_glm_attention_indexed_batch_lora_layout_tensor( + ds4_gpu_tensor *lora_out, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const ds4_gpu_tensor *selected, + uint32_t n_tokens, + uint32_t n_selected, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow, + bool selected_rows_valid) { + if (!g_initialized && !ds4_gpu_init()) return 0; + const uint32_t qk_dim = qk_nope + qk_rope; + if (!lora_out || !q || !qk_low || !kv_lora_cache || !k_rope_cache || !selected || + n_tokens == 0 || n_selected == 0 || cache_cap == 0 || n_selected > cache_cap || + n_head == 0 || kv_lora_dim == 0 || + qk_nope == 0 || qk_rope == 0 || (qk_rope & 1u) != 0 || + qk_dim < qk_nope || + !isfinite(freq_base) || freq_base <= 0.0f || + !isfinite(freq_scale) || freq_scale <= 0.0f || + !isfinite(ext_factor) || !isfinite(attn_factor) || + !isfinite(beta_fast) || !isfinite(beta_slow)) { + return 0; + } + + @autoreleasepool { + id lorabuf = ds4_gpu_tensor_buffer(lora_out); + id qbuf = ds4_gpu_tensor_buffer(q); + id lowbuf = ds4_gpu_tensor_buffer(qk_low); + id kvcachebuf = ds4_gpu_tensor_buffer(kv_lora_cache); + id ropecachebuf = ds4_gpu_tensor_buffer(k_rope_cache); + id selectedbuf = ds4_gpu_tensor_buffer(selected); + const uint64_t cache_elem_bytes = cache_f16 ? sizeof(uint16_t) : sizeof(float); + const uint64_t lora_bytes = + (uint64_t)n_tokens * n_head * kv_lora_dim * sizeof(float); + const uint64_t q_bytes = + (uint64_t)n_tokens * n_head * qk_dim * sizeof(float); + const uint64_t low_bytes = + (uint64_t)n_tokens * n_head * kv_lora_dim * sizeof(float); + const uint64_t kv_cache_bytes = + (uint64_t)cache_cap * kv_lora_dim * cache_elem_bytes; + const uint64_t rope_cache_bytes = + (uint64_t)cache_cap * qk_rope * cache_elem_bytes; + const uint64_t selected_bytes = + (uint64_t)n_tokens * n_selected * sizeof(uint32_t); + if (!lorabuf || !qbuf || !lowbuf || !kvcachebuf || !ropecachebuf || !selectedbuf || + ds4_gpu_tensor_bytes(lora_out) < lora_bytes || + ds4_gpu_tensor_bytes(q) < q_bytes || + ds4_gpu_tensor_bytes(qk_low) < low_bytes || + ds4_gpu_tensor_bytes(kv_lora_cache) < kv_cache_bytes || + ds4_gpu_tensor_bytes(k_rope_cache) < rope_cache_bytes || + ds4_gpu_tensor_bytes(selected) < selected_bytes) { + fprintf(stderr, "ds4: Metal GLM indexed batch attention-lora received undersized buffers\n"); + return 0; + } + + const bool use_vec_lora = + cache_f16 && kv_lora_dim == 512u && qk_rope == 64u; + const bool full_head_groups = (n_head % 8u) == 0u; + id pipeline = nil; + if (use_vec_lora && selected_rows_valid && full_head_groups) { + pipeline = ds4_gpu_hot_pipeline( + g_glm_attention_indexed_batch_lora_group8_vec_valid_fullheads_pipeline, + "kernel_glm_attention_indexed_batch_lora_group8_vec_valid_fullheads"); + } else if (use_vec_lora && selected_rows_valid) { + pipeline = ds4_gpu_hot_pipeline( + g_glm_attention_indexed_batch_lora_group8_vec_valid_pipeline, + "kernel_glm_attention_indexed_batch_lora_group8_vec_valid"); + } else if (use_vec_lora) { + pipeline = ds4_gpu_hot_pipeline( + g_glm_attention_indexed_batch_lora_group8_vec_pipeline, + "kernel_glm_attention_indexed_batch_lora_group8_vec"); + } else { + pipeline = ds4_gpu_hot_pipeline(g_glm_attention_indexed_batch_group8_pipeline, + "kernel_glm_attention_indexed_batch_group8"); + } + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_attention_indexed_batch_args args = { + .n_tokens = n_tokens, + .n_selected = n_selected, + .cache_cap = cache_cap, + .cache_f16 = cache_f16 ? 1u : 0u, + .n_head = n_head, + .kv_lora_dim = kv_lora_dim, + .qk_nope = qk_nope, + .qk_rope = qk_rope, + .value_dim = kv_lora_dim, + .n_ctx_orig = n_ctx_orig, + .value_row_bytes = 0, + .value_type = 1u, + .scale = 1.0f / sqrtf((float)qk_dim), + .freq_base = freq_base, + .freq_scale = freq_scale, + .ext_factor = ext_factor, + .attn_factor = attn_factor, + .beta_fast = beta_fast, + .beta_slow = beta_slow, + .head_base = 0, + }; + uint32_t head_count = n_head; + ds4_gpu_tp_attn_head_range(n_head, 8u, &args.head_base, &head_count); + const NSUInteger scratch_bytes = use_vec_lora ? + (16u * ((NSUInteger)kv_lora_dim / 4u) * sizeof(uint16_t) * 4u + + 16u * ((NSUInteger)qk_rope / 4u) * sizeof(float) * 4u) : + (8u * ((NSUInteger)kv_lora_dim + (NSUInteger)qk_rope) * sizeof(uint16_t) + + 8u * (NSUInteger)kv_lora_dim * sizeof(float)); + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:qbuf offset:ds4_gpu_tensor_offset(q) atIndex:1]; + [enc setBuffer:lowbuf offset:ds4_gpu_tensor_offset(qk_low) atIndex:2]; + [enc setBuffer:kvcachebuf offset:ds4_gpu_tensor_offset(kv_lora_cache) atIndex:3]; + [enc setBuffer:ropecachebuf offset:ds4_gpu_tensor_offset(k_rope_cache) atIndex:4]; + if (use_vec_lora) { + [enc setBuffer:selectedbuf offset:ds4_gpu_tensor_offset(selected) atIndex:5]; + [enc setBuffer:lorabuf offset:ds4_gpu_tensor_offset(lora_out) atIndex:6]; + } else { + [enc setBuffer:lorabuf offset:ds4_gpu_tensor_offset(lora_out) atIndex:5]; + [enc setBuffer:selectedbuf offset:ds4_gpu_tensor_offset(selected) atIndex:6]; + [enc setBuffer:lorabuf offset:ds4_gpu_tensor_offset(lora_out) atIndex:7]; + } + [enc setThreadgroupMemoryLength:scratch_bytes atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)head_count + 7u) / 8u, + (NSUInteger)n_tokens, + 1) + threadsPerThreadgroup:MTLSizeMake(32, 8, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM indexed batch attention-lora")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_attention_indexed_batch_lora_causal_tensor( + ds4_gpu_tensor *lora_out, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + uint32_t n_tokens, + uint32_t pos0, + uint32_t n_selected, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow) { + if (!g_initialized && !ds4_gpu_init()) return 0; + const uint32_t qk_dim = qk_nope + qk_rope; + if (!lora_out || !q || !qk_low || !kv_lora_cache || !k_rope_cache || + n_tokens == 0 || n_selected == 0 || cache_cap == 0 || n_selected > cache_cap || + pos0 > n_selected || n_tokens > n_selected - pos0 || + n_head == 0 || kv_lora_dim != 512u || + qk_nope == 0 || qk_rope != 64u || + qk_dim < qk_nope || !cache_f16 || + !isfinite(freq_base) || freq_base <= 0.0f || + !isfinite(freq_scale) || freq_scale <= 0.0f || + !isfinite(ext_factor) || !isfinite(attn_factor) || + !isfinite(beta_fast) || !isfinite(beta_slow)) { + return 0; + } + + @autoreleasepool { + id lorabuf = ds4_gpu_tensor_buffer(lora_out); + id qbuf = ds4_gpu_tensor_buffer(q); + id lowbuf = ds4_gpu_tensor_buffer(qk_low); + id kvcachebuf = ds4_gpu_tensor_buffer(kv_lora_cache); + id ropecachebuf = ds4_gpu_tensor_buffer(k_rope_cache); + const uint64_t cache_elem_bytes = sizeof(uint16_t); + const uint64_t lora_bytes = + (uint64_t)n_tokens * n_head * kv_lora_dim * sizeof(float); + const uint64_t q_bytes = + (uint64_t)n_tokens * n_head * qk_dim * sizeof(float); + const uint64_t low_bytes = + (uint64_t)n_tokens * n_head * kv_lora_dim * sizeof(float); + const uint64_t kv_cache_bytes = + (uint64_t)cache_cap * kv_lora_dim * cache_elem_bytes; + const uint64_t rope_cache_bytes = + (uint64_t)cache_cap * qk_rope * cache_elem_bytes; + if (!lorabuf || !qbuf || !lowbuf || !kvcachebuf || !ropecachebuf || + ds4_gpu_tensor_bytes(lora_out) < lora_bytes || + ds4_gpu_tensor_bytes(q) < q_bytes || + ds4_gpu_tensor_bytes(qk_low) < low_bytes || + ds4_gpu_tensor_bytes(kv_lora_cache) < kv_cache_bytes || + ds4_gpu_tensor_bytes(k_rope_cache) < rope_cache_bytes) { + fprintf(stderr, "ds4: Metal GLM causal batch attention-lora received undersized buffers\n"); + return 0; + } + + const bool full_head_groups = (n_head % 8u) == 0u; + id pipeline = full_head_groups ? + ds4_gpu_hot_pipeline( + g_glm_attention_indexed_batch_lora_group8_vec_causal_fullheads_pipeline, + "kernel_glm_attention_indexed_batch_lora_group8_vec_causal_fullheads") : + ds4_gpu_hot_pipeline( + g_glm_attention_indexed_batch_lora_group8_vec_causal_pipeline, + "kernel_glm_attention_indexed_batch_lora_group8_vec_causal"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_attention_indexed_batch_args args = { + .n_tokens = n_tokens, + .n_selected = n_selected, + .cache_cap = cache_cap, + .cache_f16 = 1u, + .n_head = n_head, + .kv_lora_dim = kv_lora_dim, + .qk_nope = qk_nope, + .qk_rope = qk_rope, + .value_dim = kv_lora_dim, + .n_ctx_orig = n_ctx_orig, + .value_row_bytes = 0, + .value_type = 1u, + .pos0 = pos0, + .scale = 1.0f / sqrtf((float)qk_dim), + .freq_base = freq_base, + .freq_scale = freq_scale, + .ext_factor = ext_factor, + .attn_factor = attn_factor, + .beta_fast = beta_fast, + .beta_slow = beta_slow, + .head_base = 0, + }; + uint32_t head_count = n_head; + ds4_gpu_tp_attn_head_range(n_head, 8u, &args.head_base, &head_count); + const NSUInteger scratch_bytes = + 16u * ((NSUInteger)kv_lora_dim / 4u) * sizeof(uint16_t) * 4u + + 16u * ((NSUInteger)qk_rope / 4u) * sizeof(float) * 4u; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:qbuf offset:ds4_gpu_tensor_offset(q) atIndex:1]; + [enc setBuffer:lowbuf offset:ds4_gpu_tensor_offset(qk_low) atIndex:2]; + [enc setBuffer:kvcachebuf offset:ds4_gpu_tensor_offset(kv_lora_cache) atIndex:3]; + [enc setBuffer:ropecachebuf offset:ds4_gpu_tensor_offset(k_rope_cache) atIndex:4]; + [enc setBuffer:lorabuf offset:ds4_gpu_tensor_offset(lora_out) atIndex:5]; + [enc setThreadgroupMemoryLength:scratch_bytes atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake(((NSUInteger)head_count + 7u) / 8u, + (NSUInteger)n_tokens, + 1) + threadsPerThreadgroup:MTLSizeMake(32, 8, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM causal indexed batch attention-lora")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_attention_indexed_batch_lora_tensor( + ds4_gpu_tensor *lora_out, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const ds4_gpu_tensor *selected, + uint32_t n_tokens, + uint32_t n_selected, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow) { + return ds4_gpu_glm_attention_indexed_batch_lora_layout_tensor(lora_out, + q, + qk_low, + kv_lora_cache, + k_rope_cache, + selected, + n_tokens, + n_selected, + cache_cap, + cache_f16, + n_head, + kv_lora_dim, + qk_nope, + qk_rope, + n_ctx_orig, + freq_base, + freq_scale, + ext_factor, + attn_factor, + beta_fast, + beta_slow, + false); +} + +int ds4_gpu_glm_attention_indexed_batch_lora_valid_tensor( + ds4_gpu_tensor *lora_out, + const ds4_gpu_tensor *q, + const ds4_gpu_tensor *qk_low, + const ds4_gpu_tensor *kv_lora_cache, + const ds4_gpu_tensor *k_rope_cache, + const ds4_gpu_tensor *selected, + uint32_t n_tokens, + uint32_t n_selected, + uint32_t cache_cap, + bool cache_f16, + uint32_t n_head, + uint32_t kv_lora_dim, + uint32_t qk_nope, + uint32_t qk_rope, + uint32_t n_ctx_orig, + float freq_base, + float freq_scale, + float ext_factor, + float attn_factor, + float beta_fast, + float beta_slow) { + return ds4_gpu_glm_attention_indexed_batch_lora_layout_tensor(lora_out, + q, + qk_low, + kv_lora_cache, + k_rope_cache, + selected, + n_tokens, + n_selected, + cache_cap, + cache_f16, + n_head, + kv_lora_dim, + qk_nope, + qk_rope, + n_ctx_orig, + freq_base, + freq_scale, + ext_factor, + attn_factor, + beta_fast, + beta_slow, + true); +} + +int ds4_gpu_glm_router_select_tensor( + ds4_gpu_tensor *selected, + ds4_gpu_tensor *weights, + ds4_gpu_tensor *probs, + const void *model_map, + uint64_t model_size, + uint64_t bias_offset, + const ds4_gpu_tensor *logits, + uint32_t n_expert, + uint32_t n_expert_used, + float expert_weight_scale) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!selected || !weights || !probs || !logits || !model_map || + n_expert == 0 || n_expert > 256u || + n_expert_used == 0 || n_expert_used > n_expert) { + return 0; + } + + @autoreleasepool { + id logitsbuf = ds4_gpu_tensor_buffer(logits); + id selectedbuf = ds4_gpu_tensor_buffer(selected); + id weightsbuf = ds4_gpu_tensor_buffer(weights); + id probsbuf = ds4_gpu_tensor_buffer(probs); + if (!logitsbuf || !selectedbuf || !weightsbuf || !probsbuf || + ds4_gpu_tensor_bytes(logits) < (uint64_t)n_expert * sizeof(float) || + ds4_gpu_tensor_bytes(selected) < (uint64_t)n_expert_used * sizeof(int32_t) || + ds4_gpu_tensor_bytes(weights) < (uint64_t)n_expert_used * sizeof(float) || + ds4_gpu_tensor_bytes(probs) < (uint64_t)n_expert * sizeof(float)) { + fprintf(stderr, "ds4: Metal GLM router received undersized buffers\n"); + return 0; + } + + const uint64_t bias_bytes = (uint64_t)n_expert * sizeof(float); + if (bias_offset > model_size || bias_bytes > model_size - bias_offset) { + fprintf(stderr, "ds4: Metal GLM router bias range is outside the mapped model\n"); + return 0; + } + const bool exact_bias_view = + bias_bytes <= (1ull << 20) && + getenv("DS4_METAL_DISABLE_DECODE_ROUTER_BIAS_EXACT_VIEWS") == NULL; + uint64_t bias_inner = 0; + id biasbuf = exact_bias_view ? + ds4_gpu_wrap_model_exact_range(model_map, + model_size, + bias_offset, + bias_bytes, + &bias_inner) : + ds4_gpu_wrap_model_range(model_map, + model_size, + bias_offset, + bias_bytes, + &bias_inner); + if (!biasbuf) return 0; + + id pipeline = + ds4_gpu_hot_pipeline(g_glm_router_select_one_pipeline, + "kernel_glm_router_select_one"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_router_select_one_args args = { + .n_expert = n_expert, + .n_expert_used = n_expert_used, + .expert_weight_scale = expert_weight_scale, + .pad0 = 0, + }; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:logitsbuf offset:ds4_gpu_tensor_offset(logits) atIndex:1]; + [enc setBuffer:biasbuf offset:(NSUInteger)bias_inner atIndex:2]; + [enc setBuffer:selectedbuf offset:ds4_gpu_tensor_offset(selected) atIndex:3]; + [enc setBuffer:weightsbuf offset:ds4_gpu_tensor_offset(weights) atIndex:4]; + [enc setBuffer:probsbuf offset:ds4_gpu_tensor_offset(probs) atIndex:5]; + [enc setThreadgroupMemoryLength:256u * sizeof(float) + 256u * sizeof(int32_t) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake(1, 1, 1) + threadsPerThreadgroup:MTLSizeMake(256, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM router select")) return 0; + } + + return 1; +} + +int ds4_gpu_glm_router_select_batch_tensor( + ds4_gpu_tensor *selected, + ds4_gpu_tensor *weights, + ds4_gpu_tensor *probs, + const void *model_map, + uint64_t model_size, + uint64_t bias_offset, + const ds4_gpu_tensor *logits, + uint32_t n_expert, + uint32_t n_expert_used, + float expert_weight_scale, + uint32_t n_tokens) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!selected || !weights || !probs || !logits || !model_map || + n_tokens == 0 || + n_expert == 0 || n_expert > 256u || + n_expert_used == 0 || n_expert_used > n_expert) { + return 0; + } + + @autoreleasepool { + id logitsbuf = ds4_gpu_tensor_buffer(logits); + id selectedbuf = ds4_gpu_tensor_buffer(selected); + id weightsbuf = ds4_gpu_tensor_buffer(weights); + id probsbuf = ds4_gpu_tensor_buffer(probs); + const uint64_t logits_bytes = (uint64_t)n_tokens * n_expert * sizeof(float); + const uint64_t selected_bytes = (uint64_t)n_tokens * n_expert_used * sizeof(int32_t); + const uint64_t weights_bytes = (uint64_t)n_tokens * n_expert_used * sizeof(float); + const uint64_t probs_bytes = (uint64_t)n_tokens * n_expert * sizeof(float); + if (!logitsbuf || !selectedbuf || !weightsbuf || !probsbuf || + ds4_gpu_tensor_bytes(logits) < logits_bytes || + ds4_gpu_tensor_bytes(selected) < selected_bytes || + ds4_gpu_tensor_bytes(weights) < weights_bytes || + ds4_gpu_tensor_bytes(probs) < probs_bytes) { + fprintf(stderr, "ds4: Metal GLM batch router received undersized buffers\n"); + return 0; + } + + const uint64_t bias_bytes = (uint64_t)n_expert * sizeof(float); + if (bias_offset > model_size || bias_bytes > model_size - bias_offset) { + fprintf(stderr, "ds4: Metal GLM batch router bias range is outside the mapped model\n"); + return 0; + } + uint64_t bias_inner = 0; + id biasbuf = ds4_gpu_wrap_model_range(model_map, model_size, + bias_offset, bias_bytes, + &bias_inner); + if (!biasbuf) return 0; + + id pipeline = + ds4_gpu_hot_pipeline(g_glm_router_select_one_pipeline, + "kernel_glm_router_select_one"); + if (!pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + ds4_gpu_glm_router_select_one_args args = { + .n_expert = n_expert, + .n_expert_used = n_expert_used, + .expert_weight_scale = expert_weight_scale, + .pad0 = 0, + }; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:logitsbuf offset:ds4_gpu_tensor_offset(logits) atIndex:1]; + [enc setBuffer:biasbuf offset:(NSUInteger)bias_inner atIndex:2]; + [enc setBuffer:selectedbuf offset:ds4_gpu_tensor_offset(selected) atIndex:3]; + [enc setBuffer:weightsbuf offset:ds4_gpu_tensor_offset(weights) atIndex:4]; + [enc setBuffer:probsbuf offset:ds4_gpu_tensor_offset(probs) atIndex:5]; + [enc setThreadgroupMemoryLength:256u * sizeof(float) + 256u * sizeof(int32_t) atIndex:0]; + [enc dispatchThreadgroups:MTLSizeMake((NSUInteger)n_tokens, 1, 1) + threadsPerThreadgroup:MTLSizeMake(256, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM batch router select")) return 0; + } + + return 1; +} + +static bool ds4_gpu_glm_gate_pair_type_supported( + uint32_t gate_type, + uint32_t up_type) { + return gate_type == up_type && + (gate_type == DS4_METAL_TENSOR_Q2_K || + gate_type == DS4_METAL_TENSOR_Q4_K || + gate_type == DS4_METAL_TENSOR_Q5_K); +} + +static bool ds4_gpu_glm_down_type_supported(uint32_t down_type) { + return down_type == DS4_METAL_TENSOR_Q2_K || + down_type == DS4_METAL_TENSOR_Q4_K || + down_type == DS4_METAL_TENSOR_Q5_K || + down_type == DS4_METAL_TENSOR_Q6_K; +} + +int ds4_gpu_glm_routed_moe_one_tensor( + ds4_gpu_tensor *out, + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t down_offset, + uint32_t gate_type, + uint32_t up_type, + uint32_t down_type, + uint64_t gate_expert_bytes, + uint64_t gate_row_bytes, + uint64_t up_expert_bytes, + uint64_t up_row_bytes, + uint64_t down_expert_bytes, + uint64_t down_row_bytes, + uint32_t expert_in_dim, + uint32_t expert_mid_dim, + uint32_t out_dim, + const ds4_gpu_tensor *selected, + const ds4_gpu_tensor *weights, + uint32_t n_total_expert, + uint32_t n_expert, + uint32_t layer_index, + const ds4_gpu_tensor *x, + bool force_resident) { + if (!g_initialized && !ds4_gpu_init()) return 0; + /* TP sharding: only the owned contiguous expert range is mapped, + * so bind from the owned base, validate only its bytes, and tell the + * kernels the first expert id present at that base. */ + uint32_t first_expert = 0; + uint32_t n_bind_expert = 0; + ds4_gpu_tp_expert_range(n_total_expert, &first_expert, &n_bind_expert); + const int32_t tp_expert_base_host = (int32_t)first_expert; + gate_offset += (uint64_t)first_expert * gate_expert_bytes; + up_offset += (uint64_t)first_expert * up_expert_bytes; + down_offset += (uint64_t)first_expert * down_expert_bytes; + + if (!out || !mid || !model_map || !selected || !weights || !x || + n_total_expert == 0 || n_expert == 0 || n_expert > 256u || + n_expert > n_total_expert || + expert_in_dim == 0 || expert_mid_dim == 0 || out_dim == 0 || + gate_expert_bytes == 0 || gate_row_bytes == 0 || + up_expert_bytes == 0 || up_row_bytes == 0 || + down_expert_bytes == 0 || down_row_bytes == 0 || + (expert_in_dim % 256u) != 0 || + (expert_mid_dim % 256u) != 0 || + !ds4_gpu_glm_gate_pair_type_supported(gate_type, up_type) || + !ds4_gpu_glm_down_type_supported(down_type)) { + return 0; + } + + if ((uint64_t)n_total_expert > UINT64_MAX / gate_expert_bytes || + (uint64_t)n_total_expert > UINT64_MAX / up_expert_bytes || + (uint64_t)n_total_expert > UINT64_MAX / down_expert_bytes || + (uint64_t)expert_mid_dim > UINT64_MAX / gate_row_bytes || + (uint64_t)expert_mid_dim > UINT64_MAX / up_row_bytes || + (uint64_t)out_dim > UINT64_MAX / down_row_bytes) { + fprintf(stderr, "ds4: Metal GLM routed MoE tensor byte size overflow\n"); + return 0; + } + + const uint64_t gate_tensor_bytes = (uint64_t)n_bind_expert * gate_expert_bytes; + const uint64_t up_tensor_bytes = (uint64_t)n_bind_expert * up_expert_bytes; + const uint64_t down_tensor_bytes = (uint64_t)n_bind_expert * down_expert_bytes; + if (gate_expert_bytes != (uint64_t)expert_mid_dim * gate_row_bytes || + up_expert_bytes != (uint64_t)expert_mid_dim * up_row_bytes || + down_expert_bytes != (uint64_t)out_dim * down_row_bytes) { + fprintf(stderr, "ds4: Metal GLM routed MoE received inconsistent expert strides\n"); + return 0; + } + if (layer_index == 3u) { + ds4_gpu_stream_expert_cache_note_decode_token(); + } + if (gate_offset > model_size || gate_tensor_bytes > model_size - gate_offset || + up_offset > model_size || up_tensor_bytes > model_size - up_offset || + down_offset > model_size || down_tensor_bytes > model_size - down_offset) { + fprintf(stderr, "ds4: Metal GLM routed MoE tensor range is outside the mapped model\n"); + return 0; + } + + @autoreleasepool { + id xbuf = ds4_gpu_tensor_buffer(x); + id midbuf = ds4_gpu_tensor_buffer(mid); + id outbuf = ds4_gpu_tensor_buffer(out); + id selectedbuf = ds4_gpu_tensor_buffer(selected); + id weightsbuf = ds4_gpu_tensor_buffer(weights); + const uint64_t x_bytes = (uint64_t)expert_in_dim * sizeof(float); + const uint64_t mid_bytes = (uint64_t)n_expert * expert_mid_dim * sizeof(float); + const uint64_t out_bytes = (uint64_t)out_dim * sizeof(float); + if (!xbuf || !midbuf || !outbuf || !selectedbuf || !weightsbuf || + ds4_gpu_tensor_bytes(x) < x_bytes || + ds4_gpu_tensor_bytes(mid) < mid_bytes || + ds4_gpu_tensor_bytes(out) < out_bytes || + ds4_gpu_tensor_bytes(selected) < (uint64_t)n_expert * sizeof(int32_t) || + ds4_gpu_tensor_bytes(weights) < (uint64_t)n_expert * sizeof(float)) { + fprintf(stderr, "ds4: Metal GLM routed MoE received undersized activation buffers\n"); + return 0; + } + + const BOOL gate_pair_q2 = gate_type == DS4_METAL_TENSOR_Q2_K; + const BOOL gate_pair_q5 = gate_type == DS4_METAL_TENSOR_Q5_K; + const BOOL down_scalar_q2 = down_type == DS4_METAL_TENSOR_Q2_K; + const BOOL down_scalar_q4 = down_type == DS4_METAL_TENSOR_Q4_K; + const BOOL down_simd_q4 = down_scalar_q4; + const BOOL down_simd_q5 = down_type == DS4_METAL_TENSOR_Q5_K; + const BOOL down_simd_q6 = down_type == DS4_METAL_TENSOR_Q6_K; + const BOOL down_simd = down_simd_q4 || down_simd_q5 || down_simd_q6; + const BOOL stream_addr_q2 = + gate_pair_q2 && down_scalar_q2 && + g_glm_q2_k_addr_pair_swiglu2_f32_pipeline != nil && + g_glm_q2_k_addr_down_f32_pipeline != nil; + const BOOL stream_addr_q4 = + !gate_pair_q2 && !gate_pair_q5 && down_scalar_q4 && + g_glm_q4_k_addr_pair_swiglu_f32_pipeline != nil && + g_glm_q4_k_addr_down_f32_pipeline != nil; + BOOL use_stream_expert_addr_table = + g_ssd_streaming_mode && + !force_resident && + getenv("DS4_METAL_GLM_DISABLE_STREAMING_EXPERT_CACHE") == NULL && + (stream_addr_q2 || stream_addr_q4) && + layer_index < DS4_METAL_STREAM_EXPERT_CACHE_MAX_LAYER && + n_total_expert <= DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT && + n_expert <= 8u && + ds4_gpu_stream_expert_cache_configured_budget() >= n_expert && + ds4_gpu_stream_expert_cache_note_expert_size(gate_expert_bytes, + down_expert_bytes) && + ds4_gpu_stream_expert_cache_effective_cap(layer_index, + n_total_expert, + n_expert) != 0; + int32_t stream_selected_ids[8] = {0, 0, 0, 0, 0, 0, 0, 0}; + ds4_gpu_stream_expert_cache_entry *stream_entries[8] = { + NULL, NULL, NULL, NULL, NULL, NULL, NULL, NULL + }; + uint64_t stream_gate_abs_offsets[8] = {0, 0, 0, 0, 0, 0, 0, 0}; + uint64_t stream_up_abs_offsets[8] = {0, 0, 0, 0, 0, 0, 0, 0}; + uint64_t stream_down_abs_offsets[8] = {0, 0, 0, 0, 0, 0, 0, 0}; + uint32_t stream_missing_mask = 0; + uint32_t stream_entry_count = 0; + uint32_t stream_resident_mask = 0; + BOOL use_stream_split_deferred = false; + id stream_gate_addr_buf = nil; + id stream_up_addr_buf = nil; + id stream_down_addr_buf = nil; + const int glm_stream_timing = + ds4_gpu_stream_expert_timing_summary_enabled(); + + if (use_stream_expert_addr_table) { + const int had_batch = g_batch_cb != nil; + int stream_ok = 1; + const int have_prefetched_selected = + ds4_gpu_glm_stream_selected_prefetch_take(model_map, + model_size, + layer_index, + n_total_expert, + n_expert, + gate_offset, + up_offset, + down_offset, + gate_expert_bytes, + down_expert_bytes, + stream_selected_ids); + if (have_prefetched_selected) { + if (had_batch && g_batch_has_work && + g_stream_expert_pending_load.active && + ds4_gpu_flush_commands() == 0) { + stream_ok = 0; + } + } else { + if (had_batch && ds4_gpu_end_commands() == 0) { + stream_ok = 0; + } + if (stream_ok && + ds4_gpu_tensor_read(selected, + 0, + stream_selected_ids, + (uint64_t)n_expert * sizeof(stream_selected_ids[0])) == 0) { + stream_ok = 0; + } + } + for (uint32_t i = 0; stream_ok && i < n_expert; i++) { + if (stream_selected_ids[i] < 0 || + (uint32_t)stream_selected_ids[i] >= n_total_expert) { + fprintf(stderr, + "ds4: Metal GLM routed MoE selected expert id %d is outside 0..%u\n", + stream_selected_ids[i], + n_total_expert); + stream_ok = 0; + } + } + if (stream_ok) { + ds4_gpu_stream_expert_cache_note_selected_hotness(layer_index, + stream_selected_ids, + n_expert); + if (!ds4_gpu_moe_selected_hotlist_record(layer_index, + stream_selected_ids, + n_expert, + n_total_expert)) { + stream_ok = 0; + } + } + if (stream_ok) { + g_glm_stream_expert_addr_table_building++; + for (uint32_t i = 0; stream_ok && i < n_expert; i++) { + const uint64_t expert_id = (uint64_t)(uint32_t)stream_selected_ids[i]; + if (expert_id > UINT64_MAX / gate_expert_bytes || + expert_id > UINT64_MAX / down_expert_bytes) { + fprintf(stderr, "ds4: Metal GLM routed MoE selected expert offset overflow\n"); + stream_ok = 0; + break; + } + const uint64_t gate_rel = expert_id * gate_expert_bytes; + const uint64_t down_rel = expert_id * down_expert_bytes; + if (gate_rel > UINT64_MAX - gate_offset || + gate_rel > UINT64_MAX - up_offset || + down_rel > UINT64_MAX - down_offset) { + fprintf(stderr, "ds4: Metal GLM routed MoE selected expert offset overflow\n"); + stream_ok = 0; + break; + } + stream_gate_abs_offsets[i] = gate_offset + gate_rel; + stream_up_abs_offsets[i] = up_offset + gate_rel; + stream_down_abs_offsets[i] = down_offset + down_rel; + stream_entries[i] = + ds4_gpu_stream_expert_cache_peek(model_map, + model_size, + layer_index, + (uint32_t)stream_selected_ids[i], + n_total_expert, + n_expert, + stream_gate_abs_offsets[i], + stream_up_abs_offsets[i], + stream_down_abs_offsets[i], + gate_expert_bytes, + down_expert_bytes); + if (!stream_entries[i]) { + stream_missing_mask |= 1u << i; + } else { + stream_resident_mask |= 1u << i; + } + } + if (stream_ok && glm_stream_timing) { + ds4_gpu_stream_expert_timing_note_cache_class( + stream_resident_mask, + stream_missing_mask); + } + use_stream_split_deferred = + stream_ok && + getenv("DS4_METAL_DISABLE_GLM_STREAMING_EXPERT_SPLIT") == NULL && + stream_missing_mask != 0 && + stream_resident_mask != 0 && + ds4_gpu_stream_expert_split_worthwhile(stream_resident_mask, + stream_missing_mask) && + ds4_gpu_stream_expert_split_ready() && + ((gate_pair_q2 && + g_glm_q2_k_addr_pair_swiglu2_masked_f32_pipeline != nil) || + (!gate_pair_q2 && !gate_pair_q5 && + g_glm_q4_k_addr_pair_swiglu_masked_f32_pipeline != nil)); + if (use_stream_split_deferred) { + const ds4_gpu_stream_expert_table table = { + .model_map = model_map, + .model_size = model_size, + .layer = layer_index, + .n_total_expert = n_total_expert, + .gate_offset = gate_offset, + .up_offset = up_offset, + .down_offset = down_offset, + .gate_expert_bytes = gate_expert_bytes, + .down_expert_bytes = down_expert_bytes, + }; + if (!ds4_gpu_stream_expert_cache_begin_selected_load( + &table, + stream_selected_ids, + n_expert)) { + stream_ok = 0; + } + } + if (stream_ok && stream_missing_mask != 0 && + !use_stream_split_deferred && + !ds4_gpu_stream_expert_cache_load_selected_missing( + model_map, + model_size, + layer_index, + stream_selected_ids, + n_total_expert, + n_expert, + stream_gate_abs_offsets, + stream_up_abs_offsets, + stream_down_abs_offsets, + gate_expert_bytes, + down_expert_bytes, + stream_missing_mask, + stream_entries)) { + fprintf(stderr, + "ds4: Metal GLM streaming expert cache failed to load " + "layer=%u missing=0x%x budget=%u\n", + layer_index, + stream_missing_mask, + ds4_gpu_stream_expert_cache_configured_budget()); + stream_ok = 0; + } + for (uint32_t i = 0; stream_ok && i < n_expert; i++) { + ds4_gpu_stream_expert_cache_entry *entry = stream_entries[i]; + if (!entry) { + if (use_stream_split_deferred && + (stream_missing_mask & (1u << i)) != 0) { + continue; + } + stream_ok = 0; + break; + } + if (!ds4_gpu_stream_expert_cache_set_addr_slot( + layer_index, + (uint32_t)stream_selected_ids[i], + entry->gate_buffer, + entry->gate_inner, + entry->up_buffer, + entry->up_inner, + entry->down_buffer, + entry->down_inner)) { + stream_ok = 0; + break; + } + stream_entry_count++; + } + if (stream_ok && + !ds4_gpu_stream_expert_cache_addr_buffers(layer_index, + &stream_gate_addr_buf, + &stream_up_addr_buf, + &stream_down_addr_buf)) { + stream_ok = 0; + } + g_glm_stream_expert_addr_table_building--; + } + if (!have_prefetched_selected && had_batch && + ds4_gpu_begin_commands() == 0) { + stream_ok = 0; + } + if (!stream_ok) return 0; + ds4_gpu_stream_expert_cache_prune_layer(layer_index, + n_total_expert, + n_expert, + stream_selected_ids, + n_expert); + ds4_gpu_stream_expert_cache_prune_global(layer_index, + stream_selected_ids, + n_expert); + } + + uint64_t gate_inner = 0; + uint64_t up_inner = 0; + uint64_t down_inner = 0; + id gatebuf = nil; + id upbuf = nil; + id downbuf = nil; + if (!use_stream_expert_addr_table) { + gatebuf = ds4_gpu_wrap_model_range(model_map, model_size, + gate_offset, gate_tensor_bytes, + &gate_inner); + upbuf = ds4_gpu_wrap_model_range(model_map, model_size, + up_offset, up_tensor_bytes, + &up_inner); + downbuf = ds4_gpu_wrap_model_range(model_map, model_size, + down_offset, down_tensor_bytes, + &down_inner); + if (!gatebuf || !upbuf || !downbuf) return 0; + } + + id pair_pipeline = + (use_stream_split_deferred ? + (gate_pair_q2 ? + ds4_gpu_hot_pipeline(g_glm_q2_k_addr_pair_swiglu2_masked_f32_pipeline, + "kernel_glm_q2_K_addr_pair_swiglu2_f32_masked") : + ds4_gpu_hot_pipeline(g_glm_q4_k_addr_pair_swiglu_masked_f32_pipeline, + "kernel_glm_q4_K_addr_pair_swiglu_f32_masked")) : + use_stream_expert_addr_table ? + (gate_pair_q2 ? + ds4_gpu_hot_pipeline(g_glm_q2_k_addr_pair_swiglu2_f32_pipeline, + "kernel_glm_q2_K_addr_pair_swiglu2_f32") : + ds4_gpu_hot_pipeline(g_glm_q4_k_addr_pair_swiglu_f32_pipeline, + "kernel_glm_q4_K_addr_pair_swiglu_f32")) : + gate_pair_q2 ? + ds4_gpu_hot_pipeline(g_glm_q2_k_pair_swiglu_f32_pipeline, + "kernel_glm_q2_K_pair_swiglu_f32") : + gate_pair_q5 ? + ds4_gpu_hot_pipeline(g_glm_q5_k_pair_swiglu_f32_pipeline, + "kernel_glm_q5_K_pair_swiglu_f32") : + ds4_gpu_hot_pipeline(g_glm_q4_k_pair_swiglu2_f32_pipeline, + "kernel_glm_q4_K_pair_swiglu2_f32")); + id down_pipeline = + (use_stream_expert_addr_table ? + (down_scalar_q2 ? + ds4_gpu_hot_pipeline(g_glm_q2_k_addr_down_f32_pipeline, + "kernel_glm_q2_K_addr_down_f32") : + ds4_gpu_hot_pipeline(g_glm_q4_k_addr_down_f32_pipeline, + "kernel_glm_q4_K_addr_down_f32")) : + down_scalar_q2 ? + ds4_gpu_hot_pipeline(g_glm_q2_k_down_f32_pipeline, + "kernel_glm_q2_K_down_f32") : + down_scalar_q4 ? + ds4_gpu_hot_pipeline(g_glm_q4_k_down_f32_pipeline, + "kernel_glm_q4_K_down_f32") : + down_simd_q5 ? + ds4_gpu_hot_pipeline(g_glm_q5_k_down_f32_pipeline, + "kernel_glm_q5_K_down_f32") : + ds4_gpu_hot_pipeline(g_glm_q6_k_down_f32_pipeline, + "kernel_glm_q6_K_down_f32")); + if (!pair_pipeline || !down_pipeline) return 0; + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + const bool glm_moe_stage_profile = + g_batch_cb != nil && + ds4_gpu_stage_profile_enabled_for_layer( + "DS4_METAL_GLM_MOE_ONE_STAGE_PROFILE", + "DS4_METAL_GLM_MOE_ONE_STAGE_PROFILE_LAYER", + layer_index); + const char *glm_moe_stage_filter = + getenv("DS4_METAL_GLM_MOE_STAGE_PROFILE_FILTER"); + const char *glm_pair_path = + use_stream_expert_addr_table ? + (gate_pair_q2 ? "q2_stream_addr_swiglu" : + "q4_stream_addr_swiglu") : + gate_pair_q2 ? "q2_scalar_swiglu" : + gate_pair_q5 ? "q5_pair_simd_swiglu" : "q4_pair2_simd_swiglu"; + const char *glm_down_path = + use_stream_expert_addr_table ? + (down_scalar_q2 ? "q2_stream_addr_down" : + "q4_stream_addr_down_simd") : + down_scalar_q2 ? "q2_down_simd" : + down_scalar_q4 ? "q4_down_simd" : + down_simd_q5 ? "q5_down_simd" : "q6_down_simd"; + double glm_moe_stage_t0 = 0.0; + if (glm_moe_stage_profile) { + if (ds4_gpu_end_commands() == 0 || ds4_gpu_begin_commands() == 0) { + return 0; + } + cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + glm_moe_stage_t0 = ds4_gpu_now_ms(); + } + int ok = 1; +#define DS4_METAL_PROFILE_GLM_MOE_ONE_STAGE(name) do { \ + if (ok && glm_moe_stage_profile) { \ + if (ds4_gpu_end_commands() == 0) { \ + ok = 0; \ + } else { \ + const char *stage_name = (name); \ + const double now_ms = ds4_gpu_now_ms(); \ + const int print_stage = \ + !glm_moe_stage_filter || !glm_moe_stage_filter[0] || \ + strstr(stage_name, glm_moe_stage_filter) != NULL; \ + if (print_stage) { \ + fprintf(stderr, \ + "ds4: Metal GLM routed MoE one stage layer=%u tokens=1 experts=%u " \ + "gate=%s down=%s pair=%s down_path=%s %s=%.3f ms\n", \ + layer_index, n_expert, \ + ds4_gpu_metal_tensor_type_name(gate_type), \ + ds4_gpu_metal_tensor_type_name(down_type), \ + glm_pair_path, glm_down_path, \ + stage_name, now_ms - glm_moe_stage_t0); \ + } \ + glm_moe_stage_t0 = now_ms; \ + if (ds4_gpu_begin_commands() == 0) { \ + ok = 0; \ + } else { \ + cb = ds4_gpu_command_buffer(&owned); \ + if (!cb) ok = 0; \ + } \ + } \ + } \ + } while (0) + + ds4_gpu_glm_routed_moe_args args = { + .tp_rank = g_tp_split_rank, + .tp_world = g_tp_split_world, + .tp_expert_base = tp_expert_base_host, + .in_dim = expert_in_dim, + .mid_dim = expert_mid_dim, + .out_dim = out_dim, + .n_total_expert = n_total_expert, + .n_expert_used = n_expert, + .n_tokens = 1, + .mid_token_stride = n_expert * expert_mid_dim, + .down_type = down_type, + .gate_expert_bytes = gate_expert_bytes, + .gate_row_bytes = gate_row_bytes, + .up_expert_bytes = up_expert_bytes, + .up_row_bytes = up_row_bytes, + .down_expert_bytes = down_expert_bytes, + .down_row_bytes = down_row_bytes, + }; + const NSUInteger pair_x_groups = + gate_pair_q2 ? (use_stream_expert_addr_table ? + (NSUInteger)((expert_mid_dim + 1u) / 2u) : + (NSUInteger)((expert_mid_dim + 7u) / 8u)) : + gate_pair_q5 ? (NSUInteger)((expert_mid_dim + 7u) / 8u) : + use_stream_expert_addr_table ? (NSUInteger)((expert_mid_dim + 3u) / 4u) : + (NSUInteger)((expert_mid_dim + 1u) / 2u); + const NSUInteger pair_threadgroup_bytes = 0u; + const NSUInteger pair_threads = 64u; + const NSUInteger down_x_groups = + down_scalar_q2 ? (NSUInteger)((out_dim + 7u) / 8u) : + down_simd_q4 ? (NSUInteger)((out_dim + 3u) / 4u) : + down_simd_q5 ? (NSUInteger)((out_dim + 3u) / 4u) : + down_simd_q6 ? (NSUInteger)((out_dim + 3u) / 4u) : + (NSUInteger)out_dim; + const NSUInteger down_threadgroup_bytes = + (down_scalar_q2 || down_simd) ? 0u : 256u * sizeof(float); + const NSUInteger down_threads = + (down_scalar_q2 || down_simd) ? 64u : 256u; + if (use_stream_expert_addr_table && + !ds4_gpu_stream_expert_cache_mark_entries_inflight( + stream_entries, + use_stream_split_deferred ? n_expert : stream_entry_count, + use_stream_split_deferred ? stream_resident_mask : 0)) { + return 0; + } + + const int glm_stream_split_timing = + use_stream_split_deferred && glm_stream_timing; + double glm_stream_split_t0 = + glm_stream_split_timing ? ds4_gpu_now_ms() : 0.0; + double glm_stream_split_resident_ms = 0.0; + double glm_stream_split_missing_load_ms = 0.0; + double glm_stream_split_missing_wait_ms = 0.0; + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pair_pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + if (use_stream_split_deferred) { + [enc setBytes:&stream_resident_mask length:sizeof(stream_resident_mask) atIndex:1]; + [enc setBuffer:stream_gate_addr_buf offset:0u atIndex:2]; + [enc setBuffer:stream_up_addr_buf offset:0u atIndex:3]; + [enc setBuffer:xbuf offset:ds4_gpu_tensor_offset(x) atIndex:4]; + [enc setBuffer:selectedbuf offset:ds4_gpu_tensor_offset(selected) atIndex:5]; + [enc setBuffer:weightsbuf offset:ds4_gpu_tensor_offset(weights) atIndex:6]; + [enc setBuffer:midbuf offset:ds4_gpu_tensor_offset(mid) atIndex:7]; + } else { + [enc setBuffer:use_stream_expert_addr_table ? stream_gate_addr_buf : gatebuf + offset:use_stream_expert_addr_table ? 0u : (NSUInteger)gate_inner + atIndex:1]; + [enc setBuffer:use_stream_expert_addr_table ? stream_up_addr_buf : upbuf + offset:use_stream_expert_addr_table ? 0u : (NSUInteger)up_inner + atIndex:2]; + [enc setBuffer:xbuf offset:ds4_gpu_tensor_offset(x) atIndex:3]; + [enc setBuffer:selectedbuf offset:ds4_gpu_tensor_offset(selected) atIndex:4]; + [enc setBuffer:weightsbuf offset:ds4_gpu_tensor_offset(weights) atIndex:5]; + [enc setBuffer:midbuf offset:ds4_gpu_tensor_offset(mid) atIndex:6]; + } + if (use_stream_expert_addr_table) { + const uint32_t use_count = + use_stream_split_deferred ? n_expert : stream_entry_count; + const uint32_t use_mask = + use_stream_split_deferred ? stream_resident_mask : 0; + for (uint32_t i = 0; i < use_count; i++) { + if (use_mask != 0 && (use_mask & (1u << i)) == 0) continue; + [enc useResource:stream_entries[i]->gate_buffer usage:MTLResourceUsageRead]; + [enc useResource:stream_entries[i]->up_buffer usage:MTLResourceUsageRead]; + } + } + if (pair_threadgroup_bytes != 0u) { + [enc setThreadgroupMemoryLength:pair_threadgroup_bytes atIndex:0]; + } + [enc dispatchThreadgroups:MTLSizeMake(pair_x_groups, + (NSUInteger)n_expert, + 1) + threadsPerThreadgroup:MTLSizeMake(pair_threads, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + DS4_METAL_PROFILE_GLM_MOE_ONE_STAGE("pair"); + + if (ok && use_stream_split_deferred) { + id resident_cb = nil; + const int resident_owned = owned; + if (owned) { + resident_cb = cb; + [resident_cb commit]; + cb = nil; + } else { + ok = ds4_gpu_flush_commands(); + } + if (glm_stream_split_timing) { + const double now_ms = ds4_gpu_now_ms(); + glm_stream_split_resident_ms = now_ms - glm_stream_split_t0; + glm_stream_split_t0 = now_ms; + } + if (ok) { + ok = ds4_gpu_stream_expert_pending_load_finish(stream_entries); + } + if (glm_stream_split_timing) { + const double now_ms = ds4_gpu_now_ms(); + glm_stream_split_missing_load_ms = now_ms - glm_stream_split_t0; + glm_stream_split_t0 = now_ms; + } + if (ok) { + ds4_gpu_stream_expert_cache_prune_layer(layer_index, + n_total_expert, + n_expert, + stream_selected_ids, + n_expert); + ds4_gpu_stream_expert_cache_prune_global(layer_index, + stream_selected_ids, + n_expert); + ok = ds4_gpu_stream_expert_cache_addr_buffers(layer_index, + &stream_gate_addr_buf, + &stream_up_addr_buf, + &stream_down_addr_buf); + } + if (ok) { + if (resident_owned) { + ok = ds4_gpu_wait_command_buffer( + resident_cb, + "GLM streaming split resident pair"); + ds4_gpu_stream_expert_cache_note_owned_completed(); + } else { + ok = ds4_gpu_wait_pending_command_buffers( + "GLM streaming split resident pair"); + } + } + if (glm_stream_split_timing) { + const double now_ms = ds4_gpu_now_ms(); + glm_stream_split_missing_wait_ms = now_ms - glm_stream_split_t0; + glm_stream_split_t0 = now_ms; + ds4_gpu_stream_expert_timing_note_split( + stream_resident_mask, + stream_missing_mask, + glm_stream_split_resident_ms, + glm_stream_split_missing_load_ms + + glm_stream_split_missing_wait_ms); + ds4_gpu_stream_expert_timing_note_split_missing_detail( + glm_stream_split_missing_load_ms, + 0.0, + 0.0, + 0.0, + glm_stream_split_missing_wait_ms); + } + if (ok && + !ds4_gpu_stream_expert_cache_mark_entries_inflight(stream_entries, + n_expert, + stream_missing_mask)) { + ok = 0; + } + if (ok) { + cb = ds4_gpu_command_buffer(&owned); + if (!cb) ok = 0; + } + if (ok) { + enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pair_pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBytes:&stream_missing_mask length:sizeof(stream_missing_mask) atIndex:1]; + [enc setBuffer:stream_gate_addr_buf offset:0u atIndex:2]; + [enc setBuffer:stream_up_addr_buf offset:0u atIndex:3]; + [enc setBuffer:xbuf offset:ds4_gpu_tensor_offset(x) atIndex:4]; + [enc setBuffer:selectedbuf offset:ds4_gpu_tensor_offset(selected) atIndex:5]; + [enc setBuffer:weightsbuf offset:ds4_gpu_tensor_offset(weights) atIndex:6]; + [enc setBuffer:midbuf offset:ds4_gpu_tensor_offset(mid) atIndex:7]; + for (uint32_t i = 0; i < n_expert; i++) { + if ((stream_missing_mask & (1u << i)) == 0) continue; + [enc useResource:stream_entries[i]->gate_buffer usage:MTLResourceUsageRead]; + [enc useResource:stream_entries[i]->up_buffer usage:MTLResourceUsageRead]; + } + if (pair_threadgroup_bytes != 0u) { + [enc setThreadgroupMemoryLength:pair_threadgroup_bytes atIndex:0]; + } + [enc dispatchThreadgroups:MTLSizeMake(pair_x_groups, + (NSUInteger)n_expert, + 1) + threadsPerThreadgroup:MTLSizeMake(pair_threads, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + } + } + + if (!ok) return 0; + + enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:down_pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:use_stream_expert_addr_table ? stream_down_addr_buf : downbuf + offset:use_stream_expert_addr_table ? 0u : (NSUInteger)down_inner + atIndex:1]; + [enc setBuffer:selectedbuf offset:ds4_gpu_tensor_offset(selected) atIndex:2]; + [enc setBuffer:midbuf offset:ds4_gpu_tensor_offset(mid) atIndex:3]; + [enc setBuffer:outbuf offset:ds4_gpu_tensor_offset(out) atIndex:4]; + if (use_stream_expert_addr_table) { + const uint32_t use_count = + use_stream_split_deferred ? n_expert : stream_entry_count; + for (uint32_t i = 0; i < use_count; i++) { + [enc useResource:stream_entries[i]->down_buffer usage:MTLResourceUsageRead]; + } + } + if (down_threadgroup_bytes != 0u) { + [enc setThreadgroupMemoryLength:down_threadgroup_bytes atIndex:0]; + } + [enc dispatchThreadgroups:MTLSizeMake(down_x_groups, 1, 1) + threadsPerThreadgroup:MTLSizeMake(down_threads, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + DS4_METAL_PROFILE_GLM_MOE_ONE_STAGE("down"); + + if (!ok) return 0; + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM routed MoE")) return 0; +#undef DS4_METAL_PROFILE_GLM_MOE_ONE_STAGE + } + + return 1; +} + +static bool ds4_gpu_glm_grouped_moe_fast_default(void) { + return !g_quality_mode; +} + +static bool ds4_gpu_glm_routed_moe_batch_grouped_available( + uint32_t gate_type, + uint32_t up_type, + uint32_t down_type, + uint32_t n_expert, + uint32_t n_tokens) { + if (n_tokens < 32u || + !ds4_gpu_glm_gate_pair_type_supported(gate_type, up_type) || + !ds4_gpu_glm_down_type_supported(down_type) || + ds4_gpu_mul_mm_id_map0_name(n_expert) == NULL) { + return false; + } + const bool fast_default = ds4_gpu_glm_grouped_moe_fast_default(); + if (!fast_default) { + return false; + } + if (n_tokens < 96u) return false; + + return ds4_gpu_get_pipeline(ds4_gpu_mul_mm_id_map0_name(n_expert)) != nil && + ds4_gpu_routed_mm_pipeline(gate_type) != nil && + ds4_gpu_routed_mm_pipeline(up_type) != nil && + ds4_gpu_routed_mm_f16_rhs_pipeline(down_type) != nil; +} + +static bool ds4_gpu_glm_grouped_moe_layer_enabled(uint32_t layer_index) { + (void)layer_index; + return true; +} + +static int ds4_gpu_glm_routed_moe_batch_grouped_tensor( + ds4_gpu_tensor *out, + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t down_offset, + uint32_t gate_type, + uint32_t up_type, + uint32_t down_type, + uint64_t gate_expert_bytes, + uint64_t gate_row_bytes, + uint64_t up_expert_bytes, + uint64_t up_row_bytes, + uint64_t down_expert_bytes, + uint64_t down_row_bytes, + uint32_t expert_in_dim, + uint32_t expert_mid_dim, + uint32_t out_dim, + const ds4_gpu_tensor *selected, + const ds4_gpu_tensor *weights, + uint32_t n_total_expert, + uint32_t n_expert, + uint32_t layer_index, + const ds4_gpu_tensor *x, + uint32_t n_tokens) { + if (!ds4_gpu_glm_routed_moe_batch_grouped_available(gate_type, + up_type, + down_type, + n_expert, + n_tokens)) { + return 0; + } + if (n_expert > UINT32_MAX / n_tokens || + (uint64_t)n_total_expert > UINT64_MAX / gate_expert_bytes || + (uint64_t)n_total_expert > UINT64_MAX / up_expert_bytes || + (uint64_t)n_total_expert > UINT64_MAX / down_expert_bytes) { + return 0; + } + + const uint32_t pair_rows = n_tokens * n_expert; + if ((uint64_t)pair_rows > UINT64_MAX / expert_mid_dim || + (uint64_t)pair_rows > UINT64_MAX / out_dim || + (uint64_t)n_tokens > UINT64_MAX / expert_in_dim || + (uint64_t)n_tokens > UINT64_MAX / out_dim) { + return 0; + } + + const bool mid_f16 = true; + const NSUInteger mm_id_threadgroup_bytes = 8192u; + const uint64_t compact_mid_values = (uint64_t)pair_rows * expert_mid_dim; + const uint64_t down_values = (uint64_t)pair_rows * out_dim; + const uint64_t x_values = (uint64_t)n_tokens * expert_in_dim; + const uint64_t out_values = (uint64_t)n_tokens * out_dim; + if (compact_mid_values > UINT64_MAX / sizeof(float) || + compact_mid_values > UINT64_MAX / (mid_f16 ? sizeof(uint16_t) : sizeof(float)) || + down_values > UINT64_MAX / sizeof(float) || + x_values > UINT64_MAX / sizeof(float) || + out_values > UINT64_MAX / sizeof(float)) { + return 0; + } + + const uint64_t gate_scratch_bytes = compact_mid_values * sizeof(float); + const uint64_t mid_bytes = compact_mid_values * (mid_f16 ? sizeof(uint16_t) : sizeof(float)); + const uint64_t down_scratch_bytes = down_values * sizeof(float); + const uint64_t x_bytes = x_values * sizeof(float); + const uint64_t out_bytes = out_values * sizeof(float); + const uint64_t selected_values = (uint64_t)n_tokens * n_expert; + const uint64_t selected_bytes = selected_values * sizeof(int32_t); + const uint64_t weights_bytes = selected_values * sizeof(float); + if (gate_scratch_bytes > UINT64_MAX - gate_scratch_bytes || + gate_scratch_bytes > NSUIntegerMax || + gate_scratch_bytes * 2ull > NSUIntegerMax || + down_scratch_bytes > NSUIntegerMax) { + return 0; + } + + uint32_t first_expert = 0; + uint32_t n_bind_expert = 0; + ds4_gpu_tp_expert_range(n_total_expert, &first_expert, &n_bind_expert); + gate_offset += (uint64_t)first_expert * gate_expert_bytes; + up_offset += (uint64_t)first_expert * up_expert_bytes; + down_offset += (uint64_t)first_expert * down_expert_bytes; + const uint64_t gate_tensor_bytes = (uint64_t)n_bind_expert * gate_expert_bytes; + const uint64_t up_tensor_bytes = (uint64_t)n_bind_expert * up_expert_bytes; + const uint64_t down_tensor_bytes = (uint64_t)n_bind_expert * down_expert_bytes; + + @autoreleasepool { + id xbuf = ds4_gpu_tensor_buffer(x); + id midbuf = ds4_gpu_tensor_buffer(mid); + id outbuf = ds4_gpu_tensor_buffer(out); + id selectedbuf = ds4_gpu_tensor_buffer(selected); + id weightsbuf = ds4_gpu_tensor_buffer(weights); + if (!xbuf || !midbuf || !outbuf || !selectedbuf || !weightsbuf || + ds4_gpu_tensor_bytes(x) < x_bytes || + ds4_gpu_tensor_bytes(mid) < mid_bytes || + ds4_gpu_tensor_bytes(out) < out_bytes || + ds4_gpu_tensor_bytes(selected) < selected_bytes || + ds4_gpu_tensor_bytes(weights) < weights_bytes) { + fprintf(stderr, "ds4: Metal GLM grouped routed MoE received undersized activation buffers\n"); + return 0; + } + if (!ds4_gpu_ensure_scratch_buffer(&g_moe_gate_scratch_buffer, + &g_moe_gate_scratch_bytes, + (NSUInteger)(gate_scratch_bytes * 2ull), + "ds4_glm_moe_gate_up_scratch")) { + return 0; + } + if (n_expert > 1 && + !ds4_gpu_ensure_scratch_buffer(&g_moe_down_scratch_buffer, + &g_moe_down_scratch_bytes, + (NSUInteger)down_scratch_bytes, + "ds4_glm_moe_down_scratch")) { + return 0; + } + + uint64_t gate_inner = 0; + uint64_t up_inner = 0; + uint64_t down_inner = 0; + id gatebuf = ds4_gpu_wrap_model_range(model_map, model_size, + gate_offset, gate_tensor_bytes, + &gate_inner); + id upbuf = ds4_gpu_wrap_model_range(model_map, model_size, + up_offset, up_tensor_bytes, + &up_inner); + id downbuf = ds4_gpu_wrap_model_range(model_map, model_size, + down_offset, down_tensor_bytes, + &down_inner); + if (!gatebuf || !upbuf || !downbuf) return 0; + + id map_pipeline = + ds4_gpu_get_pipeline(ds4_gpu_mul_mm_id_map0_name(n_expert)); + id gate_pipeline = ds4_gpu_routed_mm_pipeline(gate_type); + id up_pipeline = ds4_gpu_routed_mm_pipeline(up_type); + id down_pipeline = + ds4_gpu_routed_mm_f16_rhs_pipeline(down_type); + if (!map_pipeline || !gate_pipeline || !up_pipeline || !down_pipeline) { + return 0; + } + + ds4_gpu_mul_mm_id_map_args map_args = + ds4_gpu_make_mul_mm_id_map_args(expert_in_dim, n_total_expert, 1, n_expert, n_tokens); + ds4_gpu_mul_mm_id_args gate_args = + ds4_gpu_make_mul_mm_id_args(expert_in_dim, expert_mid_dim, n_total_expert, + gate_row_bytes, gate_expert_bytes, + 1, n_expert, n_tokens); + ds4_gpu_mul_mm_id_args up_args = + ds4_gpu_make_mul_mm_id_args(expert_in_dim, expert_mid_dim, n_total_expert, + up_row_bytes, up_expert_bytes, + 1, n_expert, n_tokens); + ds4_gpu_mul_mm_id_args down_args = + ds4_gpu_make_mul_mm_id_args_src1_size(expert_mid_dim, out_dim, n_total_expert, + down_row_bytes, down_expert_bytes, + n_expert, n_expert, n_tokens, + mid_f16 ? sizeof(uint16_t) : sizeof(float)); + gate_args.tp_rank = g_tp_split_rank; + gate_args.tp_world = g_tp_split_world; + gate_args.tp_expert_base = (int32_t)first_expert; + up_args.tp_rank = g_tp_split_rank; + up_args.tp_world = g_tp_split_world; + up_args.tp_expert_base = (int32_t)first_expert; + down_args.tp_rank = g_tp_split_rank; + down_args.tp_world = g_tp_split_world; + down_args.tp_expert_base = (int32_t)first_expert; + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + const bool glm_moe_stage_profile = false; + const char *glm_moe_stage_filter = NULL; + double glm_moe_stage_t0 = 0.0; + if (glm_moe_stage_profile) { + if (ds4_gpu_end_commands() == 0 || ds4_gpu_begin_commands() == 0) { + return 0; + } + cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + glm_moe_stage_t0 = ds4_gpu_now_ms(); + } + + int ok = 1; +#define DS4_METAL_PROFILE_GLM_GROUPED_MOE_STAGE(name) do { \ + if (ok && glm_moe_stage_profile) { \ + if (ds4_gpu_end_commands() == 0) { \ + ok = 0; \ + } else { \ + const char *stage_name = (name); \ + const double now_ms = ds4_gpu_now_ms(); \ + const int print_stage = \ + !glm_moe_stage_filter || !glm_moe_stage_filter[0] || \ + strstr(stage_name, glm_moe_stage_filter) != NULL; \ + if (print_stage) { \ + fprintf(stderr, \ + "ds4: Metal GLM grouped routed MoE stage layer=%u tokens=%u pairs=%u experts=%u " \ + "gate=%s down=%s mid=%s %s=%.3f ms\n", \ + layer_index, n_tokens, pair_rows, n_expert, \ + ds4_gpu_metal_tensor_type_name(gate_type), \ + ds4_gpu_metal_tensor_type_name(down_type), \ + mid_f16 ? "f16" : "f32", \ + stage_name, now_ms - glm_moe_stage_t0); \ + } \ + glm_moe_stage_t0 = now_ms; \ + if (ds4_gpu_begin_commands() == 0) { \ + ok = 0; \ + } else { \ + cb = ds4_gpu_command_buffer(&owned); \ + if (!cb) ok = 0; \ + } \ + } \ + } \ + } while (0) + + ok = ds4_gpu_encode_mul_mm_id_map(cb, + map_pipeline, + &map_args, + &gate_args, + selectedbuf, + ds4_gpu_tensor_offset(selected)); + DS4_METAL_PROFILE_GLM_GROUPED_MOE_STAGE("map"); + if (ok) { + ok = ds4_gpu_encode_mul_mm_id_mapped_tile(cb, + gate_pipeline, + &gate_args, + gatebuf, + (NSUInteger)gate_inner, + xbuf, + ds4_gpu_tensor_offset(x), + g_moe_gate_scratch_buffer, + 0, + mm_id_threadgroup_bytes); + } + DS4_METAL_PROFILE_GLM_GROUPED_MOE_STAGE("gate"); + if (ok) { + ok = ds4_gpu_encode_mul_mm_id_mapped_tile(cb, + up_pipeline, + &up_args, + upbuf, + (NSUInteger)up_inner, + xbuf, + ds4_gpu_tensor_offset(x), + g_moe_gate_scratch_buffer, + (NSUInteger)gate_scratch_bytes, + mm_id_threadgroup_bytes); + } + DS4_METAL_PROFILE_GLM_GROUPED_MOE_STAGE("up"); + if (ok) { + ok = ds4_gpu_encode_moe_swiglu_weight(cb, + g_moe_gate_scratch_buffer, + 0, + g_moe_gate_scratch_buffer, + (NSUInteger)gate_scratch_bytes, + midbuf, + ds4_gpu_tensor_offset(mid), + weightsbuf, + ds4_gpu_tensor_offset(weights), + expert_mid_dim, + pair_rows, + 0.0f, + mid_f16); + } + DS4_METAL_PROFILE_GLM_GROUPED_MOE_STAGE("activation_weight"); + + id down_dst = n_expert == 1 ? outbuf : g_moe_down_scratch_buffer; + NSUInteger down_dst_off = n_expert == 1 ? ds4_gpu_tensor_offset(out) : 0; + if (ok) { + ok = ds4_gpu_encode_mul_mm_id_mapped_tile(cb, + down_pipeline, + &down_args, + downbuf, + (NSUInteger)down_inner, + midbuf, + ds4_gpu_tensor_offset(mid), + down_dst, + down_dst_off, + mm_id_threadgroup_bytes); + } + DS4_METAL_PROFILE_GLM_GROUPED_MOE_STAGE("down"); + if (ok && n_expert > 1) { + ok = ds4_gpu_encode_moe_sum_experts(cb, + down_dst, + down_dst_off, + outbuf, + ds4_gpu_tensor_offset(out), + out_dim, + n_expert, + n_tokens); + } + DS4_METAL_PROFILE_GLM_GROUPED_MOE_STAGE("sum"); + if (!ok) return 0; + + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM grouped routed batch MoE")) { + return 0; + } +#undef DS4_METAL_PROFILE_GLM_GROUPED_MOE_STAGE + } + + return 1; +} + +static int ds4_gpu_glm_routed_moe_batch_grouped_addr_tensor( + ds4_gpu_tensor *out, + ds4_gpu_tensor *mid, + id gate_addrs, + id up_addrs, + id down_addrs, + id overflow_gate, + id overflow_up, + id overflow_down, + uint32_t gate_type, + uint32_t up_type, + uint32_t down_type, + uint64_t gate_expert_bytes, + uint64_t gate_row_bytes, + uint64_t up_expert_bytes, + uint64_t up_row_bytes, + uint64_t down_expert_bytes, + uint64_t down_row_bytes, + uint32_t expert_in_dim, + uint32_t expert_mid_dim, + uint32_t out_dim, + const ds4_gpu_tensor *selected, + const ds4_gpu_tensor *weights, + uint32_t n_total_expert, + uint32_t n_expert, + uint32_t layer_index, + const ds4_gpu_tensor *x, + uint32_t n_tokens, + ds4_gpu_stream_expert_cache_entry * const *resources, + uint32_t resource_count) { + if (n_expert > UINT32_MAX / n_tokens || + !gate_addrs || !up_addrs || !down_addrs || + !ds4_gpu_glm_routed_moe_batch_grouped_available(gate_type, + up_type, + down_type, + n_expert, + n_tokens)) { + return 0; + } + + const uint32_t pair_rows = n_tokens * n_expert; + if ((uint64_t)pair_rows > UINT64_MAX / expert_mid_dim || + (uint64_t)pair_rows > UINT64_MAX / out_dim || + (uint64_t)n_tokens > UINT64_MAX / expert_in_dim || + (uint64_t)n_tokens > UINT64_MAX / out_dim) { + return 0; + } + + const bool mid_f16 = true; + const NSUInteger mm_id_threadgroup_bytes = 8192u; + const uint64_t compact_mid_values = (uint64_t)pair_rows * expert_mid_dim; + const uint64_t down_values = (uint64_t)pair_rows * out_dim; + const uint64_t x_values = (uint64_t)n_tokens * expert_in_dim; + const uint64_t out_values = (uint64_t)n_tokens * out_dim; + if (compact_mid_values > UINT64_MAX / sizeof(float) || + compact_mid_values > UINT64_MAX / sizeof(uint16_t) || + down_values > UINT64_MAX / sizeof(float) || + x_values > UINT64_MAX / sizeof(float) || + out_values > UINT64_MAX / sizeof(float)) { + return 0; + } + + const uint64_t gate_scratch_bytes = compact_mid_values * sizeof(float); + const uint64_t mid_bytes = compact_mid_values * sizeof(uint16_t); + const uint64_t down_scratch_bytes = down_values * sizeof(float); + const uint64_t x_bytes = x_values * sizeof(float); + const uint64_t out_bytes = out_values * sizeof(float); + const uint64_t selected_values = (uint64_t)n_tokens * n_expert; + const uint64_t selected_bytes = selected_values * sizeof(int32_t); + const uint64_t weights_bytes = selected_values * sizeof(float); + if (gate_scratch_bytes > UINT64_MAX - gate_scratch_bytes || + gate_scratch_bytes > NSUIntegerMax || + gate_scratch_bytes * 2ull > NSUIntegerMax || + down_scratch_bytes > NSUIntegerMax) { + return 0; + } + + @autoreleasepool { + id xbuf = ds4_gpu_tensor_buffer(x); + id midbuf = ds4_gpu_tensor_buffer(mid); + id outbuf = ds4_gpu_tensor_buffer(out); + id selectedbuf = ds4_gpu_tensor_buffer(selected); + id weightsbuf = ds4_gpu_tensor_buffer(weights); + if (!xbuf || !midbuf || !outbuf || !selectedbuf || !weightsbuf || + ds4_gpu_tensor_bytes(x) < x_bytes || + ds4_gpu_tensor_bytes(mid) < mid_bytes || + ds4_gpu_tensor_bytes(out) < out_bytes || + ds4_gpu_tensor_bytes(selected) < selected_bytes || + ds4_gpu_tensor_bytes(weights) < weights_bytes) { + fprintf(stderr, "ds4: Metal GLM grouped-address routed MoE received undersized activation buffers\n"); + return 0; + } + if (!ds4_gpu_ensure_scratch_buffer(&g_moe_gate_scratch_buffer, + &g_moe_gate_scratch_bytes, + (NSUInteger)(gate_scratch_bytes * 2ull), + "ds4_glm_moe_gate_up_scratch")) { + return 0; + } + if (n_expert > 1 && + !ds4_gpu_ensure_scratch_buffer(&g_moe_down_scratch_buffer, + &g_moe_down_scratch_bytes, + (NSUInteger)down_scratch_bytes, + "ds4_glm_moe_down_scratch")) { + return 0; + } + + id map_pipeline = + ds4_gpu_get_pipeline(ds4_gpu_mul_mm_id_map0_name(n_expert)); + id gate_pipeline = + ds4_gpu_routed_mm_addr_pipeline(gate_type); + id up_pipeline = + ds4_gpu_routed_mm_addr_pipeline(up_type); + id down_pipeline = + ds4_gpu_routed_mm_addr_f16_rhs_pipeline(down_type); + if (!map_pipeline || !gate_pipeline || !up_pipeline || !down_pipeline) { + return 0; + } + + ds4_gpu_mul_mm_id_map_args map_args = + ds4_gpu_make_mul_mm_id_map_args(expert_in_dim, n_total_expert, 1, n_expert, n_tokens); + ds4_gpu_mul_mm_id_args gate_args = + ds4_gpu_make_mul_mm_id_args(expert_in_dim, expert_mid_dim, n_total_expert, + gate_row_bytes, gate_expert_bytes, + 1, n_expert, n_tokens); + ds4_gpu_mul_mm_id_args up_args = + ds4_gpu_make_mul_mm_id_args(expert_in_dim, expert_mid_dim, n_total_expert, + up_row_bytes, up_expert_bytes, + 1, n_expert, n_tokens); + ds4_gpu_mul_mm_id_args down_args = + ds4_gpu_make_mul_mm_id_args_src1_size(expert_mid_dim, out_dim, n_total_expert, + down_row_bytes, down_expert_bytes, + n_expert, n_expert, n_tokens, + sizeof(uint16_t)); + if (!ds4_gpu_stream_expert_cache_mark_entries_inflight(resources, + resource_count, + 0)) { + return 0; + } + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + const bool glm_moe_stage_profile = false; + const char *glm_moe_stage_filter = NULL; + double glm_moe_stage_t0 = 0.0; + if (glm_moe_stage_profile) { + if (ds4_gpu_end_commands() == 0 || ds4_gpu_begin_commands() == 0) { + return 0; + } + cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + glm_moe_stage_t0 = ds4_gpu_now_ms(); + } + + int ok = 1; +#define DS4_METAL_PROFILE_GLM_GROUPED_ADDR_MOE_STAGE(name) do { \ + if (ok && glm_moe_stage_profile) { \ + if (ds4_gpu_end_commands() == 0) { \ + ok = 0; \ + } else { \ + const char *stage_name = (name); \ + const double now_ms = ds4_gpu_now_ms(); \ + const int print_stage = \ + !glm_moe_stage_filter || !glm_moe_stage_filter[0] || \ + strstr(stage_name, glm_moe_stage_filter) != NULL; \ + if (print_stage) { \ + fprintf(stderr, \ + "ds4: Metal GLM grouped-address routed MoE stage layer=%u tokens=%u pairs=%u experts=%u " \ + "gate=%s down=%s mid=f16 %s=%.3f ms\n", \ + layer_index, n_tokens, pair_rows, n_expert, \ + ds4_gpu_metal_tensor_type_name(gate_type), \ + ds4_gpu_metal_tensor_type_name(down_type), \ + stage_name, now_ms - glm_moe_stage_t0); \ + } \ + glm_moe_stage_t0 = now_ms; \ + if (ds4_gpu_begin_commands() == 0) { \ + ok = 0; \ + } else { \ + cb = ds4_gpu_command_buffer(&owned); \ + if (!cb) ok = 0; \ + } \ + } \ + } \ + } while (0) + + ok = ds4_gpu_encode_mul_mm_id_map(cb, + map_pipeline, + &map_args, + &gate_args, + selectedbuf, + ds4_gpu_tensor_offset(selected)); + DS4_METAL_PROFILE_GLM_GROUPED_ADDR_MOE_STAGE("map"); + if (ok) { + ok = ds4_gpu_encode_mul_mm_id_addr_mapped_tile(cb, + gate_pipeline, + &gate_args, + gate_addrs, + xbuf, + ds4_gpu_tensor_offset(x), + g_moe_gate_scratch_buffer, + 0, + mm_id_threadgroup_bytes, + resources, + resource_count, + 0, + overflow_gate); + } + DS4_METAL_PROFILE_GLM_GROUPED_ADDR_MOE_STAGE("gate"); + if (ok) { + ok = ds4_gpu_encode_mul_mm_id_addr_mapped_tile(cb, + up_pipeline, + &up_args, + up_addrs, + xbuf, + ds4_gpu_tensor_offset(x), + g_moe_gate_scratch_buffer, + (NSUInteger)gate_scratch_bytes, + mm_id_threadgroup_bytes, + resources, + resource_count, + 1, + overflow_up); + } + DS4_METAL_PROFILE_GLM_GROUPED_ADDR_MOE_STAGE("up"); + if (ok) { + ok = ds4_gpu_encode_moe_swiglu_weight(cb, + g_moe_gate_scratch_buffer, + 0, + g_moe_gate_scratch_buffer, + (NSUInteger)gate_scratch_bytes, + midbuf, + ds4_gpu_tensor_offset(mid), + weightsbuf, + ds4_gpu_tensor_offset(weights), + expert_mid_dim, + pair_rows, + 0.0f, + mid_f16); + } + DS4_METAL_PROFILE_GLM_GROUPED_ADDR_MOE_STAGE("activation_weight"); + + id down_dst = n_expert == 1 ? outbuf : g_moe_down_scratch_buffer; + NSUInteger down_dst_off = n_expert == 1 ? ds4_gpu_tensor_offset(out) : 0; + if (ok) { + ok = ds4_gpu_encode_mul_mm_id_addr_mapped_tile(cb, + down_pipeline, + &down_args, + down_addrs, + midbuf, + ds4_gpu_tensor_offset(mid), + down_dst, + down_dst_off, + mm_id_threadgroup_bytes, + resources, + resource_count, + 2, + overflow_down); + } + DS4_METAL_PROFILE_GLM_GROUPED_ADDR_MOE_STAGE("down"); + if (ok && n_expert > 1) { + ok = ds4_gpu_encode_moe_sum_experts(cb, + down_dst, + down_dst_off, + outbuf, + ds4_gpu_tensor_offset(out), + out_dim, + n_expert, + n_tokens); + } + DS4_METAL_PROFILE_GLM_GROUPED_ADDR_MOE_STAGE("sum"); + if (!ok) return 0; + + if (!ds4_gpu_finish_command_buffer(cb, owned, + "GLM grouped-address routed batch MoE")) { + return 0; + } +#undef DS4_METAL_PROFILE_GLM_GROUPED_ADDR_MOE_STAGE + } + + return 1; +} + +static int ds4_gpu_glm_routed_moe_batch_tensor_impl( + ds4_gpu_tensor *out, + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t down_offset, + uint32_t gate_type, + uint32_t up_type, + uint32_t down_type, + uint64_t gate_expert_bytes, + uint64_t gate_row_bytes, + uint64_t up_expert_bytes, + uint64_t up_row_bytes, + uint64_t down_expert_bytes, + uint64_t down_row_bytes, + uint32_t expert_in_dim, + uint32_t expert_mid_dim, + uint32_t out_dim, + const ds4_gpu_tensor *selected, + const ds4_gpu_tensor *weights, + uint32_t n_total_expert, + uint32_t n_expert, + uint32_t layer_index, + const ds4_gpu_tensor *x, + uint32_t n_tokens, + uint32_t mid_token_stride, + bool allow_grouped, + bool force_scalar_q4_pair) { + if (!g_initialized && !ds4_gpu_init()) return 0; + if (!out || !mid || !model_map || !selected || !weights || !x || + n_tokens == 0 || + n_total_expert == 0 || n_expert == 0 || n_expert > 256u || + n_expert > n_total_expert || + expert_in_dim == 0 || expert_mid_dim == 0 || out_dim == 0 || + gate_expert_bytes == 0 || gate_row_bytes == 0 || + up_expert_bytes == 0 || up_row_bytes == 0 || + down_expert_bytes == 0 || down_row_bytes == 0 || + (expert_in_dim % 256u) != 0 || + (expert_mid_dim % 256u) != 0 || + !ds4_gpu_glm_gate_pair_type_supported(gate_type, up_type) || + !ds4_gpu_glm_down_type_supported(down_type)) { + return 0; + } + + const uint64_t per_token_mid = (uint64_t)n_expert * expert_mid_dim; + if ((uint64_t)mid_token_stride < per_token_mid || + (uint64_t)n_total_expert > UINT64_MAX / gate_expert_bytes || + (uint64_t)n_total_expert > UINT64_MAX / up_expert_bytes || + (uint64_t)n_total_expert > UINT64_MAX / down_expert_bytes || + (uint64_t)expert_mid_dim > UINT64_MAX / gate_row_bytes || + (uint64_t)expert_mid_dim > UINT64_MAX / up_row_bytes || + (uint64_t)out_dim > UINT64_MAX / down_row_bytes || + (uint64_t)n_tokens > UINT64_MAX / expert_in_dim || + (uint64_t)n_tokens > UINT64_MAX / out_dim) { + fprintf(stderr, "ds4: Metal GLM routed batch MoE tensor byte size overflow\n"); + return 0; + } + + const uint64_t full_gate_tensor_bytes = + (uint64_t)n_total_expert * gate_expert_bytes; + const uint64_t full_up_tensor_bytes = + (uint64_t)n_total_expert * up_expert_bytes; + const uint64_t full_down_tensor_bytes = + (uint64_t)n_total_expert * down_expert_bytes; + if (gate_expert_bytes != (uint64_t)expert_mid_dim * gate_row_bytes || + up_expert_bytes != (uint64_t)expert_mid_dim * up_row_bytes || + down_expert_bytes != (uint64_t)out_dim * down_row_bytes) { + fprintf(stderr, "ds4: Metal GLM routed batch MoE received inconsistent expert strides\n"); + return 0; + } + if (gate_offset > model_size || full_gate_tensor_bytes > model_size - gate_offset || + up_offset > model_size || full_up_tensor_bytes > model_size - up_offset || + down_offset > model_size || full_down_tensor_bytes > model_size - down_offset) { + fprintf(stderr, "ds4: Metal GLM routed batch MoE tensor range is outside the mapped model\n"); + return 0; + } + + if (allow_grouped && + (!g_ssd_streaming_mode || + ds4_gpu_glm_streaming_prefill_full_layer_active()) && + ds4_gpu_glm_grouped_moe_layer_enabled(layer_index) && + ds4_gpu_glm_routed_moe_batch_grouped_available(gate_type, + up_type, + down_type, + n_expert, + n_tokens)) { + return ds4_gpu_glm_routed_moe_batch_grouped_tensor(out, + mid, + model_map, + model_size, + gate_offset, + up_offset, + down_offset, + gate_type, + up_type, + down_type, + gate_expert_bytes, + gate_row_bytes, + up_expert_bytes, + up_row_bytes, + down_expert_bytes, + down_row_bytes, + expert_in_dim, + expert_mid_dim, + out_dim, + selected, + weights, + n_total_expert, + n_expert, + layer_index, + x, + n_tokens); + } + + uint32_t first_expert = 0; + uint32_t n_bind_expert = 0; + ds4_gpu_tp_expert_range(n_total_expert, &first_expert, &n_bind_expert); + gate_offset += (uint64_t)first_expert * gate_expert_bytes; + up_offset += (uint64_t)first_expert * up_expert_bytes; + down_offset += (uint64_t)first_expert * down_expert_bytes; + const uint64_t gate_tensor_bytes = (uint64_t)n_bind_expert * gate_expert_bytes; + const uint64_t up_tensor_bytes = (uint64_t)n_bind_expert * up_expert_bytes; + const uint64_t down_tensor_bytes = (uint64_t)n_bind_expert * down_expert_bytes; + + @autoreleasepool { + id xbuf = ds4_gpu_tensor_buffer(x); + id midbuf = ds4_gpu_tensor_buffer(mid); + id outbuf = ds4_gpu_tensor_buffer(out); + id selectedbuf = ds4_gpu_tensor_buffer(selected); + id weightsbuf = ds4_gpu_tensor_buffer(weights); + const uint64_t x_values = (uint64_t)n_tokens * expert_in_dim; + const uint64_t out_values = (uint64_t)n_tokens * out_dim; + const uint64_t mid_values = + (uint64_t)(n_tokens - 1u) * mid_token_stride + per_token_mid; + const uint64_t selected_values = (uint64_t)n_tokens * n_expert; + if (x_values > UINT64_MAX / sizeof(float) || + out_values > UINT64_MAX / sizeof(float) || + mid_values > UINT64_MAX / sizeof(float) || + selected_values > UINT64_MAX / sizeof(int32_t)) { + fprintf(stderr, "ds4: Metal GLM routed batch MoE activation byte size overflow\n"); + return 0; + } + const uint64_t x_bytes = x_values * sizeof(float); + const uint64_t mid_bytes = mid_values * sizeof(float); + const uint64_t out_bytes = out_values * sizeof(float); + const uint64_t selected_bytes = selected_values * sizeof(int32_t); + const uint64_t weights_bytes = selected_values * sizeof(float); + if (!xbuf || !midbuf || !outbuf || !selectedbuf || !weightsbuf || + ds4_gpu_tensor_bytes(x) < x_bytes || + ds4_gpu_tensor_bytes(mid) < mid_bytes || + ds4_gpu_tensor_bytes(out) < out_bytes || + ds4_gpu_tensor_bytes(selected) < selected_bytes || + ds4_gpu_tensor_bytes(weights) < weights_bytes) { + fprintf(stderr, "ds4: Metal GLM routed batch MoE received undersized activation buffers\n"); + return 0; + } + + uint64_t gate_inner = 0; + uint64_t up_inner = 0; + uint64_t down_inner = 0; + id gatebuf = nil; + id upbuf = nil; + id downbuf = nil; + id stream_gate_addr_buf = nil; + id stream_up_addr_buf = nil; + id stream_down_addr_buf = nil; + id stream_overflow_gate = nil; + id stream_overflow_up = nil; + id stream_overflow_down = nil; + ds4_gpu_stream_expert_cache_entry + *stream_resources[DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT] = { NULL }; + uint32_t stream_resource_count = 0; + uint32_t stream_unique = 0; + + const BOOL gate_pair_q2 = gate_type == DS4_METAL_TENSOR_Q2_K; + const BOOL gate_pair_q5 = gate_type == DS4_METAL_TENSOR_Q5_K; + const BOOL down_scalar_q2 = down_type == DS4_METAL_TENSOR_Q2_K; + const BOOL down_scalar_q4 = down_type == DS4_METAL_TENSOR_Q4_K; + const BOOL down_simd_q4 = down_scalar_q4; + const BOOL down_simd_q5 = down_type == DS4_METAL_TENSOR_Q5_K; + const BOOL down_simd_q6 = down_type == DS4_METAL_TENSOR_Q6_K; + const BOOL down_simd = down_simd_q4 || down_simd_q5 || down_simd_q6; + const BOOL stream_addr_q2 = + gate_pair_q2 && down_scalar_q2 && + g_glm_q2_k_addr_pair_swiglu2_f32_pipeline != nil && + g_glm_q2_k_addr_down_f32_pipeline != nil; + const BOOL stream_addr_q4 = + !gate_pair_q2 && !gate_pair_q5 && down_scalar_q4 && + g_glm_q4_k_addr_pair_swiglu_f32_pipeline != nil && + g_glm_q4_k_addr_down_f32_pipeline != nil; + BOOL use_stream_expert_addr_table = + g_ssd_streaming_mode && + !ds4_gpu_glm_streaming_prefill_full_layer_active() && + n_tokens > 1 && + (stream_addr_q2 || stream_addr_q4) && + layer_index < DS4_METAL_STREAM_EXPERT_CACHE_MAX_LAYER && + n_total_expert <= DS4_METAL_STREAM_EXPERT_CACHE_MAX_EXPERT && + n_expert <= DS4_METAL_STREAM_EXPERT_CACHE_MAX_SELECTED && + ds4_gpu_stream_expert_cache_note_expert_size(gate_expert_bytes, + down_expert_bytes) && + ds4_gpu_stream_expert_cache_effective_cap(layer_index, + n_total_expert, + n_expert) != 0; + const BOOL use_stream_grouped_addr_table = + use_stream_expert_addr_table && + allow_grouped && + getenv("DS4_METAL_GLM_DISABLE_STREAMING_GROUPED_ADDR_PREFILL") == NULL && + ds4_gpu_glm_routed_moe_batch_grouped_available(gate_type, + up_type, + down_type, + n_expert, + n_tokens); + const BOOL enable_q4_pair4 = true; + const BOOL q4_scalar_pair = false; + const BOOL q4_pair2 = + !use_stream_expert_addr_table && + !gate_pair_q5 && !q4_scalar_pair && + (force_scalar_q4_pair || !enable_q4_pair4); + id pair_pipeline = + use_stream_expert_addr_table ? + (gate_pair_q2 ? + ds4_gpu_hot_pipeline(g_glm_q2_k_addr_pair_swiglu2_f32_pipeline, + "kernel_glm_q2_K_addr_pair_swiglu2_f32") : + ds4_gpu_hot_pipeline(g_glm_q4_k_addr_pair_swiglu_f32_pipeline, + "kernel_glm_q4_K_addr_pair_swiglu_f32")) : + gate_pair_q2 ? + ds4_gpu_hot_pipeline(g_glm_q2_k_pair_swiglu_f32_pipeline, + "kernel_glm_q2_K_pair_swiglu_f32") : + gate_pair_q5 ? + ds4_gpu_hot_pipeline(g_glm_q5_k_pair_swiglu_f32_pipeline, + "kernel_glm_q5_K_pair_swiglu_f32") : + (q4_scalar_pair ? + ds4_gpu_hot_pipeline(g_glm_q4_k_pair_swiglu_f32_pipeline, + "kernel_glm_q4_K_pair_swiglu_f32") : + q4_pair2 ? + ds4_gpu_hot_pipeline(g_glm_q4_k_pair_swiglu2_f32_pipeline, + "kernel_glm_q4_K_pair_swiglu2_f32") : + ds4_gpu_hot_pipeline(g_glm_q4_k_pair_swiglu4_f32_pipeline, + "kernel_glm_q4_K_pair_swiglu4_f32")); + id down_pipeline = + use_stream_expert_addr_table ? + (down_scalar_q2 ? + ds4_gpu_hot_pipeline(g_glm_q2_k_addr_down_f32_pipeline, + "kernel_glm_q2_K_addr_down_f32") : + ds4_gpu_hot_pipeline(g_glm_q4_k_addr_down_f32_pipeline, + "kernel_glm_q4_K_addr_down_f32")) : + down_scalar_q2 ? + ds4_gpu_hot_pipeline(g_glm_q2_k_down_f32_pipeline, + "kernel_glm_q2_K_down_f32") : + down_scalar_q4 ? + ds4_gpu_hot_pipeline(g_glm_q4_k_down_f32_pipeline, + "kernel_glm_q4_K_down_f32") : + down_simd_q5 ? + ds4_gpu_hot_pipeline(g_glm_q5_k_down_f32_pipeline, + "kernel_glm_q5_K_down_f32") : + ds4_gpu_hot_pipeline(g_glm_q6_k_down_f32_pipeline, + "kernel_glm_q6_K_down_f32"); + if (!pair_pipeline || !down_pipeline) return 0; + + if (use_stream_expert_addr_table) { + const int had_batch = g_batch_cb != nil; + if (had_batch && ds4_gpu_end_commands() == 0) { + return 0; + } + if (!ds4_gpu_stream_expert_cache_prepare_selected_batch( + model_map, + model_size, + layer_index, + selected, + n_tokens, + n_total_expert, + n_expert, + gate_offset, + up_offset, + down_offset, + gate_expert_bytes, + down_expert_bytes, + &stream_gate_addr_buf, + &stream_up_addr_buf, + &stream_down_addr_buf, + stream_resources, + &stream_resource_count, + &stream_unique, + &stream_overflow_gate, + &stream_overflow_up, + &stream_overflow_down)) { + return 0; + } + if (stream_unique == 0) { + ds4_gpu_stream_expert_cache_clear_layer(layer_index); + return 0; + } + if (had_batch && ds4_gpu_begin_commands() == 0) { + ds4_gpu_stream_expert_cache_clear_layer(layer_index); + return 0; + } + if (use_stream_grouped_addr_table) { + return ds4_gpu_glm_routed_moe_batch_grouped_addr_tensor( + out, + mid, + stream_gate_addr_buf, + stream_up_addr_buf, + stream_down_addr_buf, + stream_overflow_gate, + stream_overflow_up, + stream_overflow_down, + gate_type, + up_type, + down_type, + gate_expert_bytes, + gate_row_bytes, + up_expert_bytes, + up_row_bytes, + down_expert_bytes, + down_row_bytes, + expert_in_dim, + expert_mid_dim, + out_dim, + selected, + weights, + n_total_expert, + n_expert, + layer_index, + x, + n_tokens, + stream_resources, + stream_resource_count); + } + } else { + gatebuf = ds4_gpu_wrap_model_range(model_map, model_size, + gate_offset, gate_tensor_bytes, + &gate_inner); + upbuf = ds4_gpu_wrap_model_range(model_map, model_size, + up_offset, up_tensor_bytes, + &up_inner); + downbuf = ds4_gpu_wrap_model_range(model_map, model_size, + down_offset, down_tensor_bytes, + &down_inner); + if (!gatebuf || !upbuf || !downbuf) return 0; + } + + int owned = 0; + id cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + + const bool glm_moe_stage_profile = false; + const char *glm_moe_stage_filter = NULL; + const char *glm_pair_path = use_stream_expert_addr_table ? + (gate_pair_q2 ? "q2_stream_addr_swiglu" : + "q4_stream_addr_swiglu") : + gate_pair_q2 ? "q2_scalar_swiglu" : + gate_pair_q5 ? "q5_pair_simd_swiglu" : + (q4_scalar_pair ? "q4_scalar_swiglu" : + (q4_pair2 ? "q4_pair2_simd_swiglu" : + "q4_pair4_simd_swiglu")); + const char *glm_down_path = + use_stream_expert_addr_table ? + (down_scalar_q2 ? "q2_stream_addr_down" : "q4_stream_addr_down_simd") : + down_scalar_q2 ? "q2_down_scalar" : + down_scalar_q4 ? "q4_down_simd" : + down_simd_q5 ? "q5_down_simd" : "q6_down_simd"; + double glm_moe_stage_t0 = 0.0; + if (glm_moe_stage_profile) { + if (ds4_gpu_end_commands() == 0 || ds4_gpu_begin_commands() == 0) { + return 0; + } + cb = ds4_gpu_command_buffer(&owned); + if (!cb) return 0; + glm_moe_stage_t0 = ds4_gpu_now_ms(); + } + int ok = 1; +#define DS4_METAL_PROFILE_GLM_MOE_BATCH_STAGE(name) do { \ + if (ok && glm_moe_stage_profile) { \ + if (ds4_gpu_end_commands() == 0) { \ + ok = 0; \ + } else { \ + const char *stage_name = (name); \ + const double now_ms = ds4_gpu_now_ms(); \ + const int print_stage = \ + !glm_moe_stage_filter || !glm_moe_stage_filter[0] || \ + strstr(stage_name, glm_moe_stage_filter) != NULL; \ + if (print_stage) { \ + fprintf(stderr, \ + "ds4: Metal GLM routed MoE batch stage layer=%u tokens=%u experts=%u " \ + "gate=%s down=%s pair=%s down_path=%s %s=%.3f ms\n", \ + layer_index, n_tokens, n_expert, \ + ds4_gpu_metal_tensor_type_name(gate_type), \ + ds4_gpu_metal_tensor_type_name(down_type), \ + glm_pair_path, glm_down_path, \ + stage_name, now_ms - glm_moe_stage_t0); \ + } \ + glm_moe_stage_t0 = now_ms; \ + if (ds4_gpu_begin_commands() == 0) { \ + ok = 0; \ + } else { \ + cb = ds4_gpu_command_buffer(&owned); \ + if (!cb) ok = 0; \ + } \ + } \ + } \ + } while (0) + + ds4_gpu_glm_routed_moe_args args = { + .tp_rank = g_tp_split_rank, + .tp_world = g_tp_split_world, + .tp_expert_base = (int32_t)first_expert, + .in_dim = expert_in_dim, + .mid_dim = expert_mid_dim, + .out_dim = out_dim, + .n_total_expert = n_total_expert, + .n_expert_used = n_expert, + .n_tokens = n_tokens, + .mid_token_stride = mid_token_stride, + .down_type = down_type, + .gate_expert_bytes = gate_expert_bytes, + .gate_row_bytes = gate_row_bytes, + .up_expert_bytes = up_expert_bytes, + .up_row_bytes = up_row_bytes, + .down_expert_bytes = down_expert_bytes, + .down_row_bytes = down_row_bytes, + }; + const NSUInteger pair_x_groups = + gate_pair_q2 ? (use_stream_expert_addr_table ? + (NSUInteger)((expert_mid_dim + 1u) / 2u) : + (NSUInteger)((expert_mid_dim + 7u) / 8u)) : + gate_pair_q5 ? (NSUInteger)((expert_mid_dim + 7u) / 8u) : + use_stream_expert_addr_table ? (NSUInteger)((expert_mid_dim + 3u) / 4u) : + q4_scalar_pair ? (NSUInteger)expert_mid_dim : + q4_pair2 ? (NSUInteger)((expert_mid_dim + 1u) / 2u) : + (NSUInteger)((expert_mid_dim + 7u) / 8u); + const NSUInteger pair_threadgroup_bytes = + q4_scalar_pair ? 512u * sizeof(float) : 0u; + const NSUInteger pair_threads = + q4_scalar_pair ? 256u : 64u; + const NSUInteger down_x_groups = + down_scalar_q2 ? (NSUInteger)((out_dim + 7u) / 8u) : + down_simd_q4 ? (NSUInteger)((out_dim + 3u) / 4u) : + down_simd_q5 ? (NSUInteger)((out_dim + 3u) / 4u) : + down_simd_q6 ? (NSUInteger)((out_dim + 3u) / 4u) : + (NSUInteger)out_dim; + const NSUInteger down_threadgroup_bytes = + down_simd ? 0u : 256u * sizeof(float); + const NSUInteger down_threads = + down_simd ? 64u : 256u; + if (use_stream_expert_addr_table && + !ds4_gpu_stream_expert_cache_mark_entries_inflight(stream_resources, + stream_resource_count, + 0)) { + return 0; + } + + id enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:pair_pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:use_stream_expert_addr_table ? stream_gate_addr_buf : gatebuf + offset:use_stream_expert_addr_table ? 0u : (NSUInteger)gate_inner + atIndex:1]; + [enc setBuffer:use_stream_expert_addr_table ? stream_up_addr_buf : upbuf + offset:use_stream_expert_addr_table ? 0u : (NSUInteger)up_inner + atIndex:2]; + [enc setBuffer:xbuf offset:ds4_gpu_tensor_offset(x) atIndex:3]; + [enc setBuffer:selectedbuf offset:ds4_gpu_tensor_offset(selected) atIndex:4]; + [enc setBuffer:weightsbuf offset:ds4_gpu_tensor_offset(weights) atIndex:5]; + [enc setBuffer:midbuf offset:ds4_gpu_tensor_offset(mid) atIndex:6]; + if (use_stream_expert_addr_table) { + for (uint32_t i = 0; i < stream_resource_count; i++) { + [enc useResource:stream_resources[i]->gate_buffer usage:MTLResourceUsageRead]; + [enc useResource:stream_resources[i]->up_buffer usage:MTLResourceUsageRead]; + } + if (stream_overflow_gate) [enc useResource:stream_overflow_gate usage:MTLResourceUsageRead]; + if (stream_overflow_up) [enc useResource:stream_overflow_up usage:MTLResourceUsageRead]; + } + if (pair_threadgroup_bytes != 0u) { + [enc setThreadgroupMemoryLength:pair_threadgroup_bytes atIndex:0]; + } + [enc dispatchThreadgroups:MTLSizeMake(pair_x_groups, + (NSUInteger)n_expert, + (NSUInteger)n_tokens) + threadsPerThreadgroup:MTLSizeMake(pair_threads, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + DS4_METAL_PROFILE_GLM_MOE_BATCH_STAGE("pair"); + + enc = ds4_gpu_compute_encoder(cb); + [enc setComputePipelineState:down_pipeline]; + [enc setBytes:&args length:sizeof(args) atIndex:0]; + [enc setBuffer:use_stream_expert_addr_table ? stream_down_addr_buf : downbuf + offset:use_stream_expert_addr_table ? 0u : (NSUInteger)down_inner + atIndex:1]; + [enc setBuffer:selectedbuf offset:ds4_gpu_tensor_offset(selected) atIndex:2]; + [enc setBuffer:midbuf offset:ds4_gpu_tensor_offset(mid) atIndex:3]; + [enc setBuffer:outbuf offset:ds4_gpu_tensor_offset(out) atIndex:4]; + if (use_stream_expert_addr_table) { + for (uint32_t i = 0; i < stream_resource_count; i++) { + [enc useResource:stream_resources[i]->down_buffer usage:MTLResourceUsageRead]; + } + if (stream_overflow_down) [enc useResource:stream_overflow_down usage:MTLResourceUsageRead]; + } + if (down_threadgroup_bytes != 0u) { + [enc setThreadgroupMemoryLength:down_threadgroup_bytes atIndex:0]; + } + [enc dispatchThreadgroups:MTLSizeMake(down_x_groups, + (NSUInteger)n_tokens, + 1) + threadsPerThreadgroup:MTLSizeMake(down_threads, 1, 1)]; + ds4_gpu_end_compute_encoder(cb, enc); + DS4_METAL_PROFILE_GLM_MOE_BATCH_STAGE("down"); + + if (!ok) return 0; + if (!ds4_gpu_finish_command_buffer(cb, owned, "GLM routed batch MoE")) return 0; +#undef DS4_METAL_PROFILE_GLM_MOE_BATCH_STAGE + } + + return 1; +} + +int ds4_gpu_glm_routed_moe_batch_tensor( + ds4_gpu_tensor *out, + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t down_offset, + uint32_t gate_type, + uint32_t up_type, + uint32_t down_type, + uint64_t gate_expert_bytes, + uint64_t gate_row_bytes, + uint64_t up_expert_bytes, + uint64_t up_row_bytes, + uint64_t down_expert_bytes, + uint64_t down_row_bytes, + uint32_t expert_in_dim, + uint32_t expert_mid_dim, + uint32_t out_dim, + const ds4_gpu_tensor *selected, + const ds4_gpu_tensor *weights, + uint32_t n_total_expert, + uint32_t n_expert, + uint32_t layer_index, + const ds4_gpu_tensor *x, + uint32_t n_tokens, + uint32_t mid_token_stride) { + return ds4_gpu_glm_routed_moe_batch_tensor_impl(out, + mid, + model_map, + model_size, + gate_offset, + up_offset, + down_offset, + gate_type, + up_type, + down_type, + gate_expert_bytes, + gate_row_bytes, + up_expert_bytes, + up_row_bytes, + down_expert_bytes, + down_row_bytes, + expert_in_dim, + expert_mid_dim, + out_dim, + selected, + weights, + n_total_expert, + n_expert, + layer_index, + x, + n_tokens, + mid_token_stride, + true, + false); +} + +int ds4_gpu_glm_routed_moe_batch_direct_scalar_q4_tensor( + ds4_gpu_tensor *out, + ds4_gpu_tensor *mid, + const void *model_map, + uint64_t model_size, + uint64_t gate_offset, + uint64_t up_offset, + uint64_t down_offset, + uint32_t gate_type, + uint32_t up_type, + uint32_t down_type, + uint64_t gate_expert_bytes, + uint64_t gate_row_bytes, + uint64_t up_expert_bytes, + uint64_t up_row_bytes, + uint64_t down_expert_bytes, + uint64_t down_row_bytes, + uint32_t expert_in_dim, + uint32_t expert_mid_dim, + uint32_t out_dim, + const ds4_gpu_tensor *selected, + const ds4_gpu_tensor *weights, + uint32_t n_total_expert, + uint32_t n_expert, + uint32_t layer_index, + const ds4_gpu_tensor *x, + uint32_t n_tokens, + uint32_t mid_token_stride) { + return ds4_gpu_glm_routed_moe_batch_tensor_impl(out, + mid, + model_map, + model_size, + gate_offset, + up_offset, + down_offset, + gate_type, + up_type, + down_type, + gate_expert_bytes, + gate_row_bytes, + up_expert_bytes, + up_row_bytes, + down_expert_bytes, + down_row_bytes, + expert_in_dim, + expert_mid_dim, + out_dim, + selected, + weights, + n_total_expert, + n_expert, + layer_index, + x, + n_tokens, + mid_token_stride, + false, + false); +} + int ds4_gpu_router_select_tensor( ds4_gpu_tensor *selected, ds4_gpu_tensor *weights, @@ -23242,7 +32836,8 @@ int ds4_gpu_router_select_batch_tensor( } int ds4_gpu_routed_moe_set_selected_override(const int32_t *selected, uint32_t n_selected) { - if (n_selected > 6 || (!selected && n_selected != 0)) return 0; + if (n_selected > DS4_METAL_MAX_ROUTED_EXPERT_USED || + (!selected && n_selected != 0)) return 0; for (uint32_t i = 0; i < n_selected; i++) { g_routed_moe_selected_override[i] = selected[i]; } @@ -23277,15 +32872,29 @@ int ds4_gpu_routed_moe_one_tensor( float clamp, const ds4_gpu_tensor *x, const ds4_gpu_tensor *add_in, - uint32_t layer_index) { + uint32_t layer_index, + bool force_resident) { if (!g_initialized && !ds4_gpu_init()) return 0; + /* TP sharding: only the owned contiguous expert range is mapped, + * so bind from the owned base, validate only its bytes, and tell the + * kernels the first expert id present at that base. */ + uint32_t first_expert = 0; + uint32_t n_bind_expert = 0; + ds4_gpu_tp_expert_range(n_total_expert, &first_expert, &n_bind_expert); + const int32_t tp_expert_base_host = (int32_t)first_expert; + gate_offset += (uint64_t)first_expert * gate_expert_bytes; + up_offset += (uint64_t)first_expert * gate_expert_bytes; + down_offset += (uint64_t)first_expert * down_expert_bytes; + if (!out || !gate || !up || !mid || !x || !model_map || !selected || !weights || - n_total_expert == 0 || n_expert == 0 || n_expert > 6 || + n_total_expert == 0 || n_expert == 0 || + n_expert > DS4_METAL_MAX_ROUTED_EXPERT_USED || gate_expert_bytes == 0 || down_expert_bytes == 0 || gate_row_bytes == 0 || down_row_bytes == 0) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32044); return 0; } - if ((expert_in_dim % 256u) != 0 || (expert_mid_dim % 256u) != 0) return 0; + if ((expert_in_dim % 256u) != 0 || (expert_mid_dim % 256u) != 0) { if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32047); return 0; } ds4_gpu_stream_expert_cache_note_token(layer_index); @autoreleasepool { @@ -23325,26 +32934,24 @@ int ds4_gpu_routed_moe_one_tensor( fprintf(stderr, "ds4: Metal routed MoE tensor byte size overflow\n"); return 0; } - const uint64_t gate_tensor_bytes = (uint64_t)n_total_expert * gate_expert_bytes; - const uint64_t down_tensor_bytes = (uint64_t)n_total_expert * down_expert_bytes; + const uint64_t gate_tensor_bytes = (uint64_t)n_bind_expert * gate_expert_bytes; + const uint64_t down_tensor_bytes = (uint64_t)n_bind_expert * down_expert_bytes; uint64_t gate_inner = 0; uint64_t up_inner = 0; uint64_t down_inner = 0; id gate_buf = nil; id up_buf = nil; id down_buf = nil; - __unsafe_unretained id gate_slot_bufs[6] = { nil, nil, nil, nil, nil, nil }; - __unsafe_unretained id up_slot_bufs[6] = { nil, nil, nil, nil, nil, nil }; - __unsafe_unretained id down_slot_bufs[6] = { nil, nil, nil, nil, nil, nil }; - ds4_gpu_stream_expert_cache_entry *stream_slot_entries[6] = { - NULL, NULL, NULL, NULL, NULL, NULL - }; - NSUInteger gate_slot_offsets[6] = { 0, 0, 0, 0, 0, 0 }; - NSUInteger up_slot_offsets[6] = { 0, 0, 0, 0, 0, 0 }; - NSUInteger down_slot_offsets[6] = { 0, 0, 0, 0, 0, 0 }; - uint64_t stream_gate_abs_offsets[6] = { 0, 0, 0, 0, 0, 0 }; - uint64_t stream_up_abs_offsets[6] = { 0, 0, 0, 0, 0, 0 }; - uint64_t stream_down_abs_offsets[6] = { 0, 0, 0, 0, 0, 0 }; + __unsafe_unretained id gate_slot_bufs[DS4_METAL_MAX_ROUTED_EXPERT_USED] = { nil }; + __unsafe_unretained id up_slot_bufs[DS4_METAL_MAX_ROUTED_EXPERT_USED] = { nil }; + __unsafe_unretained id down_slot_bufs[DS4_METAL_MAX_ROUTED_EXPERT_USED] = { nil }; + ds4_gpu_stream_expert_cache_entry *stream_slot_entries[DS4_METAL_MAX_ROUTED_EXPERT_USED] = { NULL }; + NSUInteger gate_slot_offsets[DS4_METAL_MAX_ROUTED_EXPERT_USED] = { 0 }; + NSUInteger up_slot_offsets[DS4_METAL_MAX_ROUTED_EXPERT_USED] = { 0 }; + NSUInteger down_slot_offsets[DS4_METAL_MAX_ROUTED_EXPERT_USED] = { 0 }; + uint64_t stream_gate_abs_offsets[DS4_METAL_MAX_ROUTED_EXPERT_USED] = { 0 }; + uint64_t stream_up_abs_offsets[DS4_METAL_MAX_ROUTED_EXPERT_USED] = { 0 }; + uint64_t stream_down_abs_offsets[DS4_METAL_MAX_ROUTED_EXPERT_USED] = { 0 }; id stream_gate_addr_buf = nil; id stream_up_addr_buf = nil; id stream_down_addr_buf = nil; @@ -23379,7 +32986,7 @@ int ds4_gpu_routed_moe_one_tensor( DS4MetalQ4ExpertTable *up_table = nil; DS4MetalQ4ExpertTable *down_table = nil; id q4_table_layer_residency = nil; - int32_t selected_ids[6] = { 0, 0, 0, 0, 0, 0 }; + int32_t selected_ids[DS4_METAL_MAX_ROUTED_EXPERT_USED] = { 0 }; const uint32_t n_tokens = 1; const uint32_t pair_rows = n_tokens * n_expert; @@ -23389,6 +32996,7 @@ int ds4_gpu_routed_moe_one_tensor( &g_moe_down_scratch_bytes, (NSUInteger)down_scratch_bytes, "ds4_moe_down_scratch"))) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32148); return 0; } @@ -23399,6 +33007,7 @@ int ds4_gpu_routed_moe_one_tensor( if (gate_nr0 == 0 || down_nr0 == 0 || !gate_mv_pipeline || !down_mv_pipeline) { fprintf(stderr, "ds4: unsupported Metal routed MoE quant types gate=%u down=%u\n", gate_type, down_type); + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32158); return 0; } @@ -23410,13 +33019,14 @@ int ds4_gpu_routed_moe_one_tensor( ds4_gpu_make_mul_mv_id_args(expert_mid_dim, out_dim, n_total_expert, down_row_bytes, down_expert_bytes, n_expert, n_expert, n_tokens, down_nr0); - /* Decode-only tensor-parallel expert ownership; the batch (prefill) - * variant stays replicated and keeps the zero fields. */ + /* Tensor-parallel expert ownership; non-TP calls keep tp_world at 1. */ gate_args.tp_rank = g_tp_split_rank; gate_args.tp_world = g_tp_split_world; + gate_args.tp_expert_base = tp_expert_base_host; down_args.tp_rank = g_tp_split_rank; down_args.tp_world = g_tp_split_world; down_args.tp_addend = add_in != NULL; + down_args.tp_expert_base = tp_expert_base_host; const NSUInteger gate_smem = ds4_gpu_routed_mv_smem(gate_type); const NSUInteger down_smem = ds4_gpu_routed_mv_smem(down_type); @@ -23439,10 +33049,16 @@ int ds4_gpu_routed_moe_one_tensor( down_sum6_pipeline = g_moe_mul_mv_id_q2_k_sum6_pipeline; } else if (down_type == DS4_METAL_TENSOR_Q4_K) { down_sum6_pipeline = g_moe_mul_mv_id_q4_k_sum6_pipeline; + } else if (down_type == DS4_METAL_TENSOR_IQ2_XXS && + g_tp_split_world == 2) { + /* IQ2 down-sum exists for the GLM TP resident split only; the + * streaming paths must keep their addr/masked chain (expert + * bytes are not at their model-map offsets when streamed). */ + down_sum6_pipeline = g_moe_mul_mv_id_iq2_xxs_sum6_pipeline; } const bool direct_down_sum = !g_quality_mode && - n_expert == 6 && + (n_expert == 6 || (n_expert == 8 && g_tp_split_world == 2)) && n_tokens == 1 && down_sum6_pipeline != nil; /* The expert-ownership split lives only in the fused id pair+sum6 @@ -23674,6 +33290,7 @@ int ds4_gpu_routed_moe_one_tensor( g_moe_mul_mv_slots6_q4_k_sum6_pipeline != nil && enable_q4_gather_slots; const bool use_q4_selected_slots = + !force_resident && !use_q4_grouped_experts && !use_q4_group6_experts && !use_q4_group8_experts && @@ -23697,6 +33314,7 @@ int ds4_gpu_routed_moe_one_tensor( g_moe_mul_mv_slots6_q4_k_sum6_pipeline != nil && getenv("DS4_METAL_DISABLE_Q4_SELECTED_EXPERT_VIEWS") == NULL; const bool use_iq2_selected_slots = + !force_resident && g_ssd_streaming_mode && gate_type == DS4_METAL_TENSOR_IQ2_XXS && down_type == DS4_METAL_TENSOR_Q2_K && @@ -23707,7 +33325,19 @@ int ds4_gpu_routed_moe_one_tensor( g_moe_mul_mv_slots6_iq2_xxs_pair_swiglu_pipeline != nil && g_moe_mul_mv_slots6_q2_k_sum6_pipeline != nil && getenv("DS4_METAL_DISABLE_IQ2_SELECTED_EXPERT_VIEWS") == NULL; - const bool use_selected_slots = use_q4_selected_slots || use_iq2_selected_slots; + const bool use_iq2_stream_addr_table = + !force_resident && + g_ssd_streaming_mode && + gate_type == DS4_METAL_TENSOR_IQ2_XXS && + down_type == DS4_METAL_TENSOR_IQ2_XXS && + n_expert <= DS4_METAL_MAX_ROUTED_EXPERT_USED && + n_tokens == 1 && + fuse_pair_swiglu && + g_moe_mul_mv_addr_iq2_xxs_pair_swiglu_pipeline != nil && + g_moe_mul_mv_addr_iq2_xxs_pipeline != nil && + getenv("DS4_METAL_DISABLE_IQ2_STREAM_ADDR_TABLE") == NULL; + const bool use_selected_slots = + use_q4_selected_slots || use_iq2_selected_slots || use_iq2_stream_addr_table; id slots_pair_swiglu_pipeline = use_iq2_selected_slots ? g_moe_mul_mv_slots6_iq2_xxs_pair_swiglu_pipeline : g_moe_mul_mv_slots6_q4_k_pair_swiglu_pipeline; @@ -23767,6 +33397,7 @@ int ds4_gpu_routed_moe_one_tensor( down_expert_bytes, n_total_expert); if (!gate_table || !up_table || !down_table) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32546); return 0; } q4_table_layer_residency = @@ -23794,6 +33425,7 @@ int ds4_gpu_routed_moe_one_tensor( n_total_expert, g_moe_table_q4_sum_down_encoder); if (!gate_table || !up_table || !down_table) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32573); return 0; } q4_table_layer_residency = @@ -23817,7 +33449,7 @@ int ds4_gpu_routed_moe_one_tensor( down_offset, down_tensor_bytes, &down_inner); - if (!gate_buf || !up_buf || !down_buf) return 0; + if (!gate_buf || !up_buf || !down_buf) { if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32601); return 0; } } else if (use_q4_group6_experts || use_q4_gather_slots) { if ((uint64_t)q4_group6_expert_group_size > UINT64_MAX / gate_expert_bytes || (uint64_t)q4_group6_expert_group_size > UINT64_MAX / down_expert_bytes) { @@ -23864,6 +33496,7 @@ int ds4_gpu_routed_moe_one_tensor( &group_inner); down_group6_offsets[i] = (NSUInteger)group_inner; if (!gate_group6_bufs[i] || !up_group6_bufs[i] || !down_group6_bufs[i]) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32643); return 0; } } @@ -23891,6 +33524,7 @@ int ds4_gpu_routed_moe_one_tensor( &g_moe_q4_down_slots_bytes, down_slots_bytes, "ds4_moe_q4_down_slots")) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32670); return 0; } for (uint32_t i = 0; i < 6; i++) { @@ -23948,6 +33582,7 @@ int ds4_gpu_routed_moe_one_tensor( &group_inner); down_group8_offsets[i] = (NSUInteger)group_inner; if (!gate_group8_bufs[i] || !up_group8_bufs[i] || !down_group8_bufs[i]) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32727); return 0; } } @@ -24015,6 +33650,7 @@ int ds4_gpu_routed_moe_one_tensor( &group_inner); down_group24_offsets[i] = (NSUInteger)group_inner; if (!gate_group24_bufs[i] || !up_group24_bufs[i] || !down_group24_bufs[i]) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32794); return 0; } } @@ -24024,6 +33660,8 @@ int ds4_gpu_routed_moe_one_tensor( ds4_gpu_stream_expert_timing_summary_enabled(); double selected_t0 = selected_timing ? ds4_gpu_now_ms() : 0.0; double selected_read_ms = 0.0; + double selected_sync_ms = 0.0; + double selected_copy_ms = 0.0; double selected_wrap_ms = 0.0; uint64_t selected_cache_hits0 = g_stream_expert_cache_hits; uint64_t selected_cache_misses0 = g_stream_expert_cache_misses; @@ -24042,11 +33680,17 @@ int ds4_gpu_routed_moe_one_tensor( g_moe_mul_mv_addr_q2_k_sum6_pipeline != nil; use_stream_expert_cache = !use_iq2_full_expert_addr_table && - (use_iq2_selected_slots || use_q4_selected_slots) && + (use_iq2_selected_slots || use_iq2_stream_addr_table || use_q4_selected_slots) && stream_expert_cache_size_known && ds4_gpu_stream_expert_cache_effective_cap(layer_index, n_total_expert, n_expert) != 0; + if (use_iq2_stream_addr_table && !use_stream_expert_cache) { + fprintf(stderr, + "ds4: Metal IQ2/IQ2 streaming decode requires a non-empty expert cache\n"); + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32831); + return 0; + } const bool stream_split_ready = use_stream_expert_cache && ds4_gpu_stream_expert_split_ready(); @@ -24094,9 +33738,10 @@ int ds4_gpu_routed_moe_one_tensor( &stream_up_addr_buf, &stream_down_addr_buf, &full_entry)) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32880); return 0; } - for (uint32_t i = 0; i < 6; i++) { + for (uint32_t i = 0; i < n_expert; i++) { stream_slot_entries[i] = full_entry; } use_stream_expert_addr_table = true; @@ -24104,6 +33749,7 @@ int ds4_gpu_routed_moe_one_tensor( const int replayed_selected_ids = ds4_gpu_moe_selected_trace_replay(selected_ids, n_expert); if (replayed_selected_ids < 0) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32890); return 0; } else if (replayed_selected_ids > 0) { selected_id_source = "replay"; @@ -24131,6 +33777,7 @@ int ds4_gpu_routed_moe_one_tensor( &validator_all_cached, &validator_miss_mask, &validator_invalid_mask)) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32917); return 0; } selected_id_source = @@ -24140,38 +33787,70 @@ int ds4_gpu_routed_moe_one_tensor( } else { g_routed_moe_selected_override_n = 0; if (g_batch_cb != nil) { + double selected_boundary_t0 = + selected_timing ? ds4_gpu_now_ms() : 0.0; if (q4_selected_shared_event) { - if (ds4_gpu_signal_batch_and_wait_event("selected-id readback") == 0) return 0; + if (ds4_gpu_signal_batch_and_wait_event("selected-id readback") == 0) { if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32942); return 0; } } else if (ds4_gpu_end_commands() == 0) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32931); return 0; } + if (selected_timing) { + selected_sync_ms += + ds4_gpu_now_ms() - selected_boundary_t0; + } + double selected_copy_t0 = + selected_timing ? ds4_gpu_now_ms() : 0.0; if (ds4_gpu_tensor_read(selected, 0, selected_ids, (uint64_t)n_expert * sizeof(selected_ids[0])) == 0) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32943); return 0; } - if (!q4_selected_shared_event && ds4_gpu_begin_commands() == 0) return 0; - } else if (ds4_gpu_tensor_read(selected, - 0, - selected_ids, - (uint64_t)n_expert * sizeof(selected_ids[0])) == 0) { - return 0; + if (selected_timing) { + selected_copy_ms += + ds4_gpu_now_ms() - selected_copy_t0; + } + if (!q4_selected_shared_event) { + selected_boundary_t0 = + selected_timing ? ds4_gpu_now_ms() : 0.0; + if (ds4_gpu_begin_commands() == 0) { if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32967); return 0; } + if (selected_timing) { + selected_sync_ms += + ds4_gpu_now_ms() - selected_boundary_t0; + } + } + } else { + double selected_copy_t0 = + selected_timing ? ds4_gpu_now_ms() : 0.0; + if (ds4_gpu_tensor_read(selected, + 0, + selected_ids, + (uint64_t)n_expert * sizeof(selected_ids[0])) == 0) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32965); + return 0; + } + if (selected_timing) { + selected_copy_ms += + ds4_gpu_now_ms() - selected_copy_t0; + } } } } if (selected_timing) { - selected_read_ms = ds4_gpu_now_ms() - selected_t0; + selected_read_ms = selected_sync_ms + selected_copy_ms; selected_t0 = ds4_gpu_now_ms(); } if (selected_ids_available) { - for (uint32_t i = 0; i < 6; i++) { + for (uint32_t i = 0; i < n_expert; i++) { if (selected_ids[i] < 0 || (uint32_t)selected_ids[i] >= n_total_expert) { fprintf(stderr, "ds4: Metal routed MoE selected expert id %d is outside 0..%u\n", selected_ids[i], n_total_expert); + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32986); return 0; } } @@ -24183,10 +33862,11 @@ int ds4_gpu_routed_moe_one_tensor( selected_ids, n_expert, n_total_expert)) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 32997); return 0; } - for (uint32_t i = 0; i < 6; i++) { + for (uint32_t i = 0; i < n_expert; i++) { const uint64_t expert_id = (uint64_t)(uint32_t)selected_ids[i]; if (expert_id > UINT64_MAX / gate_expert_bytes || expert_id > UINT64_MAX / down_expert_bytes) { @@ -24291,22 +33971,31 @@ int ds4_gpu_routed_moe_one_tensor( &slot_inner)); down_slot_offsets[i] = (NSUInteger)slot_inner; if (!gate_slot_bufs[i] || !up_slot_bufs[i] || !down_slot_bufs[i]) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 33105); return 0; } } } if (use_stream_expert_cache) { use_stream_expert_addr_table = - use_iq2_selected_slots && - ds4_gpu_stream_expert_addr_table_kernel_requested() && - g_moe_mul_mv_addr_iq2_xxs_pair_swiglu_pipeline != nil && - g_moe_mul_mv_addr_q2_k_sum6_pipeline != nil && + ((use_iq2_selected_slots && + ds4_gpu_stream_expert_addr_table_kernel_requested() && + g_moe_mul_mv_addr_iq2_xxs_pair_swiglu_pipeline != nil && + g_moe_mul_mv_addr_q2_k_sum6_pipeline != nil) || + use_iq2_stream_addr_table) && ds4_gpu_stream_expert_cache_addr_buffers(layer_index, &stream_gate_addr_buf, &stream_up_addr_buf, &stream_down_addr_buf); + if (use_iq2_stream_addr_table && !use_stream_expert_addr_table) { + fprintf(stderr, + "ds4: Metal IQ2/IQ2 streaming decode could not prepare expert address buffers\n"); + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 33123); + return 0; + } use_stream_expert_masked_addr_table = use_stream_expert_addr_table && + use_iq2_selected_slots && ds4_gpu_stream_expert_masked_addr_requested() && g_moe_mul_mv_addr_iq2_xxs_pair_swiglu_masked_pipeline != nil && g_moe_mul_mv_addr_q2_k_sum6_masked_pipeline != nil; @@ -24315,6 +34004,8 @@ int ds4_gpu_routed_moe_one_tensor( use_stream_expert_masked_addr_table && stream_expert_resident_mask != 0 && stream_expert_missing_mask != 0 && + ds4_gpu_stream_expert_split_worthwhile(stream_expert_resident_mask, + stream_expert_missing_mask) && g_batch_cb != nil && getenv("DS4_METAL_MOE_ONE_STAGE_PROFILE") == NULL; if (use_stream_expert_split_deferred) { @@ -24333,6 +34024,7 @@ int ds4_gpu_routed_moe_one_tensor( &table, selected_ids, n_expert)) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 33156); return 0; } } @@ -24352,12 +34044,13 @@ int ds4_gpu_routed_moe_one_tensor( down_expert_bytes, stream_expert_missing_mask, stream_slot_entries)) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 33175); return 0; } for (uint32_t i = 0; i < n_expert; i++) { if ((stream_expert_missing_mask & (1u << i)) == 0) continue; ds4_gpu_stream_expert_cache_entry *entry = stream_slot_entries[i]; - if (!entry) return 0; + if (!entry) { if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 33202); return 0; } gate_slot_bufs[i] = entry->gate_buffer; gate_slot_offsets[i] = entry->gate_inner; up_slot_bufs[i] = entry->up_buffer; @@ -24366,6 +34059,24 @@ int ds4_gpu_routed_moe_one_tensor( down_slot_offsets[i] = entry->down_inner; } } + if (use_iq2_stream_addr_table && use_stream_expert_addr_table) { + for (uint32_t i = 0; i < n_expert; i++) { + ds4_gpu_stream_expert_cache_entry *entry = stream_slot_entries[i]; + if (!entry) { if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 33214); return 0; } + if (!ds4_gpu_stream_expert_cache_set_addr_slot_raw( + layer_index, + (uint32_t)selected_ids[i], + entry->gate_buffer, + entry->gate_inner, + entry->up_buffer, + entry->up_inner, + entry->down_buffer, + entry->down_inner)) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 33202); + return 0; + } + } + } ds4_gpu_stream_expert_cache_prune_layer(layer_index, n_total_expert, n_expert, @@ -24383,6 +34094,7 @@ int ds4_gpu_routed_moe_one_tensor( &stream_up_addr_buf, &stream_down_addr_buf, &compact_selected)) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 33223); return 0; } selected_exec_buf = compact_selected; @@ -24399,6 +34111,7 @@ int ds4_gpu_routed_moe_one_tensor( n_expert, &selected_exec_buf, &selected_exec_off)) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 33239); return 0; } } @@ -24410,7 +34123,8 @@ int ds4_gpu_routed_moe_one_tensor( stream_expert_resident_mask, stream_expert_missing_mask); } - ds4_gpu_stream_expert_timing_note_selected(selected_read_ms, + ds4_gpu_stream_expert_timing_note_selected(selected_sync_ms, + selected_copy_ms, selected_wrap_ms); } if (selected_profile) { @@ -24423,7 +34137,8 @@ int ds4_gpu_routed_moe_one_tensor( const uint64_t selected_cache_evictions = g_stream_expert_cache_evictions - selected_cache_evictions0; const char *selected_path = - use_iq2_selected_slots ? "iq2/q2" : "q4/q4"; + use_iq2_stream_addr_table ? "iq2/iq2" : + (use_iq2_selected_slots ? "iq2/q2" : "q4/q4"); const char *selected_view_mode = use_stream_expert_split_deferred ? "stream-split" : use_stream_expert_masked_addr_table ? "stream-addr-mask" : @@ -24459,19 +34174,21 @@ int ds4_gpu_routed_moe_one_tensor( gate_buf = ds4_gpu_wrap_model_range(model_map, model_size, gate_offset, gate_tensor_bytes, &gate_inner); up_buf = ds4_gpu_wrap_model_range(model_map, model_size, up_offset, gate_tensor_bytes, &up_inner); down_buf = ds4_gpu_wrap_model_range(model_map, model_size, down_offset, down_tensor_bytes, &down_inner); - if (!gate_buf || !up_buf || !down_buf) return 0; + if (!gate_buf || !up_buf || !down_buf) { if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 33326); return 0; } } if (q4_grouped_boundary || q4_exact_boundary || q4_table_boundary) { if (ds4_gpu_end_commands() == 0 || ds4_gpu_begin_commands() == 0) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 33305); return 0; } } int owned = 0; id cb = ds4_gpu_command_buffer(&owned); - if (!cb) return 0; + if (!cb) { if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 33337); return 0; } if ((use_q4_expert_address_table || use_q4_expert_table) && !ds4_gpu_use_model_residency_set(cb)) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 33314); return 0; } if (!q4_table_queue_residency && @@ -24480,18 +34197,11 @@ int ds4_gpu_routed_moe_one_tensor( [cb useResidencySet:q4_table_layer_residency]; } - const char *moe_one_stage_layer_env = getenv("DS4_METAL_MOE_ONE_STAGE_PROFILE_LAYER"); - bool moe_one_stage_layer_match = true; - if (moe_one_stage_layer_env && moe_one_stage_layer_env[0]) { - char *end = NULL; - long layer = strtol(moe_one_stage_layer_env, &end, 10); - moe_one_stage_layer_match = - end && *end == '\0' && layer >= 0 && (uint32_t)layer == layer_index; - } const bool moe_one_stage_profile = - getenv("DS4_METAL_MOE_ONE_STAGE_PROFILE") != NULL && g_batch_cb != nil && - moe_one_stage_layer_match; + ds4_gpu_stage_profile_enabled_for_layer("DS4_METAL_MOE_ONE_STAGE_PROFILE", + "DS4_METAL_MOE_ONE_STAGE_PROFILE_LAYER", + layer_index); const char *moe_one_stage_filter = getenv("DS4_METAL_MOE_STAGE_PROFILE_FILTER"); const char *moe_one_path = use_q4_grouped_experts ? "q4_grouped_pair_swiglu" : @@ -24514,10 +34224,11 @@ int ds4_gpu_routed_moe_one_tensor( double moe_one_stage_t0 = moe_one_stage_profile ? ds4_gpu_now_ms() : 0.0; if (moe_one_stage_profile) { if (ds4_gpu_end_commands() == 0 || ds4_gpu_begin_commands() == 0) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 33349); return 0; } cb = ds4_gpu_command_buffer(&owned); - if (!cb) return 0; + if (!cb) { if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 33380); return 0; } moe_one_stage_t0 = ds4_gpu_now_ms(); } #define DS4_METAL_PROFILE_MOE_ONE_STAGE(name) do { \ @@ -24592,7 +34303,7 @@ int ds4_gpu_routed_moe_one_tensor( if (use_q4_gather_slots) { DS4_METAL_PROFILE_MOE_ONE_STAGE("q4_gather"); } - if (!ok) return 0; + if (!ok) { if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 33455); return 0; } if (use_q4_grouped_experts) { ds4_gpu_dsv4_moe_swiglu_weight_args act_args = { .width = expert_mid_dim, @@ -25418,7 +35129,23 @@ int ds4_gpu_routed_moe_one_tensor( 2); } else if (ok && (use_q4_gather_slots || use_selected_slots)) { if (use_stream_expert_addr_table) { - if (use_stream_expert_masked_addr_table) { + if (down_type == DS4_METAL_TENSOR_IQ2_XXS) { + ok = ds4_gpu_encode_mul_mv_addr_iq2(cb, + g_moe_mul_mv_addr_iq2_xxs_pipeline, + &down_args, + stream_slot_entries, + n_expert, + stream_down_addr_buf, + midbuf, + ds4_gpu_tensor_offset(mid), + down_dst, + down_dst_off, + selected_exec_buf, + selected_exec_off, + down_smem, + 2, + false); + } else if (use_stream_expert_masked_addr_table) { ds4_gpu_stream_expert_split_args split_args = { .active_mask = 0x3fu, .accumulate = 0u, @@ -25516,11 +35243,12 @@ int ds4_gpu_routed_moe_one_tensor( n_tokens); } DS4_METAL_PROFILE_MOE_ONE_STAGE("sum"); - if (!ok) return 0; + if (!ok) { if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 34395); return 0; } - if (!ds4_gpu_finish_command_buffer(cb, owned, "routed tensor MoE")) return 0; + if (!ds4_gpu_finish_command_buffer(cb, owned, "routed tensor MoE")) { if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 34397); return 0; } if (q4_grouped_boundary || q4_exact_boundary || q4_table_boundary) { if (ds4_gpu_end_commands() == 0 || ds4_gpu_begin_commands() == 0) { + if (getenv("DS4_GLM_TP_DEBUG")) fprintf(stderr, "ds4: routed_moe_one silent return at line %d\n", 34372); return 0; } } @@ -25560,8 +35288,18 @@ int ds4_gpu_routed_moe_batch_tensor( uint32_t n_tokens, bool *mid_is_f16) { if (!g_initialized && !ds4_gpu_init()) return 0; + /* TP sharding (see ds4_gpu_routed_moe_one_tensor): bind from the owned + * expert range and rebase ids in the kernels. */ + uint32_t first_expert = 0; + uint32_t n_bind_expert = 0; + ds4_gpu_tp_expert_range(n_total_expert, &first_expert, &n_bind_expert); + const int32_t tp_expert_base_host = (int32_t)first_expert; + gate_offset += (uint64_t)first_expert * gate_expert_bytes; + up_offset += (uint64_t)first_expert * gate_expert_bytes; + down_offset += (uint64_t)first_expert * down_expert_bytes; if (!out || !gate || !up || !mid || !x || !model_map || !selected || !weights || - n_tokens == 0 || n_total_expert == 0 || n_expert == 0 || n_expert > 6) { + n_tokens == 0 || n_total_expert == 0 || n_expert == 0 || + n_expert > DS4_METAL_MAX_ROUTED_EXPERT_USED) { return 0; } if (gate_expert_bytes == 0 || down_expert_bytes == 0 || @@ -25574,8 +35312,8 @@ int ds4_gpu_routed_moe_batch_tensor( fprintf(stderr, "ds4: Metal routed batch MoE tensor byte size overflow\n"); return 0; } - const uint64_t gate_tensor_bytes = (uint64_t)n_total_expert * gate_expert_bytes; - const uint64_t down_tensor_bytes = (uint64_t)n_total_expert * down_expert_bytes; + const uint64_t gate_tensor_bytes = (uint64_t)n_bind_expert * gate_expert_bytes; + const uint64_t down_tensor_bytes = (uint64_t)n_bind_expert * down_expert_bytes; /* * PRO Q4 routed expert tensors are multi-GiB per layer. A one-token @@ -25690,7 +35428,8 @@ int ds4_gpu_routed_moe_batch_tensor( clamp, x, NULL, - layer_index); + layer_index, + false); } @autoreleasepool { @@ -25773,10 +35512,16 @@ int ds4_gpu_routed_moe_batch_tensor( ds4_gpu_make_mul_mv_id_args(expert_in_dim, expert_mid_dim, n_total_expert, gate_row_bytes, gate_expert_bytes, 1, n_expert, n_tokens, gate_nr0); + gate_args.tp_rank = g_tp_split_rank; + gate_args.tp_world = g_tp_split_world; + gate_args.tp_expert_base = tp_expert_base_host; ds4_gpu_mul_mv_id_args down_args = ds4_gpu_make_mul_mv_id_args(expert_mid_dim, out_dim, n_total_expert, down_row_bytes, down_expert_bytes, n_expert, n_expert, n_tokens, down_nr0); + down_args.tp_rank = g_tp_split_rank; + down_args.tp_world = g_tp_split_world; + down_args.tp_expert_base = tp_expert_base_host; const bool q4_batch_expert_table_auto = gate_type == DS4_METAL_TENSOR_Q4_K && down_type == DS4_METAL_TENSOR_Q4_K && @@ -25863,6 +35608,7 @@ int ds4_gpu_routed_moe_batch_tensor( !use_iq2_batch_selected_addr; const bool use_mm_id_pair_swiglu = use_mm_id && + g_tp_split_world != 2 && /* pair-swiglu mm kernel lacks expert ownership */ request_mid_f16 && gate_type == DS4_METAL_TENSOR_IQ2_XXS && down_type == DS4_METAL_TENSOR_Q2_K && @@ -25883,6 +35629,12 @@ int ds4_gpu_routed_moe_batch_tensor( down_row_bytes, down_expert_bytes, n_expert, n_expert, n_tokens, request_mid_f16 ? sizeof(uint16_t) : sizeof(float)); + gate_mm_args.tp_rank = g_tp_split_rank; + gate_mm_args.tp_world = g_tp_split_world; + gate_mm_args.tp_expert_base = tp_expert_base_host; + down_mm_args.tp_rank = g_tp_split_rank; + down_mm_args.tp_world = g_tp_split_world; + down_mm_args.tp_expert_base = tp_expert_base_host; map_pipeline = ds4_gpu_get_pipeline(ds4_gpu_mul_mm_id_map0_name(n_expert)); gate_mm_pipeline = ds4_gpu_routed_mm_pipeline(gate_type); @@ -26038,6 +35790,20 @@ int ds4_gpu_routed_moe_batch_tensor( down_tensor_bytes, &down_inner); if (!gate_buf || !up_buf || !down_buf) return 0; + if (getenv("DS4_GLM_TP_DEBUG") && layer_index == 3) { + fprintf(stderr, + "ds4: batch mv binds l=%u rank=%d base=%d gate=%llu+%llu " + "up=%llu down=%llu inner=%llu/%llu/%llu ne02=%d nei0=%d nr0=%d\n", + layer_index, g_tp_split_rank, tp_expert_base_host, + (unsigned long long)gate_offset, + (unsigned long long)gate_tensor_bytes, + (unsigned long long)up_offset, + (unsigned long long)down_offset, + (unsigned long long)gate_inner, + (unsigned long long)up_inner, + (unsigned long long)down_inner, + gate_args.ne02, gate_args.nei0, gate_args.nr0); + } } const bool q4_batch_table_boundary = @@ -26063,20 +35829,11 @@ int ds4_gpu_routed_moe_batch_tensor( [cb respondsToSelector:@selector(useResidencySet:)]) { [cb useResidencySet:q4_table_layer_residency]; } - const char *moe_stage_layer_env = - getenv("DS4_METAL_MOE_STAGE_PROFILE_LAYER"); - uint32_t moe_stage_layer = UINT32_MAX; - if (moe_stage_layer_env && moe_stage_layer_env[0]) { - char *end = NULL; - unsigned long v = strtoul(moe_stage_layer_env, &end, 10); - if (end != moe_stage_layer_env && *end == '\0' && v <= UINT32_MAX) { - moe_stage_layer = (uint32_t)v; - } - } const bool moe_stage_profile = - getenv("DS4_METAL_MOE_STAGE_PROFILE") != NULL && g_batch_cb != nil && - (moe_stage_layer == UINT32_MAX || moe_stage_layer == layer_index); + ds4_gpu_stage_profile_enabled_for_layer("DS4_METAL_MOE_STAGE_PROFILE", + "DS4_METAL_MOE_STAGE_PROFILE_LAYER", + layer_index); const char *moe_stage_filter = getenv("DS4_METAL_MOE_STAGE_PROFILE_FILTER"); const char *moe_path = use_q4_batch_expert_table ? "q4_table_pair_swiglu" : @@ -26268,7 +36025,8 @@ int ds4_gpu_routed_moe_batch_tensor( xbuf, ds4_gpu_tensor_offset(x), gatebuf, - ds4_gpu_tensor_offset(gate)); + ds4_gpu_tensor_offset(gate), + 8192u); DS4_METAL_PROFILE_MOE_STAGE("gate"); } if (ok && !use_mm_id_pair_swiglu) { @@ -26280,7 +36038,8 @@ int ds4_gpu_routed_moe_batch_tensor( xbuf, ds4_gpu_tensor_offset(x), upbuf, - ds4_gpu_tensor_offset(up)); + ds4_gpu_tensor_offset(up), + 8192u); DS4_METAL_PROFILE_MOE_STAGE("up"); } } else if (use_tiny_pair_swiglu) { @@ -26543,7 +36302,8 @@ int ds4_gpu_routed_moe_batch_tensor( midbuf, ds4_gpu_tensor_offset(mid), down_dst, - down_dst_off); + down_dst_off, + 8192u); } else { ok = ds4_gpu_encode_mul_mv_id(cb, down_mv_pipeline, @@ -26577,7 +36337,17 @@ int ds4_gpu_routed_moe_batch_tensor( n_tokens); } DS4_METAL_PROFILE_MOE_STAGE("sum"); - if (!ok) return 0; + if (!ok) { + fprintf(stderr, + "ds4: Metal routed batch MoE failed before submit layer=%u tokens=%u " + "gate=%s down=%s path=%s\n", + layer_index, + n_tokens, + ds4_gpu_metal_tensor_type_name(gate_type), + ds4_gpu_metal_tensor_type_name(down_type), + moe_path); + return 0; + } if (!ds4_gpu_finish_command_buffer(cb, owned, "routed batch MoE")) { if (use_iq2_batch_selected_addr) { diff --git a/ds4_rocm.cu b/ds4_rocm.cu index 60a96b56..802e5736 100644 --- a/ds4_rocm.cu +++ b/ds4_rocm.cu @@ -142,10 +142,34 @@ extern "C" void ds4_gpu_tp_set_batch_exchange(ds4_gpu_tp_batch_exchange_fn fn) { (void)fn; } +extern "C" void ds4_gpu_tp_suspend_expert_sharding(int suspend) { + (void)suspend; +} + extern "C" void ds4_gpu_tp_keepalive_pause(int paused) { (void)paused; } +extern "C" void ds4_gpu_tp_set_attn_head_split(int enabled) { + (void)enabled; +} + +extern "C" void ds4_gpu_model_residency_skip(int skip) { + (void)skip; +} + +extern "C" void ds4_gpu_tp_set_big_exchange(ds4_gpu_tp_big_exchange_fn fn) { + (void)fn; +} + +extern "C" int ds4_gpu_tp_big_gate_encode(uint32_t layer, uint32_t rows, + const ds4_gpu_tensor *out_t, + ds4_gpu_tensor *in_t, + uint64_t bytes) { + (void)layer; (void)rows; (void)out_t; (void)in_t; (void)bytes; + return 0; +} + extern "C" int ds4_gpu_tp_batch_gate_encode(uint32_t layer, uint32_t rows) { (void)layer; (void)rows; fprintf(stderr, DS4_GPU_LOG_PREFIX "tensor parallelism is Metal-only\n"); diff --git a/ds4_server.c b/ds4_server.c index 5343a0f4..c151243b 100644 --- a/ds4_server.c +++ b/ds4_server.c @@ -45,6 +45,12 @@ static volatile sig_atomic_t g_listen_fd = -1; #define DS4_SERVER_IO_TIMEOUT_SEC 10 #define DS4_SERVER_SEND_STALL_TIMEOUT_MS 2000 +#if defined(__GNUC__) || defined(__clang__) +#define DS4_SERVER_MAYBE_UNUSED __attribute__((unused)) +#else +#define DS4_SERVER_MAYBE_UNUSED +#endif + static void stop_signal_handler(int sig) { (void)sig; if (g_stop_requested) _exit(130); @@ -496,6 +502,11 @@ typedef enum { API_RESPONSES, } api_style; +typedef enum { + SERVER_MODEL_SYNTAX_DEEPSEEK, + SERVER_MODEL_SYNTAX_GLM, +} server_model_syntax; + static void random_tool_id(char *dst, size_t dstlen, api_style api) { static uint64_t fallback_ctr; unsigned char bytes[16]; @@ -530,7 +541,7 @@ typedef struct { tool_call *v; int len; int cap; - char *raw_dsml; + char *raw_tool_text; } tool_calls; typedef struct { @@ -597,6 +608,7 @@ static bool anthropic_live_has_call_id(server *s, const char *id); typedef struct { req_kind kind; api_style api; + server_model_syntax model_syntax; ds4_tokens prompt; char *model; bool model_from_request; @@ -661,7 +673,7 @@ static void tool_call_free(tool_call *tc) { static void tool_calls_free(tool_calls *calls) { for (int i = 0; i < calls->len; i++) tool_call_free(&calls->v[i]); - free(calls->raw_dsml); + free(calls->raw_tool_text); free(calls->v); memset(calls, 0, sizeof(*calls)); } @@ -767,6 +779,7 @@ static void request_init(request *r, req_kind kind, int max_tokens) { memset(r, 0, sizeof(*r)); r->kind = kind; r->api = API_OPENAI; + r->model_syntax = SERVER_MODEL_SYNTAX_DEEPSEEK; r->model = xstrdup("deepseek-v4-flash"); r->max_tokens = max_tokens; r->top_k = 0; @@ -905,14 +918,28 @@ static bool parse_output_config_effort(const char **p, ds4_think_mode *effort) { } static bool model_alias_disables_thinking(const char *model) { - return model && !strcmp(model, "deepseek-chat"); + return model && + (!strcmp(model, "deepseek-chat") || + !strcmp(model, "glm-5.2-chat") || + !strcmp(model, "glm-5.2-no-think") || + !strcmp(model, "glm-5.2-nothink") || + !strcmp(model, "zai/glm-5.2-chat")); } static bool model_alias_enables_thinking(const char *model) { - return model && !strcmp(model, "deepseek-reasoner"); + return model && + (!strcmp(model, "deepseek-reasoner") || + !strcmp(model, "glm-5.2-reasoner") || + !strcmp(model, "zai/glm-5.2-reasoner")); +} + +static server_model_syntax server_model_syntax_for_engine(ds4_engine *engine) { + return ds4_engine_is_glm_dsa(engine) ? + SERVER_MODEL_SYNTAX_GLM : SERVER_MODEL_SYNTAX_DEEPSEEK; } static const char *server_model_id_from_engine(ds4_engine *engine) { + if (ds4_engine_is_glm_dsa(engine)) return "glm-5.2"; return ds4_engine_model_id(engine) == 1 ? "deepseek-v4-pro" : "deepseek-v4-flash"; } @@ -920,7 +947,15 @@ static const char *server_model_id_from_engine(ds4_engine *engine) { static bool server_model_alias_known(const char *id) { return id && (!strcmp(id, "deepseek-v4-flash") || - !strcmp(id, "deepseek-v4-pro")); + !strcmp(id, "deepseek-v4-pro") || + !strcmp(id, "glm-5.2") || + !strcmp(id, "glm-5.2-chat") || + !strcmp(id, "glm-5.2-no-think") || + !strcmp(id, "glm-5.2-nothink") || + !strcmp(id, "glm-5.2-reasoner") || + !strcmp(id, "zai/glm-5.2") || + !strcmp(id, "zai/glm-5.2-chat") || + !strcmp(id, "zai/glm-5.2-reasoner")); } static void stop_list_clear(stop_list *stops) { @@ -2052,6 +2087,24 @@ static void append_tools_prompt_text(buf *b, const char *tool_schemas) { "Use the exact parameter names from the schemas."); } +static void append_glm_tools_prompt_text(buf *b, const char *tool_schemas) { + if (!tool_schemas || !tool_schemas[0]) return; + buf_puts(b, + "## Tools\n\n" + "You may call one or more functions to help answer the user question.\n\n" + "You are provided with function signatures within XML tags:\n" + "\n"); + buf_puts(b, tool_schemas); + buf_puts(b, + "\n\n\n" + "For each function call, use exactly this XML format:\n" + "{function-name}" + "{argument-name}" + "{argument-value}" + "\n\n" + "Emit one block per function call. Use the exact tool and argument names from the schemas."); +} + static void json_escape(buf *b, const char *s); typedef struct { @@ -2160,6 +2213,30 @@ static void append_dsml_parameter_text(buf *b, const char *s) { } } +static void append_glm_tag_body_text(buf *b, const char *s, const char *end) { + const size_t endlen = strlen(end); + for (s = s ? s : ""; *s;) { + if (!strncmp(s, end, endlen)) { + buf_puts(b, "<"); + s++; + } else { + buf_putc(b, *s++); + } + } +} + +static void append_glm_arg_key_text(buf *b, const char *s) { + append_glm_tag_body_text(b, s, ""); +} + +static void append_glm_arg_value_text(buf *b, const char *s) { + append_glm_tag_body_text(b, s, ""); +} + +static void append_glm_tool_response_text(buf *b, const char *s) { + append_glm_tag_body_text(b, s, ""); +} + static void append_tool_result_text(buf *b, const char *s) { /* Tool output is data. DeepSeek's renderer keeps it as ordinary text inside * ..., so preserving literal '<', '>' and '&' is @@ -2202,6 +2279,14 @@ static void append_dsml_arg(buf *b, const json_arg *arg) { buf_puts(b, "\n"); } +static void append_glm_arg(buf *b, const json_arg *arg) { + buf_puts(b, ""); + append_glm_arg_key_text(b, arg->key); + buf_puts(b, ""); + append_glm_arg_value_text(b, arg->value); + buf_puts(b, ""); +} + static bool append_dsml_arguments_from_json(buf *b, const char *json, const tool_schema_order *order) { json_args args = {0}; if (!json_args_parse(json, &args)) return false; @@ -2221,6 +2306,25 @@ static bool append_dsml_arguments_from_json(buf *b, const char *json, const tool return true; } +static bool append_glm_arguments_from_json(buf *b, const char *json, const tool_schema_order *order) { + json_args args = {0}; + if (!json_args_parse(json, &args)) return false; + if (order) { + for (int i = 0; i < order->len; i++) { + int idx = json_args_find_unused(&args, order->prop[i]); + if (idx < 0) continue; + append_glm_arg(b, &args.v[idx]); + args.v[idx].used = true; + } + } + for (int i = 0; i < args.len; i++) { + if (args.v[i].used) continue; + append_glm_arg(b, &args.v[i]); + } + json_args_free(&args); + return true; +} + static void append_json_arg_pair(buf *b, const json_arg *arg) { json_escape(b, arg->key); buf_puts(b, ":"); @@ -2247,8 +2351,8 @@ static void append_json_object_or_empty(buf *b, const char *json) { static void append_dsml_tool_calls_text(buf *b, const tool_calls *calls) { if (!calls || calls->len == 0) return; - if (calls->raw_dsml && calls->raw_dsml[0]) { - buf_puts(b, calls->raw_dsml); + if (calls->raw_tool_text && calls->raw_tool_text[0]) { + buf_puts(b, calls->raw_tool_text); return; } buf_puts(b, "\n\n<｜DSML｜tool_calls>\n"); @@ -2267,6 +2371,40 @@ static void append_dsml_tool_calls_text(buf *b, const tool_calls *calls) { buf_puts(b, ""); } +static void append_glm_tool_calls_text(buf *b, const tool_calls *calls, + const tool_schema_orders *tool_orders) { + if (!calls || calls->len == 0) return; + if (calls->raw_tool_text && calls->raw_tool_text[0]) { + buf_puts(b, calls->raw_tool_text); + return; + } + for (int i = 0; i < calls->len; i++) { + const tool_call *tc = &calls->v[i]; + const tool_schema_order *order = + tool_schema_orders_find(tool_orders, tc->name); + if (i || b->len) buf_puts(b, "\n\n"); + buf_puts(b, ""); + buf_puts(b, tc->name ? tc->name : ""); + if (!append_glm_arguments_from_json(b, tc->arguments, order)) { + buf_puts(b, "arguments"); + append_glm_arg_value_text(b, tc->arguments); + buf_puts(b, ""); + } + buf_puts(b, ""); + } +} + +static void append_tool_calls_text_for_syntax(buf *b, + server_model_syntax syntax, + const tool_calls *calls, + const tool_schema_orders *tool_orders) { + if (syntax == SERVER_MODEL_SYNTAX_GLM) { + append_glm_tool_calls_text(b, calls, tool_orders); + } else { + append_dsml_tool_calls_text(b, calls); + } +} + static bool role_is_system(const char *role) { return !strcmp(role, "system") || !strcmp(role, "developer"); } @@ -2289,9 +2427,9 @@ static bool chat_history_uses_tool_context(const chat_msgs *msgs, return false; } -static char *render_chat_prompt_text(const chat_msgs *msgs, const char *tool_schemas, - const tool_schema_orders *tool_orders, - ds4_think_mode think_mode) { +static char *render_deepseek_chat_prompt_text(const chat_msgs *msgs, const char *tool_schemas, + const tool_schema_orders *tool_orders, + ds4_think_mode think_mode) { (void)tool_orders; const bool think = ds4_think_mode_enabled(think_mode); const bool tool_context = chat_history_uses_tool_context(msgs, tool_schemas); @@ -2369,6 +2507,116 @@ static char *render_chat_prompt_text(const chat_msgs *msgs, const char *tool_sch return buf_take(&out); } +static bool text_starts_with_think_tag(const char *s) { + return s && (!strncmp(s, "", 7) || !strncmp(s, "", 8)); +} + +static void append_glm_assistant_message_prefix(buf *out, + const chat_msg *m, + bool preserve_reasoning) { + const char *content = m && m->content ? m->content : ""; + if (text_starts_with_think_tag(content)) return; + if (preserve_reasoning) { + buf_puts(out, ""); + buf_puts(out, m && m->reasoning ? m->reasoning : ""); + buf_puts(out, ""); + } else { + buf_puts(out, ""); + } +} + +static char *render_glm_chat_prompt_text(const chat_msgs *msgs, + const char *tool_schemas, + const tool_schema_orders *tool_orders, + ds4_think_mode think_mode) { + const bool think = ds4_think_mode_enabled(think_mode); + const bool tool_context = chat_history_uses_tool_context(msgs, tool_schemas); + int last_user_idx = -1; + for (int i = 0; msgs && i < msgs->len; i++) { + const chat_msg *m = &msgs->v[i]; + if (role_is_user_like(m->role)) last_user_idx = i; + } + + buf out = {0}; + buf_puts(&out, "[gMASK]"); + if (think) { + const char *effort = ds4_glm_reasoning_effort_text(think_mode); + buf_puts(&out, "<|system|>"); + buf_puts(&out, effort ? effort : "Reasoning Effort: Max"); + } + if (tool_schemas && tool_schemas[0]) { + buf tools = {0}; + append_glm_tools_prompt_text(&tools, tool_schemas); + if (tools.len) { + buf_puts(&out, "<|system|>"); + buf_puts(&out, tools.ptr); + } + buf_free(&tools); + } + for (int i = 0; msgs && i < msgs->len; i++) { + const chat_msg *m = &msgs->v[i]; + if (!role_is_system(m->role)) continue; + buf_puts(&out, "<|system|>"); + buf_puts(&out, m->content ? m->content : ""); + } + + bool pending_assistant = false; + for (int i = 0; msgs && i < msgs->len; i++) { + const chat_msg *m = &msgs->v[i]; + if (role_is_system(m->role)) { + continue; + } else if (!strcmp(m->role, "user")) { + buf_puts(&out, "<|user|>"); + buf_puts(&out, m->content ? m->content : ""); + pending_assistant = true; + } else if (!strcmp(m->role, "tool") || !strcmp(m->role, "function")) { + buf_puts(&out, "<|observation|>"); + append_glm_tool_response_text(&out, m->content); + buf_puts(&out, ""); + pending_assistant = true; + } else if (!strcmp(m->role, "assistant")) { + (void)pending_assistant; + buf_puts(&out, "<|assistant|>"); + append_glm_assistant_message_prefix( + &out, m, think && (tool_context || i > last_user_idx)); + buf_puts(&out, m->content ? m->content : ""); + append_tool_calls_text_for_syntax(&out, SERVER_MODEL_SYNTAX_GLM, + &m->calls, tool_orders); + pending_assistant = false; + } + } + + if (pending_assistant) { + buf_puts(&out, "<|assistant|>"); + buf_puts(&out, think ? "" : ""); + } + + return buf_take(&out); +} + +static char *render_chat_prompt_text_for_syntax(server_model_syntax syntax, + const chat_msgs *msgs, + const char *tool_schemas, + const tool_schema_orders *tool_orders, + ds4_think_mode think_mode) { + if (syntax == SERVER_MODEL_SYNTAX_GLM) { + return render_glm_chat_prompt_text(msgs, tool_schemas, + tool_orders, think_mode); + } + return render_deepseek_chat_prompt_text(msgs, tool_schemas, + tool_orders, think_mode); +} + +static DS4_SERVER_MAYBE_UNUSED char *render_chat_prompt_text( + const chat_msgs *msgs, + const char *tool_schemas, + const tool_schema_orders *tool_orders, + ds4_think_mode think_mode) { + return render_chat_prompt_text_for_syntax(SERVER_MODEL_SYNTAX_DEEPSEEK, + msgs, tool_schemas, + tool_orders, think_mode); +} + /* Render only the semantic tail that must be appended to the live KV for a * tool-result continuation. * @@ -2385,8 +2633,8 @@ static char *render_chat_prompt_text(const chat_msgs *msgs, const char *tool_sch * suffix tokenization happens later after the cache decision, using the live * token prefix as the boundary. That avoids BPE merges across the visible * replay/live-KV boundary. */ -static char *render_live_tool_tail(const chat_msgs *msgs, int start, - ds4_think_mode think_mode) { +static char *render_deepseek_live_tool_tail(const chat_msgs *msgs, int start, + ds4_think_mode think_mode) { const bool think = ds4_think_mode_enabled(think_mode); buf out = {0}; buf_puts(&out, "<｜end▁of▁sentence｜>"); @@ -2435,6 +2683,59 @@ static char *render_live_tool_tail(const chat_msgs *msgs, int start, return buf_take(&out); } +static char *render_glm_live_tool_tail(const chat_msgs *msgs, int start, + const tool_schema_orders *tool_orders, + ds4_think_mode think_mode) { + const bool think = ds4_think_mode_enabled(think_mode); + buf out = {0}; + bool pending_assistant = false; + for (int i = start; msgs && i < msgs->len; i++) { + const chat_msg *m = &msgs->v[i]; + if (role_is_system(m->role)) { + continue; + } else if (!strcmp(m->role, "user")) { + buf_puts(&out, "<|user|>"); + buf_puts(&out, m->content ? m->content : ""); + pending_assistant = true; + } else if (!strcmp(m->role, "tool") || !strcmp(m->role, "function")) { + buf_puts(&out, "<|observation|>"); + append_glm_tool_response_text(&out, m->content); + buf_puts(&out, ""); + pending_assistant = true; + } else if (!strcmp(m->role, "assistant")) { + buf_puts(&out, "<|assistant|>"); + append_glm_assistant_message_prefix(&out, m, think); + buf_puts(&out, m->content ? m->content : ""); + append_tool_calls_text_for_syntax(&out, SERVER_MODEL_SYNTAX_GLM, + &m->calls, tool_orders); + pending_assistant = false; + } + } + + if (pending_assistant) { + buf_puts(&out, "<|assistant|>"); + buf_puts(&out, think ? "" : ""); + } + return buf_take(&out); +} + +static char *render_live_tool_tail_for_syntax(server_model_syntax syntax, + const chat_msgs *msgs, int start, + const tool_schema_orders *tool_orders, + ds4_think_mode think_mode) { + if (syntax == SERVER_MODEL_SYNTAX_GLM) { + return render_glm_live_tool_tail(msgs, start, tool_orders, think_mode); + } + return render_deepseek_live_tool_tail(msgs, start, think_mode); +} + +static DS4_SERVER_MAYBE_UNUSED char *render_live_tool_tail( + const chat_msgs *msgs, int start, + ds4_think_mode think_mode) { + return render_live_tool_tail_for_syntax(SERVER_MODEL_SYNTAX_DEEPSEEK, + msgs, start, NULL, think_mode); +} + static bool chat_msg_has_call_id(const chat_msg *m, const char *id) { if (!m || !id || !id[0] || strcmp(m->role, "assistant")) return false; for (int i = 0; i < m->calls.len; i++) { @@ -2553,7 +2854,8 @@ static void responses_prepare_live_continuation(request *r, free(r->responses_live_suffix_text); r->responses_live_suffix_text = - render_live_tool_tail(msgs, tail_start, r->think_mode); + render_live_tool_tail_for_syntax(r->model_syntax, msgs, tail_start, + &r->tool_orders, r->think_mode); } static bool anthropic_msg_is_tool_result_tail(const chat_msg *m) { @@ -2631,7 +2933,8 @@ static void anthropic_prepare_live_continuation(request *r, free(r->anthropic_live_suffix_text); r->anthropic_live_suffix_text = - render_live_tool_tail(msgs, tail_start, r->think_mode); + render_live_tool_tail_for_syntax(r->model_syntax, msgs, tail_start, + &r->tool_orders, r->think_mode); } /* The API parsers are intentionally selective JSON parsers: they keep only @@ -2641,6 +2944,7 @@ static void anthropic_prepare_live_continuation(request *r, static bool parse_chat_request(ds4_engine *e, server *s, const char *body, int def_tokens, int ctx_size, request *r, char *err, size_t errlen) { request_init(r, REQ_CHAT, def_tokens); + r->model_syntax = server_model_syntax_for_engine(e); const char *p = body; bool got_messages = false; bool tool_choice_none = false; @@ -2799,8 +3103,9 @@ static bool parse_chat_request(ds4_engine *e, server *s, const char *body, int d const char *active_tool_schemas = r->has_tools ? tool_schemas : NULL; r->prompt_preserves_reasoning = chat_history_uses_tool_context(&msgs, active_tool_schemas); - r->prompt_text = render_chat_prompt_text(&msgs, active_tool_schemas, - &r->tool_orders, r->think_mode); + r->prompt_text = render_chat_prompt_text_for_syntax( + r->model_syntax, &msgs, active_tool_schemas, + &r->tool_orders, r->think_mode); ds4_tokenize_rendered_chat(e, r->prompt_text, &r->prompt); chat_msgs_free(&msgs); free(tool_schemas); @@ -2817,6 +3122,7 @@ static bool parse_anthropic_request(ds4_engine *e, server *s, const char *body, int ctx_size, request *r, char *err, size_t errlen) { request_init(r, REQ_CHAT, def_tokens); r->api = API_ANTHROPIC; + r->model_syntax = server_model_syntax_for_engine(e); const char *p = body; bool got_messages = false; bool tool_choice_none = false; @@ -3012,8 +3318,9 @@ static bool parse_anthropic_request(ds4_engine *e, server *s, const char *body, const char *active_tool_schemas = r->has_tools ? tool_schemas : NULL; r->prompt_preserves_reasoning = chat_history_uses_tool_context(&msgs, active_tool_schemas); - r->prompt_text = render_chat_prompt_text(&msgs, active_tool_schemas, - &r->tool_orders, r->think_mode); + r->prompt_text = render_chat_prompt_text_for_syntax( + r->model_syntax, &msgs, active_tool_schemas, + &r->tool_orders, r->think_mode); ds4_tokenize_rendered_chat(e, r->prompt_text, &r->prompt); chat_msgs_free(&msgs); free(system); @@ -3710,6 +4017,7 @@ static bool parse_responses_request(ds4_engine *e, server *s, const char *body, int ctx_size, request *r, char *err, size_t errlen) { request_init(r, REQ_CHAT, def_tokens); r->api = API_RESPONSES; + r->model_syntax = server_model_syntax_for_engine(e); const char *p = body; bool got_input = false; bool tool_choice_none = false; @@ -3954,8 +4262,9 @@ static bool parse_responses_request(ds4_engine *e, server *s, const char *body, r->prompt_preserves_reasoning = chat_history_uses_tool_context(&msgs, active_tool_schemas); responses_prepare_live_continuation(r, &msgs); - r->prompt_text = render_chat_prompt_text(&msgs, active_tool_schemas, - &r->tool_orders, r->think_mode); + r->prompt_text = render_chat_prompt_text_for_syntax( + r->model_syntax, &msgs, active_tool_schemas, + &r->tool_orders, r->think_mode); ds4_tokenize_rendered_chat(e, r->prompt_text, &r->prompt); chat_msgs_free(&msgs); buf_free(&combined_tool_schemas); @@ -4006,6 +4315,7 @@ static bool parse_prompt(const char **p, char **out) { static bool parse_completion_request(ds4_engine *e, const char *body, int def_tokens, int ctx_size, request *r, char *err, size_t errlen) { request_init(r, REQ_COMPLETION, def_tokens); + r->model_syntax = server_model_syntax_for_engine(e); const char *p = body; char *prompt = NULL; bool got_thinking = false; @@ -4131,15 +4441,20 @@ static bool parse_completion_request(ds4_engine *e, const char *body, int def_to if (!got_thinking && model_alias_enables_thinking(r->model)) thinking_enabled = true; r->think_mode = ds4_think_mode_for_context( think_mode_from_enabled(thinking_enabled, reasoning_effort), ctx_size); - buf rendered = {0}; - buf_puts(&rendered, "<｜begin▁of▁sentence｜>"); - if (r->think_mode == DS4_THINK_MAX) buf_puts(&rendered, ds4_think_max_prefix()); - buf_puts(&rendered, "You are a helpful assistant<｜User｜>"); - buf_puts(&rendered, prompt); - buf_puts(&rendered, "<｜Assistant｜>"); - buf_puts(&rendered, ds4_think_mode_enabled(r->think_mode) ? "" : ""); - r->prompt_text = buf_take(&rendered); + chat_msgs msgs = {0}; + chat_msg sys = {0}; + sys.role = xstrdup("system"); + sys.content = xstrdup("You are a helpful assistant"); + chat_msgs_push(&msgs, sys); + chat_msg user_msg = {0}; + user_msg.role = xstrdup("user"); + user_msg.content = prompt; + prompt = NULL; + chat_msgs_push(&msgs, user_msg); + r->prompt_text = render_chat_prompt_text_for_syntax( + r->model_syntax, &msgs, NULL, NULL, r->think_mode); ds4_tokenize_rendered_chat(e, r->prompt_text, &r->prompt); + chat_msgs_free(&msgs); free(prompt); return true; bad: @@ -4251,6 +4566,7 @@ static const char *find_any_tool_start(const char *s) { strstr(s, DS4_TOOL_CALLS_START), strstr(s, DS4_TOOL_CALLS_START_SHORT), strstr(s, ""), + strstr(s, ""), }; for (size_t i = 0; i < sizeof(candidates)/sizeof(candidates[0]); i++) { if (candidates[i] && (!best || candidates[i] < best)) best = candidates[i]; @@ -4264,6 +4580,7 @@ static const char *find_any_tool_end(const char *s) { strstr(s, DS4_TOOL_CALLS_END), strstr(s, DS4_TOOL_CALLS_END_SHORT), strstr(s, ""), + strstr(s, ""), }; for (size_t i = 0; i < sizeof(candidates)/sizeof(candidates[0]); i++) { if (candidates[i] && (!best || candidates[i] < best)) best = candidates[i]; @@ -4463,9 +4780,11 @@ static void split_reasoning_content(const char *text, size_t n, char **content_o free(s); } -static bool parse_generated_message_ex(const char *text, bool require_thinking_closed, - char **content_out, char **reasoning_out, - tool_calls *calls) { +static bool parse_deepseek_generated_message_ex(const char *text, + bool require_thinking_closed, + char **content_out, + char **reasoning_out, + tool_calls *calls) { text = text ? text : ""; const char *tool_search = text; @@ -4543,8 +4862,8 @@ static bool parse_generated_message_ex(const char *text, bool require_thinking_c p = skip_ascii_ws(p); if (!strncmp(p, tool_calls_end, strlen(tool_calls_end))) { const char *raw_block_end = p + strlen(tool_calls_end); - free(calls->raw_dsml); - calls->raw_dsml = xstrndup(raw_block_start, (size_t)(raw_block_end - raw_block_start)); + free(calls->raw_tool_text); + calls->raw_tool_text = xstrndup(raw_block_start, (size_t)(raw_block_end - raw_block_start)); split_reasoning_content(text, content_len, content_out, reasoning_out); return true; } @@ -4643,6 +4962,171 @@ static bool parse_generated_message_ex(const char *text, bool require_thinking_c } } +static void trim_const_span(const char **start, const char **end) { + while (*start < *end && isspace((unsigned char)**start)) (*start)++; + while (*end > *start && isspace((unsigned char)(*end)[-1])) (*end)--; +} + +static bool parse_glm_generated_message_ex(const char *text, + bool require_thinking_closed, + char **content_out, + char **reasoning_out, + tool_calls *calls) { + static const char tool_start[] = ""; + static const char tool_end[] = ""; + static const char arg_key_start[] = ""; + static const char arg_key_end[] = ""; + static const char arg_value_start[] = ""; + static const char arg_value_end[] = ""; + + text = text ? text : ""; + const char *tool_search = text; + if (require_thinking_closed) { + const char *think_end = find_last_substr(text, ""); + if (!think_end) { + fprintf(stderr, "ds4-server: thinking not closed, ignoring GLM tool calls in reasoning\n"); + split_reasoning_content(text, strlen(text), content_out, reasoning_out); + return true; + } + tool_search = think_end + 8; + } + + const char *start = strstr(tool_search, tool_start); + if (!start) { + split_reasoning_content(text, strlen(text), content_out, reasoning_out); + return true; + } + + const char *raw_block_start = start; + if (start >= text + 2 && start[-2] == '\n' && start[-1] == '\n') { + raw_block_start = start - 2; + } + size_t content_len = trim_tool_separator_ws(text, 0, + (size_t)(raw_block_start - text)); + const char *p = start; + for (;;) { + p = skip_ascii_ws(p); + if (strncmp(p, tool_start, strlen(tool_start)) != 0) break; + p += strlen(tool_start); + + const char *close = strstr(p, tool_end); + if (!close) return false; + const char *arg = strstr(p, arg_key_start); + if (arg && arg > close) arg = NULL; + + const char *name_start = p; + const char *name_end = arg ? arg : close; + trim_const_span(&name_start, &name_end); + if (name_end <= name_start) return false; + char *name = xstrndup(name_start, (size_t)(name_end - name_start)); + p = name_end; + + buf args = {0}; + for (;;) { + p = skip_ascii_ws(p); + if (!strncmp(p, tool_end, strlen(tool_end))) { + p += strlen(tool_end); + break; + } + if (strncmp(p, arg_key_start, strlen(arg_key_start)) != 0) { + free(name); + buf_free(&args); + return false; + } + p += strlen(arg_key_start); + const char *key_end = strstr(p, arg_key_end); + if (!key_end || key_end > close) { + free(name); + buf_free(&args); + return false; + } + const char *key_start = p; + const char *key_trim_end = key_end; + trim_const_span(&key_start, &key_trim_end); + char *raw_key = xstrndup(key_start, (size_t)(key_trim_end - key_start)); + char *key = dsml_unescape_text(raw_key); + free(raw_key); + + p = key_end + strlen(arg_key_end); + p = skip_ascii_ws(p); + if (strncmp(p, arg_value_start, strlen(arg_value_start)) != 0) { + free(name); + free(key); + buf_free(&args); + return false; + } + p += strlen(arg_value_start); + const char *value_end = strstr(p, arg_value_end); + if (!value_end || value_end > close) { + free(name); + free(key); + buf_free(&args); + return false; + } + char *raw_value = xstrndup(p, (size_t)(value_end - p)); + char *value = dsml_unescape_text(raw_value); + tool_call_json_args_add(&args, key, value, "true"); + free(key); + free(raw_value); + free(value); + p = value_end + strlen(arg_value_end); + } + + tool_call tc = {0}; + tc.name = name; + buf wrapped = {0}; + buf_putc(&wrapped, '{'); + buf_puts(&wrapped, args.ptr ? args.ptr : ""); + buf_putc(&wrapped, '}'); + tc.arguments = buf_take(&wrapped); + tool_calls_push(calls, tc); + buf_free(&args); + + const char *next = skip_ascii_ws(p); + if (strncmp(next, tool_start, strlen(tool_start)) != 0) { + p = next; + break; + } + p = next; + } + + if (calls->len == 0) return false; + free(calls->raw_tool_text); + calls->raw_tool_text = xstrndup(raw_block_start, (size_t)(p - raw_block_start)); + split_reasoning_content(text, content_len, content_out, reasoning_out); + return true; +} + +static bool parse_generated_message_ex_for_syntax(server_model_syntax syntax, + const char *text, + bool require_thinking_closed, + char **content_out, + char **reasoning_out, + tool_calls *calls) { + if (syntax == SERVER_MODEL_SYNTAX_GLM) { + return parse_glm_generated_message_ex(text, require_thinking_closed, + content_out, reasoning_out, + calls); + } + return parse_deepseek_generated_message_ex(text, require_thinking_closed, + content_out, reasoning_out, + calls); +} + +static DS4_SERVER_MAYBE_UNUSED bool parse_generated_message_ex( + const char *text, + bool require_thinking_closed, + char **content_out, + char **reasoning_out, + tool_calls *calls) { + return parse_generated_message_ex_for_syntax(SERVER_MODEL_SYNTAX_DEEPSEEK, + text, + require_thinking_closed, + content_out, + reasoning_out, + calls); +} + /* Try to repair a truncated DSML block. * * DSML nesting order is: tool_calls > invoke > parameter. @@ -4716,23 +5200,26 @@ static const char *tool_parse_failure_recovery_finish(const char *finish) { return "stop"; } -static bool parse_generated_message_for_response(const char *text, - bool has_tools, - bool saw_tool_start, - bool require_thinking_closed, - const char **finish_io, - char *err, - size_t errlen, - char **content_out, - char **reasoning_out, - tool_calls *calls, - bool *recovered_out) { +static bool parse_generated_message_for_response_for_syntax(server_model_syntax syntax, + const char *text, + bool has_tools, + bool saw_tool_start, + bool require_thinking_closed, + const char **finish_io, + char *err, + size_t errlen, + char **content_out, + char **reasoning_out, + tool_calls *calls, + bool *recovered_out) { if (recovered_out) *recovered_out = false; - bool parsed_ok = parse_generated_message_ex(text ? text : "", - require_thinking_closed, - content_out, reasoning_out, - calls); + bool parsed_ok = parse_generated_message_ex_for_syntax(syntax, + text ? text : "", + require_thinking_closed, + content_out, + reasoning_out, + calls); if (parsed_ok) return true; free(*content_out); @@ -4755,6 +5242,24 @@ static bool parse_generated_message_for_response(const char *text, return false; } +static DS4_SERVER_MAYBE_UNUSED bool parse_generated_message_for_response( + const char *text, + bool has_tools, + bool saw_tool_start, + bool require_thinking_closed, + const char **finish_io, + char *err, + size_t errlen, + char **content_out, + char **reasoning_out, + tool_calls *calls, + bool *recovered_out) { + return parse_generated_message_for_response_for_syntax( + SERVER_MODEL_SYNTAX_DEEPSEEK, text, has_tools, saw_tool_start, + require_thinking_closed, finish_io, err, errlen, content_out, + reasoning_out, calls, recovered_out); +} + static void append_json_object_string(buf *b, const char *json) { buf tmp = {0}; append_json_object_or_empty(&tmp, json); @@ -8121,10 +8626,10 @@ static const char *tool_memory_lookup_locked(tool_memory *m, const char *id, static void tool_memory_remember(server *s, const tool_calls *calls) { if (!s || s->disable_exact_dsml_tool_replay || - !calls || !calls->raw_dsml || !calls->raw_dsml[0]) return; + !calls || !calls->raw_tool_text || !calls->raw_tool_text[0]) return; pthread_mutex_lock(&s->tool_mu); for (int i = 0; i < calls->len; i++) { - tool_memory_put_locked(&s->tool_mem, calls->v[i].id, calls->raw_dsml, + tool_memory_put_locked(&s->tool_mem, calls->v[i].id, calls->raw_tool_text, TOOL_MEMORY_RAM); } pthread_mutex_unlock(&s->tool_mu); @@ -8152,7 +8657,7 @@ static void tool_memory_attach_to_messages(server *s, chat_msgs *msgs, if (stats) { for (int i = 0; i < msgs->len; i++) { tool_calls *calls = &msgs->v[i].calls; - if (calls->len == 0 || calls->raw_dsml) continue; + if (calls->len == 0 || calls->raw_tool_text) continue; stats->canonical++; stats->missing_ids += calls->len; } @@ -8162,7 +8667,7 @@ static void tool_memory_attach_to_messages(server *s, chat_msgs *msgs, pthread_mutex_lock(&s->tool_mu); for (int i = 0; i < msgs->len; i++) { tool_calls *calls = &msgs->v[i].calls; - if (calls->len == 0 || calls->raw_dsml) continue; + if (calls->len == 0 || calls->raw_tool_text) continue; tool_memory_block *matched = NULL; tool_memory_source matched_source = TOOL_MEMORY_DISK; bool exact = true; @@ -8187,7 +8692,7 @@ static void tool_memory_attach_to_messages(server *s, chat_msgs *msgs, if (source == TOOL_MEMORY_RAM) matched_source = TOOL_MEMORY_RAM; } if (exact && matched) { - calls->raw_dsml = xstrdup(matched->dsml); + calls->raw_tool_text = xstrdup(matched->dsml); if (stats) { if (matched_source == TOOL_MEMORY_RAM) stats->mem++; else stats->disk++; @@ -9568,6 +10073,44 @@ static char *build_invalid_dsml_tool_error_suffix(const request *r, return buf_take(&suffix); } +static char *build_invalid_glm_tool_error_suffix(const request *r, + const thinking_state *thinking, + const char *detail) { + buf tool_error = {0}; + buf_puts(&tool_error, "Tool error: invalid GLM tool call"); + if (detail && detail[0]) { + buf_puts(&tool_error, ": "); + buf_puts(&tool_error, detail); + } + buf_puts(&tool_error, + "\nThe previous assistant output was not executed because the " + " syntax was malformed. Emit a new valid , " + "or answer normally if no tool is needed."); + + buf suffix = {0}; + if (r && ds4_think_mode_enabled(r->think_mode) && thinking && thinking->inside) { + buf_puts(&suffix, ""); + } + buf_puts(&suffix, "<|observation|>"); + append_glm_tool_response_text(&suffix, tool_error.ptr ? tool_error.ptr : ""); + buf_puts(&suffix, "<|assistant|>"); + buf_puts(&suffix, + r && ds4_think_mode_enabled(r->think_mode) ? + "" : ""); + + buf_free(&tool_error); + return buf_take(&suffix); +} + +static char *build_invalid_tool_call_error_suffix(const request *r, + const thinking_state *thinking, + const char *detail) { + if (r && r->model_syntax == SERVER_MODEL_SYNTAX_GLM) { + return build_invalid_glm_tool_error_suffix(r, thinking, detail); + } + return build_invalid_dsml_tool_error_suffix(r, thinking, detail); +} + static bool append_rendered_suffix_to_live_session(server *s, const char *suffix, int *tokens_appended, char *err, size_t errlen) { @@ -9596,7 +10139,7 @@ static bool continue_after_invalid_dsml(server *s, const request *r, const char *detail, int *tokens_appended, char *err, size_t errlen) { - char *suffix = build_invalid_dsml_tool_error_suffix(r, thinking, detail); + char *suffix = build_invalid_tool_call_error_suffix(r, thinking, detail); bool ok = append_rendered_suffix_to_live_session(s, suffix, tokens_appended, err, errlen); @@ -9629,12 +10172,12 @@ static void log_tool_calls_summary(const char *ctx, const tool_calls *calls, char flags[32]; log_flags(flags, sizeof(flags), responses_protocol, false, false, false, false); server_log(DS4_LOG_TOOL, - "ds4-server: tool calls ctx=%s%s%s n=%d raw_dsml=%d ids=[%s] names=[%s]", + "ds4-server: tool calls ctx=%s%s%s n=%d raw_tool_text=%d ids=[%s] names=[%s]", ctx, flags[0] ? " " : "", flags, calls->len, - calls->raw_dsml && calls->raw_dsml[0] ? 1 : 0, + calls->raw_tool_text && calls->raw_tool_text[0] ? 1 : 0, ids.ptr ? ids.ptr : "", names.ptr ? names.ptr : ""); buf_free(&ids); @@ -9747,14 +10290,19 @@ static void send_prefill_failure_response(server *s, const job *j, static char *build_tool_checkpoint_suffix(const request *r, const char *content, const char *reasoning, const tool_calls *calls) { + const server_model_syntax syntax = + r ? r->model_syntax : SERVER_MODEL_SYNTAX_DEEPSEEK; buf suffix = {0}; - if (ds4_think_mode_enabled(r->think_mode)) { + if (r && ds4_think_mode_enabled(r->think_mode)) { buf_puts(&suffix, reasoning ? reasoning : ""); buf_puts(&suffix, ""); } buf_puts(&suffix, content ? content : ""); - append_dsml_tool_calls_text(&suffix, calls); - buf_puts(&suffix, "<｜end▁of▁sentence｜>"); + append_tool_calls_text_for_syntax(&suffix, syntax, calls, + r ? &r->tool_orders : NULL); + if (syntax != SERVER_MODEL_SYNTAX_GLM) { + buf_puts(&suffix, "<｜end▁of▁sentence｜>"); + } return buf_take(&suffix); } @@ -9762,6 +10310,8 @@ static char *build_responses_visible_assistant_suffix(const request *r, const char *content, const char *reasoning, const tool_calls *calls) { + const server_model_syntax syntax = + r ? r->model_syntax : SERVER_MODEL_SYNTAX_DEEPSEEK; buf suffix = {0}; /* This suffix mirrors what a Responses client can replay, not necessarily * every token in KV. Hidden reasoning stays live in the session unless the @@ -9771,15 +10321,18 @@ static char *build_responses_visible_assistant_suffix(const request *r, * reasoning in the remembered visible prefix when this assistant turn ended * in tool calls. A client that does replay final-answer reasoning will not * match this visible shortcut and can still use exact token-prefix replay. */ - if (ds4_think_mode_enabled(r->think_mode)) { + if (r && ds4_think_mode_enabled(r->think_mode)) { if (r->reasoning_summary_emit && calls && calls->len > 0) { buf_puts(&suffix, reasoning ? reasoning : ""); } buf_puts(&suffix, ""); } buf_puts(&suffix, content ? content : ""); - append_dsml_tool_calls_text(&suffix, calls); - buf_puts(&suffix, "<｜end▁of▁sentence｜>"); + append_tool_calls_text_for_syntax(&suffix, syntax, calls, + r ? &r->tool_orders : NULL); + if (syntax != SERVER_MODEL_SYNTAX_GLM) { + buf_puts(&suffix, "<｜end▁of▁sentence｜>"); + } return buf_take(&suffix); } @@ -9988,7 +10541,7 @@ done: static bool should_canonicalize_tool_checkpoint(const server *s, const tool_calls *calls) { if (!calls || calls->len == 0) return false; if (s && !s->disable_exact_dsml_tool_replay && - calls->raw_dsml && calls->raw_dsml[0]) + calls->raw_tool_text && calls->raw_tool_text[0]) { return false; } @@ -10431,7 +10984,9 @@ decode_again: temperature = 0.0f; } int token = ds4_session_sample(s->session, temperature, top_k, top_p, min_p, &rng); - if (token == ds4_token_eos(s->engine)) { + if (ds4_token_is_stop_for_think_mode(s->engine, + token, + j->req.think_mode)) { finish = "stop"; break; } @@ -10466,7 +11021,9 @@ decode_again: bool stop_decode = false; for (int ti = 0; ti < ntok && completion < max_tokens; ti++) { token = toks[ti]; - if (token == ds4_token_eos(s->engine)) { + if (ds4_token_is_stop_for_think_mode(s->engine, + token, + j->req.think_mode)) { finish = "stop"; stop_decode = true; break; @@ -10672,7 +11229,9 @@ decode_again: tool_calls test_calls = {0}; char *test_content = NULL; char *test_reasoning = NULL; - bool repair_ok = parse_generated_message_ex(repaired.ptr, false, &test_content, &test_reasoning, &test_calls); + bool repair_ok = parse_generated_message_ex_for_syntax( + j->req.model_syntax, repaired.ptr, false, + &test_content, &test_reasoning, &test_calls); free(test_content); free(test_reasoning); if (repair_ok && test_calls.len > 0) { @@ -10758,7 +11317,8 @@ decode_again: const char *final_finish = finish; bool recovered_tool_parse_failure = false; if (j->req.kind == REQ_CHAT) { - bool parsed_ok = parse_generated_message_for_response( + bool parsed_ok = parse_generated_message_for_response_for_syntax( + j->req.model_syntax, text.ptr ? text.ptr : "", j->req.has_tools, saw_tool_start, @@ -10820,7 +11380,8 @@ decode_again: for (p = text.ptr; p && (size_t)(p - text.ptr) < text.len - 20; p++) { if ((strncmp(p, DS4_TOOL_CALLS_START, strlen(DS4_TOOL_CALLS_START)) == 0) || (strncmp(p, DS4_TOOL_CALLS_START_SHORT, strlen(DS4_TOOL_CALLS_START_SHORT)) == 0) || - (strncmp(p, "", 12) == 0)) { + (strncmp(p, "", 12) == 0) || + (strncmp(p, "", 11) == 0)) { dsml_start = p; break; } @@ -11249,9 +11810,17 @@ static bool send_model(server *s, int fd, const char *id) { static bool send_models(server *s, int fd) { buf b = {0}; buf_puts(&b, "{\"object\":\"list\",\"data\":["); - append_model_json(&b, s, "deepseek-v4-flash"); - buf_putc(&b, ','); - append_model_json(&b, s, "deepseek-v4-pro"); + if (ds4_engine_is_glm_dsa(s->engine)) { + append_model_json(&b, s, "glm-5.2"); + buf_putc(&b, ','); + append_model_json(&b, s, "glm-5.2-chat"); + buf_putc(&b, ','); + append_model_json(&b, s, "glm-5.2-reasoner"); + } else { + append_model_json(&b, s, "deepseek-v4-flash"); + buf_putc(&b, ','); + append_model_json(&b, s, "deepseek-v4-pro"); + } buf_puts(&b, "]}\n"); bool ok = http_response(fd, s->enable_cors, 200, "application/json", b.ptr); buf_free(&b); @@ -11465,23 +12034,6 @@ static const char *need_arg(int *i, int argc, char **argv, const char *opt) { return argv[++(*i)]; } -static void log_context_memory(ds4_backend backend, - int ctx_size, - uint32_t prefill_chunk) { - ds4_context_memory m = - ds4_context_memory_estimate_with_prefill(backend, - ctx_size, - prefill_chunk); - server_log(DS4_LOG_DEFAULT, - "ds4-server: context buffers %.2f MiB (ctx=%d, backend=%s, prefill_chunk=%u, raw_kv_rows=%u, compressed_kv_rows=%u)", - (double)m.total_bytes / (1024.0 * 1024.0), - ctx_size, - ds4_backend_name(backend), - m.prefill_cap, - m.raw_cap, - m.comp_cap); -} - static void server_close_resources(server *s) { if (s->trace) { fclose(s->trace); @@ -11636,6 +12188,10 @@ static server_config parse_options(int argc, char **argv) { } c.engine.ssd_streaming_cache_experts = experts; c.engine.ssd_streaming_cache_bytes = bytes; + } else if (!strcmp(arg, "--ssd-streaming-full-layers")) { + int v = parse_nonneg_int_arg(need_arg(&i, argc, argv, arg), arg); + c.engine.ssd_streaming_full_layers = (uint32_t)v; + c.engine.ssd_streaming_full_layers_set = true; } else if (!strcmp(arg, "--ssd-streaming-preload-experts")) { int v = parse_int_arg(need_arg(&i, argc, argv, arg), arg); if (v <= 0) { @@ -11732,12 +12288,10 @@ int main(int argc, char **argv) { return 1; } + cfg.engine.context_size = cfg.ctx_size; ds4_engine *engine = NULL; if (ds4_engine_open(&engine, &cfg.engine) != 0) return 1; - log_context_memory(cfg.engine.backend, - cfg.ctx_size, - cfg.engine.prefill_chunk); if (cfg.engine.distributed.role == DS4_DISTRIBUTED_WORKER) { ds4_dist_generation_options gen = { .ctx_size = cfg.ctx_size, @@ -12753,6 +13307,64 @@ static void test_openai_tool_stream_sends_partial_arguments(void) { close(sv[1]); } +static void test_openai_glm_tool_stream_suppresses_raw_tool_call(void) { + int sv[2]; + TEST_ASSERT(socketpair(AF_UNIX, SOCK_STREAM, 0, sv) == 0); + if (sv[0] < 0 || sv[1] < 0) return; + + request r; + request_init(&r, REQ_CHAT, 128); + r.api = API_OPENAI; + r.stream = true; + r.think_mode = DS4_THINK_NONE; + r.has_tools = true; + r.model_syntax = SERVER_MODEL_SYNTAX_GLM; + r.tool_orders = make_bash_order(); + + TEST_ASSERT(sse_chunk(sv[0], &r, "chatcmpl_glm_tool", NULL, NULL)); + + openai_stream st; + openai_stream_start(&r, &st); + const char *raw = + "Before.\n\n" + "bash" + "commandpwd" + ""; + TEST_ASSERT(openai_sse_stream_update(sv[0], NULL, &r, "chatcmpl_glm_tool", &st, + raw, strlen(raw), false)); + + char *parsed_content = NULL; + char *parsed_reasoning = NULL; + tool_calls calls = {0}; + TEST_ASSERT(parse_generated_message_ex_for_syntax( + SERVER_MODEL_SYNTAX_GLM, raw, false, + &parsed_content, &parsed_reasoning, &calls)); + TEST_ASSERT(calls.len == 1); + TEST_ASSERT(openai_sse_finish_live(sv[0], NULL, &r, "chatcmpl_glm_tool", &st, + raw, strlen(raw), &calls, + "tool_calls", 10, 4)); + + shutdown(sv[0], SHUT_WR); + char *out = read_socket_text(sv[1]); + + TEST_ASSERT(strstr(out, "\"content\":\"Before.\"") != NULL); + TEST_ASSERT(strstr(out, "\"tool_calls\"") != NULL); + TEST_ASSERT(strstr(out, "\"name\":\"bash\"") != NULL); + TEST_ASSERT(strstr(out, "\\\"command\\\":") != NULL); + TEST_ASSERT(strstr(out, "\\\"pwd\\\"") != NULL); + TEST_ASSERT(strstr(out, "") == NULL); + TEST_ASSERT(strstr(out, "") == NULL); + + free(out); + free(parsed_content); + free(parsed_reasoning); + tool_calls_free(&calls); + openai_stream_free(&st); + request_free(&r); + close(sv[0]); + close(sv[1]); +} + static void test_openai_tool_stream_waits_for_incomplete_tool_tags(void) { int sv[2]; TEST_ASSERT(socketpair(AF_UNIX, SOCK_STREAM, 0, sv) == 0); @@ -13038,6 +13650,19 @@ static void test_reasoning_effort_mapping(void) { (int)ds4_think_max_min_context()) == DS4_THINK_MAX); } +static void test_model_alias_thinking_controls(void) { + TEST_ASSERT(model_alias_disables_thinking("deepseek-chat")); + TEST_ASSERT(model_alias_disables_thinking("glm-5.2-chat")); + TEST_ASSERT(model_alias_disables_thinking("glm-5.2-no-think")); + TEST_ASSERT(model_alias_disables_thinking("zai/glm-5.2-chat")); + TEST_ASSERT(!model_alias_disables_thinking("glm-5.2")); + TEST_ASSERT(model_alias_enables_thinking("deepseek-reasoner")); + TEST_ASSERT(model_alias_enables_thinking("glm-5.2-reasoner")); + TEST_ASSERT(model_alias_enables_thinking("zai/glm-5.2-reasoner")); + TEST_ASSERT(server_model_alias_known("glm-5.2-chat")); + TEST_ASSERT(server_model_alias_known("glm-5.2-reasoner")); +} + static void test_api_thinking_controls_parse(void) { bool enabled = true; const char *thinking = "{\"type\":\"disabled\",\"budget_tokens\":1024}"; @@ -13184,6 +13809,98 @@ static void test_render_chat_prompt_text_renders_tools_before_system(void) { chat_msgs_free(&msgs); } +static void test_render_glm_chat_prompt_text(void) { + chat_msgs msgs = {0}; + chat_msg sys = {0}; + sys.role = xstrdup("system"); + sys.content = xstrdup("You are terse."); + chat_msgs_push(&msgs, sys); + chat_msg user = {0}; + user.role = xstrdup("user"); + user.content = xstrdup("Hello"); + chat_msgs_push(&msgs, user); + + tool_schema_orders orders = make_bash_order(); + const char *tool_schemas = + "{\"name\":\"bash\",\"parameters\":{\"type\":\"object\",\"properties\":{" + "\"command\":{}}}}"; + char *prompt = render_chat_prompt_text_for_syntax( + SERVER_MODEL_SYNTAX_GLM, &msgs, tool_schemas, &orders, DS4_THINK_HIGH); + + TEST_ASSERT(prompt != NULL); + TEST_ASSERT(!strncmp(prompt, "[gMASK]", strlen("[gMASK]"))); + TEST_ASSERT(strstr(prompt, "<|system|>Reasoning Effort: High") != NULL); + TEST_ASSERT(strstr(prompt, "") != NULL); + TEST_ASSERT(strstr(prompt, "{function-name}") != NULL); + TEST_ASSERT(strstr(prompt, "<|system|>You are terse.") != NULL); + TEST_ASSERT(strstr(prompt, "<|user|>Hello<|assistant|>") != NULL); + TEST_ASSERT(strstr(prompt, "DSML") == NULL); + + free(prompt); + tool_schema_orders_free(&orders); + chat_msgs_free(&msgs); +} + +static void test_render_glm_drops_old_reasoning_without_tools(void) { + chat_msgs msgs = {0}; + chat_msg user1 = {0}; + user1.role = xstrdup("user"); + user1.content = xstrdup("first"); + chat_msgs_push(&msgs, user1); + chat_msg assistant = {0}; + assistant.role = xstrdup("assistant"); + assistant.reasoning = xstrdup("old hidden reasoning"); + assistant.content = xstrdup("first answer"); + chat_msgs_push(&msgs, assistant); + chat_msg user2 = {0}; + user2.role = xstrdup("user"); + user2.content = xstrdup("second"); + chat_msgs_push(&msgs, user2); + + char *prompt = render_chat_prompt_text_for_syntax( + SERVER_MODEL_SYNTAX_GLM, &msgs, NULL, NULL, DS4_THINK_HIGH); + TEST_ASSERT(prompt != NULL); + TEST_ASSERT(strstr(prompt, "old hidden reasoning") == NULL); + TEST_ASSERT(strstr(prompt, "<|assistant|>first answer") != NULL); + TEST_ASSERT(strstr(prompt, "<|user|>second<|assistant|>") != NULL); + + free(prompt); + chat_msgs_free(&msgs); +} + +static void test_render_glm_preserves_reasoning_with_tools(void) { + chat_msgs msgs = {0}; + chat_msg user1 = {0}; + user1.role = xstrdup("user"); + user1.content = xstrdup("first"); + chat_msgs_push(&msgs, user1); + chat_msg assistant = {0}; + assistant.role = xstrdup("assistant"); + assistant.reasoning = xstrdup("tool reasoning"); + assistant.content = xstrdup(""); + tool_call tc = {0}; + tc.name = xstrdup("bash"); + tc.arguments = xstrdup("{\"command\":\"pwd\"}"); + tool_calls_push(&assistant.calls, tc); + chat_msgs_push(&msgs, assistant); + chat_msg tool = {0}; + tool.role = xstrdup("tool"); + tool.content = xstrdup("/tmp"); + chat_msgs_push(&msgs, tool); + + tool_schema_orders orders = make_bash_order(); + char *prompt = render_chat_prompt_text_for_syntax( + SERVER_MODEL_SYNTAX_GLM, &msgs, NULL, &orders, DS4_THINK_HIGH); + TEST_ASSERT(prompt != NULL); + TEST_ASSERT(strstr(prompt, "tool reasoning") != NULL); + TEST_ASSERT(strstr(prompt, "bash") != NULL); + TEST_ASSERT(strstr(prompt, "<|observation|>/tmp") != NULL); + + free(prompt); + tool_schema_orders_free(&orders); + chat_msgs_free(&msgs); +} + static void test_dsml_tool_args_preserve_call_order(void) { tool_calls calls = make_swapped_bash_call(); buf b = {0}; @@ -13282,6 +13999,35 @@ static void test_parse_short_dsml_and_canonical_suffix(void) { request_free(&r); } +static void test_parse_glm_tool_call_message(void) { + const char *generated = + "need bashOK\n\n" + "bash" + "commandecho hi" + "timeout10" + ""; + char *content = NULL; + char *reasoning = NULL; + tool_calls calls = {0}; + + TEST_ASSERT(parse_generated_message_ex_for_syntax( + SERVER_MODEL_SYNTAX_GLM, generated, true, + &content, &reasoning, &calls)); + TEST_ASSERT(reasoning && !strcmp(reasoning, "need bash")); + TEST_ASSERT(content && !strcmp(content, "OK")); + TEST_ASSERT(calls.len == 1); + TEST_ASSERT(calls.v[0].name && !strcmp(calls.v[0].name, "bash")); + TEST_ASSERT(strstr(calls.v[0].arguments, "\"command\": \"echo hi\"") != NULL); + TEST_ASSERT(strstr(calls.v[0].arguments, "\"timeout\": \"10\"") != NULL); + TEST_ASSERT(calls.raw_tool_text && + !strncmp(calls.raw_tool_text, "\n\nbash", + strlen("\n\nbash"))); + + free(content); + free(reasoning); + tool_calls_free(&calls); +} + static void test_dsml_parser_recovers_loose_nested_parameters(void) { const char *generated = "review done\n\n" @@ -13577,6 +14323,27 @@ static void test_invalid_dsml_tool_error_suffix_includes_system_prompt(void) { free(r.prompt_text); } +static void test_invalid_glm_tool_error_suffix(void) { + request r; + request_init(&r, REQ_CHAT, 128); + r.model_syntax = SERVER_MODEL_SYNTAX_GLM; + r.think_mode = DS4_THINK_HIGH; + thinking_state st = {.inside = true}; + + char *suffix = build_invalid_tool_call_error_suffix(&r, &st, + "missing arg_value"); + TEST_ASSERT(suffix != NULL); + TEST_ASSERT(strstr(suffix, "<|observation|>") == suffix); + TEST_ASSERT(strstr(suffix, + "Tool error: invalid GLM tool call: missing arg_value") != NULL); + TEST_ASSERT(strstr(suffix, "<|assistant|>") != NULL); + TEST_ASSERT(strstr(suffix, "DSML") == NULL); + TEST_ASSERT(strstr(suffix, "<｜end▁of▁sentence｜>") == NULL); + + free(suffix); + request_free(&r); +} + static void test_thinking_dsml_is_not_executable_before_think_close(void) { const char *generated = "I might mention a malformed or tentative tool call here:\n\n" @@ -13699,6 +14466,82 @@ static void test_tool_checkpoint_suffix_is_future_prompt_canonical(void) { tool_schema_orders_free(&orders); } +static void test_glm_tool_checkpoint_suffix_is_canonical(void) { + tool_schema_orders orders = make_bash_order(); + const char *tool_schemas = + "{\"name\":\"bash\",\"parameters\":{\"type\":\"object\",\"properties\":{" + "\"command\":{},\"description\":{}}}}"; + + chat_msgs prefix_msgs = {0}; + chat_msg user = {0}; + user.role = xstrdup("user"); + user.content = xstrdup("inspect"); + chat_msgs_push(&prefix_msgs, user); + char *prompt_text = render_chat_prompt_text_for_syntax( + SERVER_MODEL_SYNTAX_GLM, &prefix_msgs, tool_schemas, + &orders, DS4_THINK_HIGH); + + const char *generated = + "need bashdone\n\n" + "bash" + "descriptionlist files" + "commandls -la" + ""; + char *content = NULL; + char *reasoning = NULL; + tool_calls calls = {0}; + TEST_ASSERT(parse_generated_message_ex_for_syntax( + SERVER_MODEL_SYNTAX_GLM, generated, false, + &content, &reasoning, &calls)); + TEST_ASSERT(calls.len == 1); + + request r; + request_init(&r, REQ_CHAT, 128); + r.model_syntax = SERVER_MODEL_SYNTAX_GLM; + r.think_mode = DS4_THINK_HIGH; + r.tool_orders = orders; + memset(&orders, 0, sizeof(orders)); + + char *suffix = build_tool_checkpoint_suffix(&r, content, reasoning, &calls); + TEST_ASSERT(strstr(suffix, "need bashdone\n\nbash") != NULL); + TEST_ASSERT(strstr(suffix, "<｜end▁of▁sentence｜>") == NULL); + TEST_ASSERT(strstr(suffix, "DSML") == NULL); + + buf canonical = {0}; + buf_puts(&canonical, prompt_text); + buf_puts(&canonical, suffix); + + chat_msgs history_msgs = {0}; + chat_msg user2 = {0}; + user2.role = xstrdup("user"); + user2.content = xstrdup("inspect"); + chat_msgs_push(&history_msgs, user2); + chat_msg assistant = {0}; + assistant.role = xstrdup("assistant"); + assistant.reasoning = xstrdup(reasoning ? reasoning : ""); + assistant.content = xstrdup(content ? content : ""); + assistant.calls = calls; + memset(&calls, 0, sizeof(calls)); + chat_msgs_push(&history_msgs, assistant); + + char *future_prompt = render_chat_prompt_text_for_syntax( + SERVER_MODEL_SYNTAX_GLM, &history_msgs, tool_schemas, + &r.tool_orders, DS4_THINK_HIGH); + TEST_ASSERT(!strcmp(canonical.ptr, future_prompt)); + + free(future_prompt); + buf_free(&canonical); + free(suffix); + free(prompt_text); + free(content); + free(reasoning); + chat_msgs_free(&history_msgs); + chat_msgs_free(&prefix_msgs); + tool_calls_free(&calls); + request_free(&r); + tool_schema_orders_free(&orders); +} + static void test_tool_checkpoint_minifies_json_parameters(void) { tool_schema_orders orders = {0}; tool_schema_orders_add_json(&orders, @@ -13812,7 +14655,7 @@ static void test_tool_memory_replays_sampled_dsml(void) { tool_replay_stats stats = {0}; tool_memory_attach_to_messages(&s, &msgs, &stats); - TEST_ASSERT(msgs.v[0].calls.raw_dsml != NULL); + TEST_ASSERT(msgs.v[0].calls.raw_tool_text != NULL); TEST_ASSERT(stats.mem == 1); TEST_ASSERT(stats.disk == 0); TEST_ASSERT(stats.canonical == 0); @@ -13873,7 +14716,7 @@ static void test_anthropic_tool_memory_replays_sampled_dsml(void) { tool_replay_stats stats = {0}; tool_memory_attach_to_messages(&s, &msgs, &stats); - TEST_ASSERT(msgs.v[0].calls.raw_dsml != NULL); + TEST_ASSERT(msgs.v[0].calls.raw_tool_text != NULL); TEST_ASSERT(stats.mem == 1); TEST_ASSERT(stats.canonical == 0); @@ -14055,7 +14898,7 @@ static void test_tool_checkpoint_canonicalization_gate_exact_replay(void) { tc.name = xstrdup("bash"); tc.arguments = xstrdup("{}"); tool_calls_push(&calls, tc); - calls.raw_dsml = xstrdup( + calls.raw_tool_text = xstrdup( "\n\n" DS4_TOOL_CALLS_START "\n" "<｜DSML｜invoke name=\"bash\">\n" "\n" @@ -14067,8 +14910,8 @@ static void test_tool_checkpoint_canonicalization_gate_exact_replay(void) { TEST_ASSERT(should_canonicalize_tool_checkpoint(&s, &calls)); s.disable_exact_dsml_tool_replay = false; - free(calls.raw_dsml); - calls.raw_dsml = NULL; + free(calls.raw_tool_text); + calls.raw_tool_text = NULL; TEST_ASSERT(should_canonicalize_tool_checkpoint(&s, &calls)); tool_calls_free(&calls); @@ -14275,7 +15118,7 @@ static void test_exact_dsml_tool_replay_can_be_disabled(void) { tool_replay_stats stats = {0}; tool_memory_attach_to_messages(&s, &msgs, &stats); - TEST_ASSERT(msgs.v[0].calls.raw_dsml == NULL); + TEST_ASSERT(msgs.v[0].calls.raw_tool_text == NULL); TEST_ASSERT(stats.canonical == 1); TEST_ASSERT(stats.missing_ids == 1); @@ -14375,7 +15218,7 @@ static void test_tool_memory_max_ids_prunes_oldest(void) { tool_replay_stats stats = {0}; tool_memory_attach_to_messages(&s, &msgs, &stats); - TEST_ASSERT(msgs.v[0].calls.raw_dsml == NULL); + TEST_ASSERT(msgs.v[0].calls.raw_tool_text == NULL); TEST_ASSERT(stats.canonical == 1); TEST_ASSERT(stats.missing_ids == 1); @@ -15104,13 +15947,13 @@ static void test_kv_tool_map_filters_by_dsml_text(void) { chat_msgs_push(&msgs, b); tool_replay_stats stats = {0}; tool_memory_attach_to_messages(&dst, &msgs, &stats); - TEST_ASSERT(msgs.v[0].calls.raw_dsml != NULL); - TEST_ASSERT(msgs.v[1].calls.raw_dsml == NULL); + TEST_ASSERT(msgs.v[0].calls.raw_tool_text != NULL); + TEST_ASSERT(msgs.v[1].calls.raw_tool_text == NULL); TEST_ASSERT(stats.disk == 1); TEST_ASSERT(stats.canonical == 1); TEST_ASSERT(stats.missing_ids == 1); - TEST_ASSERT(strstr(msgs.v[0].calls.raw_dsml, "pwd") != NULL); - TEST_ASSERT(strstr(msgs.v[0].calls.raw_dsml, "zzzz") == NULL); + TEST_ASSERT(strstr(msgs.v[0].calls.raw_tool_text, "pwd") != NULL); + TEST_ASSERT(strstr(msgs.v[0].calls.raw_tool_text, "zzzz") == NULL); chat_msgs_free(&msgs); if (fp) fclose(fp); @@ -15176,7 +16019,7 @@ static void test_kv_tool_map_restores_before_prompt_render(void) { kv_cache_restore_tool_memory_for_messages(&dst, &msgs); tool_replay_stats stats = {0}; tool_memory_attach_to_messages(&dst, &msgs, &stats); - TEST_ASSERT(msgs.v[0].calls.raw_dsml != NULL); + TEST_ASSERT(msgs.v[0].calls.raw_tool_text != NULL); TEST_ASSERT(stats.disk == 1); TEST_ASSERT(stats.canonical == 0); char *prompt = render_chat_prompt_text(&msgs, NULL, NULL, DS4_THINK_HIGH); @@ -15783,12 +16626,16 @@ static void test_thinking_canonical_non_thinking_mode_noop(void) { static void ds4_server_unit_tests_run(void) { test_request_defaults_use_min_p_filtering(); test_reasoning_effort_mapping(); + test_model_alias_thinking_controls(); test_api_thinking_controls_parse(); test_render_think_max_prompt_prefix(); test_render_non_thinking_prompt_closes_think(); test_render_drops_old_reasoning_without_tools(); test_render_preserves_reasoning_with_tools(); test_render_chat_prompt_text_renders_tools_before_system(); + test_render_glm_chat_prompt_text(); + test_render_glm_drops_old_reasoning_without_tools(); + test_render_glm_preserves_reasoning_with_tools(); test_tool_schema_order_from_anthropic_schema(); test_tool_schema_order_from_openai_tools(); test_tool_schema_order_from_responses_tool_search(); @@ -15813,6 +16660,7 @@ static void ds4_server_unit_tests_run(void) { test_responses_usage_reports_cache_details(); test_openai_chat_stream_splits_reasoning_without_tools(); test_openai_tool_stream_sends_partial_arguments(); + test_openai_glm_tool_stream_suppresses_raw_tool_call(); test_openai_tool_stream_waits_for_incomplete_tool_tags(); test_openai_tool_stream_sends_partial_raw_arguments(); test_openai_tool_stream_holds_partial_dsml_entities(); @@ -15820,13 +16668,16 @@ static void ds4_server_unit_tests_run(void) { test_openai_tool_stream_handles_multiple_calls(); test_streaming_holds_partial_utf8(); test_parse_short_dsml_and_canonical_suffix(); + test_parse_glm_tool_call_message(); test_dsml_parser_recovers_loose_nested_parameters(); test_dsml_repair_produces_parseable_calls(); test_tool_parse_failure_returns_recoverable_finish(); test_invalid_dsml_tool_error_suffix_includes_system_prompt(); + test_invalid_glm_tool_error_suffix(); test_thinking_dsml_is_not_executable_before_think_close(); test_thinking_dsml_after_think_close_is_executable(); test_tool_checkpoint_suffix_is_future_prompt_canonical(); + test_glm_tool_checkpoint_suffix_is_canonical(); test_tool_checkpoint_minifies_json_parameters(); test_tool_memory_replays_sampled_dsml(); test_anthropic_tool_memory_replays_sampled_dsml(); diff --git a/ds4_streaming_hotlist_glm52.inc b/ds4_streaming_hotlist_glm52.inc new file mode 100644 index 00000000..d42227d4 --- /dev/null +++ b/ds4_streaming_hotlist_glm52.inc @@ -0,0 +1,6509 @@ +/* Generated from GLM 5.2 selected-id profiles; sorted by preload priority. */ +/* First 4096 entries preserve the original Q2 routed-expert hot seed. */ +/* Extra entries extend explicit large-cache preloads and are quantization independent. */ +static const uint16_t ds4_default_streaming_hotlist_glm52[][2] = { + {50, 118}, + {72, 53}, + {66, 117}, + {59, 12}, + {28, 142}, + {18, 25}, + {67, 45}, + {60, 23}, + {21, 26}, + {76, 150}, + {45, 105}, + {20, 195}, + {50, 55}, + {72, 226}, + {52, 20}, + {64, 118}, + {74, 21}, + {43, 180}, + {32, 150}, + {54, 235}, + {63, 122}, + {41, 167}, + {32, 46}, + {17, 31}, + {53, 17}, + {58, 244}, + {74, 32}, + {31, 200}, + {68, 59}, + {21, 233}, + {73, 19}, + {19, 69}, + {22, 87}, + {70, 189}, + {55, 187}, + {38, 100}, + {49, 186}, + {20, 78}, + {31, 106}, + {69, 138}, + {20, 201}, + {51, 2}, + {20, 209}, + {27, 184}, + {64, 142}, + {57, 45}, + {15, 12}, + {18, 53}, + {22, 18}, + {60, 101}, + {30, 14}, + {65, 213}, + {26, 88}, + {61, 3}, + {70, 239}, + {52, 105}, + {65, 161}, + {75, 169}, + {30, 29}, + {35, 129}, + {34, 63}, + {71, 251}, + {47, 48}, + {49, 170}, + {21, 119}, + {21, 135}, + {18, 46}, + {57, 135}, + {22, 200}, + {36, 77}, + {62, 14}, + {28, 1}, + {49, 41}, + {60, 179}, + {71, 137}, + {10, 226}, + {20, 148}, + {55, 48}, + {35, 150}, + {46, 181}, + {55, 106}, + {10, 217}, + {16, 55}, + {73, 210}, + {52, 55}, + {71, 84}, + {75, 26}, + {42, 179}, + {46, 84}, + {67, 138}, + {32, 8}, + {64, 138}, + {71, 60}, + {17, 147}, + {56, 245}, + {57, 22}, + {66, 114}, + {29, 174}, + {62, 237}, + {61, 190}, + {57, 57}, + {15, 226}, + {34, 247}, + {48, 53}, + {25, 5}, + {26, 162}, + {39, 128}, + {58, 198}, + {61, 158}, + {74, 31}, + {77, 169}, + {12, 137}, + {43, 15}, + {60, 177}, + {61, 146}, + {27, 58}, + {40, 60}, + {40, 205}, + {43, 5}, + {50, 70}, + {15, 154}, + {33, 77}, + {77, 120}, + {52, 187}, + {63, 40}, + {74, 6}, + {16, 21}, + {44, 191}, + {50, 19}, + {59, 235}, + {71, 7}, + {33, 126}, + {34, 107}, + {37, 62}, + {54, 116}, + {71, 252}, + {32, 217}, + {43, 144}, + {63, 243}, + {69, 50}, + {3, 60}, + {12, 46}, + {33, 129}, + {50, 44}, + {55, 206}, + {69, 254}, + {17, 167}, + {19, 80}, + {20, 91}, + {21, 83}, + {36, 45}, + {39, 189}, + {45, 14}, + {48, 5}, + {57, 255}, + {16, 252}, + {28, 69}, + {37, 188}, + {38, 166}, + {69, 143}, + {18, 63}, + {42, 185}, + {53, 143}, + {71, 66}, + {18, 230}, + {22, 23}, + {45, 75}, + {49, 61}, + {59, 136}, + {17, 14}, + {36, 143}, + {40, 241}, + {36, 61}, + {45, 141}, + {53, 43}, + {55, 148}, + {63, 250}, + {17, 96}, + {19, 178}, + {24, 102}, + {38, 54}, + {49, 74}, + {19, 160}, + {44, 170}, + {73, 231}, + {40, 253}, + {74, 121}, + {23, 85}, + {24, 92}, + {25, 200}, + {30, 43}, + {37, 65}, + {38, 6}, + {39, 147}, + {39, 172}, + {67, 232}, + {21, 114}, + {28, 122}, + {30, 5}, + {33, 2}, + {39, 222}, + {40, 24}, + {51, 189}, + {59, 93}, + {19, 135}, + {35, 36}, + {36, 128}, + {51, 228}, + {60, 231}, + {65, 62}, + {67, 76}, + {70, 63}, + {72, 82}, + {17, 34}, + {29, 12}, + {30, 59}, + {30, 60}, + {32, 207}, + {42, 226}, + {18, 54}, + {36, 159}, + {51, 88}, + {60, 20}, + {63, 192}, + {64, 219}, + {68, 138}, + {68, 190}, + {12, 45}, + {12, 79}, + {14, 238}, + {23, 172}, + {30, 113}, + {35, 34}, + {37, 122}, + {39, 180}, + {46, 204}, + {59, 2}, + {67, 15}, + {12, 102}, + {13, 200}, + {18, 212}, + {22, 186}, + {30, 58}, + {33, 12}, + {34, 19}, + {34, 132}, + {36, 145}, + {37, 138}, + {39, 174}, + {67, 157}, + {8, 1}, + {16, 191}, + {17, 24}, + {19, 249}, + {23, 27}, + {34, 149}, + {35, 39}, + {36, 115}, + {38, 129}, + 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{42, 100}, + {42, 227}, + {42, 234}, + {43, 7}, + {43, 120}, + {43, 194}, + {43, 252}, + {44, 15}, + {44, 23}, + {45, 54}, + {45, 66}, + {45, 90}, + {45, 156}, + {45, 239}, + {46, 38}, + {46, 120}, + {46, 127}, + {46, 153}, + {46, 165}, + {46, 177}, + {46, 179}, + {46, 182}, + {47, 27}, + {47, 39}, + {47, 119}, + {47, 133}, + {47, 201}, + {48, 8}, + {48, 104}, + {48, 133}, + {48, 151}, + {48, 254}, + {49, 88}, + {49, 157}, + {49, 161}, + {49, 183}, + {49, 211}, + {50, 67}, + {50, 84}, + {50, 190}, + {50, 248}, + {51, 18}, + {51, 90}, + {51, 136}, + {51, 168}, + {51, 236}, + {52, 12}, + {52, 52}, + {52, 97}, + {52, 102}, + {52, 117}, + {52, 184}, + {52, 186}, + {53, 33}, + {53, 56}, + {53, 58}, + {53, 71}, + {53, 99}, + {53, 179}, + {53, 206}, + {54, 79}, + {54, 111}, + {54, 198}, + {54, 208}, + {55, 60}, + {55, 75}, + {55, 81}, + {55, 154}, + {55, 194}, + {55, 234}, + {56, 1}, + {56, 85}, + {56, 91}, + {56, 128}, + {56, 131}, + {56, 149}, + {57, 41}, + {57, 77}, + {57, 141}, + {57, 145}, + {57, 156}, + {57, 159}, + {58, 9}, + {58, 86}, + {58, 123}, + {58, 124}, + {58, 172}, + {58, 174}, + {58, 203}, + {59, 49}, + {59, 53}, + {59, 75}, + {59, 198}, + {59, 208}, + {59, 216}, + {60, 44}, + {60, 69}, + {60, 122}, + {60, 153}, + {61, 31}, + {61, 124}, + {61, 164}, + {61, 177}, + {61, 191}, + {62, 21}, + {62, 161}, + {62, 162}, + {63, 34}, + {63, 42}, + {63, 177}, + {63, 185}, + {64, 155}, + {65, 6}, + {65, 21}, + {65, 39}, + {65, 57}, + {65, 61}, + {65, 108}, + {65, 231}, + {65, 236}, + {66, 7}, + {66, 167}, + {67, 131}, + {67, 147}, + {67, 171}, + {67, 243}, + {68, 104}, + {68, 115}, + {68, 245}, + {69, 6}, + {69, 87}, + {69, 117}, + {69, 126}, + {69, 162}, + {69, 166}, + {69, 180}, + {69, 251}, + {70, 61}, + {70, 94}, + {70, 128}, + {70, 167}, + {70, 193}, + {71, 174}, + {71, 204}, + {72, 23}, + {72, 93}, + {72, 101}, + {72, 153}, + {72, 166}, + {72, 213}, + {73, 12}, + {73, 31}, + {73, 68}, + {73, 104}, + {73, 127}, + {73, 228}, + {74, 13}, + {74, 71}, + {74, 100}, + {74, 108}, + {74, 115}, + {74, 157}, + {74, 163}, + {74, 165}, + {74, 187}, + {75, 23}, + {75, 44}, + {75, 67}, + {75, 87}, + {75, 102}, + {75, 108}, + {75, 119}, + {75, 255}, + {76, 36}, + {76, 109}, + {76, 161}, + {76, 177}, + {76, 220}, + {76, 222}, + {77, 72}, + {77, 106}, + {77, 118}, + {77, 138}, + {77, 141}, + {77, 161}, + {77, 215}, + {3, 67}, + {3, 84}, + {3, 86}, + {3, 90}, + {3, 97}, + {3, 103}, + {3, 145}, + {3, 146}, + {3, 158}, + {3, 174}, + {3, 213}, + {3, 215}, + {3, 218}, + {3, 247}, + {3, 249}, + {4, 36}, + {4, 70}, + {4, 77}, + {4, 85}, + {4, 137}, + {4, 202}, + {4, 212}, + {4, 223}, + {5, 0}, + {5, 5}, + {5, 54}, + {5, 65}, + {5, 75}, + {5, 81}, + {5, 84}, + {5, 94}, + {5, 108}, + {5, 144}, + {5, 145}, + {5, 154}, + {5, 163}, + {5, 178}, + {5, 189}, + {5, 213}, + {6, 11}, + {6, 22}, + {6, 92}, + {6, 116}, + {6, 160}, + {6, 177}, + {6, 190}, + {6, 194}, + {7, 4}, + {7, 21}, + {7, 31}, + {7, 46}, + {7, 48}, + {7, 55}, + {7, 56}, + {7, 57}, + {7, 61}, + {7, 100}, + {7, 104}, + {7, 131}, + {7, 132}, + {7, 135}, + {7, 147}, + {7, 184}, + {7, 193}, + {7, 200}, + {7, 233}, + {7, 236}, + {8, 34}, + {8, 45}, + {8, 54}, + {8, 73}, + {8, 115}, + {8, 176}, + {8, 190}, + {8, 208}, + {8, 211}, + {8, 224}, + {9, 1}, + {9, 9}, + {9, 28}, + {9, 68}, + {9, 76}, + {9, 78}, + {9, 82}, + {9, 93}, + {9, 97}, + {9, 106}, + {9, 115}, + {9, 149}, + {9, 183}, + {9, 193}, + {9, 198}, + {9, 205}, + {9, 231}, + {9, 251}, + {10, 4}, + {10, 80}, + {10, 99}, + {10, 112}, + {10, 124}, + {10, 133}, + {10, 145}, + {10, 232}, + {11, 48}, + {11, 64}, + {11, 101}, + {11, 213}, + {11, 218}, + {12, 0}, + {12, 18}, +}; +static const uint32_t ds4_default_streaming_hotlist_glm52_count = + (uint32_t)(sizeof(ds4_default_streaming_hotlist_glm52) / + sizeof(ds4_default_streaming_hotlist_glm52[0])); diff --git a/ds4_tp.c b/ds4_tp.c index e2f123be..691d3abb 100644 --- a/ds4_tp.c +++ b/ds4_tp.c @@ -38,7 +38,7 @@ #define DS4_TP_MAGIC UINT32_C(0x44533454) /* "DS4T" */ #define DS4_TP_BATCH_MAGIC UINT32_C(0x44533442) /* "DS4B" */ -#define DS4_TP_PROTOCOL_VERSION 1u +#define DS4_TP_PROTOCOL_VERSION 6u /* Default gate timeout is generous: the first gate after a sync waits for * the peer's whole (possibly cold page cache) prefill. */ @@ -55,8 +55,6 @@ typedef struct { uint32_t version; uint32_t role; uint32_t rdma_ok; /* this side has a usable verbs device */ - uint32_t null_split; /* DS4_TP_NULL_SPLIT bring-up mode, must match */ - uint32_t pad; uint64_t gguf_bytes; uint32_t model_id; uint32_t n_layer; @@ -64,6 +62,10 @@ typedef struct { uint32_t n_vocab; uint32_t quant_bits; uint32_t ctx_size; + uint32_t gate_slot_start; + uint32_t gate_slot_step; + uint32_t gates_per_token; + uint32_t pad; } ds4_tp_hello_fixed; typedef struct { @@ -119,11 +121,13 @@ typedef struct { * RTR requires GRH addressing with the IPv4-mapped GID that appears only * once the Thunderbolt member interface has an IPv4 address of its own. * UC delivery is in-order and the gate sequence is globally deterministic - * (86 gates per token, fixed order), so receives are pre-posted purely by - * sequence number: recv for seq s lands in the slab in-slot (s-1) % slots - * and its completion IS the arrival signal. */ + * (86 gates per token, fixed order). After any initial bulk prefill, decode + * keeps a receive window posted by sequence number: recv for seq s lands in + * the slab in-slot (s-1) % slots and its completion IS the arrival signal. */ #define DS4_TP_RDMA_MAX_MSG 16384 #define DS4_TP_RDMA_RECV_WINDOW 16 +#define DS4_TP_RDMA_BULK_SLOTS 64 +#define DS4_TP_RDMA_BULK_WR_TAG (UINT64_C(1) << 63) typedef struct { ds4_tp_verbs_api api; @@ -139,7 +143,8 @@ typedef struct { ds4_tp_rdma_info peer; uint32_t send_outstanding; /* signaled sends not yet reaped */ uint64_t recv_done; /* highest gate seq whose recv completed */ - uint64_t recv_posted; /* highest gate seq with a posted recv */ + uint64_t last_gate_seq; /* last real decode receive consumed */ + bool recv_window_active; /* decode recvs are queued ahead */ pthread_mutex_t post_lock; } ds4_tp_rdma; #endif @@ -148,13 +153,17 @@ struct ds4_tp { ds4_tp_options opt; int rank; /* 0 leader, 1 worker */ int control_fd; - int data_fd; /* TCP gate socket (batch gates under RDMA too) */ + int data_fd; /* TCP fallback, headers, and verify gates */ bool rdma_active; uint32_t peer_ctx; uint32_t n_layer; uint32_t n_embd; uint64_t vec_bytes; uint32_t n_slots; + /* Decode gate schedule (see ds4_tp_identity). */ + uint32_t gate_slot_start; + uint32_t gate_slot_step; + uint32_t gates_per_token; uint8_t *slab; uint64_t slab_bytes; /* Slab regions, see ds4_tp.h layout comment. */ @@ -321,11 +330,11 @@ bool ds4_tp_enabled(const ds4_tp_options *opt) { void ds4_tp_usage(FILE *fp) { fprintf(fp, - "Tensor parallelism (two identical machines, full model on both):\n" - " --tp-lead Lead a TP pair: listen for the worker,\n" - " then run the normal CLI flow.\n" - " --tp-lead-host Leader listen address (default 0.0.0.0).\n" - " --tp-worker Dial the leader and mirror its session.\n" + "Tensor parallelism (two identical machines):\n" + " --tp-coordinator Coordinate a TP pair: listen for the\n" + " worker, then run the normal CLI flow.\n" + " --tp-coordinator-host Coordinator listen address (default 0.0.0.0).\n" + " --tp-worker Dial the coordinator and mirror its session.\n" " --tp-transport Gate transport (default auto).\n" " --tp-debug-hash Cross-check hidden state every n tokens.\n"); } @@ -340,16 +349,19 @@ int ds4_tp_parse_cli_arg( size_t errlen) { int i = *index; - if (!strcmp(arg, "--tp-lead")) { + if (!strcmp(arg, "--tp-coordinator") || !strcmp(arg, "--tp-lead")) { + /* --tp-lead is the legacy spelling; --tp-coordinator matches the + * pipelined distributed mode's coordinator/worker vocabulary. */ if (i + 1 >= argc) goto missing; opt->role = DS4_TP_LEADER; opt->listen_port = atoi(argv[++i]); if (opt->listen_port <= 0 || opt->listen_port > 65535) { - tp_set_err(err, errlen, "invalid --tp-lead port"); + tp_set_err(err, errlen, "invalid %s port", arg); return DS4_TP_CLI_ERROR; } if (!opt->listen_host) opt->listen_host = "0.0.0.0"; - } else if (!strcmp(arg, "--tp-lead-host")) { + } else if (!strcmp(arg, "--tp-coordinator-host") || + !strcmp(arg, "--tp-lead-host")) { if (i + 1 >= argc) goto missing; opt->listen_host = argv[++i]; } else if (!strcmp(arg, "--tp-worker")) { @@ -406,7 +418,7 @@ int ds4_tp_validate_engine_options( * verify block is mirrored to the worker via DS4_TP_FRAME_VERIFY and * the legacy MTP path falls back to per-token decode under TP. */ if (opt->load_slice) { - tp_set_err(err, errlen, "tensor parallelism loads the full model on both ranks"); + tp_set_err(err, errlen, "tensor parallelism does not use distributed layer slices"); return 0; } return 1; @@ -616,6 +628,7 @@ static int tp_rdma_open(ds4_tp *tp, char *err, size_t errlen) { return 0; } r->max_inline = qia.cap.max_inline_data; + pthread_mutex_init(&r->post_lock, NULL); return 1; } @@ -690,21 +703,21 @@ static int tp_rdma_register_and_exchange(ds4_tp *tp, char *err, size_t errlen) { tp_set_err(err, errlen, "tp rdma: modify RTS: %s", strerror(errno)); return 0; } - if (tp->vec_bytes > DS4_TP_RDMA_MAX_MSG) { + if (tp->vec_bytes > 2ull * DS4_TP_RDMA_MAX_MSG) { tp_set_err(err, errlen, - "tp rdma: gate vector %llu bytes exceeds the driver's %u " - "message limit (needs chunking)", + "tp rdma: gate vector %llu bytes exceeds twice the driver's " + "%u message limit", (unsigned long long)tp->vec_bytes, DS4_TP_RDMA_MAX_MSG); return 0; } - /* Arm the initial recv window, then barrier on the control socket so - * neither side can send a gate before the peer's recvs exist. */ - for (uint64_t s = 1; s <= DS4_TP_RDMA_RECV_WINDOW; s++) { - if (!tp_rdma_post_gate_recv(tp, s)) { - tp_set_err(err, errlen, "tp rdma: initial recv post failed"); - return 0; - } + if (tp->vec_bytes > DS4_TP_RDMA_MAX_MSG) { + fprintf(stderr, + "ds4-tp: rdma gate vectors ride as 2 chunked messages " + "(%llu bytes > %u limit)\n", + (unsigned long long)tp->vec_bytes, DS4_TP_RDMA_MAX_MSG); } + /* Leave the receive queue empty for an initial bulk prefill. The first + * decode gate arms the normal lookahead window after prefill finishes. */ if (!tp_send_frame(tp->control_fd, DS4_TP_FRAME_RDMA_READY, NULL, 0)) { tp_set_err(err, errlen, "tp rdma: ready send failed"); return 0; @@ -726,6 +739,16 @@ static const char *tp_wc_status_str(int status) { return buf; } +/* Slab slot a given gate seq lands in. DS4 fires every slot in order + * (identity mapping); GLM's schedule from the hello skips dense layers + * and the ATTN slots. */ +static uint32_t tp_gate_slot(const ds4_tp *tp, uint64_t seq) { + if (tp->gates_per_token == 0) + return (uint32_t)((seq - 1) % tp->n_slots); + return tp->gate_slot_start + + (uint32_t)((seq - 1) % tp->gates_per_token) * tp->gate_slot_step; +} + /* Reap completions: send CQEs free send-queue slots, recv CQEs advance the * arrival watermark (UC is in-order, so gate seq recv completions arrive * monotonically). Returns 0 on any completion error. */ @@ -755,50 +778,84 @@ static int tp_rdma_drain_cq(ds4_tp *tp) { * kernel reads. */ static int tp_rdma_post_gate_recv(ds4_tp *tp, uint64_t seq) { ds4_tp_rdma *r = &tp->rdma; - const uint32_t slot = (uint32_t)((seq - 1) % tp->n_slots); - struct ibv_sge sge; - struct ibv_recv_wr wr, *bad = NULL; - memset(&wr, 0, sizeof(wr)); - sge.addr = (uintptr_t)(tp->slab + tp->in_off + (uint64_t)slot * tp->vec_bytes); - sge.length = (uint32_t)tp->vec_bytes; - sge.lkey = r->mr->lkey; - wr.wr_id = seq; - wr.sg_list = &sge; - wr.num_sge = 1; - if (ibv_post_recv(r->qp, &wr, &bad) != 0) { - fprintf(stderr, "ds4-tp: rdma post_recv(seq %llu): %s\n", - (unsigned long long)seq, strerror(errno)); - return 0; + const uint32_t slot = tp_gate_slot(tp, seq); + const uintptr_t base = + (uintptr_t)(tp->slab + tp->in_off + (uint64_t)slot * tp->vec_bytes); + /* Vectors above the driver's 16KB message cap ride as two chunks + * landing contiguously in the slot. UC delivery is in-order and both + * sides post/send strictly in seq order, so the k'th send always + * matches the k'th recv; only the FINAL chunk carries the seq as + * wr_id, so the arrival watermark advances when the slot is whole. */ + uint64_t off = 0; + while (off < tp->vec_bytes) { + const uint64_t len = tp->vec_bytes - off > DS4_TP_RDMA_MAX_MSG ? + DS4_TP_RDMA_MAX_MSG : tp->vec_bytes - off; + const int last = off + len == tp->vec_bytes; + struct ibv_sge sge; + struct ibv_recv_wr wr, *bad = NULL; + memset(&wr, 0, sizeof(wr)); + sge.addr = base + off; + sge.length = (uint32_t)len; + sge.lkey = r->mr->lkey; + wr.wr_id = last ? seq : 0; + wr.sg_list = &sge; + wr.num_sge = 1; + if (ibv_post_recv(r->qp, &wr, &bad) != 0) { + fprintf(stderr, "ds4-tp: rdma post_recv(seq %llu off %llu): %s\n", + (unsigned long long)seq, (unsigned long long)off, + strerror(errno)); + return 0; + } + off += len; } - if (seq > r->recv_posted) r->recv_posted = seq; return 1; } -/* One gate: send our partial, wait for the peer's recv completion, keep the - * recv window armed. */ +/* One decode gate: ensure the receive window is armed, send our partial, + * wait for the peer's receive completion, and advance the window. */ static int tp_rdma_gate_exchange(ds4_tp *tp, uint32_t layer, uint32_t gate, uint64_t seq) { ds4_tp_rdma *r = &tp->rdma; const uint32_t slot = layer * DS4_TP_GATES_PER_LAYER + gate; - if (slot != (uint32_t)((seq - 1) % tp->n_slots)) { + if (getenv("DS4_TP_GATE_TRACE")) { + fprintf(stderr, "ds4-tp: gate trace l=%u g=%u seq=%llu want_slot=%u\n", + layer, gate, (unsigned long long)seq, tp_gate_slot(tp, seq)); + } + if (slot != tp_gate_slot(tp, seq)) { fprintf(stderr, "ds4-tp: gate order broke: layer %u gate %u vs seq %llu\n", layer, gate, (unsigned long long)seq); return 0; } - struct ibv_sge sge; - struct ibv_send_wr wr, *bad = NULL; - memset(&wr, 0, sizeof(wr)); - sge.addr = (uintptr_t)(tp->slab + tp->out_off + (uint64_t)slot * tp->vec_bytes); - sge.length = (uint32_t)tp->vec_bytes; - sge.lkey = r->mr->lkey; - wr.wr_id = seq; - wr.sg_list = &sge; - wr.num_sge = 1; - wr.opcode = IBV_WR_SEND; - wr.send_flags = IBV_SEND_SIGNALED; + const uintptr_t send_base = + (uintptr_t)(tp->slab + tp->out_off + (uint64_t)slot * tp->vec_bytes); pthread_mutex_lock(&r->post_lock); - int ok = ibv_post_send(r->qp, &wr, &bad) == 0; - if (ok) r->send_outstanding++; - else fprintf(stderr, "ds4-tp: rdma post_send: %s\n", strerror(errno)); + int ok = 1; + if (!r->recv_window_active) { + for (uint64_t s = seq; ok && s < seq + DS4_TP_RDMA_RECV_WINDOW; s++) + ok = tp_rdma_post_gate_recv(tp, s); + if (ok) r->recv_window_active = true; + } + for (uint64_t off = 0; ok && off < tp->vec_bytes; ) { + const uint64_t len = tp->vec_bytes - off > DS4_TP_RDMA_MAX_MSG ? + DS4_TP_RDMA_MAX_MSG : tp->vec_bytes - off; + struct ibv_sge sge; + struct ibv_send_wr wr, *bad = NULL; + memset(&wr, 0, sizeof(wr)); + sge.addr = send_base + off; + sge.length = (uint32_t)len; + sge.lkey = r->mr->lkey; + wr.wr_id = seq; + wr.sg_list = &sge; + wr.num_sge = 1; + wr.opcode = IBV_WR_SEND; + wr.send_flags = IBV_SEND_SIGNALED; + ok = ibv_post_send(r->qp, &wr, &bad) == 0; + if (!ok) { + fprintf(stderr, "ds4-tp: rdma post_send: %s\n", strerror(errno)); + } else { + r->send_outstanding++; + } + off += len; + } double deadline = 0.0; while (ok && r->recv_done < seq) { @@ -811,10 +868,250 @@ static int tp_rdma_gate_exchange(ds4_tp *tp, uint32_t layer, uint32_t gate, uint } } if (ok) ok = tp_rdma_post_gate_recv(tp, seq + DS4_TP_RDMA_RECV_WINDOW); + if (ok) r->last_gate_seq = seq; pthread_mutex_unlock(&r->post_lock); return ok; } +static int tp_rdma_big_gate_capable(const ds4_tp *tp) { + const uint64_t stage_bytes = + (uint64_t)DS4_TP_RDMA_BULK_SLOTS * DS4_TP_RDMA_MAX_MSG; + const uint64_t batch_region_bytes = + (uint64_t)tp->n_layer * DS4_TP_BATCH_MAX_ROWS * tp->vec_bytes; + return tp->rdma.qp && tp->rdma.mr && batch_region_bytes >= stage_bytes; +} + +/* Decode keeps a lookahead window of receives on the latency QP. Before a + * later prompt can reuse that QP for bulk rows, consume those receives with + * dummy sends on both ranks. The TCP big-gate header exchange is the barrier + * that guarantees both sides have reached this transition. */ +static int tp_rdma_drain_decode_window(ds4_tp *tp) { + ds4_tp_rdma *r = &tp->rdma; + if (!r->recv_window_active) return 1; + + const uint32_t chunks_per_gate = + (uint32_t)((tp->vec_bytes + DS4_TP_RDMA_MAX_MSG - 1u) / + DS4_TP_RDMA_MAX_MSG); + const uint32_t nwr = DS4_TP_RDMA_RECV_WINDOW * chunks_per_gate; + struct ibv_sge sge[DS4_TP_RDMA_RECV_WINDOW * 2u]; + struct ibv_send_wr wr[DS4_TP_RDMA_RECV_WINDOW * 2u]; + memset(wr, 0, sizeof(wr)); + uint8_t *scratch = tp->slab + tp->batch_out_off; + uint32_t wi = 0; + for (uint32_t gate = 0; gate < DS4_TP_RDMA_RECV_WINDOW; gate++) { + for (uint64_t off = 0; off < tp->vec_bytes; ) { + const uint64_t len = tp->vec_bytes - off > DS4_TP_RDMA_MAX_MSG ? + DS4_TP_RDMA_MAX_MSG : tp->vec_bytes - off; + sge[wi] = (struct ibv_sge) { + .addr = (uintptr_t)(scratch + off), + .length = (uint32_t)len, + .lkey = r->mr->lkey, + }; + wr[wi].wr_id = DS4_TP_RDMA_BULK_WR_TAG | ((uint64_t)wi + 1u); + wr[wi].sg_list = &sge[wi]; + wr[wi].num_sge = 1; + wr[wi].opcode = IBV_WR_SEND; + wr[wi].send_flags = wi + 1u == nwr ? IBV_SEND_SIGNALED : 0; + if (wi > 0) wr[wi - 1u].next = &wr[wi]; + wi++; + off += len; + } + } + + pthread_mutex_lock(&r->post_lock); + struct ibv_send_wr *bad = NULL; + if (ibv_post_send(r->qp, wr, &bad) != 0) { + fprintf(stderr, "ds4-tp: rdma receive-window drain post failed: %s\n", + strerror(errno)); + pthread_mutex_unlock(&r->post_lock); + return 0; + } + + uint32_t recv_done = 0; + int send_done = 0; + const double deadline = tp_now_sec() + (double)tp->timeout_sec; + while (recv_done < nwr || !send_done) { + struct ibv_wc wc[DS4_TP_RDMA_RECV_WINDOW * 2u + 1u]; + int n = ibv_poll_cq(r->cq, + (int)(DS4_TP_RDMA_RECV_WINDOW * 2u + 1u), wc); + if (n < 0) { + pthread_mutex_unlock(&r->post_lock); + return 0; + } + for (int i = 0; i < n; i++) { + if (wc[i].status != IBV_WC_SUCCESS) { + fprintf(stderr, "ds4-tp: rdma receive-window drain: %s\n", + tp_wc_status_str(wc[i].status)); + pthread_mutex_unlock(&r->post_lock); + return 0; + } + if (wc[i].opcode & IBV_WC_RECV) { + recv_done++; + } else if (wc[i].wr_id & DS4_TP_RDMA_BULK_WR_TAG) { + send_done = 1; + } else if (r->send_outstanding > 0) { + r->send_outstanding--; + } + } + if (tp_now_sec() > deadline) { + fprintf(stderr, + "ds4-tp: timeout draining RDMA receive window (%u/%u)\n", + recv_done, nwr); + pthread_mutex_unlock(&r->post_lock); + return 0; + } + } + r->recv_done = r->last_gate_seq; + r->recv_window_active = false; + pthread_mutex_unlock(&r->post_lock); + return 1; +} + +/* Large prefill row swaps share the latency QP. No future decode receives + * are queued, so each round can post its 1 MiB receive window before sending + * the matching 16 KiB messages. Verify scratch provides already-registered + * staging memory and is idle during normal prefill. */ +static int tp_rdma_big_gate_exchange(ds4_tp *tp, + const void *out, + void *in, + uint64_t bytes) { + ds4_tp_rdma *r = &tp->rdma; + if (!tp_rdma_big_gate_capable(tp) || r->recv_window_active) return 0; + + /* Payloads already inside the registered slab (verify batches) can ride + * directly. Ordinary prefill tensors use the idle verify regions as + * registered staging because their standalone MTLBuffers are not in the + * NIC memory region. */ + const uintptr_t slab_lo = (uintptr_t)tp->slab; + const uintptr_t slab_hi = slab_lo + tp->slab_bytes; + const uintptr_t out_lo = (uintptr_t)out; + const uintptr_t in_lo = (uintptr_t)in; + const bool direct = + out_lo >= slab_lo && out_lo <= slab_hi && bytes <= slab_hi - out_lo && + in_lo >= slab_lo && in_lo <= slab_hi && bytes <= slab_hi - in_lo; + uint8_t *stage_send = tp->slab + tp->batch_out_off; + uint8_t *stage_recv = tp->slab + tp->batch_in_off; + uint64_t off = 0; + while (off < bytes) { + const uint64_t remaining = bytes - off; + uint32_t chunks = (uint32_t)((remaining + DS4_TP_RDMA_MAX_MSG - 1u) / + DS4_TP_RDMA_MAX_MSG); + if (chunks > DS4_TP_RDMA_BULK_SLOTS) + chunks = DS4_TP_RDMA_BULK_SLOTS; + + uint32_t lens[DS4_TP_RDMA_BULK_SLOTS]; + uint64_t chunk_off[DS4_TP_RDMA_BULK_SLOTS]; + uint64_t round_bytes = 0; + for (uint32_t i = 0; i < chunks; i++) { + const uint64_t left = remaining - round_bytes; + lens[i] = (uint32_t)(left > DS4_TP_RDMA_MAX_MSG ? + DS4_TP_RDMA_MAX_MSG : left); + chunk_off[i] = direct ? round_bytes : + (uint64_t)i * DS4_TP_RDMA_MAX_MSG; + if (!direct) { + memcpy(stage_send + chunk_off[i], + (const uint8_t *)out + off + round_bytes, lens[i]); + } + round_bytes += lens[i]; + } + + struct ibv_sge recv_sge[DS4_TP_RDMA_BULK_SLOTS]; + struct ibv_recv_wr recv_wr[DS4_TP_RDMA_BULK_SLOTS]; + memset(recv_wr, 0, sizeof(recv_wr)); + for (uint32_t i = 0; i < chunks; i++) { + recv_sge[i] = (struct ibv_sge) { + .addr = direct ? in_lo + off + chunk_off[i] : + (uintptr_t)(stage_recv + chunk_off[i]), + .length = lens[i], + .lkey = r->mr->lkey, + }; + recv_wr[i].wr_id = DS4_TP_RDMA_BULK_WR_TAG | ((uint64_t)i + 1u); + recv_wr[i].sg_list = &recv_sge[i]; + recv_wr[i].num_sge = 1; + recv_wr[i].next = i + 1u < chunks ? &recv_wr[i + 1u] : NULL; + } + struct ibv_recv_wr *bad_recv = NULL; + if (ibv_post_recv(r->qp, recv_wr, &bad_recv) != 0) { + fprintf(stderr, "ds4-tp: bulk rdma post_recv: %s\n", + strerror(errno)); + return 0; + } + atomic_thread_fence(memory_order_release); + struct ibv_sge send_sge[DS4_TP_RDMA_BULK_SLOTS]; + struct ibv_send_wr send_wr[DS4_TP_RDMA_BULK_SLOTS]; + memset(send_wr, 0, sizeof(send_wr)); + for (uint32_t i = 0; i < chunks; i++) { + send_sge[i] = (struct ibv_sge) { + .addr = direct ? out_lo + off + chunk_off[i] : + (uintptr_t)(stage_send + chunk_off[i]), + .length = lens[i], + .lkey = r->mr->lkey, + }; + send_wr[i].wr_id = DS4_TP_RDMA_BULK_WR_TAG | ((uint64_t)i + 1u); + send_wr[i].sg_list = &send_sge[i]; + send_wr[i].num_sge = 1; + send_wr[i].opcode = IBV_WR_SEND; + send_wr[i].send_flags = i + 1u == chunks ? IBV_SEND_SIGNALED : 0; + send_wr[i].next = i + 1u < chunks ? &send_wr[i + 1u] : NULL; + } + struct ibv_send_wr *bad_send = NULL; + if (ibv_post_send(r->qp, send_wr, &bad_send) != 0) { + fprintf(stderr, "ds4-tp: bulk rdma post_send: %s\n", + strerror(errno)); + return 0; + } + + uint32_t recv_done = 0; + int send_done = 0; + const double deadline = tp_now_sec() + (double)tp->timeout_sec; + while (recv_done < chunks || !send_done) { + struct ibv_wc wc[DS4_TP_RDMA_BULK_SLOTS + 1u]; + int n = ibv_poll_cq(r->cq, + (int)(DS4_TP_RDMA_BULK_SLOTS + 1u), wc); + if (n < 0) return 0; + for (int i = 0; i < n; i++) { + if (wc[i].status != IBV_WC_SUCCESS) { + fprintf(stderr, + "ds4-tp: bulk rdma completion error: %s\n", + tp_wc_status_str(wc[i].status)); + return 0; + } + if ((wc[i].wr_id & DS4_TP_RDMA_BULK_WR_TAG) == 0) { + /* A final latency-QP send completion can remain queued + * when a later prompt starts a bulk gate. */ + if (wc[i].opcode & IBV_WC_RECV) { + if (wc[i].wr_id > r->recv_done) + r->recv_done = wc[i].wr_id; + } else if (r->send_outstanding > 0) { + r->send_outstanding--; + } + continue; + } + if (wc[i].opcode & IBV_WC_RECV) recv_done++; + else send_done = 1; + } + if (tp_now_sec() > deadline) { + fprintf(stderr, + "ds4-tp: timeout waiting for bulk RDMA round " + "(%u/%u recvs, send=%d)\n", + recv_done, chunks, send_done); + return 0; + } + } + atomic_thread_fence(memory_order_acquire); + if (!direct) { + round_bytes = 0; + for (uint32_t i = 0; i < chunks; i++) { + memcpy((uint8_t *)in + off + round_bytes, + stage_recv + chunk_off[i], lens[i]); + round_bytes += lens[i]; + } + } + off += round_bytes; + } + return 1; +} + static void tp_rdma_close(ds4_tp *tp) { ds4_tp_rdma *r = &tp->rdma; if (r->qp) r->api.destroy_qp(r->qp); @@ -838,7 +1135,6 @@ static int tp_hello_exchange(ds4_tp *tp, const ds4_tp_identity *id, int rdma_ok, .version = DS4_TP_PROTOCOL_VERSION, .role = (uint32_t)tp->opt.role, .rdma_ok = (uint32_t)rdma_ok, - .null_split = getenv("DS4_TP_NULL_SPLIT") != NULL, .gguf_bytes = id->gguf_bytes, .model_id = id->model_id, .n_layer = id->n_layer, @@ -846,6 +1142,9 @@ static int tp_hello_exchange(ds4_tp *tp, const ds4_tp_identity *id, int rdma_ok, .n_vocab = id->n_vocab, .quant_bits = id->quant_bits, .ctx_size = id->ctx_size, + .gate_slot_start = id->gate_slot_start, + .gate_slot_step = id->gate_slot_step, + .gates_per_token = id->gates_per_token, }; ds4_tp_hello_fixed theirs; if (!tp_write_full(tp->control_fd, &mine, sizeof(mine)) || @@ -866,13 +1165,12 @@ static int tp_hello_exchange(ds4_tp *tp, const ds4_tp_identity *id, int rdma_ok, tp_set_err(err, errlen, "tp hello: both sides claim role %u", mine.role); return 0; } - if (theirs.null_split != mine.null_split) { - tp_set_err(err, errlen, "tp hello: DS4_TP_NULL_SPLIT set on one side only"); - return 0; - } if (theirs.gguf_bytes != mine.gguf_bytes || theirs.model_id != mine.model_id || theirs.n_layer != mine.n_layer || theirs.n_embd != mine.n_embd || - theirs.n_vocab != mine.n_vocab || theirs.quant_bits != mine.quant_bits) { + theirs.n_vocab != mine.n_vocab || theirs.quant_bits != mine.quant_bits || + theirs.gate_slot_start != mine.gate_slot_start || + theirs.gate_slot_step != mine.gate_slot_step || + theirs.gates_per_token != mine.gates_per_token) { tp_set_err(err, errlen, "tp hello: model mismatch (peer gguf=%llu id=%u layers=%u embd=%u " "vocab=%u qbits=%u)", @@ -885,6 +1183,9 @@ static int tp_hello_exchange(ds4_tp *tp, const ds4_tp_identity *id, int rdma_ok, tp->n_embd = id->n_embd; tp->vec_bytes = (uint64_t)id->n_embd * sizeof(float); tp->n_slots = id->n_layer * DS4_TP_GATES_PER_LAYER; + tp->gate_slot_start = id->gate_slot_start; + tp->gate_slot_step = id->gate_slot_step; + tp->gates_per_token = id->gates_per_token; tp_slab_layout(tp); /* Transport decision: RDMA only when both sides can. */ int want_rdma = tp->opt.transport != DS4_TP_TRANSPORT_TCP; @@ -920,7 +1221,8 @@ int ds4_tp_create( int rdma_ok = 0; #ifdef DS4_TP_HAVE_VERBS - if (opt->transport != DS4_TP_TRANSPORT_TCP) + if (opt->transport != DS4_TP_TRANSPORT_TCP && + (uint64_t)id->n_embd * sizeof(float) <= 2ull * DS4_TP_RDMA_MAX_MSG) rdma_ok = tp_rdma_probe(&tp->rdma.api); #endif @@ -951,8 +1253,8 @@ int ds4_tp_create( #endif { /* Second socket dedicated to gate traffic so control frames never - * interleave with 16KB gate payloads. Created under RDMA too: the - * verify-block batch gates always run over TCP. */ + * interleave with gate payloads. Created under RDMA too for + * headers, verify-block gates, and transport fallback. */ if (tp->rank == 0) { tp->data_fd = accept(listener, NULL, NULL); if (tp->data_fd < 0) { @@ -1051,17 +1353,36 @@ int ds4_tp_gate_exchange(ds4_tp *tp, uint32_t layer, uint32_t gate, uint64_t seq } /* Verify-block batch gate: one exchange per layer moving all block rows at - * once. Runs over the TCP data socket even when the row gates use RDMA — - * it is off the per-token latency path (43 exchanges per verify block) and - * the RDMA engine's 16KB/seq accounting stays untouched. Symmetric - * write-then-read like the TCP row gate; 4MB socket buffers absorb the - * <=128KB payloads without deadlock. */ + * once. The payload lives in the registered slab, so RDMA sends it directly; + * TCP remains the symmetric write-then-read fallback. */ int ds4_tp_batch_gate_exchange(ds4_tp *tp, uint32_t layer, uint32_t rows, uint64_t seq) { if (tp->data_fd < 0 || rows == 0 || rows > DS4_TP_BATCH_MAX_ROWS) return 0; const uint64_t bytes = (uint64_t)rows * tp->vec_bytes; ds4_tp_gate_header h = { DS4_TP_BATCH_MAGIC, (uint16_t)layer, (uint16_t)rows, seq }; +#ifdef DS4_TP_HAVE_VERBS + if (tp->rdma_active && tp_rdma_big_gate_capable(tp)) { + if (!tp_write_full(tp->data_fd, &h, sizeof(h))) return 0; + ds4_tp_gate_header ph; + if (!tp_read_full(tp->data_fd, &ph, sizeof(ph))) return 0; + if (ph.magic != DS4_TP_BATCH_MAGIC || ph.layer != layer || + ph.gate != rows || ph.seq != seq) { + fprintf(stderr, + "ds4-tp: batch gate desync: got l=%u rows=%u seq=%llu, " + "want l=%u rows=%u seq=%llu\n", + ph.layer, ph.gate, (unsigned long long)ph.seq, + layer, rows, (unsigned long long)seq); + return 0; + } + if (!tp_rdma_drain_decode_window(tp)) return 0; + return tp_rdma_big_gate_exchange( + tp, + tp->slab + ds4_tp_slab_batch_out_offset(tp, layer), + tp->slab + ds4_tp_slab_batch_in_offset(tp, layer), + bytes); + } +#endif struct iovec iov[2] = { { &h, sizeof(h) }, { tp->slab + ds4_tp_slab_batch_out_offset(tp, layer), bytes }, @@ -1099,6 +1420,51 @@ int ds4_tp_batch_gate_exchange(ds4_tp *tp, uint32_t layer, uint32_t rows, bytes); } +/* Prefill batch gate: RDMA uses the pipelined registered-slab path above. + * The fallback alternates 2MB TCP write/read rounds in the same order, so + * neither side can fill its send buffer while the peer is also only writing + * (the 4MB socket buffers absorb one round). */ +#define DS4_TP_BIG_CHUNK (2ull * 1024ull * 1024ull) + +int ds4_tp_big_gate_exchange(ds4_tp *tp, uint32_t layer, uint64_t seq, + const void *out, void *in, uint64_t bytes) { + if (tp->data_fd < 0 || !out || !in || bytes == 0) return 0; + ds4_tp_gate_header h = { DS4_TP_BATCH_MAGIC, (uint16_t)layer, 0xB16u, seq }; + if (!tp_write_full(tp->data_fd, &h, sizeof(h))) return 0; + ds4_tp_gate_header ph; + if (!tp_read_full(tp->data_fd, &ph, sizeof(ph))) return 0; + if (ph.magic != DS4_TP_BATCH_MAGIC || ph.layer != layer || + ph.gate != 0xB16u || ph.seq != seq) { + fprintf(stderr, + "ds4-tp: big gate desync: got l=%u tag=%x seq=%llu, want l=%u seq=%llu\n", + ph.layer, ph.gate, (unsigned long long)ph.seq, + layer, (unsigned long long)seq); + return 0; + } +#ifdef DS4_TP_HAVE_VERBS + if (tp->rdma_active && tp_rdma_big_gate_capable(tp)) { + if (!tp_rdma_drain_decode_window(tp)) return 0; + return tp_rdma_big_gate_exchange(tp, out, in, bytes); + } +#endif + uint64_t off = 0; + while (off < bytes) { + const uint64_t n = bytes - off > DS4_TP_BIG_CHUNK ? + DS4_TP_BIG_CHUNK : bytes - off; + if (!tp_write_full(tp->data_fd, (const char *)out + off, n)) return 0; + if (!tp_read_full(tp->data_fd, (char *)in + off, n)) return 0; + off += n; + } + if (getenv("DS4_GLM_TP_DEBUG")) { + const float *o = (const float *)out, *i = (const float *)in; + fprintf(stderr, + "ds4-tp: big gate l=%u seq=%llu out[0..3]=%g %g %g %g in[0..3]=%g %g %g %g\n", + layer, (unsigned long long)seq, + o[0], o[1], o[2], o[3], i[0], i[1], i[2], i[3]); + } + return 1; +} + /* ------------------------------------------------------------------------ * Lockstep control plane. * --------------------------------------------------------------------- */ @@ -1297,6 +1663,10 @@ int ds4_tp_worker_run(ds4_engine *engine, const ds4_tp_options *opt) { .quant_bits = (uint32_t)ds4_engine_routed_quant_bits(engine), .ctx_size = 0, /* adopt the leader's */ }; + ds4_engine_tp_gate_schedule(engine, + &id.gate_slot_start, + &id.gate_slot_step, + &id.gates_per_token); ds4_tp *tp = NULL; if (!ds4_tp_create(&tp, opt, &id, err, sizeof(err))) { @@ -1316,6 +1686,10 @@ int ds4_tp_worker_run(ds4_engine *engine, const ds4_tp_options *opt) { ds4_tp_free(tp); return 1; } + /* The worker encodes no main-queue GPU work until the first mirrored + * sync arrives, so its one-time first-submission cost would otherwise + * land inside the leader-timed prefill. Pay it here instead. */ + ds4_session_gpu_warmup(session); ds4_log(stderr, DS4_LOG_OK, "tp worker ready (ctx %d)", ctx); int rc = 0; @@ -1349,7 +1723,7 @@ int ds4_tp_worker_run(ds4_engine *engine, const ds4_tp_options *opt) { rc = 1; break; } - if (getenv("DS4_TP_NULL_SPLIT") == NULL) { + if (ds4_engine_tp_vocab_split(engine)) { const int vocab = ds4_engine_vocab_size(engine); const uint32_t vhalf = (uint32_t)vocab / 2u; float *lg = malloc((size_t)vocab * sizeof(float)); diff --git a/ds4_tp.h b/ds4_tp.h index 13a1d798..0e5836ab 100644 --- a/ds4_tp.h +++ b/ds4_tp.h @@ -10,13 +10,14 @@ /* Tensor-parallel transport and lockstep protocol. * - * Two ranks run the same full model. Rank 0 (leader) is a normal frontend - * session that mirrors every ds4_session_sync()/ds4_session_eval() call to - * rank 1 (worker) over a TCP control socket, so both engines execute the - * identical graph sequence. Inside each decoded token, partial block - * outputs are exchanged at two gates per layer through a registered memory - * slab: RDMA WRITE + sequence flag when RDMA over Thunderbolt is available, - * or a full-duplex TCP exchange as fallback. + * Two ranks run the same logical model, each with one contiguous half of the + * routed experts resident. Rank 0 (leader) is a normal frontend session that + * mirrors every ds4_session_sync()/ds4_session_eval() call to rank 1 (worker) + * over a TCP control socket, so both engines execute the identical graph + * sequence. + * Inside each decoded token, partial block outputs are exchanged through a + * registered memory slab: two-sided RDMA SEND/RECV when RDMA over + * Thunderbolt is available, or a full-duplex TCP exchange as fallback. * * Layering: ds4.c calls the session-mirroring and slab entry points; * ds4_metal.m only ever sees ds4_tp_gate_exchange() through a callback @@ -43,6 +44,15 @@ typedef struct { uint32_t n_vocab; uint32_t quant_bits; uint32_t ctx_size; + /* Decode gate schedule, used to place RDMA recvs into the right slab + * slot: slot(seq) = start + ((seq-1) % per_token) * step. + * per_token 0 falls back to the identity mapping over all slots + * (DS4: every layer fires ATTN then FFN). GLM fires one FFN gate per + * sparse layer only, so its schedule skips the dense prefix and the + * ATTN slots. Exchanged in the hello; both sides must agree. */ + uint32_t gate_slot_start; + uint32_t gate_slot_step; + uint32_t gates_per_token; } ds4_tp_identity; bool ds4_tp_enabled(const ds4_tp_options *opt); @@ -112,12 +122,17 @@ int ds4_tp_attach_slab(ds4_tp *tp, void *base, char *err, size_t errlen); * Called from the GPU gate service thread. Returns 0 on failure. */ int ds4_tp_gate_exchange(ds4_tp *tp, uint32_t layer, uint32_t gate, uint64_t seq); -/* Verify-block batch gate: exchange `rows` row partials for one layer in a - * single symmetric transfer over the TCP data socket (used even when the - * row gates run RDMA). Called from the GPU gate service thread. */ +/* Verify-block batch gate: exchange `rows` row partials for one layer in one + * bulk RDMA transfer, with a symmetric TCP transfer as fallback. Called from + * the GPU gate service thread. */ int ds4_tp_batch_gate_exchange(ds4_tp *tp, uint32_t layer, uint32_t rows, uint64_t seq); +/* Prefill batch gate: arbitrary-size symmetric payload exchange over bulk + * RDMA, with interleaved 2MB TCP rounds as fallback (see ds4_tp.c). */ +int ds4_tp_big_gate_exchange(ds4_tp *tp, uint32_t layer, uint64_t seq, + const void *out, void *in, uint64_t bytes); + /* Lockstep mirroring (leader side) and worker loop primitives. */ int ds4_tp_send_sync(ds4_tp *tp, const int *tokens, uint32_t n_tokens); int ds4_tp_wait_sync_ack(ds4_tp *tp, char *err, size_t errlen); @@ -166,11 +181,10 @@ int ds4_tp_send_logits_half(ds4_tp *tp, const float *half, uint32_t count); int ds4_tp_recv_logits_half(ds4_tp *tp, float *half, uint32_t count); /* Speculative verify mirroring. The leader announces a draft block right - * before running the (replicated, ungated) batch verify; the worker runs - * the same verify for its KV side effects and then blocks on the commit - * frame, which carries the leader's decision: full_accept keeps the pushed - * rows, otherwise both sides roll back and replay replay_n tokens through - * the gated single-token decode in lockstep. */ + * before both ranks run the expert-split batch verify; the worker then blocks + * on the commit frame, which carries the leader's decision: full_accept keeps + * the pushed rows, otherwise both sides roll back and replay replay_n tokens + * through the gated single-token decode in lockstep. */ int ds4_tp_send_verify(ds4_tp *tp, const int *drafts, uint32_t n); int ds4_tp_send_verify_commit(ds4_tp *tp, int32_t full_accept, int32_t replay_n); int ds4_tp_recv_verify_commit(ds4_tp *tp, int32_t *full_accept, int32_t *replay_n); diff --git a/gguf-tools/.gitignore b/gguf-tools/.gitignore index 26bb1906..773a8244 100644 --- a/gguf-tools/.gitignore +++ b/gguf-tools/.gitignore @@ -1,4 +1,12 @@ deepseek4-quantize gguf-requantize-dense quality-testing/score_official -quality-testing/data/ +quality-testing/score_llama +quality-testing/data/* +!quality-testing/data/README.md +!quality-testing/data/glm52-openrouter-100/ +!quality-testing/data/glm52-openrouter-100/** +!quality-testing/data/pro/ +!quality-testing/data/pro/** +!quality-testing/data/flash/ +!quality-testing/data/flash/** diff --git a/gguf-tools/Makefile b/gguf-tools/Makefile index 799895a4..bf96ad2e 100644 --- a/gguf-tools/Makefile +++ b/gguf-tools/Makefile @@ -1,12 +1,21 @@ CC ?= cc +CXX ?= c++ UNAME_S := $(shell uname -s) +LLAMA_CPP_DIR ?= ../../deepseek-v4-quants/llama.cpp +LLAMA_CPP_BUILD ?= $(LLAMA_CPP_DIR)/build-remote +LLAMA_CPP_BIN ?= $(LLAMA_CPP_BUILD)/bin +LLAMA_CPP_CXXFLAGS ?= -O3 -Wall -Wextra -std=c++17 \ + -I$(LLAMA_CPP_DIR)/include -I$(LLAMA_CPP_DIR)/ggml/include ifeq ($(UNAME_S),Darwin) NATIVE_CPU_FLAG ?= -mcpu=native QUALITY_LDLIBS := -lm -pthread -framework Foundation -framework Metal -QUALITY_TARGETS := ds4.o ds4_metal.o -QUALITY_OBJS := ../ds4.o ../ds4_metal.o +QUALITY_TARGETS := ds4.o ds4_metal.o ds4_distributed.o ds4_ssd.o rax.o +QUALITY_OBJS := ../ds4.o ../ds4_metal.o ../ds4_distributed.o ../ds4_ssd.o ../rax.o QUALITY_LINK := $(CC) $(CFLAGS) -I.. -o +LLAMA_CPP_LDLIBS ?= -L$(LLAMA_CPP_BIN) -Wl,-rpath,$(abspath $(LLAMA_CPP_BIN)) \ + -lllama -lggml -lggml-base -lggml-cpu -lggml-blas -lggml-metal \ + -framework Foundation -framework Metal -framework Accelerate else NATIVE_CPU_FLAG ?= -march=native CUDA_HOME ?= /usr/local/cuda @@ -17,15 +26,17 @@ NVCC_ARCH_FLAGS := -arch=$(CUDA_ARCH) endif NVCCFLAGS ?= -O3 --use_fast_math $(NVCC_ARCH_FLAGS) -Xcompiler $(NATIVE_CPU_FLAG) -Xcompiler -pthread QUALITY_LDLIBS ?= -lm -Xcompiler -pthread -L$(CUDA_HOME)/targets/sbsa-linux/lib -L$(CUDA_HOME)/lib64 -lcudart -lcublas -QUALITY_TARGETS := ds4.o ds4_cuda.o -QUALITY_OBJS := ../ds4.o ../ds4_cuda.o +QUALITY_TARGETS := ds4.o ds4_cuda.o ds4_distributed.o ds4_ssd.o rax.o +QUALITY_OBJS := ../ds4.o ../ds4_cuda.o ../ds4_distributed.o ../ds4_ssd.o ../rax.o QUALITY_LINK := $(NVCC) $(NVCCFLAGS) -I.. -o +LLAMA_CPP_LDLIBS ?= -L$(LLAMA_CPP_BIN) -Wl,-rpath,$(abspath $(LLAMA_CPP_BIN)) \ + -lllama -lggml -lggml-base -lggml-cpu -ldl -lpthread endif CFLAGS ?= -O3 -Wall -Wextra -std=c11 $(NATIVE_CPU_FLAG) CPPFLAGS ?= -D_GNU_SOURCE -.PHONY: all clean quality-score +.PHONY: all clean quality-score quality-llama-score all: deepseek4-quantize @@ -36,5 +47,8 @@ quality-score: $(MAKE) -C .. $(QUALITY_TARGETS) $(QUALITY_LINK) quality-testing/score_official quality-testing/score_official.c $(QUALITY_OBJS) $(QUALITY_LDLIBS) +quality-llama-score: + $(CXX) $(LLAMA_CPP_CXXFLAGS) -o quality-testing/score_llama quality-testing/score_llama.cpp $(LLAMA_CPP_LDLIBS) + clean: - rm -f deepseek4-quantize quality-testing/score_official + rm -f deepseek4-quantize quality-testing/score_official quality-testing/score_llama diff --git a/gguf-tools/quality-testing/README.md b/gguf-tools/quality-testing/README.md index 10b2ee6e..db18e609 100644 --- a/gguf-tools/quality-testing/README.md +++ b/gguf-tools/quality-testing/README.md @@ -1,14 +1,33 @@ # Official-Continuation Quality Testing -This directory contains the 100 prompts and scripts used to compare local GGUF -variants against official DeepSeek V4 continuations. +This directory contains the prompts, tracked official fixtures, and scripts used +to compare local GGUF variants against hosted-model continuations. The metric is target-token negative log likelihood: collect a deterministic official continuation, then ask each local GGUF how much probability it assigns to that exact continuation token by token. This avoids judging quality from one sampled answer. -## 1. Collect Official Continuations +## 1. Tracked Fixture Sets + +Curated fixtures are kept in the repository so release QA can run without +calling hosted APIs: + +- `data/glm52-openrouter-100`: 100 GLM 5.2 continuations collected through + OpenRouter `z-ai/glm-5.2` with `top_logprobs=20`. +- `data/flash`: 100 DeepSeek V4 Flash continuations collected from the official + DeepSeek API with `top_logprobs=20`. +- `data/pro`: 100 DeepSeek V4 PRO continuations collected from the official + DeepSeek API with `top_logprobs=20`. + +DeepSeek V4 Flash also has tracked official smoke vectors in +`tests/test-vectors/`. Those vectors drive `./ds4_test --logprob-vectors` and +include short prompts plus long-prompt attention cases. + +The hosted APIs expose output-token logprobs and top-logprob alternatives, not +full vocabulary logits. + +## 2. Collect Official Continuations ```sh export DEEPSEEK_API_KEY=... @@ -19,6 +38,26 @@ python3 gguf-tools/quality-testing/collect_official.py \ --max-tokens 24 ``` +For GLM 5.2 through OpenRouter: + +```sh +export OPENROUTER_API_KEY=... +python3 gguf-tools/quality-testing/collect_official.py \ + --model z-ai/glm-5.2 \ + --endpoint https://openrouter.ai/api/v1/chat/completions \ + --api-key-env OPENROUTER_API_KEY \ + --prompts gguf-tools/quality-testing/prompts.jsonl \ + --out gguf-tools/quality-testing/data/glm52-openrouter \ + --count 100 \ + --max-tokens 24 \ + --top-logprobs 20 \ + --token-limit-field max_tokens \ + --provider-order parasail/fp8 \ + --require-parameters \ + --thinking omit \ + --reasoning-effort none +``` + Use one output directory per official model. The default model is Flash, so `data/flash` is the recommended path for Flash continuations. For PRO: @@ -39,10 +78,11 @@ The script writes: - `data//responses/case_*.json` - `data//manifest.tsv` -The prompt list is tracked in `prompts.jsonl`; the official responses are not -tracked because they are derived from an external API. +The prompt list is tracked in `prompts.jsonl`. Curated fixture directories are +also tracked after review; ad-hoc API collection directories should stay +untracked until they are intentionally promoted into the release QA set. -## 2. Build The Local Scorer +## 3. Build The Local Scorer ```sh make -C gguf-tools quality-score @@ -50,27 +90,41 @@ make -C gguf-tools quality-score The scorer links against the DS4 runtime and uses Metal by default. -## 3. Score GGUF Variants +## 4. Score GGUF Variants ```sh gguf-tools/quality-testing/score_official \ ../deepseek-v4-quants/gguf/OLD.gguf \ - gguf-tools/quality-testing/data/flash/manifest.tsv \ + gguf-tools/quality-testing/data/pro/manifest.tsv \ /tmp/old.tsv \ 4096 gguf-tools/quality-testing/score_official \ ../deepseek-v4-quants/gguf/NEW.gguf \ - gguf-tools/quality-testing/data/flash/manifest.tsv \ + gguf-tools/quality-testing/data/pro/manifest.tsv \ /tmp/new.tsv \ 4096 ``` -Use `data/pro/manifest.tsv` for PRO GGUFs. The scorer and comparator do not -care which model produced the manifest; the manifest path selects the -continuation set. +Use `data/flash/manifest.tsv` for Flash GGUFs, +`data/glm52-openrouter-100/manifest.tsv` for GLM 5.2 GGUFs, and +`data/pro/manifest.tsv` for PRO GGUFs. The scorer and comparator do not care +which model produced the manifest; the manifest path selects the continuation +set. -## 4. Compare +For a full-residency vs SSD-streaming comparison, score the same model twice and +add the streaming flags to one run: + +```sh +gguf-tools/quality-testing/score_official \ + /path/to/model.gguf \ + gguf-tools/quality-testing/data/glm52-openrouter-100/manifest.tsv \ + /tmp/streaming.tsv \ + 4096 \ + --ssd-streaming +``` + +## 5. Compare ```sh python3 gguf-tools/quality-testing/compare_scores.py /tmp/old.tsv /tmp/new.tsv @@ -86,3 +140,13 @@ Output fields: official first token. - `avg_greedy_lcp`: average greedy longest common prefix against the official continuation. +- `api_target_mae`: when the manifest includes `response_file`, absolute + local-vs-API logprob delta for aligned official output tokens. +- `api_top_coverage`: fraction of API top-logprob alternatives that map exactly + to one local tokenizer token. +- `api_top1_rate`: how often the API top alternative equals the local greedy + token. +- `api_topn_recall`: fraction of mapped API top-N alternatives found in the + local top-N for the same position. +- `api_top_mae`: local-vs-API logprob MAE over mapped API top alternatives. +- `api_pair_rate`: pairwise ordering agreement among mapped API alternatives. diff --git a/gguf-tools/quality-testing/collect_official.py b/gguf-tools/quality-testing/collect_official.py index 15d98952..e20d59c4 100644 --- a/gguf-tools/quality-testing/collect_official.py +++ b/gguf-tools/quality-testing/collect_official.py @@ -1,5 +1,5 @@ #!/usr/bin/env python3 -"""Collect official DeepSeek V4 continuations for local quant scoring.""" +"""Collect hosted-model continuations for local quant scoring.""" from __future__ import annotations @@ -129,18 +129,31 @@ def request_one( max_tokens: int, top_logprobs: int, thinking: str, + reasoning_effort: str, + token_limit_field: str, + provider_order: list[str], + provider_allow_fallbacks: bool, + provider_require_parameters: bool, ) -> dict: payload = { "model": model, "messages": [{"role": "user", "content": prompt}], "temperature": 0, - "max_tokens": max_tokens, "logprobs": True, "top_logprobs": top_logprobs, "stream": False, } + payload[token_limit_field] = max_tokens if thinking != "omit": payload["thinking"] = {"type": thinking} + if reasoning_effort != "omit": + payload["reasoning"] = {"effort": reasoning_effort} + if provider_order or provider_require_parameters: + provider = {"require_parameters": provider_require_parameters} + if provider_order: + provider["order"] = provider_order + provider["allow_fallbacks"] = provider_allow_fallbacks + payload["provider"] = provider req = urllib.request.Request( endpoint, data=json.dumps(payload).encode("utf-8"), @@ -162,11 +175,29 @@ def fetch_with_retry( max_tokens: int, top_logprobs: int, thinking: str, + reasoning_effort: str, + token_limit_field: str, + provider_order: list[str], + provider_allow_fallbacks: bool, + provider_require_parameters: bool, ) -> dict: delay = 1.0 for attempt in range(6): try: - return request_one(api_key, endpoint, model, prompt, max_tokens, top_logprobs, thinking) + return request_one( + api_key, + endpoint, + model, + prompt, + max_tokens, + top_logprobs, + thinking, + reasoning_effort, + token_limit_field, + provider_order, + provider_allow_fallbacks, + provider_require_parameters, + ) except urllib.error.HTTPError as e: body = e.read().decode("utf-8", "replace") if e.code < 500 and e.code != 429: @@ -187,17 +218,44 @@ def main() -> int: ap.add_argument("--prompts", default="gguf-tools/quality-testing/prompts.jsonl") ap.add_argument("--model", default=MODEL) ap.add_argument("--endpoint", default=ENDPOINT) + ap.add_argument("--api-key-env", default=None) ap.add_argument("--count", type=int, default=100) ap.add_argument("--max-tokens", type=int, default=24) ap.add_argument("--top-logprobs", type=int, default=5) ap.add_argument("--thinking", choices=("disabled", "enabled", "omit"), default="disabled") + ap.add_argument("--reasoning-effort", + choices=("xhigh", "high", "medium", "low", "minimal", "none", "omit"), + default=None) + ap.add_argument("--token-limit-field", + choices=("auto", "max_tokens", "max_completion_tokens"), + default="auto") + ap.add_argument("--provider-order", + help="comma-separated OpenRouter provider slugs, for example ambient/fp8") + ap.add_argument("--allow-provider-fallbacks", action="store_true") + ap.add_argument("--require-parameters", action="store_true", + help="for OpenRouter, route only to endpoints advertising the requested parameters") args = ap.parse_args() if args.top_logprobs < 0 or args.top_logprobs > 20: raise SystemExit("--top-logprobs must be between 0 and 20") - api_key = os.environ.get("DEEPSEEK_API_KEY") + openrouter = "openrouter.ai" in args.endpoint + api_key_env = args.api_key_env or ("OPENROUTER_API_KEY" if openrouter else "DEEPSEEK_API_KEY") + api_key = os.environ.get(api_key_env) if not api_key: - raise SystemExit("DEEPSEEK_API_KEY is not set") + raise SystemExit(f"{api_key_env} is not set") + thinking = args.thinking + reasoning_effort = args.reasoning_effort + if reasoning_effort is None: + reasoning_effort = "none" if openrouter else "omit" + if openrouter and args.thinking == "disabled": + thinking = "omit" + token_limit_field = args.token_limit_field + if token_limit_field == "auto": + token_limit_field = "max_tokens" + provider_order = [] + if args.provider_order: + provider_order = [item.strip() for item in args.provider_order.split(",") if item.strip()] + provider_require_parameters = args.require_parameters prompts = load_prompts(Path(args.prompts)) out = Path(args.out) @@ -209,6 +267,12 @@ def main() -> int: rows = [] total = min(args.count, len(prompts)) print(f"model={args.model} endpoint={args.endpoint}", file=sys.stderr) + print(f"key_env={api_key_env} token_field={token_limit_field} thinking={thinking} reasoning={reasoning_effort}", + file=sys.stderr) + if provider_order or provider_require_parameters: + print(f"provider_order={','.join(provider_order) or '-'} " + f"provider_fallbacks={args.allow_provider_fallbacks} " + f"require_parameters={provider_require_parameters}", file=sys.stderr) for i, prompt in enumerate(prompts[: args.count]): case_id = f"case_{i:03d}" print(f"official {i + 1}/{total}: {case_id}", file=sys.stderr, flush=True) @@ -219,12 +283,20 @@ def main() -> int: prompt, args.max_tokens, args.top_logprobs, - args.thinking, + thinking, + reasoning_effort, + token_limit_field, + provider_order, + args.allow_provider_fallbacks, + provider_require_parameters, ) choice = response["choices"][0] content = choice.get("message", {}).get("content", "") if not content: print(f"warning: empty continuation for {case_id}", file=sys.stderr) + logprob_items = (choice.get("logprobs") or {}).get("content", []) or [] + if args.top_logprobs > 0 and not logprob_items: + raise RuntimeError(f"{case_id}: response did not include output-token logprobs") prompt_path = out / "prompts" / f"{case_id}.txt" cont_path = out / "continuations" / f"{case_id}.txt" diff --git a/gguf-tools/quality-testing/compare_scores.py b/gguf-tools/quality-testing/compare_scores.py index 1934e7fa..1f9bf6a8 100644 --- a/gguf-tools/quality-testing/compare_scores.py +++ b/gguf-tools/quality-testing/compare_scores.py @@ -8,20 +8,89 @@ import sys from pathlib import Path -def load(path: Path) -> dict[str, dict[str, float]]: +def parse_cell(value: str) -> float | int: + v = float(value) + if v.is_integer(): + return int(v) + return v + + +def load(path: Path) -> dict[str, dict[str, float | int]]: with path.open(newline="", encoding="utf-8") as fp: rows = {} for row in csv.DictReader(fp, delimiter="\t"): - rows[row["id"]] = { + parsed = { "target_tokens": int(row["target_tokens"]), "nll": float(row["nll"]), "avg_nll": float(row["avg_nll"]), "first_match": int(row["first_match"]), "greedy_lcp": int(row["greedy_lcp"]), } + for key, value in row.items(): + if key is None or key == "id" or key in parsed or value is None or value == "": + continue + parsed[key] = parse_cell(value) + rows[row["id"]] = parsed return rows +def has_api(rows: dict[str, dict[str, float | int]], ids: list[str]) -> bool: + return all( + "api_target_tokens" in rows[case_id] and "api_top_items" in rows[case_id] + for case_id in ids + ) + + +def sum_key(rows: dict[str, dict[str, float | int]], ids: list[str], key: str) -> float: + return sum(float(rows[case_id].get(key, 0.0)) for case_id in ids) + + +def weighted_avg( + rows: dict[str, dict[str, float | int]], ids: list[str], value_key: str, count_key: str +) -> float: + count = sum_key(rows, ids, count_key) + if count == 0: + return 0.0 + total = sum( + float(rows[case_id].get(value_key, 0.0)) * float(rows[case_id].get(count_key, 0.0)) + for case_id in ids + ) + return total / count + + +def ratio(num: float, den: float) -> float: + return num / den if den else 0.0 + + +def print_api_summary(label: str, rows: dict[str, dict[str, float | int]], ids: list[str]) -> None: + target_tokens = sum_key(rows, ids, "api_target_tokens") + top_items = sum_key(rows, ids, "api_top_items") + top_mapped = sum_key(rows, ids, "api_top_mapped") + top1_count = sum_key(rows, ids, "api_top1_count") + top1_match = sum_key(rows, ids, "api_top1_match") + topn_ref = sum_key(rows, ids, "api_topn_ref") + topn_hit = sum_key(rows, ids, "api_topn_hit") + top_logprob_count = sum_key(rows, ids, "api_top_logprob_count") + pair_total = sum_key(rows, ids, "api_pair_total") + pair_agree = sum_key(rows, ids, "api_pair_agree") + + print(f"{label}_api_target_tokens\t{int(target_tokens)}") + print(f"{label}_api_target_mae\t{weighted_avg(rows, ids, 'api_target_mae', 'api_target_tokens'):.9f}") + print( + f"{label}_api_target_mean_delta\t" + f"{weighted_avg(rows, ids, 'api_target_mean_delta', 'api_target_tokens'):.9f}" + ) + print(f"{label}_api_top_coverage\t{ratio(top_mapped, top_items):.9f}") + print(f"{label}_api_top1_rate\t{ratio(top1_match, top1_count):.9f}") + print(f"{label}_api_topn_recall\t{ratio(topn_hit, topn_ref):.9f}") + print(f"{label}_api_top_mae\t{weighted_avg(rows, ids, 'api_top_mae', 'api_top_logprob_count'):.9f}") + print( + f"{label}_api_top_mean_delta\t" + f"{weighted_avg(rows, ids, 'api_top_mean_delta', 'api_top_logprob_count'):.9f}" + ) + print(f"{label}_api_pair_rate\t{ratio(pair_agree, pair_total):.9f}") + + def main() -> int: if len(sys.argv) != 3: print(f"usage: {sys.argv[0]} OLD.tsv NEW.tsv", file=sys.stderr) @@ -73,6 +142,9 @@ def main() -> int: print(f"case_wins_new_old_ties\t{new_case_wins}\t{old_case_wins}\t{ties}") print(f"first_token_matches_old_new\t{old_first}\t{new_first}") print(f"avg_greedy_lcp_old_new\t{old_lcp / len(ids):.3f}\t{new_lcp / len(ids):.3f}") + if has_api(old, ids) and has_api(new, ids): + print_api_summary("old", old, ids) + print_api_summary("new", new, ids) print("\nnew best cases:") for delta, case_id, t, old_avg, new_avg in sorted(deltas)[:8]: diff --git a/gguf-tools/quality-testing/data/README.md b/gguf-tools/quality-testing/data/README.md new file mode 100644 index 00000000..0c0e150c --- /dev/null +++ b/gguf-tools/quality-testing/data/README.md @@ -0,0 +1,21 @@ +# Official Quality Fixtures + +This directory contains curated hosted-model continuation fixtures that are +safe to commit and use in release QA. + +- `glm52-openrouter-100`: 100 GLM 5.2 OpenRouter continuations with API + top-logprob slices. +- `flash`: 100 DeepSeek V4 Flash official continuations with API top-logprob + slices. +- `pro`: 100 DeepSeek V4 PRO official continuations with API top-logprob + slices. + +Each fixture directory contains: + +- `prompts/case_*.txt`: exact user prompts. +- `continuations/case_*.txt`: deterministic hosted-model continuations. +- `responses/case_*.json`: raw hosted responses, including logprob slices. +- `manifest.tsv`: paths consumed by `score_official`. + +DeepSeek V4 Flash smoke vectors are also tracked in `tests/test-vectors/` and +are run by `./ds4_test --logprob-vectors`. diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_000.txt b/gguf-tools/quality-testing/data/flash/continuations/case_000.txt new file mode 100644 index 00000000..dd462691 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_000.txt @@ -0,0 +1 @@ +Here is a detailed explanation of B-tree insertion, covering the standard algorithm, node splits, and the special case of splitting \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_001.txt b/gguf-tools/quality-testing/data/flash/continuations/case_001.txt new file mode 100644 index 00000000..2002ebb0 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_001.txt @@ -0,0 +1,5 @@ +Here's a concise design for a TCP echo server that handles slow clients: + +## Architecture + +**Event-driven, non-block \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_002.txt b/gguf-tools/quality-testing/data/flash/continuations/case_002.txt new file mode 100644 index 00000000..088e5630 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_002.txt @@ -0,0 +1 @@ +Here's a comprehensive comparison of memory-mapped (mmap) model weights versus copying all weights into private buffers on macOS \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_003.txt b/gguf-tools/quality-testing/data/flash/continuations/case_003.txt new file mode 100644 index 00000000..eadbed74 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_003.txt @@ -0,0 +1 @@ +This is an excellent question because it gets to the heart of why **RMSNorm** (Root Mean Square Normalization) \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_004.txt b/gguf-tools/quality-testing/data/flash/continuations/case_004.txt new file mode 100644 index 00000000..fefa4586 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_004.txt @@ -0,0 +1 @@ +This is an excellent question that gets at a core optimization challenge in modern LLM deployment. Let's break down why ** \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_005.txt b/gguf-tools/quality-testing/data/flash/continuations/case_005.txt new file mode 100644 index 00000000..8c6ef2a1 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_005.txt @@ -0,0 +1,5 @@ +Here's pseudocode for a binary heap push (insert) operation: + +``` +function push(heap, value): + // \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_006.txt b/gguf-tools/quality-testing/data/flash/continuations/case_006.txt new file mode 100644 index 00000000..2c4fa7ee --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_006.txt @@ -0,0 +1 @@ +This is a great question that gets at the core of how modern LLMs generate text. Both **temperature** and ** \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_007.txt b/gguf-tools/quality-testing/data/flash/continuations/case_007.txt new file mode 100644 index 00000000..fa6e6c15 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_007.txt @@ -0,0 +1 @@ +Here is a summary of how speculative decoding preserves exact greedy output (i.e., the same tokens that would be generated by \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_008.txt b/gguf-tools/quality-testing/data/flash/continuations/case_008.txt new file mode 100644 index 00000000..d7bbccd1 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_008.txt @@ -0,0 +1 @@ +This is an excellent question that gets to the heart of how Large Language Models (LLMs) are served efficiently. The \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_009.txt b/gguf-tools/quality-testing/data/flash/continuations/case_009.txt new file mode 100644 index 00000000..efeb90ed --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_009.txt @@ -0,0 +1,5 @@ +Here are three invariants for a special-token table used in a tokenizer: + +--- + +### 1. **Un \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_010.txt b/gguf-tools/quality-testing/data/flash/continuations/case_010.txt new file mode 100644 index 00000000..824bdd5f --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_010.txt @@ -0,0 +1 @@ +Ecco una spiegazione dettagliata del funzionamento dell'inserimento in un **B-tree**, con \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_011.txt b/gguf-tools/quality-testing/data/flash/continuations/case_011.txt new file mode 100644 index 00000000..7f1021af --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_011.txt @@ -0,0 +1,3 @@ +Ecco un progetto conciso per un server TCP echo con gestione di client lenti: + +## Architettura \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_012.txt b/gguf-tools/quality-testing/data/flash/continuations/case_012.txt new file mode 100644 index 00000000..3ea9c490 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_012.txt @@ -0,0 +1 @@ +Ecco un confronto dettagliato tra **mmap** (memory-mapped file) e **copia \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_013.txt b/gguf-tools/quality-testing/data/flash/continuations/case_013.txt new file mode 100644 index 00000000..e268f3d7 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_013.txt @@ -0,0 +1 @@ +Certamente. Ecco una derivazione dettagliata del perché **RMSNorm** (Root Mean Square Normalization \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_014.txt b/gguf-tools/quality-testing/data/flash/continuations/case_014.txt new file mode 100644 index 00000000..30efd957 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_014.txt @@ -0,0 +1 @@ +La cache KV (Key-Value) su disco è particolarmente utile nelle **sessioni agentiche** (d \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_015.txt b/gguf-tools/quality-testing/data/flash/continuations/case_015.txt new file mode 100644 index 00000000..44e32dd4 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_015.txt @@ -0,0 +1 @@ +Ecco lo pseudocodice per inserire un elemento in un heap binario (min-heap o max-he \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_016.txt b/gguf-tools/quality-testing/data/flash/continuations/case_016.txt new file mode 100644 index 00000000..47b19625 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_016.txt @@ -0,0 +1 @@ +Questa è un'ottima domanda che tocca il cuore del controllo della generazione nei modelli linguistici \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_017.txt b/gguf-tools/quality-testing/data/flash/continuations/case_017.txt new file mode 100644 index 00000000..2252a535 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_017.txt @@ -0,0 +1 @@ +La decodifica speculativa mantiene l'output esatto perché utilizza un **meccanismo di ver \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_018.txt b/gguf-tools/quality-testing/data/flash/continuations/case_018.txt new file mode 100644 index 00000000..ece99a30 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_018.txt @@ -0,0 +1 @@ +Questa è un'ottima domanda che tocca un aspetto fondamentale dell'ottimizzazione dell'inferenza \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_019.txt b/gguf-tools/quality-testing/data/flash/continuations/case_019.txt new file mode 100644 index 00000000..98cfcaf4 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_019.txt @@ -0,0 +1 @@ +Ecco tre invarianti per una tabella di token speciali (ad esempio in un parser o in un sistema di \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_020.txt b/gguf-tools/quality-testing/data/flash/continuations/case_020.txt new file mode 100644 index 00000000..6b5c30e4 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_020.txt @@ -0,0 +1,3 @@ +## Binary Search for Insertion Point + +Binary search finds the insertion point for a target value in a sorted array by maintaining \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_021.txt b/gguf-tools/quality-testing/data/flash/continuations/case_021.txt new file mode 100644 index 00000000..f163b39f --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_021.txt @@ -0,0 +1,4 @@ +Here's a short C function that clamps an integer to a range: + +```c +int clamp(int value, int \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_022.txt b/gguf-tools/quality-testing/data/flash/continuations/case_022.txt new file mode 100644 index 00000000..74edbab0 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_022.txt @@ -0,0 +1 @@ +This is a fundamental question in concurrent programming. The core difference lies in **what they protect** and **how they coordinate \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_023.txt b/gguf-tools/quality-testing/data/flash/continuations/case_023.txt new file mode 100644 index 00000000..313e1394 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_023.txt @@ -0,0 +1 @@ +In the context of a network server, **backpressure** is a mechanism for **flow control**. It refers to the \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_024.txt b/gguf-tools/quality-testing/data/flash/continuations/case_024.txt new file mode 100644 index 00000000..44f3dde9 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_024.txt @@ -0,0 +1 @@ +Here is a safe and robust format for storing a model checkpoint header, designed for clarity, extensibility, and error prevention \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_025.txt b/gguf-tools/quality-testing/data/flash/continuations/case_025.txt new file mode 100644 index 00000000..7f34fece --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_025.txt @@ -0,0 +1 @@ +A **ring buffer** (also called a circular buffer) is a fixed-size data structure that uses a contiguous block of \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_026.txt b/gguf-tools/quality-testing/data/flash/continuations/case_026.txt new file mode 100644 index 00000000..f38d27d6 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_026.txt @@ -0,0 +1,4 @@ +Here is a brief, structured plan for testing long-context prompt chunking. + +### Goal +Validate that chunking a \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_027.txt b/gguf-tools/quality-testing/data/flash/continuations/case_027.txt new file mode 100644 index 00000000..917a4f55 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_027.txt @@ -0,0 +1 @@ +This is an excellent question that gets to the heart of why modern low-bit quantization (like 4-bit and 3 \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_028.txt b/gguf-tools/quality-testing/data/flash/continuations/case_028.txt new file mode 100644 index 00000000..63089340 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_028.txt @@ -0,0 +1 @@ +This is a great question that gets at a key performance optimization in modern large language model (LLM) inference, particularly \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_029.txt b/gguf-tools/quality-testing/data/flash/continuations/case_029.txt new file mode 100644 index 00000000..0ce12172 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_029.txt @@ -0,0 +1 @@ +This is an excellent question because comparing quantizations is rarely a simple "A is better than B" scenario. The " \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_030.txt b/gguf-tools/quality-testing/data/flash/continuations/case_030.txt new file mode 100644 index 00000000..86d1be7c --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_030.txt @@ -0,0 +1,3 @@ +## Ricerca Binaria del Punto di Inserimento + +La ricerca binaria del punto di inserimento è una \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_031.txt b/gguf-tools/quality-testing/data/flash/continuations/case_031.txt new file mode 100644 index 00000000..c0dc33f8 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_031.txt @@ -0,0 +1,4 @@ +Ecco una breve funzione C che limita un intero a un intervallo specificato: + +```c +int clamp \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_032.txt b/gguf-tools/quality-testing/data/flash/continuations/case_032.txt new file mode 100644 index 00000000..1a24bf6d --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_032.txt @@ -0,0 +1 @@ +Certamente. La differenza fondamentale tra un **mutex** (mutual exclusion) e un **contatore atom \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_033.txt b/gguf-tools/quality-testing/data/flash/continuations/case_033.txt new file mode 100644 index 00000000..ac844738 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_033.txt @@ -0,0 +1 @@ +In un server di rete, **backpressure** (contro-pressione o contropressione) è un me \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_034.txt b/gguf-tools/quality-testing/data/flash/continuations/case_034.txt new file mode 100644 index 00000000..9a5ae2db --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_034.txt @@ -0,0 +1 @@ +Ecco un formato sicuro per salvare l'header di un checkpoint modello, progettato per garantire integ \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_035.txt b/gguf-tools/quality-testing/data/flash/continuations/case_035.txt new file mode 100644 index 00000000..aeda61b1 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_035.txt @@ -0,0 +1 @@ +Ti spiegherò il funzionamento di un **ring buffer** (o buffer circolare) e le tec \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_036.txt b/gguf-tools/quality-testing/data/flash/continuations/case_036.txt new file mode 100644 index 00000000..68613f42 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_036.txt @@ -0,0 +1 @@ +Ecco un piano breve e strutturato per testare il **chunking** (frammentazione) di \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_037.txt b/gguf-tools/quality-testing/data/flash/continuations/case_037.txt new file mode 100644 index 00000000..54195315 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_037.txt @@ -0,0 +1 @@ +Nella quantizzazione low-bit (a bassa precisione) dei modelli di deep learning, una **matrice \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_038.txt b/gguf-tools/quality-testing/data/flash/continuations/case_038.txt new file mode 100644 index 00000000..ba955f97 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_038.txt @@ -0,0 +1 @@ +Questa è un'ottima domanda che tocca un aspetto cruciale dell'ottimizzazione dei modelli \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_039.txt b/gguf-tools/quality-testing/data/flash/continuations/case_039.txt new file mode 100644 index 00000000..992582b6 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_039.txt @@ -0,0 +1 @@ +Per confrontare due quantizzazioni (ad esempio, due modelli di compressione di un segnale, due \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_040.txt b/gguf-tools/quality-testing/data/flash/continuations/case_040.txt new file mode 100644 index 00000000..78ebca54 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_040.txt @@ -0,0 +1,3 @@ +Here are the first five measurements to take when diagnosing generation slowdowns at long context: + +1. **Time-to-F \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_041.txt b/gguf-tools/quality-testing/data/flash/continuations/case_041.txt new file mode 100644 index 00000000..c4fffe71 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_041.txt @@ -0,0 +1 @@ +This is an excellent and fundamental question about how language models actually "think." The short answer is: **because the model \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_042.txt b/gguf-tools/quality-testing/data/flash/continuations/case_042.txt new file mode 100644 index 00000000..b040dd24 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_042.txt @@ -0,0 +1,3 @@ +Let's break down **online softmax** for attention using simple variables. + +## The Problem: Standard Softmax in Attention \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_043.txt b/gguf-tools/quality-testing/data/flash/continuations/case_043.txt new file mode 100644 index 00000000..a74402e9 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_043.txt @@ -0,0 +1,5 @@ +Here's a minimal JSON schema for a tool call with name and arguments: + +```json +{ + "type": " \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_044.txt b/gguf-tools/quality-testing/data/flash/continuations/case_044.txt new file mode 100644 index 00000000..b17cea37 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_044.txt @@ -0,0 +1 @@ +To test that a file-backed mmap is not repeatedly remapped, you need to verify that the kernel is reusing \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_045.txt b/gguf-tools/quality-testing/data/flash/continuations/case_045.txt new file mode 100644 index 00000000..051780ea --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_045.txt @@ -0,0 +1 @@ +This is a fascinating question that gets to the heart of how modern graphics APIs like Metal, Vulkan, and DirectX \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_046.txt b/gguf-tools/quality-testing/data/flash/continuations/case_046.txt new file mode 100644 index 00000000..4b7a6d42 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_046.txt @@ -0,0 +1 @@ +In a Mixture-of-Experts (MoE) layer, the **router** (also called a **gating \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_047.txt b/gguf-tools/quality-testing/data/flash/continuations/case_047.txt new file mode 100644 index 00000000..aa23086c --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_047.txt @@ -0,0 +1 @@ +Here is the difference between **raw KV rows** and **compressed KV rows** in the context of storage engines ( \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_048.txt b/gguf-tools/quality-testing/data/flash/continuations/case_048.txt new file mode 100644 index 00000000..e2c9b592 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_048.txt @@ -0,0 +1 @@ +Here is a comprehensive checklist for validating that a quantized model still follows instructions effectively. This checklist is designed to catch both \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_049.txt b/gguf-tools/quality-testing/data/flash/continuations/case_049.txt new file mode 100644 index 00000000..56a62cf8 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_049.txt @@ -0,0 +1 @@ +This is an excellent question that gets to the heart of how to properly test and understand a language model's capabilities. Evaluating \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_050.txt b/gguf-tools/quality-testing/data/flash/continuations/case_050.txt new file mode 100644 index 00000000..d01e14da --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_050.txt @@ -0,0 +1 @@ +Ecco cinque misure iniziali per affrontare un problema di decoding lento in contesti lunghi (long \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_051.txt b/gguf-tools/quality-testing/data/flash/continuations/case_051.txt new file mode 100644 index 00000000..5eeb844a --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_051.txt @@ -0,0 +1 @@ +Questa è un'ottima domanda che tocca il cuore di come funzionano i modelli linguistici \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_052.txt b/gguf-tools/quality-testing/data/flash/continuations/case_052.txt new file mode 100644 index 00000000..1732ed94 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_052.txt @@ -0,0 +1 @@ +Certamente! Spiegherò la **softmax** nel contesto del meccanismo di **attenzione** \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_053.txt b/gguf-tools/quality-testing/data/flash/continuations/case_053.txt new file mode 100644 index 00000000..8c48a5d3 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_053.txt @@ -0,0 +1,5 @@ +Ecco uno schema JSON minimo per una tool call: + +```json +{ + "name": "nome_della \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_054.txt b/gguf-tools/quality-testing/data/flash/continuations/case_054.txt new file mode 100644 index 00000000..cc87826b --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_054.txt @@ -0,0 +1 @@ +Per testare che un `mmap` su file non venga rimappato ripetutamente, puoi \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_055.txt b/gguf-tools/quality-testing/data/flash/continuations/case_055.txt new file mode 100644 index 00000000..e3260b44 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_055.txt @@ -0,0 +1 @@ +Questa è una domanda molto interessante che tocca il cuore dell'ottimizzazione della grafica e della gest \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_056.txt b/gguf-tools/quality-testing/data/flash/continuations/case_056.txt new file mode 100644 index 00000000..449a2a2a --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_056.txt @@ -0,0 +1 @@ +In un **layer mixture-of-experts (MoE)**, il **router** (o gate network) svolge \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_057.txt b/gguf-tools/quality-testing/data/flash/continuations/case_057.txt new file mode 100644 index 00000000..f7904b72 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_057.txt @@ -0,0 +1 @@ +Certamente. Ecco una descrizione chiara della differenza tra righe KV (Key-Value) raw e \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_058.txt b/gguf-tools/quality-testing/data/flash/continuations/case_058.txt new file mode 100644 index 00000000..29eed8a9 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_058.txt @@ -0,0 +1 @@ +Ecco una checklist strutturata per validare che un modello quantizzato (es. GPTQ, AWQ, \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_059.txt b/gguf-tools/quality-testing/data/flash/continuations/case_059.txt new file mode 100644 index 00000000..7abb873b --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_059.txt @@ -0,0 +1 @@ +Valutare 50 prompt invece di un singolo prompt preferito è più utile per diversi motivi, specialmente \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_060.txt b/gguf-tools/quality-testing/data/flash/continuations/case_060.txt new file mode 100644 index 00000000..68f40af2 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_060.txt @@ -0,0 +1,4 @@ +Here's a tiny Python function that returns the median of three numbers: + +```python +def median_of_three(a, \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_061.txt b/gguf-tools/quality-testing/data/flash/continuations/case_061.txt new file mode 100644 index 00000000..f2395559 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_061.txt @@ -0,0 +1,3 @@ +This is a great question because it gets at the core of why we organize data. + +The reason sorted arrays make membership tests \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_062.txt b/gguf-tools/quality-testing/data/flash/continuations/case_062.txt new file mode 100644 index 00000000..f116ccf9 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_062.txt @@ -0,0 +1 @@ +**Eventual consistency** is a consistency model used in distributed databases (and other distributed systems) where, given enough time \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_063.txt b/gguf-tools/quality-testing/data/flash/continuations/case_063.txt new file mode 100644 index 00000000..876b6fdb --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_063.txt @@ -0,0 +1,3 @@ +Here's a classic example of a race condition in C where two threads increment a shared counter without synchronization: + +```c diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_064.txt b/gguf-tools/quality-testing/data/flash/continuations/case_064.txt new file mode 100644 index 00000000..079edd10 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_064.txt @@ -0,0 +1,2 @@ +This is a fundamental concept in computer science, networking, and system design. The simplest analogy is a **water pipe**. + diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_065.txt b/gguf-tools/quality-testing/data/flash/continuations/case_065.txt new file mode 100644 index 00000000..0f467459 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_065.txt @@ -0,0 +1 @@ +A **trie** (also called a prefix tree) represents a set of strings by organizing them based on their ** \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_066.txt b/gguf-tools/quality-testing/data/flash/continuations/case_066.txt new file mode 100644 index 00000000..d66564c6 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_066.txt @@ -0,0 +1 @@ +Testing a command-line parser thoroughly requires covering both normal usage and edge cases that could break assumptions. Here's a systematic approach \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_067.txt b/gguf-tools/quality-testing/data/flash/continuations/case_067.txt new file mode 100644 index 00000000..b5dc030c --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_067.txt @@ -0,0 +1 @@ +This is an excellent question that gets to the heart of how virtual memory works. The short answer is that **`mm \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_068.txt b/gguf-tools/quality-testing/data/flash/continuations/case_068.txt new file mode 100644 index 00000000..d586a0a4 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_068.txt @@ -0,0 +1 @@ +This is a nuanced and insightful question that touches on the intersection of model compression (quantization) and the dynamics of Mi \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_069.txt b/gguf-tools/quality-testing/data/flash/continuations/case_069.txt new file mode 100644 index 00000000..bbc1c11b --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_069.txt @@ -0,0 +1 @@ +Here is a short, focused checklist for reviewing a PR that involves memory lifetimes (e.g., Rust, C++, or \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_070.txt b/gguf-tools/quality-testing/data/flash/continuations/case_070.txt new file mode 100644 index 00000000..2930b602 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_070.txt @@ -0,0 +1,4 @@ +Ecco una semplice funzione Python per calcolare la mediana di tre numeri: + +```python +def mediana(a \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_071.txt b/gguf-tools/quality-testing/data/flash/continuations/case_071.txt new file mode 100644 index 00000000..e2e07b24 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_071.txt @@ -0,0 +1 @@ +Questa è una domanda fondamentale in informatica. La risposta breve è: **perché permettono di us \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_072.txt b/gguf-tools/quality-testing/data/flash/continuations/case_072.txt new file mode 100644 index 00000000..52cd2bcd --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_072.txt @@ -0,0 +1 @@ +In un database distribuito, la **consistenza eventuale** (o *eventual consistency*) è un modello \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_073.txt b/gguf-tools/quality-testing/data/flash/continuations/case_073.txt new file mode 100644 index 00000000..27051585 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_073.txt @@ -0,0 +1,3 @@ +Ecco un breve esempio di race condition in C con due thread che condividono una variabile: + +```c diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_074.txt b/gguf-tools/quality-testing/data/flash/continuations/case_074.txt new file mode 100644 index 00000000..e9caab24 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_074.txt @@ -0,0 +1 @@ +Certamente! Latenza e throughput sono due metriche fondamentali per misurare le prestazioni di un sistema ( \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_075.txt b/gguf-tools/quality-testing/data/flash/continuations/case_075.txt new file mode 100644 index 00000000..6cfafa3b --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_075.txt @@ -0,0 +1 @@ +Un **trie** (chiamato anche albero digitale o albero di prefissi) rappresenta un \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_076.txt b/gguf-tools/quality-testing/data/flash/continuations/case_076.txt new file mode 100644 index 00000000..6b5c1fd7 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_076.txt @@ -0,0 +1,3 @@ +# Test di un parser da riga di comando con casi limite + +Ecco una guida completa per testare \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_077.txt b/gguf-tools/quality-testing/data/flash/continuations/case_077.txt new file mode 100644 index 00000000..d88e8246 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_077.txt @@ -0,0 +1 @@ +Questa è un'ottima domanda che tocca un aspetto fondamentale della gestione della memoria nei sistemi oper \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_078.txt b/gguf-tools/quality-testing/data/flash/continuations/case_078.txt new file mode 100644 index 00000000..4a045f6d --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_078.txt @@ -0,0 +1 @@ +L’affermazione che **l’errore di quantizzazione colpisce più gli esperti rari \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_079.txt b/gguf-tools/quality-testing/data/flash/continuations/case_079.txt new file mode 100644 index 00000000..d2cbf567 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_079.txt @@ -0,0 +1 @@ +Ecco una checklist sintetica per la revisione della **lifetime della memoria** in una Pull Request (focus \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_080.txt b/gguf-tools/quality-testing/data/flash/continuations/case_080.txt new file mode 100644 index 00000000..22fee472 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_080.txt @@ -0,0 +1 @@ +A good benchmark should measure **the specific, relevant performance or outcome you aim to improve, under realistic and reproducible conditions.** \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_081.txt b/gguf-tools/quality-testing/data/flash/continuations/case_081.txt new file mode 100644 index 00000000..07080405 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_081.txt @@ -0,0 +1,3 @@ +Here are a few ways to complete that C comment, depending on the specific lock and what it protects: + +**Most common \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_082.txt b/gguf-tools/quality-testing/data/flash/continuations/case_082.txt new file mode 100644 index 00000000..e0e07c65 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_082.txt @@ -0,0 +1 @@ +Il vantaggio principale della cache è **la velocità di accesso ai dati**, che riduce i tempi di \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_083.txt b/gguf-tools/quality-testing/data/flash/continuations/case_083.txt new file mode 100644 index 00000000..a3f12a8b --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_083.txt @@ -0,0 +1 @@ +Il modello dovrebbe rispondere solo dopo aver letto l'intero prompt. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_084.txt b/gguf-tools/quality-testing/data/flash/continuations/case_084.txt new file mode 100644 index 00000000..b2f7bb65 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_084.txt @@ -0,0 +1 @@ +Quantization reduces memory but can alter the logits. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_085.txt b/gguf-tools/quality-testing/data/flash/continuations/case_085.txt new file mode 100644 index 00000000..a71f60f5 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_085.txt @@ -0,0 +1 @@ +A compiler uses an abstract syntax tree (AST) as a structured, hierarchical representation of the source code's grammatical structure, \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_086.txt b/gguf-tools/quality-testing/data/flash/continuations/case_086.txt new file mode 100644 index 00000000..0fb389de --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_086.txt @@ -0,0 +1 @@ +Checksums catch accidental corruption because they rely on a mathematical algorithm that computes a fixed-size, unique summary (the checks \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_087.txt b/gguf-tools/quality-testing/data/flash/continuations/case_087.txt new file mode 100644 index 00000000..475e90e7 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_087.txt @@ -0,0 +1,3 @@ +Here are three examples of useful server metrics, each covering a different critical aspect of server health: + +1. **CPU \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_088.txt b/gguf-tools/quality-testing/data/flash/continuations/case_088.txt new file mode 100644 index 00000000..8cbb0c4a --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_088.txt @@ -0,0 +1 @@ +This is an excellent question that gets to the heart of why tokenization is a critical, non-trivial step in modern \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_089.txt b/gguf-tools/quality-testing/data/flash/continuations/case_089.txt new file mode 100644 index 00000000..8be88027 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_089.txt @@ -0,0 +1 @@ +A hash table is a data structure that maps keys to values using a hash function. The hash function computes an index ( \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_090.txt b/gguf-tools/quality-testing/data/flash/continuations/case_090.txt new file mode 100644 index 00000000..6193d774 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_090.txt @@ -0,0 +1 @@ +This is a great question because calibration data is one of the most critical, yet often misunderstood, components of neural network quantization \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_091.txt b/gguf-tools/quality-testing/data/flash/continuations/case_091.txt new file mode 100644 index 00000000..a6c6dc4f --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_091.txt @@ -0,0 +1,3 @@ +Here is the best way to understand a confidence interval in plain language. + +Imagine you want to know the **average height** \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_092.txt b/gguf-tools/quality-testing/data/flash/continuations/case_092.txt new file mode 100644 index 00000000..e66b87cc --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_092.txt @@ -0,0 +1,4 @@ +Here's a simple SQL query that counts rows per category: + +```sql +SELECT category, COUNT(*) AS row_count diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_093.txt b/gguf-tools/quality-testing/data/flash/continuations/case_093.txt new file mode 100644 index 00000000..c0655d3b --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_093.txt @@ -0,0 +1,3 @@ +Here’s a clear explanation of why a page cache makes a second file read faster. + +### The Core Reason: Avoiding \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_094.txt b/gguf-tools/quality-testing/data/flash/continuations/case_094.txt new file mode 100644 index 00000000..e2b8f433 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_094.txt @@ -0,0 +1 @@ +Tokyo \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_095.txt b/gguf-tools/quality-testing/data/flash/continuations/case_095.txt new file mode 100644 index 00000000..28c419d2 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_095.txt @@ -0,0 +1 @@ +The derivative of \(x^2\) is \(2x\). \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_096.txt b/gguf-tools/quality-testing/data/flash/continuations/case_096.txt new file mode 100644 index 00000000..029817f1 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_096.txt @@ -0,0 +1 @@ +Dante Alighieri. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_097.txt b/gguf-tools/quality-testing/data/flash/continuations/case_097.txt new file mode 100644 index 00000000..fa29f53a --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_097.txt @@ -0,0 +1 @@ +La capitale del Giappone è Tokyo. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_098.txt b/gguf-tools/quality-testing/data/flash/continuations/case_098.txt new file mode 100644 index 00000000..8c1b88c2 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_098.txt @@ -0,0 +1 @@ +17 per 23 fa 391. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/continuations/case_099.txt b/gguf-tools/quality-testing/data/flash/continuations/case_099.txt new file mode 100644 index 00000000..29d6e5ca --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/continuations/case_099.txt @@ -0,0 +1 @@ +La Divina Commedia è stata scritta da Dante Alighieri. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/manifest.tsv b/gguf-tools/quality-testing/data/flash/manifest.tsv new file mode 100644 index 00000000..872d1ae7 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/manifest.tsv @@ -0,0 +1,101 @@ +# id prompt_file continuation_file response_file +case_000 gguf-tools/quality-testing/data/flash/prompts/case_000.txt gguf-tools/quality-testing/data/flash/continuations/case_000.txt gguf-tools/quality-testing/data/flash/responses/case_000.json +case_001 gguf-tools/quality-testing/data/flash/prompts/case_001.txt gguf-tools/quality-testing/data/flash/continuations/case_001.txt gguf-tools/quality-testing/data/flash/responses/case_001.json +case_002 gguf-tools/quality-testing/data/flash/prompts/case_002.txt gguf-tools/quality-testing/data/flash/continuations/case_002.txt gguf-tools/quality-testing/data/flash/responses/case_002.json +case_003 gguf-tools/quality-testing/data/flash/prompts/case_003.txt gguf-tools/quality-testing/data/flash/continuations/case_003.txt gguf-tools/quality-testing/data/flash/responses/case_003.json +case_004 gguf-tools/quality-testing/data/flash/prompts/case_004.txt gguf-tools/quality-testing/data/flash/continuations/case_004.txt gguf-tools/quality-testing/data/flash/responses/case_004.json +case_005 gguf-tools/quality-testing/data/flash/prompts/case_005.txt gguf-tools/quality-testing/data/flash/continuations/case_005.txt gguf-tools/quality-testing/data/flash/responses/case_005.json +case_006 gguf-tools/quality-testing/data/flash/prompts/case_006.txt gguf-tools/quality-testing/data/flash/continuations/case_006.txt gguf-tools/quality-testing/data/flash/responses/case_006.json +case_007 gguf-tools/quality-testing/data/flash/prompts/case_007.txt gguf-tools/quality-testing/data/flash/continuations/case_007.txt gguf-tools/quality-testing/data/flash/responses/case_007.json +case_008 gguf-tools/quality-testing/data/flash/prompts/case_008.txt gguf-tools/quality-testing/data/flash/continuations/case_008.txt gguf-tools/quality-testing/data/flash/responses/case_008.json +case_009 gguf-tools/quality-testing/data/flash/prompts/case_009.txt gguf-tools/quality-testing/data/flash/continuations/case_009.txt gguf-tools/quality-testing/data/flash/responses/case_009.json +case_010 gguf-tools/quality-testing/data/flash/prompts/case_010.txt gguf-tools/quality-testing/data/flash/continuations/case_010.txt gguf-tools/quality-testing/data/flash/responses/case_010.json +case_011 gguf-tools/quality-testing/data/flash/prompts/case_011.txt gguf-tools/quality-testing/data/flash/continuations/case_011.txt gguf-tools/quality-testing/data/flash/responses/case_011.json +case_012 gguf-tools/quality-testing/data/flash/prompts/case_012.txt gguf-tools/quality-testing/data/flash/continuations/case_012.txt gguf-tools/quality-testing/data/flash/responses/case_012.json +case_013 gguf-tools/quality-testing/data/flash/prompts/case_013.txt gguf-tools/quality-testing/data/flash/continuations/case_013.txt gguf-tools/quality-testing/data/flash/responses/case_013.json +case_014 gguf-tools/quality-testing/data/flash/prompts/case_014.txt gguf-tools/quality-testing/data/flash/continuations/case_014.txt gguf-tools/quality-testing/data/flash/responses/case_014.json +case_015 gguf-tools/quality-testing/data/flash/prompts/case_015.txt gguf-tools/quality-testing/data/flash/continuations/case_015.txt gguf-tools/quality-testing/data/flash/responses/case_015.json +case_016 gguf-tools/quality-testing/data/flash/prompts/case_016.txt gguf-tools/quality-testing/data/flash/continuations/case_016.txt gguf-tools/quality-testing/data/flash/responses/case_016.json +case_017 gguf-tools/quality-testing/data/flash/prompts/case_017.txt gguf-tools/quality-testing/data/flash/continuations/case_017.txt gguf-tools/quality-testing/data/flash/responses/case_017.json +case_018 gguf-tools/quality-testing/data/flash/prompts/case_018.txt gguf-tools/quality-testing/data/flash/continuations/case_018.txt gguf-tools/quality-testing/data/flash/responses/case_018.json +case_019 gguf-tools/quality-testing/data/flash/prompts/case_019.txt gguf-tools/quality-testing/data/flash/continuations/case_019.txt gguf-tools/quality-testing/data/flash/responses/case_019.json +case_020 gguf-tools/quality-testing/data/flash/prompts/case_020.txt gguf-tools/quality-testing/data/flash/continuations/case_020.txt gguf-tools/quality-testing/data/flash/responses/case_020.json +case_021 gguf-tools/quality-testing/data/flash/prompts/case_021.txt gguf-tools/quality-testing/data/flash/continuations/case_021.txt gguf-tools/quality-testing/data/flash/responses/case_021.json +case_022 gguf-tools/quality-testing/data/flash/prompts/case_022.txt gguf-tools/quality-testing/data/flash/continuations/case_022.txt gguf-tools/quality-testing/data/flash/responses/case_022.json +case_023 gguf-tools/quality-testing/data/flash/prompts/case_023.txt gguf-tools/quality-testing/data/flash/continuations/case_023.txt gguf-tools/quality-testing/data/flash/responses/case_023.json +case_024 gguf-tools/quality-testing/data/flash/prompts/case_024.txt gguf-tools/quality-testing/data/flash/continuations/case_024.txt gguf-tools/quality-testing/data/flash/responses/case_024.json +case_025 gguf-tools/quality-testing/data/flash/prompts/case_025.txt gguf-tools/quality-testing/data/flash/continuations/case_025.txt gguf-tools/quality-testing/data/flash/responses/case_025.json +case_026 gguf-tools/quality-testing/data/flash/prompts/case_026.txt gguf-tools/quality-testing/data/flash/continuations/case_026.txt gguf-tools/quality-testing/data/flash/responses/case_026.json +case_027 gguf-tools/quality-testing/data/flash/prompts/case_027.txt gguf-tools/quality-testing/data/flash/continuations/case_027.txt gguf-tools/quality-testing/data/flash/responses/case_027.json +case_028 gguf-tools/quality-testing/data/flash/prompts/case_028.txt gguf-tools/quality-testing/data/flash/continuations/case_028.txt gguf-tools/quality-testing/data/flash/responses/case_028.json +case_029 gguf-tools/quality-testing/data/flash/prompts/case_029.txt gguf-tools/quality-testing/data/flash/continuations/case_029.txt gguf-tools/quality-testing/data/flash/responses/case_029.json +case_030 gguf-tools/quality-testing/data/flash/prompts/case_030.txt gguf-tools/quality-testing/data/flash/continuations/case_030.txt gguf-tools/quality-testing/data/flash/responses/case_030.json +case_031 gguf-tools/quality-testing/data/flash/prompts/case_031.txt gguf-tools/quality-testing/data/flash/continuations/case_031.txt gguf-tools/quality-testing/data/flash/responses/case_031.json +case_032 gguf-tools/quality-testing/data/flash/prompts/case_032.txt gguf-tools/quality-testing/data/flash/continuations/case_032.txt gguf-tools/quality-testing/data/flash/responses/case_032.json +case_033 gguf-tools/quality-testing/data/flash/prompts/case_033.txt gguf-tools/quality-testing/data/flash/continuations/case_033.txt gguf-tools/quality-testing/data/flash/responses/case_033.json +case_034 gguf-tools/quality-testing/data/flash/prompts/case_034.txt gguf-tools/quality-testing/data/flash/continuations/case_034.txt gguf-tools/quality-testing/data/flash/responses/case_034.json +case_035 gguf-tools/quality-testing/data/flash/prompts/case_035.txt gguf-tools/quality-testing/data/flash/continuations/case_035.txt gguf-tools/quality-testing/data/flash/responses/case_035.json +case_036 gguf-tools/quality-testing/data/flash/prompts/case_036.txt gguf-tools/quality-testing/data/flash/continuations/case_036.txt gguf-tools/quality-testing/data/flash/responses/case_036.json +case_037 gguf-tools/quality-testing/data/flash/prompts/case_037.txt gguf-tools/quality-testing/data/flash/continuations/case_037.txt gguf-tools/quality-testing/data/flash/responses/case_037.json +case_038 gguf-tools/quality-testing/data/flash/prompts/case_038.txt gguf-tools/quality-testing/data/flash/continuations/case_038.txt gguf-tools/quality-testing/data/flash/responses/case_038.json +case_039 gguf-tools/quality-testing/data/flash/prompts/case_039.txt gguf-tools/quality-testing/data/flash/continuations/case_039.txt gguf-tools/quality-testing/data/flash/responses/case_039.json +case_040 gguf-tools/quality-testing/data/flash/prompts/case_040.txt gguf-tools/quality-testing/data/flash/continuations/case_040.txt gguf-tools/quality-testing/data/flash/responses/case_040.json +case_041 gguf-tools/quality-testing/data/flash/prompts/case_041.txt gguf-tools/quality-testing/data/flash/continuations/case_041.txt gguf-tools/quality-testing/data/flash/responses/case_041.json +case_042 gguf-tools/quality-testing/data/flash/prompts/case_042.txt gguf-tools/quality-testing/data/flash/continuations/case_042.txt gguf-tools/quality-testing/data/flash/responses/case_042.json +case_043 gguf-tools/quality-testing/data/flash/prompts/case_043.txt gguf-tools/quality-testing/data/flash/continuations/case_043.txt gguf-tools/quality-testing/data/flash/responses/case_043.json +case_044 gguf-tools/quality-testing/data/flash/prompts/case_044.txt gguf-tools/quality-testing/data/flash/continuations/case_044.txt gguf-tools/quality-testing/data/flash/responses/case_044.json +case_045 gguf-tools/quality-testing/data/flash/prompts/case_045.txt gguf-tools/quality-testing/data/flash/continuations/case_045.txt gguf-tools/quality-testing/data/flash/responses/case_045.json +case_046 gguf-tools/quality-testing/data/flash/prompts/case_046.txt gguf-tools/quality-testing/data/flash/continuations/case_046.txt gguf-tools/quality-testing/data/flash/responses/case_046.json +case_047 gguf-tools/quality-testing/data/flash/prompts/case_047.txt gguf-tools/quality-testing/data/flash/continuations/case_047.txt gguf-tools/quality-testing/data/flash/responses/case_047.json +case_048 gguf-tools/quality-testing/data/flash/prompts/case_048.txt gguf-tools/quality-testing/data/flash/continuations/case_048.txt gguf-tools/quality-testing/data/flash/responses/case_048.json +case_049 gguf-tools/quality-testing/data/flash/prompts/case_049.txt gguf-tools/quality-testing/data/flash/continuations/case_049.txt gguf-tools/quality-testing/data/flash/responses/case_049.json +case_050 gguf-tools/quality-testing/data/flash/prompts/case_050.txt gguf-tools/quality-testing/data/flash/continuations/case_050.txt gguf-tools/quality-testing/data/flash/responses/case_050.json +case_051 gguf-tools/quality-testing/data/flash/prompts/case_051.txt gguf-tools/quality-testing/data/flash/continuations/case_051.txt gguf-tools/quality-testing/data/flash/responses/case_051.json +case_052 gguf-tools/quality-testing/data/flash/prompts/case_052.txt gguf-tools/quality-testing/data/flash/continuations/case_052.txt gguf-tools/quality-testing/data/flash/responses/case_052.json +case_053 gguf-tools/quality-testing/data/flash/prompts/case_053.txt gguf-tools/quality-testing/data/flash/continuations/case_053.txt gguf-tools/quality-testing/data/flash/responses/case_053.json +case_054 gguf-tools/quality-testing/data/flash/prompts/case_054.txt gguf-tools/quality-testing/data/flash/continuations/case_054.txt gguf-tools/quality-testing/data/flash/responses/case_054.json +case_055 gguf-tools/quality-testing/data/flash/prompts/case_055.txt gguf-tools/quality-testing/data/flash/continuations/case_055.txt gguf-tools/quality-testing/data/flash/responses/case_055.json +case_056 gguf-tools/quality-testing/data/flash/prompts/case_056.txt gguf-tools/quality-testing/data/flash/continuations/case_056.txt gguf-tools/quality-testing/data/flash/responses/case_056.json +case_057 gguf-tools/quality-testing/data/flash/prompts/case_057.txt gguf-tools/quality-testing/data/flash/continuations/case_057.txt gguf-tools/quality-testing/data/flash/responses/case_057.json +case_058 gguf-tools/quality-testing/data/flash/prompts/case_058.txt gguf-tools/quality-testing/data/flash/continuations/case_058.txt gguf-tools/quality-testing/data/flash/responses/case_058.json +case_059 gguf-tools/quality-testing/data/flash/prompts/case_059.txt gguf-tools/quality-testing/data/flash/continuations/case_059.txt gguf-tools/quality-testing/data/flash/responses/case_059.json +case_060 gguf-tools/quality-testing/data/flash/prompts/case_060.txt gguf-tools/quality-testing/data/flash/continuations/case_060.txt gguf-tools/quality-testing/data/flash/responses/case_060.json +case_061 gguf-tools/quality-testing/data/flash/prompts/case_061.txt gguf-tools/quality-testing/data/flash/continuations/case_061.txt gguf-tools/quality-testing/data/flash/responses/case_061.json +case_062 gguf-tools/quality-testing/data/flash/prompts/case_062.txt gguf-tools/quality-testing/data/flash/continuations/case_062.txt gguf-tools/quality-testing/data/flash/responses/case_062.json +case_063 gguf-tools/quality-testing/data/flash/prompts/case_063.txt gguf-tools/quality-testing/data/flash/continuations/case_063.txt gguf-tools/quality-testing/data/flash/responses/case_063.json +case_064 gguf-tools/quality-testing/data/flash/prompts/case_064.txt gguf-tools/quality-testing/data/flash/continuations/case_064.txt gguf-tools/quality-testing/data/flash/responses/case_064.json +case_065 gguf-tools/quality-testing/data/flash/prompts/case_065.txt gguf-tools/quality-testing/data/flash/continuations/case_065.txt gguf-tools/quality-testing/data/flash/responses/case_065.json +case_066 gguf-tools/quality-testing/data/flash/prompts/case_066.txt gguf-tools/quality-testing/data/flash/continuations/case_066.txt gguf-tools/quality-testing/data/flash/responses/case_066.json +case_067 gguf-tools/quality-testing/data/flash/prompts/case_067.txt gguf-tools/quality-testing/data/flash/continuations/case_067.txt gguf-tools/quality-testing/data/flash/responses/case_067.json +case_068 gguf-tools/quality-testing/data/flash/prompts/case_068.txt gguf-tools/quality-testing/data/flash/continuations/case_068.txt gguf-tools/quality-testing/data/flash/responses/case_068.json +case_069 gguf-tools/quality-testing/data/flash/prompts/case_069.txt gguf-tools/quality-testing/data/flash/continuations/case_069.txt gguf-tools/quality-testing/data/flash/responses/case_069.json +case_070 gguf-tools/quality-testing/data/flash/prompts/case_070.txt gguf-tools/quality-testing/data/flash/continuations/case_070.txt gguf-tools/quality-testing/data/flash/responses/case_070.json +case_071 gguf-tools/quality-testing/data/flash/prompts/case_071.txt gguf-tools/quality-testing/data/flash/continuations/case_071.txt gguf-tools/quality-testing/data/flash/responses/case_071.json +case_072 gguf-tools/quality-testing/data/flash/prompts/case_072.txt gguf-tools/quality-testing/data/flash/continuations/case_072.txt gguf-tools/quality-testing/data/flash/responses/case_072.json +case_073 gguf-tools/quality-testing/data/flash/prompts/case_073.txt gguf-tools/quality-testing/data/flash/continuations/case_073.txt gguf-tools/quality-testing/data/flash/responses/case_073.json +case_074 gguf-tools/quality-testing/data/flash/prompts/case_074.txt gguf-tools/quality-testing/data/flash/continuations/case_074.txt gguf-tools/quality-testing/data/flash/responses/case_074.json +case_075 gguf-tools/quality-testing/data/flash/prompts/case_075.txt gguf-tools/quality-testing/data/flash/continuations/case_075.txt gguf-tools/quality-testing/data/flash/responses/case_075.json +case_076 gguf-tools/quality-testing/data/flash/prompts/case_076.txt gguf-tools/quality-testing/data/flash/continuations/case_076.txt gguf-tools/quality-testing/data/flash/responses/case_076.json +case_077 gguf-tools/quality-testing/data/flash/prompts/case_077.txt gguf-tools/quality-testing/data/flash/continuations/case_077.txt gguf-tools/quality-testing/data/flash/responses/case_077.json +case_078 gguf-tools/quality-testing/data/flash/prompts/case_078.txt gguf-tools/quality-testing/data/flash/continuations/case_078.txt gguf-tools/quality-testing/data/flash/responses/case_078.json +case_079 gguf-tools/quality-testing/data/flash/prompts/case_079.txt gguf-tools/quality-testing/data/flash/continuations/case_079.txt gguf-tools/quality-testing/data/flash/responses/case_079.json +case_080 gguf-tools/quality-testing/data/flash/prompts/case_080.txt gguf-tools/quality-testing/data/flash/continuations/case_080.txt gguf-tools/quality-testing/data/flash/responses/case_080.json +case_081 gguf-tools/quality-testing/data/flash/prompts/case_081.txt gguf-tools/quality-testing/data/flash/continuations/case_081.txt gguf-tools/quality-testing/data/flash/responses/case_081.json +case_082 gguf-tools/quality-testing/data/flash/prompts/case_082.txt gguf-tools/quality-testing/data/flash/continuations/case_082.txt gguf-tools/quality-testing/data/flash/responses/case_082.json +case_083 gguf-tools/quality-testing/data/flash/prompts/case_083.txt gguf-tools/quality-testing/data/flash/continuations/case_083.txt gguf-tools/quality-testing/data/flash/responses/case_083.json +case_084 gguf-tools/quality-testing/data/flash/prompts/case_084.txt gguf-tools/quality-testing/data/flash/continuations/case_084.txt gguf-tools/quality-testing/data/flash/responses/case_084.json +case_085 gguf-tools/quality-testing/data/flash/prompts/case_085.txt gguf-tools/quality-testing/data/flash/continuations/case_085.txt gguf-tools/quality-testing/data/flash/responses/case_085.json +case_086 gguf-tools/quality-testing/data/flash/prompts/case_086.txt gguf-tools/quality-testing/data/flash/continuations/case_086.txt gguf-tools/quality-testing/data/flash/responses/case_086.json +case_087 gguf-tools/quality-testing/data/flash/prompts/case_087.txt gguf-tools/quality-testing/data/flash/continuations/case_087.txt gguf-tools/quality-testing/data/flash/responses/case_087.json +case_088 gguf-tools/quality-testing/data/flash/prompts/case_088.txt gguf-tools/quality-testing/data/flash/continuations/case_088.txt gguf-tools/quality-testing/data/flash/responses/case_088.json +case_089 gguf-tools/quality-testing/data/flash/prompts/case_089.txt gguf-tools/quality-testing/data/flash/continuations/case_089.txt gguf-tools/quality-testing/data/flash/responses/case_089.json +case_090 gguf-tools/quality-testing/data/flash/prompts/case_090.txt gguf-tools/quality-testing/data/flash/continuations/case_090.txt gguf-tools/quality-testing/data/flash/responses/case_090.json +case_091 gguf-tools/quality-testing/data/flash/prompts/case_091.txt gguf-tools/quality-testing/data/flash/continuations/case_091.txt gguf-tools/quality-testing/data/flash/responses/case_091.json +case_092 gguf-tools/quality-testing/data/flash/prompts/case_092.txt gguf-tools/quality-testing/data/flash/continuations/case_092.txt gguf-tools/quality-testing/data/flash/responses/case_092.json +case_093 gguf-tools/quality-testing/data/flash/prompts/case_093.txt gguf-tools/quality-testing/data/flash/continuations/case_093.txt gguf-tools/quality-testing/data/flash/responses/case_093.json +case_094 gguf-tools/quality-testing/data/flash/prompts/case_094.txt gguf-tools/quality-testing/data/flash/continuations/case_094.txt gguf-tools/quality-testing/data/flash/responses/case_094.json +case_095 gguf-tools/quality-testing/data/flash/prompts/case_095.txt gguf-tools/quality-testing/data/flash/continuations/case_095.txt gguf-tools/quality-testing/data/flash/responses/case_095.json +case_096 gguf-tools/quality-testing/data/flash/prompts/case_096.txt gguf-tools/quality-testing/data/flash/continuations/case_096.txt gguf-tools/quality-testing/data/flash/responses/case_096.json +case_097 gguf-tools/quality-testing/data/flash/prompts/case_097.txt gguf-tools/quality-testing/data/flash/continuations/case_097.txt gguf-tools/quality-testing/data/flash/responses/case_097.json +case_098 gguf-tools/quality-testing/data/flash/prompts/case_098.txt gguf-tools/quality-testing/data/flash/continuations/case_098.txt gguf-tools/quality-testing/data/flash/responses/case_098.json +case_099 gguf-tools/quality-testing/data/flash/prompts/case_099.txt gguf-tools/quality-testing/data/flash/continuations/case_099.txt gguf-tools/quality-testing/data/flash/responses/case_099.json diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_000.txt b/gguf-tools/quality-testing/data/flash/prompts/case_000.txt new file mode 100644 index 00000000..7526d8a0 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_000.txt @@ -0,0 +1 @@ +Explain B-tree insertion, including splits and the root special case. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_001.txt b/gguf-tools/quality-testing/data/flash/prompts/case_001.txt new file mode 100644 index 00000000..65920ce3 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_001.txt @@ -0,0 +1 @@ +Write a concise design for a TCP echo server that handles slow clients. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_002.txt b/gguf-tools/quality-testing/data/flash/prompts/case_002.txt new file mode 100644 index 00000000..bcbaaa26 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_002.txt @@ -0,0 +1 @@ +Compare mmaped model weights with copying all weights into private buffers on macOS. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_003.txt b/gguf-tools/quality-testing/data/flash/prompts/case_003.txt new file mode 100644 index 00000000..42bcd965 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_003.txt @@ -0,0 +1 @@ +Derive why RMSNorm needs a sum of squares and a scaling pass. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_004.txt b/gguf-tools/quality-testing/data/flash/prompts/case_004.txt new file mode 100644 index 00000000..a96d8139 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_004.txt @@ -0,0 +1 @@ +Explain why KV cache checkpointing helps agentic sessions. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_005.txt b/gguf-tools/quality-testing/data/flash/prompts/case_005.txt new file mode 100644 index 00000000..a8f9b3ea --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_005.txt @@ -0,0 +1 @@ +Give pseudocode for a binary heap push operation. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_006.txt b/gguf-tools/quality-testing/data/flash/prompts/case_006.txt new file mode 100644 index 00000000..86fe5a90 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_006.txt @@ -0,0 +1 @@ +What are the tradeoffs between top-p sampling and temperature zero decoding? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_007.txt b/gguf-tools/quality-testing/data/flash/prompts/case_007.txt new file mode 100644 index 00000000..ec32e838 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_007.txt @@ -0,0 +1 @@ +Summarize how speculative decoding preserves exact greedy output. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_008.txt b/gguf-tools/quality-testing/data/flash/prompts/case_008.txt new file mode 100644 index 00000000..164b9b05 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_008.txt @@ -0,0 +1 @@ +Explain why a GPU prefill path can be faster than single-token decode. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_009.txt b/gguf-tools/quality-testing/data/flash/prompts/case_009.txt new file mode 100644 index 00000000..5a805842 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_009.txt @@ -0,0 +1 @@ +Write three invariants for a tokenizer special-token table. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_010.txt b/gguf-tools/quality-testing/data/flash/prompts/case_010.txt new file mode 100644 index 00000000..8510e270 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_010.txt @@ -0,0 +1 @@ +Spiega come funziona l'inserimento in un B-tree, inclusi split e radice. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_011.txt b/gguf-tools/quality-testing/data/flash/prompts/case_011.txt new file mode 100644 index 00000000..c9e6b9c6 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_011.txt @@ -0,0 +1 @@ +Scrivi un progetto conciso per un server TCP echo con client lenti. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_012.txt b/gguf-tools/quality-testing/data/flash/prompts/case_012.txt new file mode 100644 index 00000000..4525b6f0 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_012.txt @@ -0,0 +1 @@ +Confronta mmap dei pesi e copia completa dei pesi su macOS. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_013.txt b/gguf-tools/quality-testing/data/flash/prompts/case_013.txt new file mode 100644 index 00000000..1cd6b887 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_013.txt @@ -0,0 +1 @@ +Deriva perche RMSNorm richiede somma dei quadrati e riscalamento. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_014.txt b/gguf-tools/quality-testing/data/flash/prompts/case_014.txt new file mode 100644 index 00000000..91517a1b --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_014.txt @@ -0,0 +1 @@ +Spiega perche la cache KV su disco aiuta nelle sessioni agentiche. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_015.txt b/gguf-tools/quality-testing/data/flash/prompts/case_015.txt new file mode 100644 index 00000000..e9e1c5b3 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_015.txt @@ -0,0 +1 @@ +Scrivi pseudocodice per inserire un elemento in un heap binario. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_016.txt b/gguf-tools/quality-testing/data/flash/prompts/case_016.txt new file mode 100644 index 00000000..14cee2bb --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_016.txt @@ -0,0 +1 @@ +Quali sono i pro e contro di top-p rispetto a temperatura zero? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_017.txt b/gguf-tools/quality-testing/data/flash/prompts/case_017.txt new file mode 100644 index 00000000..044719fa --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_017.txt @@ -0,0 +1 @@ +Riassumi perche la decodifica speculativa puo mantenere l'output esatto. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_018.txt b/gguf-tools/quality-testing/data/flash/prompts/case_018.txt new file mode 100644 index 00000000..559ac51f --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_018.txt @@ -0,0 +1 @@ +Spiega perche il prefill GPU puo essere piu veloce del decode token singolo. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_019.txt b/gguf-tools/quality-testing/data/flash/prompts/case_019.txt new file mode 100644 index 00000000..512a141b --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_019.txt @@ -0,0 +1 @@ +Scrivi tre invarianti per una tabella di token speciali. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_020.txt b/gguf-tools/quality-testing/data/flash/prompts/case_020.txt new file mode 100644 index 00000000..80f7e852 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_020.txt @@ -0,0 +1 @@ +Given a sorted array, describe how binary search finds the insertion point. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_021.txt b/gguf-tools/quality-testing/data/flash/prompts/case_021.txt new file mode 100644 index 00000000..f19c92e0 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_021.txt @@ -0,0 +1 @@ +Write a short C function that clamps an integer to a range. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_022.txt b/gguf-tools/quality-testing/data/flash/prompts/case_022.txt new file mode 100644 index 00000000..f370b6c0 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_022.txt @@ -0,0 +1 @@ +Explain the difference between a mutex and an atomic counter. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_023.txt b/gguf-tools/quality-testing/data/flash/prompts/case_023.txt new file mode 100644 index 00000000..7619c8f4 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_023.txt @@ -0,0 +1 @@ +What does backpressure mean in a network server? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_024.txt b/gguf-tools/quality-testing/data/flash/prompts/case_024.txt new file mode 100644 index 00000000..9eb78568 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_024.txt @@ -0,0 +1 @@ +Describe a safe format for storing a model checkpoint header. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_025.txt b/gguf-tools/quality-testing/data/flash/prompts/case_025.txt new file mode 100644 index 00000000..6fc2ef4d --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_025.txt @@ -0,0 +1 @@ +Explain how a ring buffer wraps and how to avoid overwriting unread data. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_026.txt b/gguf-tools/quality-testing/data/flash/prompts/case_026.txt new file mode 100644 index 00000000..4b77de18 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_026.txt @@ -0,0 +1 @@ +Write a brief plan for testing long-context prompt chunking. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_027.txt b/gguf-tools/quality-testing/data/flash/prompts/case_027.txt new file mode 100644 index 00000000..fe16504b --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_027.txt @@ -0,0 +1 @@ +What is an importance matrix in low-bit quantization? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_028.txt b/gguf-tools/quality-testing/data/flash/prompts/case_028.txt new file mode 100644 index 00000000..6a256f6f --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_028.txt @@ -0,0 +1 @@ +Explain why grouped MoE expert execution can improve prefill. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_029.txt b/gguf-tools/quality-testing/data/flash/prompts/case_029.txt new file mode 100644 index 00000000..dd5b4701 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_029.txt @@ -0,0 +1 @@ +Describe how to compare two model quantizations without relying on one answer. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_030.txt b/gguf-tools/quality-testing/data/flash/prompts/case_030.txt new file mode 100644 index 00000000..cf75cdb5 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_030.txt @@ -0,0 +1 @@ +Data una lista ordinata, descrivi la ricerca binaria del punto di inserimento. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_031.txt b/gguf-tools/quality-testing/data/flash/prompts/case_031.txt new file mode 100644 index 00000000..eaa1001f --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_031.txt @@ -0,0 +1 @@ +Scrivi una breve funzione C che limita un intero a un intervallo. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_032.txt b/gguf-tools/quality-testing/data/flash/prompts/case_032.txt new file mode 100644 index 00000000..7a48fb71 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_032.txt @@ -0,0 +1 @@ +Spiega la differenza tra mutex e contatore atomico. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_033.txt b/gguf-tools/quality-testing/data/flash/prompts/case_033.txt new file mode 100644 index 00000000..d1b8eb72 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_033.txt @@ -0,0 +1 @@ +Che cosa significa backpressure in un server di rete? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_034.txt b/gguf-tools/quality-testing/data/flash/prompts/case_034.txt new file mode 100644 index 00000000..2726bcc0 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_034.txt @@ -0,0 +1 @@ +Descrivi un formato sicuro per salvare l'header di un checkpoint modello. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_035.txt b/gguf-tools/quality-testing/data/flash/prompts/case_035.txt new file mode 100644 index 00000000..c5eef1c0 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_035.txt @@ -0,0 +1 @@ +Spiega come funziona un ring buffer e come evitare sovrascritture. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_036.txt b/gguf-tools/quality-testing/data/flash/prompts/case_036.txt new file mode 100644 index 00000000..782faa0b --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_036.txt @@ -0,0 +1 @@ +Scrivi un piano breve per testare il chunking di prompt lunghi. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_037.txt b/gguf-tools/quality-testing/data/flash/prompts/case_037.txt new file mode 100644 index 00000000..be05c185 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_037.txt @@ -0,0 +1 @@ +Che cos'e una matrice di importanza nella quantizzazione low-bit? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_038.txt b/gguf-tools/quality-testing/data/flash/prompts/case_038.txt new file mode 100644 index 00000000..4865cad3 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_038.txt @@ -0,0 +1 @@ +Spiega perche raggruppare gli esperti MoE puo accelerare il prefill. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_039.txt b/gguf-tools/quality-testing/data/flash/prompts/case_039.txt new file mode 100644 index 00000000..0a1df1b5 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_039.txt @@ -0,0 +1 @@ +Descrivi come confrontare due quantizzazioni senza fidarsi di una sola risposta. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_040.txt b/gguf-tools/quality-testing/data/flash/prompts/case_040.txt new file mode 100644 index 00000000..4373f361 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_040.txt @@ -0,0 +1 @@ +A user reports generation slows at long context. List the first five measurements to take. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_041.txt b/gguf-tools/quality-testing/data/flash/prompts/case_041.txt new file mode 100644 index 00000000..d81966bc --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_041.txt @@ -0,0 +1 @@ +Why can small logit differences change a greedy continuation? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_042.txt b/gguf-tools/quality-testing/data/flash/prompts/case_042.txt new file mode 100644 index 00000000..97c996e2 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_042.txt @@ -0,0 +1 @@ +Explain online softmax in attention using simple variables. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_043.txt b/gguf-tools/quality-testing/data/flash/prompts/case_043.txt new file mode 100644 index 00000000..42e865cd --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_043.txt @@ -0,0 +1 @@ +Give a minimal JSON schema for a tool call with name and arguments. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_044.txt b/gguf-tools/quality-testing/data/flash/prompts/case_044.txt new file mode 100644 index 00000000..c0a701c6 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_044.txt @@ -0,0 +1 @@ +How would you test that a file-backed mmap is not repeatedly remapped? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_045.txt b/gguf-tools/quality-testing/data/flash/prompts/case_045.txt new file mode 100644 index 00000000..d666613f --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_045.txt @@ -0,0 +1 @@ +Explain why one large Metal buffer can be worse than multiple overlapping views. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_046.txt b/gguf-tools/quality-testing/data/flash/prompts/case_046.txt new file mode 100644 index 00000000..bbd9ddbe --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_046.txt @@ -0,0 +1 @@ +What is the role of a router in a mixture-of-experts layer? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_047.txt b/gguf-tools/quality-testing/data/flash/prompts/case_047.txt new file mode 100644 index 00000000..6b95b96f --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_047.txt @@ -0,0 +1 @@ +Describe the difference between raw KV rows and compressed KV rows. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_048.txt b/gguf-tools/quality-testing/data/flash/prompts/case_048.txt new file mode 100644 index 00000000..18d0166a --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_048.txt @@ -0,0 +1 @@ +Write a checklist for validating that a quantized model still follows instructions. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_049.txt b/gguf-tools/quality-testing/data/flash/prompts/case_049.txt new file mode 100644 index 00000000..9fd69a07 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_049.txt @@ -0,0 +1 @@ +Explain why evaluating 50 prompts is more informative than one favorite prompt. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_050.txt b/gguf-tools/quality-testing/data/flash/prompts/case_050.txt new file mode 100644 index 00000000..25a1014a --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_050.txt @@ -0,0 +1 @@ +Un utente segnala decode lento a contesto lungo. Elenca cinque misure iniziali. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_051.txt b/gguf-tools/quality-testing/data/flash/prompts/case_051.txt new file mode 100644 index 00000000..5d3f770c --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_051.txt @@ -0,0 +1 @@ +Perche piccole differenze nei logit possono cambiare una continuazione greedy? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_052.txt b/gguf-tools/quality-testing/data/flash/prompts/case_052.txt new file mode 100644 index 00000000..0f5aeca8 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_052.txt @@ -0,0 +1 @@ +Spiega online softmax nell'attenzione con variabili semplici. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_053.txt b/gguf-tools/quality-testing/data/flash/prompts/case_053.txt new file mode 100644 index 00000000..ddc5cf21 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_053.txt @@ -0,0 +1 @@ +Dai uno schema JSON minimo per una tool call con nome e argomenti. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_054.txt b/gguf-tools/quality-testing/data/flash/prompts/case_054.txt new file mode 100644 index 00000000..9a16287a --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_054.txt @@ -0,0 +1 @@ +Come testeresti che un mmap su file non venga rimappato ripetutamente? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_055.txt b/gguf-tools/quality-testing/data/flash/prompts/case_055.txt new file mode 100644 index 00000000..4a50bb35 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_055.txt @@ -0,0 +1 @@ +Spiega perche un grande buffer Metal puo essere peggiore di viste sovrapposte. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_056.txt b/gguf-tools/quality-testing/data/flash/prompts/case_056.txt new file mode 100644 index 00000000..8e6fc52b --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_056.txt @@ -0,0 +1 @@ +Qual e il ruolo del router in un layer mixture-of-experts? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_057.txt b/gguf-tools/quality-testing/data/flash/prompts/case_057.txt new file mode 100644 index 00000000..9a45410a --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_057.txt @@ -0,0 +1 @@ +Descrivi la differenza tra righe KV raw e righe KV compresse. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_058.txt b/gguf-tools/quality-testing/data/flash/prompts/case_058.txt new file mode 100644 index 00000000..b8abe7f2 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_058.txt @@ -0,0 +1 @@ +Scrivi una checklist per validare che un modello quantizzato segua ancora le istruzioni. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_059.txt b/gguf-tools/quality-testing/data/flash/prompts/case_059.txt new file mode 100644 index 00000000..ea977c12 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_059.txt @@ -0,0 +1 @@ +Perche valutare 50 prompt e piu utile di un singolo prompt preferito? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_060.txt b/gguf-tools/quality-testing/data/flash/prompts/case_060.txt new file mode 100644 index 00000000..c21dbbcd --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_060.txt @@ -0,0 +1 @@ +Write a tiny Python function that returns the median of three numbers. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_061.txt b/gguf-tools/quality-testing/data/flash/prompts/case_061.txt new file mode 100644 index 00000000..9ae462a0 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_061.txt @@ -0,0 +1 @@ +Explain why sorted arrays make membership tests faster with binary search. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_062.txt b/gguf-tools/quality-testing/data/flash/prompts/case_062.txt new file mode 100644 index 00000000..fbcfbffe --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_062.txt @@ -0,0 +1 @@ +What does eventual consistency mean in a distributed database? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_063.txt b/gguf-tools/quality-testing/data/flash/prompts/case_063.txt new file mode 100644 index 00000000..0a0502d3 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_063.txt @@ -0,0 +1 @@ +Give a short example of a race condition in C. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_064.txt b/gguf-tools/quality-testing/data/flash/prompts/case_064.txt new file mode 100644 index 00000000..6025a79d --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_064.txt @@ -0,0 +1 @@ +Explain the difference between latency and throughput. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_065.txt b/gguf-tools/quality-testing/data/flash/prompts/case_065.txt new file mode 100644 index 00000000..8105b8d3 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_065.txt @@ -0,0 +1 @@ +How does a trie represent a set of strings? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_066.txt b/gguf-tools/quality-testing/data/flash/prompts/case_066.txt new file mode 100644 index 00000000..25988531 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_066.txt @@ -0,0 +1 @@ +Describe how to test a command-line parser with edge cases. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_067.txt b/gguf-tools/quality-testing/data/flash/prompts/case_067.txt new file mode 100644 index 00000000..d0a700a0 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_067.txt @@ -0,0 +1 @@ +Why can mmap page residency differ from virtual address space size? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_068.txt b/gguf-tools/quality-testing/data/flash/prompts/case_068.txt new file mode 100644 index 00000000..6e5cc7d7 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_068.txt @@ -0,0 +1 @@ +Explain why quantization error can affect rare experts more than common experts. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_069.txt b/gguf-tools/quality-testing/data/flash/prompts/case_069.txt new file mode 100644 index 00000000..a29e29fc --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_069.txt @@ -0,0 +1 @@ +Write a short checklist for reviewing a pull request that touches memory lifetimes. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_070.txt b/gguf-tools/quality-testing/data/flash/prompts/case_070.txt new file mode 100644 index 00000000..1a691981 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_070.txt @@ -0,0 +1 @@ +Scrivi una piccola funzione Python che restituisce la mediana di tre numeri. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_071.txt b/gguf-tools/quality-testing/data/flash/prompts/case_071.txt new file mode 100644 index 00000000..c331eff0 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_071.txt @@ -0,0 +1 @@ +Spiega perche array ordinati rendono piu veloce la ricerca di appartenenza. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_072.txt b/gguf-tools/quality-testing/data/flash/prompts/case_072.txt new file mode 100644 index 00000000..a3eb8d67 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_072.txt @@ -0,0 +1 @@ +Che cosa significa consistenza eventuale in un database distribuito? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_073.txt b/gguf-tools/quality-testing/data/flash/prompts/case_073.txt new file mode 100644 index 00000000..ca5fa09a --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_073.txt @@ -0,0 +1 @@ +Fai un breve esempio di race condition in C. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_074.txt b/gguf-tools/quality-testing/data/flash/prompts/case_074.txt new file mode 100644 index 00000000..a63df710 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_074.txt @@ -0,0 +1 @@ +Spiega la differenza tra latenza e throughput. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_075.txt b/gguf-tools/quality-testing/data/flash/prompts/case_075.txt new file mode 100644 index 00000000..abfa5f00 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_075.txt @@ -0,0 +1 @@ +Come rappresenta un trie un insieme di stringhe? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_076.txt b/gguf-tools/quality-testing/data/flash/prompts/case_076.txt new file mode 100644 index 00000000..314ccd6c --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_076.txt @@ -0,0 +1 @@ +Descrivi come testare un parser da riga di comando con casi limite. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_077.txt b/gguf-tools/quality-testing/data/flash/prompts/case_077.txt new file mode 100644 index 00000000..7ab7bdbc --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_077.txt @@ -0,0 +1 @@ +Perche la residenza delle pagine mmap puo differire dalla dimensione virtuale? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_078.txt b/gguf-tools/quality-testing/data/flash/prompts/case_078.txt new file mode 100644 index 00000000..c2d0f41c --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_078.txt @@ -0,0 +1 @@ +Spiega perche l'errore di quantizzazione puo colpire piu gli esperti rari. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_079.txt b/gguf-tools/quality-testing/data/flash/prompts/case_079.txt new file mode 100644 index 00000000..7fd0d07a --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_079.txt @@ -0,0 +1 @@ +Scrivi una breve checklist per revisionare lifetime di memoria in una PR. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_080.txt b/gguf-tools/quality-testing/data/flash/prompts/case_080.txt new file mode 100644 index 00000000..edfa9951 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_080.txt @@ -0,0 +1 @@ +Complete this sentence: A good benchmark should measure \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_081.txt b/gguf-tools/quality-testing/data/flash/prompts/case_081.txt new file mode 100644 index 00000000..421acd9a --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_081.txt @@ -0,0 +1 @@ +Complete this C comment: /* This lock protects \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_082.txt b/gguf-tools/quality-testing/data/flash/prompts/case_082.txt new file mode 100644 index 00000000..70182d1f --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_082.txt @@ -0,0 +1 @@ +Complete this Italian sentence: Il vantaggio principale della cache e \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_083.txt b/gguf-tools/quality-testing/data/flash/prompts/case_083.txt new file mode 100644 index 00000000..8c2e4336 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_083.txt @@ -0,0 +1 @@ +Translate to Italian: The model should answer only after reading the whole prompt. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_084.txt b/gguf-tools/quality-testing/data/flash/prompts/case_084.txt new file mode 100644 index 00000000..c4694b09 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_084.txt @@ -0,0 +1 @@ +Translate to English: La quantizzazione riduce memoria ma puo alterare i logit. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_085.txt b/gguf-tools/quality-testing/data/flash/prompts/case_085.txt new file mode 100644 index 00000000..9af90194 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_085.txt @@ -0,0 +1 @@ +In one paragraph, explain how a compiler uses an abstract syntax tree. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_086.txt b/gguf-tools/quality-testing/data/flash/prompts/case_086.txt new file mode 100644 index 00000000..7127dabf --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_086.txt @@ -0,0 +1 @@ +In one paragraph, explain why checksums catch accidental corruption. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_087.txt b/gguf-tools/quality-testing/data/flash/prompts/case_087.txt new file mode 100644 index 00000000..f6976ef6 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_087.txt @@ -0,0 +1 @@ +Give three examples of useful server metrics. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_088.txt b/gguf-tools/quality-testing/data/flash/prompts/case_088.txt new file mode 100644 index 00000000..77c18b30 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_088.txt @@ -0,0 +1 @@ +Why should a tokenizer treat special tags carefully? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_089.txt b/gguf-tools/quality-testing/data/flash/prompts/case_089.txt new file mode 100644 index 00000000..cee35cf4 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_089.txt @@ -0,0 +1 @@ +Explain how a hash table handles collisions. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_090.txt b/gguf-tools/quality-testing/data/flash/prompts/case_090.txt new file mode 100644 index 00000000..87d651d2 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_090.txt @@ -0,0 +1 @@ +Describe the role of calibration data when quantizing a neural network. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_091.txt b/gguf-tools/quality-testing/data/flash/prompts/case_091.txt new file mode 100644 index 00000000..47ed4494 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_091.txt @@ -0,0 +1 @@ +What is a confidence interval, in plain language? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_092.txt b/gguf-tools/quality-testing/data/flash/prompts/case_092.txt new file mode 100644 index 00000000..27373eb3 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_092.txt @@ -0,0 +1 @@ +Write a simple SQL query that counts rows per category. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_093.txt b/gguf-tools/quality-testing/data/flash/prompts/case_093.txt new file mode 100644 index 00000000..6b664ad3 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_093.txt @@ -0,0 +1 @@ +Explain why a page cache can make a second file read faster. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_094.txt b/gguf-tools/quality-testing/data/flash/prompts/case_094.txt new file mode 100644 index 00000000..1949e7bb --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_094.txt @@ -0,0 +1 @@ +Give a short answer: what is the capital of Japan? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_095.txt b/gguf-tools/quality-testing/data/flash/prompts/case_095.txt new file mode 100644 index 00000000..5b90deb7 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_095.txt @@ -0,0 +1 @@ +Give a short answer: what is the derivative of x squared? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_096.txt b/gguf-tools/quality-testing/data/flash/prompts/case_096.txt new file mode 100644 index 00000000..ba72dc46 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_096.txt @@ -0,0 +1 @@ +Give a short answer: who wrote The Divine Comedy? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_097.txt b/gguf-tools/quality-testing/data/flash/prompts/case_097.txt new file mode 100644 index 00000000..2d0af1eb --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_097.txt @@ -0,0 +1 @@ +Rispondi brevemente: qual e la capitale del Giappone? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_098.txt b/gguf-tools/quality-testing/data/flash/prompts/case_098.txt new file mode 100644 index 00000000..48775174 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_098.txt @@ -0,0 +1 @@ +Rispondi brevemente: quanto fa 17 per 23? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/prompts/case_099.txt b/gguf-tools/quality-testing/data/flash/prompts/case_099.txt new file mode 100644 index 00000000..a3fdbcc8 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/prompts/case_099.txt @@ -0,0 +1 @@ +Rispondi brevemente: chi ha scritto la Divina Commedia? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/flash/responses/case_000.json b/gguf-tools/quality-testing/data/flash/responses/case_000.json new file mode 100644 index 00000000..f77b1984 --- /dev/null +++ b/gguf-tools/quality-testing/data/flash/responses/case_000.json @@ -0,0 +1,2082 @@ +{ + "id": "70fe653b-c481-4116-ae9c-68bc971b234c", + "object": "chat.completion", + "created": 1779687124, + "model": "deepseek-v4-flash", + "choices": [ + { + "index": 0, + "message": { + "role": "assistant", + "content": "Here is a detailed explanation of B-tree insertion, covering the standard algorithm, node splits, and the special case of splitting" + }, + "logprobs": { + "content": [ + { + "token": "Here", + "logprob": 0.0, + "bytes": [ + 72, + 101, + 114, + 101 + ], + "top_logprobs": [ + { + "token": "Here", + "logprob": 0.0, + "bytes": [ + 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"system_fingerprint": "fp_8b330d02d0_prod0820_fp8_kvcache_20260402" +} \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_000.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_000.txt new file mode 100644 index 00000000..1f639cad --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_000.txt @@ -0,0 +1 @@ +A **B-tree** is a self-balancing search tree designed to store data in a way that minimizes disk I \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_001.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_001.txt new file mode 100644 index 00000000..e72be00f --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_001.txt @@ -0,0 +1,3 @@ +Here is a concise design for a TCP echo server optimized to handle slow clients without blocking other connections. + +### Architecture: Async \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_002.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_002.txt new file mode 100644 index 00000000..83cb614f --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_002.txt @@ -0,0 +1 @@ +On macOS, when developing applications that use machine learning models (via frameworks like PyTorch, llama.cpp, or Apple \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_003.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_003.txt new file mode 100644 index 00000000..bdc29ef3 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_003.txt @@ -0,0 +1 @@ +To understand why RMSNorm (Root Mean Square Normalization) requires both a **sum of squares pass** and a ** \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_004.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_004.txt new file mode 100644 index 00000000..67b540b5 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_004.txt @@ -0,0 +1 @@ +To understand why **KV cache checkpointing** is highly beneficial for agentic sessions, we first need to understand the mechanics \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_005.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_005.txt new file mode 100644 index 00000000..132ed906 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_005.txt @@ -0,0 +1,3 @@ +Here is the pseudocode for a binary min-heap push (insertion) operation. + +This operation adds the new \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_006.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_006.txt new file mode 100644 index 00000000..2874a59d --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_006.txt @@ -0,0 +1 @@ +To understand the tradeoffs between **top-p sampling** (also known as nucleus sampling) and **temperature zero decoding** \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_007.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_007.txt new file mode 100644 index 00000000..fb75d6f4 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_007.txt @@ -0,0 +1 @@ +Speculative decoding preserves exact greedy output through a clever combination of **probabilistic rejection sampling** and **mathematical \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_008.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_008.txt new file mode 100644 index 00000000..598ee86f --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_008.txt @@ -0,0 +1 @@ +To understand why a GPU prefill path is often significantly faster than single-token decode, we have to look at how Large \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_009.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_009.txt new file mode 100644 index 00000000..e2979db4 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_009.txt @@ -0,0 +1,3 @@ +Here are three invariants for a tokenizer special-token table, focusing on consistency, safety, and bidirectional mapping: + +** \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_010.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_010.txt new file mode 100644 index 00000000..bcff9391 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_010.txt @@ -0,0 +1 @@ +L'inserimento in un B-tree è un processo affascinante perché, a differenza degli alberi \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_011.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_011.txt new file mode 100644 index 00000000..88ae5f4d --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_011.txt @@ -0,0 +1 @@ +Ecco un progetto conciso per un server TCP echo progettato specificamente per gestire client lenti o con \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_012.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_012.txt new file mode 100644 index 00000000..68d3cc91 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_012.txt @@ -0,0 +1 @@ +Il confronto tra l'uso di `mmap` (Memory-Mapped Files) e la copia completa ( \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_013.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_013.txt new file mode 100644 index 00000000..97678f18 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_013.txt @@ -0,0 +1 @@ +La formula di **RMSNorm** (Root Mean Square Normalization) si basa su due passaggi fondamentali \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_014.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_014.txt new file mode 100644 index 00000000..60caa1aa --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_014.txt @@ -0,0 +1 @@ +Le sessioni agentiche—dove un modello linguistico (LLM) agisce in modo autonomo, \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_015.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_015.txt new file mode 100644 index 00000000..dc87e8b1 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_015.txt @@ -0,0 +1 @@ +Ecco lo pseudocodice per l'inserimento di un elemento in un Max-Heap (heap binario \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_016.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_016.txt new file mode 100644 index 00000000..b595d6b2 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_016.txt @@ -0,0 +1 @@ +Per comprendere i pro e i contro di **top-p** (noto anche come *nucleus sampling*) \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_017.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_017.txt new file mode 100644 index 00000000..68c9cbba --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_017.txt @@ -0,0 +1 @@ +La decodifica speculativa (speculative decoding) può mantenere un output esattamente identico a quello \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_018.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_018.txt new file mode 100644 index 00000000..0897976c --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_018.txt @@ -0,0 +1 @@ +Per capire perché il **prefill** (l'elaborazione iniziale del prompt) su GPU può essere \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_019.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_019.txt new file mode 100644 index 00000000..240bfa60 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_019.txt @@ -0,0 +1 @@ +Ecco tre invarianti per una tabella (o struttura dati) che gestisce "token speciali" (ad \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_020.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_020.txt new file mode 100644 index 00000000..4d9cd1ac --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_020.txt @@ -0,0 +1 @@ +Binary search finds the insertion point in a sorted array by repeatedly dividing the search interval in half. The goal is to find \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_021.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_021.txt new file mode 100644 index 00000000..ff1e4db1 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_021.txt @@ -0,0 +1,4 @@ +Here is a short and efficient C function to clamp an integer to a specified range: + +```c +int clamp_int(int \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_022.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_022.txt new file mode 100644 index 00000000..91efb31e --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_022.txt @@ -0,0 +1 @@ +At the most fundamental level, both a **mutex** and an **atomic counter** are mechanisms used in concurrent programming to \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_023.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_023.txt new file mode 100644 index 00000000..597aff41 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_023.txt @@ -0,0 +1 @@ +In a network server, **backpressure** is the mechanism of resisting the flow of incoming data when the server is overwhelmed \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_024.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_024.txt new file mode 100644 index 00000000..98c34738 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_024.txt @@ -0,0 +1 @@ +A safe format for storing a model checkpoint header prioritizes **human-readability**, **forward/backward compatibility**, **ext \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_025.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_025.txt new file mode 100644 index 00000000..5f75a56f --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_025.txt @@ -0,0 +1 @@ +A ring buffer (also known as a circular buffer) is a fixed-size data structure that operates on the First-In- \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_026.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_026.txt new file mode 100644 index 00000000..597253e6 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_026.txt @@ -0,0 +1,4 @@ +Here is a brief, structured plan for testing long-context prompt chunking strategies. + +### **Objective** +To evaluate and select \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_027.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_027.txt new file mode 100644 index 00000000..91c982a4 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_027.txt @@ -0,0 +1 @@ +In low-bit quantization (such as 2-bit, 3-bit, or 4-bit inference for Large Language \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_028.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_028.txt new file mode 100644 index 00000000..c263ea31 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_028.txt @@ -0,0 +1 @@ +To understand why grouped Mixture of Experts (MoE) expert execution improves the **prefill phase** (the initial \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_029.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_029.txt new file mode 100644 index 00000000..a5829936 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_029.txt @@ -0,0 +1 @@ +Comparing two model quantizations without relying on a single "absolute truth" or a single metric (e.g., just \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_030.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_030.txt new file mode 100644 index 00000000..13601b56 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_030.txt @@ -0,0 +1 @@ +La **ricerca binaria del punto di inserimento** (in inglese *binary search for insertion point*) \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_031.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_031.txt new file mode 100644 index 00000000..7f94dc61 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_031.txt @@ -0,0 +1 @@ +Ecco una breve funzione in C che limita (o "clampa") un intero all'interno di \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_032.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_032.txt new file mode 100644 index 00000000..cab04dd6 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_032.txt @@ -0,0 +1 @@ +La differenza fondamentale tra un **mutex** (Mutual Exclusion) e un **contatore atomico** ( \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_033.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_033.txt new file mode 100644 index 00000000..cea34de9 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_033.txt @@ -0,0 +1 @@ +In un server di rete o in un sistema distribuito, il **backpressure** (letteralmente "contropress \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_034.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_034.txt new file mode 100644 index 00000000..fafa1411 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_034.txt @@ -0,0 +1 @@ +Salvare l'header di un checkpoint modello in modo sicuro è un passaggio critico per evitare vulner \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_035.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_035.txt new file mode 100644 index 00000000..e635bbd3 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_035.txt @@ -0,0 +1 @@ +Un **ring buffer** (noto anche come *circular buffer* o buffer circolare) è una struttura dati \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_036.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_036.txt new file mode 100644 index 00000000..7566298a --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_036.txt @@ -0,0 +1 @@ +Ecco un piano breve, strutturato in 5 fasi, per testare l'efficacia \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_037.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_037.txt new file mode 100644 index 00000000..accd0033 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_037.txt @@ -0,0 +1 @@ +Nella **quantizzazione low-bit** (ad esempio a 4-bit, 3-bit o anche 2-bit \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_038.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_038.txt new file mode 100644 index 00000000..8312be8e --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_038.txt @@ -0,0 +1 @@ +Per comprendere perché il raggruppamento degli esperti (in inglese *Expert Grouping* o * \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_039.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_039.txt new file mode 100644 index 00000000..43b866e3 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_039.txt @@ -0,0 +1 @@ +Confrontare due quantizzazioni (ad esempio, due versioni di un modello linguistico compresso con metodi \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_040.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_040.txt new file mode 100644 index 00000000..d25f1d18 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_040.txt @@ -0,0 +1 @@ +Here are the first five measurements to take to diagnose why text generation slows down at long context lengths. These are ordered to \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_041.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_041.txt new file mode 100644 index 00000000..a1fb65be --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_041.txt @@ -0,0 +1 @@ +To understand why small differences in logits can completely change a greedy continuation, we have to look at the intersection of mathematics, \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_042.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_042.txt new file mode 100644 index 00000000..b96ddc6d --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_042.txt @@ -0,0 +1 @@ +To understand **Online Softmax** (often called FlashAttention's core trick), we first need to understand the problem it \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_043.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_043.txt new file mode 100644 index 00000000..9a356cd2 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_043.txt @@ -0,0 +1,5 @@ +Here is a minimal JSON schema for a tool call: + +```json +{ + "$schema": "http://json-schema \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_044.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_044.txt new file mode 100644 index 00000000..4767fc9b --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_044.txt @@ -0,0 +1,2 @@ +To test that a file-backed `mmap` is not repeatedly remapped, you need to verify two things: +1 \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_045.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_045.txt new file mode 100644 index 00000000..707e926f --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_045.txt @@ -0,0 +1 @@ +In modern graphics APIs (Vulkan, DirectX 12, Metal) and compute APIs (CUDA, OpenCL), allocating \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_046.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_046.txt new file mode 100644 index 00000000..c92d208e --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_046.txt @@ -0,0 +1 @@ +In a Mixture-of-Experts (MoE) layer, the **router** (also known as a gating network \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_047.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_047.txt new file mode 100644 index 00000000..a8138e7e --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_047.txt @@ -0,0 +1 @@ +In the context of databases, storage engines, and distributed Key-Value (KV) stores (like RocksDB, Level \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_048.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_048.txt new file mode 100644 index 00000000..0085a52f --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_048.txt @@ -0,0 +1,3 @@ +Here is a comprehensive checklist for validating that a quantized model still follows instructions effectively. + +Quantization (especially lower-bit \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_049.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_049.txt new file mode 100644 index 00000000..9cf3d226 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_049.txt @@ -0,0 +1 @@ +Evaluating 50 prompts instead of relying on a single "favorite" prompt is fundamentally a shift from **anecd \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_050.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_050.txt new file mode 100644 index 00000000..7f3964f0 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_050.txt @@ -0,0 +1 @@ +Quando un utente segnala un rallentamento nella fase di *decoding* (generazione del testo) in \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_051.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_051.txt new file mode 100644 index 00000000..73ccb869 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_051.txt @@ -0,0 +1 @@ +Il motivo per cui piccolissime differenze nei logit possono cambiare drasticamente la continuazione in una gener \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_052.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_052.txt new file mode 100644 index 00000000..59e8aa39 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_052.txt @@ -0,0 +1 @@ +Per capire l'**online softmax** (usata nell'attenzione dei modelli come i Transformer), dobb \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_053.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_053.txt new file mode 100644 index 00000000..dab7b462 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_053.txt @@ -0,0 +1,2 @@ +Ecco uno schema JSON minimo per una tool call, strutturato secondo lo standard **JSON Schema**: + diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_054.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_054.txt new file mode 100644 index 00000000..53ac3a27 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_054.txt @@ -0,0 +1 @@ +Testare che un'area di memoria mappata tramite `mmap` su file non venga rimappata \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_055.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_055.txt new file mode 100644 index 00000000..3fd15969 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_055.txt @@ -0,0 +1 @@ +In Metal (così come in altre API grafiche moderne come Vulkan o DirectX 12), la gestione della memoria e \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_056.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_056.txt new file mode 100644 index 00000000..82bfae7f --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_056.txt @@ -0,0 +1 @@ +In un'architettura **Mixture-of-Experts (MoE)**, il **router** (not \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_057.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_057.txt new file mode 100644 index 00000000..20063759 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_057.txt @@ -0,0 +1 @@ +La differenza principale tra **righe KV (Key-Value) raw** (grezze) e **rig \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_058.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_058.txt new file mode 100644 index 00000000..f731b8d8 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_058.txt @@ -0,0 +1 @@ +Ecco una checklist strutturata per validare che un modello di linguaggio (LLM) quantizzato mant \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_059.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_059.txt new file mode 100644 index 00000000..1f2c1eca --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_059.txt @@ -0,0 +1 @@ +Valutare 50 prompt diversi invece di affidarsi ciecamente a un singolo prompt "preferito" è un \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_060.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_060.txt new file mode 100644 index 00000000..00c045b6 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_060.txt @@ -0,0 +1,4 @@ +Here is a tiny Python function that returns the median of three numbers: + +```python +def median_of_three(a, b \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_061.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_061.txt new file mode 100644 index 00000000..f0eeed95 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_061.txt @@ -0,0 +1 @@ +To understand why sorted arrays make membership tests (checking if a specific item exists in a collection) faster, we have to \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_062.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_062.txt new file mode 100644 index 00000000..3a5748b3 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_062.txt @@ -0,0 +1 @@ +**Eventual consistency** is a consistency model used in distributed databases where, if no new updates are made to a given \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_063.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_063.txt new file mode 100644 index 00000000..02a01dc0 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_063.txt @@ -0,0 +1,3 @@ +Here is a short example of a race condition in C using POSIX threads (pthreads). + +In this example, two \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_064.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_064.txt new file mode 100644 index 00000000..eeda9f12 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_064.txt @@ -0,0 +1,3 @@ +The easiest way to understand the difference between latency and throughput is to use a real-world analogy. + +Imagine you are driving \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_065.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_065.txt new file mode 100644 index 00000000..612ea8c9 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_065.txt @@ -0,0 +1 @@ +A **trie** (pronounced "try", derived from the word "re**trie**val") is a tree \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_066.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_066.txt new file mode 100644 index 00000000..93398fba --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_066.txt @@ -0,0 +1 @@ +Testing a command-line interface (CLI) parser requires a shift in mindset from traditional unit testing. Instead of just testing business \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_067.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_067.txt new file mode 100644 index 00000000..54395ee7 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_067.txt @@ -0,0 +1 @@ +The difference between **virtual address space size** (the total memory you have mapped) and **page residency** (the \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_068.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_068.txt new file mode 100644 index 00000000..29651bf3 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_068.txt @@ -0,0 +1 @@ +To understand why quantization error affects rare experts more than common experts, we need to look at the intersection of **M \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_069.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_069.txt new file mode 100644 index 00000000..90607bd3 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_069.txt @@ -0,0 +1 @@ +Here is a short, focused checklist for reviewing a pull request that deals with memory lifetimes (applicable to C, \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_070.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_070.txt new file mode 100644 index 00000000..6f5c0c84 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_070.txt @@ -0,0 +1 @@ +Ecco una piccola funzione in Python che calcola la mediana di tre numeri. Il modo più semplice \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_071.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_071.txt new file mode 100644 index 00000000..ca1e3b57 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_071.txt @@ -0,0 +1 @@ +Un array ordinato rende molto più veloce la ricerca di appartenenza (verificare se un elemento è \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_072.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_072.txt new file mode 100644 index 00000000..66afa59e --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_072.txt @@ -0,0 +1 @@ +La **consistenza eventuale** (in inglese *eventual consistency*) è un modello di consistenza util \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_073.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_073.txt new file mode 100644 index 00000000..91f92c30 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_073.txt @@ -0,0 +1 @@ +Ecco un breve e classico esempio di **race condition** (condizione di gara) in C, utilizz \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_074.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_074.txt new file mode 100644 index 00000000..04db6c90 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_074.txt @@ -0,0 +1 @@ +Per spiegare la differenza tra **latenza** e **throughput**, è utile usare una metafora \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_075.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_075.txt new file mode 100644 index 00000000..76b7b18e --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_075.txt @@ -0,0 +1 @@ +Un **trie** (pronunciato "try"), noto anche come albero di prefissi (prefix tree \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_076.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_076.txt new file mode 100644 index 00000000..72966dff --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_076.txt @@ -0,0 +1 @@ +Testare un parser da riga di comando (CLI) in modo rigoroso è fondamentale, poiché questo componente è \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_077.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_077.txt new file mode 100644 index 00000000..68cd121d --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_077.txt @@ -0,0 +1 @@ +La differenza tra la dimensione della memoria virtuale e la memoria residenza (RSS - *Resident Set \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_078.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_078.txt new file mode 100644 index 00000000..9ba424ba --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_078.txt @@ -0,0 +1 @@ +L'errore di quantizzazione è quel fenomeno che si verifica quando si riduce la precisione dei numer \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_079.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_079.txt new file mode 100644 index 00000000..9a8954ac --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_079.txt @@ -0,0 +1 @@ +Ecco una breve e pratica checklist per revisionare il lifetime della memoria (gestione della memoria) in una Pull Request \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_080.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_080.txt new file mode 100644 index 00000000..d7354f1c --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_080.txt @@ -0,0 +1 @@ +A good benchmark should measure **performance in a way that accurately reflects real-world workloads, is consistently reproducible across different \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_081.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_081.txt new file mode 100644 index 00000000..12cdaf75 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_081.txt @@ -0,0 +1,3 @@ +Here are a few ways to complete that comment depending on what the lock is actually protecting. + +**The most common and \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_082.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_082.txt new file mode 100644 index 00000000..88c25c52 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_082.txt @@ -0,0 +1,3 @@ +Here is the most natural way to complete the sentence: + +"Il vantaggio principale della cache è **migliorare \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_083.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_083.txt new file mode 100644 index 00000000..fc6c3a41 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_083.txt @@ -0,0 +1,3 @@ +Here are a few ways to translate this into Italian, depending on how formal you want to be: + +**Standard / Natural \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_084.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_084.txt new file mode 100644 index 00000000..d973a511 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_084.txt @@ -0,0 +1 @@ +"Quantization reduces memory but can alter the logits." \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_085.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_085.txt new file mode 100644 index 00000000..3f41c74b --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_085.txt @@ -0,0 +1 @@ +A compiler uses an abstract syntax tree (AST) as a structured, hierarchical representation of the source code's logic, stripped \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_086.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_086.txt new file mode 100644 index 00000000..78ba0193 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_086.txt @@ -0,0 +1 @@ +Checksums catch accidental corruption by generating a concise mathematical summary—such as a sum or hash—of a dataset's binary \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_087.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_087.txt new file mode 100644 index 00000000..fd5c4689 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_087.txt @@ -0,0 +1,4 @@ +Here are three examples of highly useful server metrics, along with why they matter: + +**1. CPU Utilization** +* \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_088.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_088.txt new file mode 100644 index 00000000..ff0121de --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_088.txt @@ -0,0 +1 @@ +A tokenizer must treat special tags (like `<|endoftext|>`, ``, ` \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_089.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_089.txt new file mode 100644 index 00000000..dd9b1464 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_089.txt @@ -0,0 +1 @@ +A **hash table** (or hash map) is a data structure that maps keys to values using a mathematical function called \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_090.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_090.txt new file mode 100644 index 00000000..2be7f13b --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_090.txt @@ -0,0 +1 @@ +When quantizing a neural network—particularly during **Post-Training Quantization (PTQ)**—calibration data plays \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_091.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_091.txt new file mode 100644 index 00000000..e63cd9e0 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_091.txt @@ -0,0 +1 @@ +A **confidence interval** is basically a **margin of error** around an estimate. It gives you a range of values \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_092.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_092.txt new file mode 100644 index 00000000..2f254374 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_092.txt @@ -0,0 +1,3 @@ +Here is a simple SQL query to count the number of rows per category. + +Assuming your table is named `your \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_093.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_093.txt new file mode 100644 index 00000000..a4ef45a5 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_093.txt @@ -0,0 +1 @@ +A page cache makes a second file read significantly faster due to a concept called **temporal locality**—the idea that \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_094.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_094.txt new file mode 100644 index 00000000..e2b8f433 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_094.txt @@ -0,0 +1 @@ +Tokyo \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_095.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_095.txt new file mode 100644 index 00000000..6ca351ff --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_095.txt @@ -0,0 +1 @@ +The derivative of x squared is **2x**. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_096.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_096.txt new file mode 100644 index 00000000..029817f1 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_096.txt @@ -0,0 +1 @@ +Dante Alighieri. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_097.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_097.txt new file mode 100644 index 00000000..fa29f53a --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_097.txt @@ -0,0 +1 @@ +La capitale del Giappone è Tokyo. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_098.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_098.txt new file mode 100644 index 00000000..8c1b88c2 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_098.txt @@ -0,0 +1 @@ +17 per 23 fa 391. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_099.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_099.txt new file mode 100644 index 00000000..29d6e5ca --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_099.txt @@ -0,0 +1 @@ +La Divina Commedia è stata scritta da Dante Alighieri. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/manifest.tsv b/gguf-tools/quality-testing/data/glm52-openrouter-100/manifest.tsv new file mode 100644 index 00000000..d9830035 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/manifest.tsv @@ -0,0 +1,101 @@ +# id prompt_file continuation_file response_file +case_000 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_000.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_000.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_000.json +case_001 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_001.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_001.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_001.json +case_002 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_002.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_002.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_002.json +case_003 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_003.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_003.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_003.json +case_004 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_004.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_004.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_004.json +case_005 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_005.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_005.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_005.json +case_006 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_006.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_006.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_006.json +case_007 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_007.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_007.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_007.json +case_008 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_008.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_008.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_008.json +case_009 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_009.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_009.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_009.json +case_010 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_010.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_010.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_010.json +case_011 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_011.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_011.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_011.json +case_012 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_012.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_012.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_012.json +case_013 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_013.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_013.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_013.json +case_014 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_014.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_014.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_014.json +case_015 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_015.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_015.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_015.json +case_016 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_016.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_016.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_016.json +case_017 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_017.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_017.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_017.json +case_018 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_018.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_018.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_018.json +case_019 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_019.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_019.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_019.json +case_020 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_020.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_020.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_020.json +case_021 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_021.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_021.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_021.json +case_022 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_022.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_022.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_022.json +case_023 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_023.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_023.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_023.json +case_024 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_024.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_024.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_024.json +case_025 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_025.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_025.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_025.json +case_026 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_026.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_026.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_026.json +case_027 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_027.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_027.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_027.json +case_028 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_028.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_028.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_028.json +case_029 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_029.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_029.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_029.json +case_030 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_030.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_030.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_030.json +case_031 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_031.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_031.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_031.json +case_032 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_032.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_032.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_032.json +case_033 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_033.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_033.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_033.json +case_034 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_034.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_034.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_034.json +case_035 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_035.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_035.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_035.json +case_036 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_036.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_036.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_036.json +case_037 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_037.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_037.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_037.json +case_038 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_038.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_038.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_038.json +case_039 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_039.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_039.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_039.json +case_040 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_040.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_040.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_040.json +case_041 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_041.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_041.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_041.json +case_042 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_042.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_042.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_042.json +case_043 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_043.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_043.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_043.json +case_044 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_044.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_044.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_044.json +case_045 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_045.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_045.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_045.json +case_046 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_046.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_046.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_046.json +case_047 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_047.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_047.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_047.json +case_048 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_048.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_048.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_048.json +case_049 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_049.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_049.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_049.json +case_050 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_050.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_050.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_050.json +case_051 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_051.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_051.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_051.json +case_052 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_052.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_052.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_052.json +case_053 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_053.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_053.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_053.json +case_054 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_054.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_054.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_054.json +case_055 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_055.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_055.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_055.json +case_056 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_056.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_056.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_056.json +case_057 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_057.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_057.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_057.json +case_058 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_058.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_058.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_058.json +case_059 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_059.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_059.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_059.json +case_060 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_060.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_060.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_060.json +case_061 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_061.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_061.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_061.json +case_062 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_062.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_062.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_062.json +case_063 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_063.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_063.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_063.json +case_064 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_064.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_064.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_064.json +case_065 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_065.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_065.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_065.json +case_066 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_066.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_066.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_066.json +case_067 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_067.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_067.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_067.json +case_068 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_068.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_068.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_068.json +case_069 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_069.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_069.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_069.json +case_070 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_070.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_070.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_070.json +case_071 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_071.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_071.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_071.json +case_072 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_072.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_072.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_072.json +case_073 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_073.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_073.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_073.json +case_074 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_074.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_074.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_074.json +case_075 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_075.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_075.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_075.json +case_076 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_076.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_076.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_076.json +case_077 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_077.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_077.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_077.json +case_078 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_078.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_078.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_078.json +case_079 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_079.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_079.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_079.json +case_080 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_080.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_080.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_080.json +case_081 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_081.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_081.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_081.json +case_082 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_082.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_082.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_082.json +case_083 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_083.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_083.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_083.json +case_084 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_084.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_084.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_084.json +case_085 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_085.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_085.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_085.json +case_086 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_086.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_086.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_086.json +case_087 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_087.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_087.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_087.json +case_088 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_088.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_088.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_088.json +case_089 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_089.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_089.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_089.json +case_090 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_090.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_090.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_090.json +case_091 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_091.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_091.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_091.json +case_092 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_092.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_092.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_092.json +case_093 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_093.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_093.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_093.json +case_094 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_094.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_094.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_094.json +case_095 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_095.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_095.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_095.json +case_096 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_096.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_096.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_096.json +case_097 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_097.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_097.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_097.json +case_098 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_098.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_098.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_098.json +case_099 gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_099.txt gguf-tools/quality-testing/data/glm52-openrouter-100/continuations/case_099.txt gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_099.json diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_000.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_000.txt new file mode 100644 index 00000000..7526d8a0 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_000.txt @@ -0,0 +1 @@ +Explain B-tree insertion, including splits and the root special case. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_001.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_001.txt new file mode 100644 index 00000000..65920ce3 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_001.txt @@ -0,0 +1 @@ +Write a concise design for a TCP echo server that handles slow clients. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_002.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_002.txt new file mode 100644 index 00000000..bcbaaa26 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_002.txt @@ -0,0 +1 @@ +Compare mmaped model weights with copying all weights into private buffers on macOS. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_003.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_003.txt new file mode 100644 index 00000000..42bcd965 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_003.txt @@ -0,0 +1 @@ +Derive why RMSNorm needs a sum of squares and a scaling pass. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_004.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_004.txt new file mode 100644 index 00000000..a96d8139 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_004.txt @@ -0,0 +1 @@ +Explain why KV cache checkpointing helps agentic sessions. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_005.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_005.txt new file mode 100644 index 00000000..a8f9b3ea --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_005.txt @@ -0,0 +1 @@ +Give pseudocode for a binary heap push operation. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_006.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_006.txt new file mode 100644 index 00000000..86fe5a90 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_006.txt @@ -0,0 +1 @@ +What are the tradeoffs between top-p sampling and temperature zero decoding? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_007.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_007.txt new file mode 100644 index 00000000..ec32e838 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_007.txt @@ -0,0 +1 @@ +Summarize how speculative decoding preserves exact greedy output. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_008.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_008.txt new file mode 100644 index 00000000..164b9b05 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_008.txt @@ -0,0 +1 @@ +Explain why a GPU prefill path can be faster than single-token decode. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_009.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_009.txt new file mode 100644 index 00000000..5a805842 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_009.txt @@ -0,0 +1 @@ +Write three invariants for a tokenizer special-token table. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_010.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_010.txt new file mode 100644 index 00000000..8510e270 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_010.txt @@ -0,0 +1 @@ +Spiega come funziona l'inserimento in un B-tree, inclusi split e radice. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_011.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_011.txt new file mode 100644 index 00000000..c9e6b9c6 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_011.txt @@ -0,0 +1 @@ +Scrivi un progetto conciso per un server TCP echo con client lenti. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_012.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_012.txt new file mode 100644 index 00000000..4525b6f0 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_012.txt @@ -0,0 +1 @@ +Confronta mmap dei pesi e copia completa dei pesi su macOS. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_013.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_013.txt new file mode 100644 index 00000000..1cd6b887 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_013.txt @@ -0,0 +1 @@ +Deriva perche RMSNorm richiede somma dei quadrati e riscalamento. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_014.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_014.txt new file mode 100644 index 00000000..91517a1b --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_014.txt @@ -0,0 +1 @@ +Spiega perche la cache KV su disco aiuta nelle sessioni agentiche. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_015.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_015.txt new file mode 100644 index 00000000..e9e1c5b3 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_015.txt @@ -0,0 +1 @@ +Scrivi pseudocodice per inserire un elemento in un heap binario. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_016.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_016.txt new file mode 100644 index 00000000..14cee2bb --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_016.txt @@ -0,0 +1 @@ +Quali sono i pro e contro di top-p rispetto a temperatura zero? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_017.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_017.txt new file mode 100644 index 00000000..044719fa --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_017.txt @@ -0,0 +1 @@ +Riassumi perche la decodifica speculativa puo mantenere l'output esatto. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_018.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_018.txt new file mode 100644 index 00000000..559ac51f --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_018.txt @@ -0,0 +1 @@ +Spiega perche il prefill GPU puo essere piu veloce del decode token singolo. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_019.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_019.txt new file mode 100644 index 00000000..512a141b --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_019.txt @@ -0,0 +1 @@ +Scrivi tre invarianti per una tabella di token speciali. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_020.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_020.txt new file mode 100644 index 00000000..80f7e852 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_020.txt @@ -0,0 +1 @@ +Given a sorted array, describe how binary search finds the insertion point. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_021.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_021.txt new file mode 100644 index 00000000..f19c92e0 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_021.txt @@ -0,0 +1 @@ +Write a short C function that clamps an integer to a range. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_022.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_022.txt new file mode 100644 index 00000000..f370b6c0 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_022.txt @@ -0,0 +1 @@ +Explain the difference between a mutex and an atomic counter. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_023.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_023.txt new file mode 100644 index 00000000..7619c8f4 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_023.txt @@ -0,0 +1 @@ +What does backpressure mean in a network server? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_024.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_024.txt new file mode 100644 index 00000000..9eb78568 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_024.txt @@ -0,0 +1 @@ +Describe a safe format for storing a model checkpoint header. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_025.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_025.txt new file mode 100644 index 00000000..6fc2ef4d --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_025.txt @@ -0,0 +1 @@ +Explain how a ring buffer wraps and how to avoid overwriting unread data. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_026.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_026.txt new file mode 100644 index 00000000..4b77de18 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_026.txt @@ -0,0 +1 @@ +Write a brief plan for testing long-context prompt chunking. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_027.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_027.txt new file mode 100644 index 00000000..fe16504b --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_027.txt @@ -0,0 +1 @@ +What is an importance matrix in low-bit quantization? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_028.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_028.txt new file mode 100644 index 00000000..6a256f6f --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_028.txt @@ -0,0 +1 @@ +Explain why grouped MoE expert execution can improve prefill. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_029.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_029.txt new file mode 100644 index 00000000..dd5b4701 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_029.txt @@ -0,0 +1 @@ +Describe how to compare two model quantizations without relying on one answer. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_030.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_030.txt new file mode 100644 index 00000000..cf75cdb5 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_030.txt @@ -0,0 +1 @@ +Data una lista ordinata, descrivi la ricerca binaria del punto di inserimento. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_031.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_031.txt new file mode 100644 index 00000000..eaa1001f --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_031.txt @@ -0,0 +1 @@ +Scrivi una breve funzione C che limita un intero a un intervallo. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_032.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_032.txt new file mode 100644 index 00000000..7a48fb71 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_032.txt @@ -0,0 +1 @@ +Spiega la differenza tra mutex e contatore atomico. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_033.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_033.txt new file mode 100644 index 00000000..d1b8eb72 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_033.txt @@ -0,0 +1 @@ +Che cosa significa backpressure in un server di rete? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_034.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_034.txt new file mode 100644 index 00000000..2726bcc0 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_034.txt @@ -0,0 +1 @@ +Descrivi un formato sicuro per salvare l'header di un checkpoint modello. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_035.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_035.txt new file mode 100644 index 00000000..c5eef1c0 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_035.txt @@ -0,0 +1 @@ +Spiega come funziona un ring buffer e come evitare sovrascritture. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_036.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_036.txt new file mode 100644 index 00000000..782faa0b --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_036.txt @@ -0,0 +1 @@ +Scrivi un piano breve per testare il chunking di prompt lunghi. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_037.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_037.txt new file mode 100644 index 00000000..be05c185 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_037.txt @@ -0,0 +1 @@ +Che cos'e una matrice di importanza nella quantizzazione low-bit? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_038.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_038.txt new file mode 100644 index 00000000..4865cad3 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_038.txt @@ -0,0 +1 @@ +Spiega perche raggruppare gli esperti MoE puo accelerare il prefill. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_039.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_039.txt new file mode 100644 index 00000000..0a1df1b5 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_039.txt @@ -0,0 +1 @@ +Descrivi come confrontare due quantizzazioni senza fidarsi di una sola risposta. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_040.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_040.txt new file mode 100644 index 00000000..4373f361 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_040.txt @@ -0,0 +1 @@ +A user reports generation slows at long context. List the first five measurements to take. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_041.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_041.txt new file mode 100644 index 00000000..d81966bc --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_041.txt @@ -0,0 +1 @@ +Why can small logit differences change a greedy continuation? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_042.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_042.txt new file mode 100644 index 00000000..97c996e2 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_042.txt @@ -0,0 +1 @@ +Explain online softmax in attention using simple variables. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_043.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_043.txt new file mode 100644 index 00000000..42e865cd --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_043.txt @@ -0,0 +1 @@ +Give a minimal JSON schema for a tool call with name and arguments. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_044.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_044.txt new file mode 100644 index 00000000..c0a701c6 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_044.txt @@ -0,0 +1 @@ +How would you test that a file-backed mmap is not repeatedly remapped? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_045.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_045.txt new file mode 100644 index 00000000..d666613f --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_045.txt @@ -0,0 +1 @@ +Explain why one large Metal buffer can be worse than multiple overlapping views. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_046.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_046.txt new file mode 100644 index 00000000..bbd9ddbe --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_046.txt @@ -0,0 +1 @@ +What is the role of a router in a mixture-of-experts layer? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_047.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_047.txt new file mode 100644 index 00000000..6b95b96f --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_047.txt @@ -0,0 +1 @@ +Describe the difference between raw KV rows and compressed KV rows. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_048.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_048.txt new file mode 100644 index 00000000..18d0166a --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_048.txt @@ -0,0 +1 @@ +Write a checklist for validating that a quantized model still follows instructions. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_049.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_049.txt new file mode 100644 index 00000000..9fd69a07 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_049.txt @@ -0,0 +1 @@ +Explain why evaluating 50 prompts is more informative than one favorite prompt. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_050.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_050.txt new file mode 100644 index 00000000..25a1014a --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_050.txt @@ -0,0 +1 @@ +Un utente segnala decode lento a contesto lungo. Elenca cinque misure iniziali. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_051.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_051.txt new file mode 100644 index 00000000..5d3f770c --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_051.txt @@ -0,0 +1 @@ +Perche piccole differenze nei logit possono cambiare una continuazione greedy? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_052.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_052.txt new file mode 100644 index 00000000..0f5aeca8 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_052.txt @@ -0,0 +1 @@ +Spiega online softmax nell'attenzione con variabili semplici. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_053.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_053.txt new file mode 100644 index 00000000..ddc5cf21 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_053.txt @@ -0,0 +1 @@ +Dai uno schema JSON minimo per una tool call con nome e argomenti. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_054.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_054.txt new file mode 100644 index 00000000..9a16287a --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_054.txt @@ -0,0 +1 @@ +Come testeresti che un mmap su file non venga rimappato ripetutamente? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_055.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_055.txt new file mode 100644 index 00000000..4a50bb35 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_055.txt @@ -0,0 +1 @@ +Spiega perche un grande buffer Metal puo essere peggiore di viste sovrapposte. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_056.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_056.txt new file mode 100644 index 00000000..8e6fc52b --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_056.txt @@ -0,0 +1 @@ +Qual e il ruolo del router in un layer mixture-of-experts? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_057.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_057.txt new file mode 100644 index 00000000..9a45410a --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_057.txt @@ -0,0 +1 @@ +Descrivi la differenza tra righe KV raw e righe KV compresse. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_058.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_058.txt new file mode 100644 index 00000000..b8abe7f2 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_058.txt @@ -0,0 +1 @@ +Scrivi una checklist per validare che un modello quantizzato segua ancora le istruzioni. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_059.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_059.txt new file mode 100644 index 00000000..ea977c12 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_059.txt @@ -0,0 +1 @@ +Perche valutare 50 prompt e piu utile di un singolo prompt preferito? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_060.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_060.txt new file mode 100644 index 00000000..c21dbbcd --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_060.txt @@ -0,0 +1 @@ +Write a tiny Python function that returns the median of three numbers. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_061.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_061.txt new file mode 100644 index 00000000..9ae462a0 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_061.txt @@ -0,0 +1 @@ +Explain why sorted arrays make membership tests faster with binary search. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_062.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_062.txt new file mode 100644 index 00000000..fbcfbffe --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_062.txt @@ -0,0 +1 @@ +What does eventual consistency mean in a distributed database? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_063.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_063.txt new file mode 100644 index 00000000..0a0502d3 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_063.txt @@ -0,0 +1 @@ +Give a short example of a race condition in C. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_064.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_064.txt new file mode 100644 index 00000000..6025a79d --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_064.txt @@ -0,0 +1 @@ +Explain the difference between latency and throughput. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_065.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_065.txt new file mode 100644 index 00000000..8105b8d3 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_065.txt @@ -0,0 +1 @@ +How does a trie represent a set of strings? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_066.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_066.txt new file mode 100644 index 00000000..25988531 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_066.txt @@ -0,0 +1 @@ +Describe how to test a command-line parser with edge cases. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_067.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_067.txt new file mode 100644 index 00000000..d0a700a0 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_067.txt @@ -0,0 +1 @@ +Why can mmap page residency differ from virtual address space size? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_068.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_068.txt new file mode 100644 index 00000000..6e5cc7d7 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_068.txt @@ -0,0 +1 @@ +Explain why quantization error can affect rare experts more than common experts. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_069.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_069.txt new file mode 100644 index 00000000..a29e29fc --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_069.txt @@ -0,0 +1 @@ +Write a short checklist for reviewing a pull request that touches memory lifetimes. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_070.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_070.txt new file mode 100644 index 00000000..1a691981 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_070.txt @@ -0,0 +1 @@ +Scrivi una piccola funzione Python che restituisce la mediana di tre numeri. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_071.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_071.txt new file mode 100644 index 00000000..c331eff0 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_071.txt @@ -0,0 +1 @@ +Spiega perche array ordinati rendono piu veloce la ricerca di appartenenza. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_072.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_072.txt new file mode 100644 index 00000000..a3eb8d67 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_072.txt @@ -0,0 +1 @@ +Che cosa significa consistenza eventuale in un database distribuito? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_073.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_073.txt new file mode 100644 index 00000000..ca5fa09a --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_073.txt @@ -0,0 +1 @@ +Fai un breve esempio di race condition in C. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_074.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_074.txt new file mode 100644 index 00000000..a63df710 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_074.txt @@ -0,0 +1 @@ +Spiega la differenza tra latenza e throughput. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_075.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_075.txt new file mode 100644 index 00000000..abfa5f00 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_075.txt @@ -0,0 +1 @@ +Come rappresenta un trie un insieme di stringhe? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_076.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_076.txt new file mode 100644 index 00000000..314ccd6c --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_076.txt @@ -0,0 +1 @@ +Descrivi come testare un parser da riga di comando con casi limite. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_077.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_077.txt new file mode 100644 index 00000000..7ab7bdbc --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_077.txt @@ -0,0 +1 @@ +Perche la residenza delle pagine mmap puo differire dalla dimensione virtuale? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_078.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_078.txt new file mode 100644 index 00000000..c2d0f41c --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_078.txt @@ -0,0 +1 @@ +Spiega perche l'errore di quantizzazione puo colpire piu gli esperti rari. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_079.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_079.txt new file mode 100644 index 00000000..7fd0d07a --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_079.txt @@ -0,0 +1 @@ +Scrivi una breve checklist per revisionare lifetime di memoria in una PR. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_080.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_080.txt new file mode 100644 index 00000000..edfa9951 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_080.txt @@ -0,0 +1 @@ +Complete this sentence: A good benchmark should measure \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_081.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_081.txt new file mode 100644 index 00000000..421acd9a --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_081.txt @@ -0,0 +1 @@ +Complete this C comment: /* This lock protects \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_082.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_082.txt new file mode 100644 index 00000000..70182d1f --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_082.txt @@ -0,0 +1 @@ +Complete this Italian sentence: Il vantaggio principale della cache e \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_083.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_083.txt new file mode 100644 index 00000000..8c2e4336 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_083.txt @@ -0,0 +1 @@ +Translate to Italian: The model should answer only after reading the whole prompt. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_084.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_084.txt new file mode 100644 index 00000000..c4694b09 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_084.txt @@ -0,0 +1 @@ +Translate to English: La quantizzazione riduce memoria ma puo alterare i logit. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_085.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_085.txt new file mode 100644 index 00000000..9af90194 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_085.txt @@ -0,0 +1 @@ +In one paragraph, explain how a compiler uses an abstract syntax tree. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_086.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_086.txt new file mode 100644 index 00000000..7127dabf --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_086.txt @@ -0,0 +1 @@ +In one paragraph, explain why checksums catch accidental corruption. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_087.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_087.txt new file mode 100644 index 00000000..f6976ef6 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_087.txt @@ -0,0 +1 @@ +Give three examples of useful server metrics. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_088.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_088.txt new file mode 100644 index 00000000..77c18b30 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_088.txt @@ -0,0 +1 @@ +Why should a tokenizer treat special tags carefully? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_089.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_089.txt new file mode 100644 index 00000000..cee35cf4 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_089.txt @@ -0,0 +1 @@ +Explain how a hash table handles collisions. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_090.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_090.txt new file mode 100644 index 00000000..87d651d2 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_090.txt @@ -0,0 +1 @@ +Describe the role of calibration data when quantizing a neural network. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_091.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_091.txt new file mode 100644 index 00000000..47ed4494 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_091.txt @@ -0,0 +1 @@ +What is a confidence interval, in plain language? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_092.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_092.txt new file mode 100644 index 00000000..27373eb3 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_092.txt @@ -0,0 +1 @@ +Write a simple SQL query that counts rows per category. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_093.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_093.txt new file mode 100644 index 00000000..6b664ad3 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_093.txt @@ -0,0 +1 @@ +Explain why a page cache can make a second file read faster. \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_094.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_094.txt new file mode 100644 index 00000000..1949e7bb --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_094.txt @@ -0,0 +1 @@ +Give a short answer: what is the capital of Japan? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_095.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_095.txt new file mode 100644 index 00000000..5b90deb7 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_095.txt @@ -0,0 +1 @@ +Give a short answer: what is the derivative of x squared? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_096.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_096.txt new file mode 100644 index 00000000..ba72dc46 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_096.txt @@ -0,0 +1 @@ +Give a short answer: who wrote The Divine Comedy? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_097.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_097.txt new file mode 100644 index 00000000..2d0af1eb --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_097.txt @@ -0,0 +1 @@ +Rispondi brevemente: qual e la capitale del Giappone? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_098.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_098.txt new file mode 100644 index 00000000..48775174 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_098.txt @@ -0,0 +1 @@ +Rispondi brevemente: quanto fa 17 per 23? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_099.txt b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_099.txt new file mode 100644 index 00000000..a3fdbcc8 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/prompts/case_099.txt @@ -0,0 +1 @@ +Rispondi brevemente: chi ha scritto la Divina Commedia? \ No newline at end of file diff --git a/gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_000.json b/gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_000.json new file mode 100644 index 00000000..5f87a985 --- /dev/null +++ b/gguf-tools/quality-testing/data/glm52-openrouter-100/responses/case_000.json @@ -0,0 +1,5806 @@ +{ + "id": "gen-1781981982-BjGyJJtyyNvBgW0CZtN4", + "object": "chat.completion", + "created": 1781981982, + "model": "z-ai/glm-5.2-20260616", + "provider": "Parasail", + "system_fingerprint": null, + "service_tier": null, + "choices": [ + { + "index": 0, + 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