Add bounded SSD streaming, exact short prefills, accelerated large prefills, and native session batching. Support resident tensor parallel inference across two DGX Sparks over RoCE, with aligned expert shards, split vocabulary projection, decode graphs, and shared-expert overlap. Include primitive, state, transport, and model regression tests, plus usage documentation and measured QA results.
149 lines
6.9 KiB
Plaintext
149 lines
6.9 KiB
Plaintext
#include "ds4_gpu.h"
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#include <cmath>
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#include <cstdio>
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#include <cstdlib>
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#include <cstring>
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#include <vector>
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#define CHECK(x) do { if (!(x)) { fprintf(stderr, "%s:%d: %s\n", __FILE__, __LINE__, #x); exit(1); } } while (0)
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static uint32_t state = 593;
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static uint32_t random_bits() {
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state = state * 1664525u + 1013904223u;
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return state;
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}
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static void check(uint32_t width, uint32_t hidden) {
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const size_t gu = (size_t)hidden * ((width + 31u) / 32u) * 34u;
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const size_t down = (size_t)width * ((hidden + 31u) / 32u) * 34u;
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std::vector<unsigned char> model(2u * gu + down);
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for (size_t b = 0; b < model.size(); b += 34u) {
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const uint16_t scale = 0x1800u + random_bits() % 1024u;
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memcpy(model.data() + b, &scale, 2);
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for (unsigned k = 2; k < 34; k++) model[b + k] = random_bits() >> 24;
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}
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CHECK(ds4_gpu_init());
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if (!ds4_gpu_device_is_spark()) {
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fprintf(stderr, "CUDA shared-expert overlap requires Spark\n");
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exit(77);
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}
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CHECK(ds4_gpu_set_model_map(model.data(), model.size()));
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ds4_gpu_tensor *x = ds4_gpu_tensor_alloc(width * 4u);
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ds4_gpu_tensor *other = ds4_gpu_tensor_alloc(hidden * 4u);
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ds4_gpu_tensor *out[2], *gate[2], *up[2], *mid[2], *side[2];
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CHECK(x && other);
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for (unsigned i = 0; i < 2; i++) {
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out[i] = ds4_gpu_tensor_alloc((width + 8u) * 4u);
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gate[i] = ds4_gpu_tensor_alloc(hidden * 4u);
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up[i] = ds4_gpu_tensor_alloc(hidden * 4u);
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mid[i] = ds4_gpu_tensor_alloc(hidden * 4u);
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side[i] = ds4_gpu_tensor_alloc((width + 8u) * 4u);
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CHECK(out[i] && gate[i] && up[i] && mid[i] && side[i]);
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}
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auto start = [&](uint64_t offset) {
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return ds4_gpu_dsv41_shared_start(out[1], gate[1], up[1], mid[1], x,
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model.data(), model.size(), 0, gu, offset, width, hidden, 10.0f);
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};
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auto serial = [&]() {
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CHECK(ds4_gpu_matmul_q8_0_tensor(gate[0], model.data(), model.size(),
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0, width, hidden, x, 1));
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CHECK(ds4_gpu_dsv41_quantize(gate[0], hidden, 1, DS4_V41_BF16));
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CHECK(ds4_gpu_matmul_q8_0_tensor(up[0], model.data(), model.size(),
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gu, width, hidden, x, 1));
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CHECK(ds4_gpu_dsv41_quantize(up[0], hidden, 1, DS4_V41_BF16));
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CHECK(ds4_gpu_swiglu_tensor(mid[0], gate[0], up[0], hidden, 10.0f, 1.0f));
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CHECK(ds4_gpu_dsv41_quantize(mid[0], hidden, 1, DS4_V41_BF16));
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CHECK(ds4_gpu_matmul_q8_0_tensor(out[0], model.data(), model.size(),
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2u * gu, hidden, width, mid[0], 1));
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CHECK(ds4_gpu_dsv41_quantize(out[0], width, 1, DS4_V41_BF16));
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};
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auto unrelated = [&](unsigned i) {
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CHECK(ds4_gpu_matmul_q8_0_tensor(side[i], model.data(), model.size(),
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2u * gu, hidden, width, other, 1));
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};
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std::vector<float> input(width), other_input(hidden);
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std::vector<float> expected(width + 8u), actual(width + 8u);
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ds4_decode_graph_key key = {};
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key.il = 0; key.island = 1; key.cur_hc = x;
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unsigned captures = 0, replays = 0;
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for (unsigned round = 0; round < 10; round++) {
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for (float &v : input) v = ((int32_t)(random_bits() >> 16) - 32768) / 8192.0f;
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for (float &v : other_input) v = ((int32_t)(random_bits() >> 16) - 32768) / 32768.0f;
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CHECK(ds4_gpu_tensor_write(x, 0, input.data(), width * 4u));
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CHECK(ds4_gpu_tensor_write(other, 0, other_input.data(), hidden * 4u));
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for (unsigned i = 0; i < 2; i++) {
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CHECK(ds4_gpu_tensor_fill_f32(out[i], NAN, width + 8u));
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CHECK(ds4_gpu_tensor_fill_f32(side[i], NAN, width + 8u));
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}
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serial(); unrelated(0);
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CHECK(ds4_gpu_add_tensor(out[0], out[0], side[0], width));
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CHECK(ds4_gpu_tensor_read(out[0], 0, expected.data(), expected.size() * 4u));
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if (round == 0) {
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CHECK(start(model.size()) == -1); /* Error after gate/up launch. */
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CHECK(ds4_gpu_dsv41_shared_join());
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}
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const int graph = round < 2 ? -1 : ds4_gpu_decode_graph_begin(&key);
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if (graph != 1) {
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CHECK(start(2u * gu) == 1);
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CHECK(start(2u * gu) == -1); /* No nested scratch owner. */
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unrelated(1);
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CHECK(ds4_gpu_dsv41_shared_join());
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CHECK(ds4_gpu_dsv41_shared_join());
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CHECK(ds4_gpu_add_tensor(out[1], out[1], side[1], width));
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if (graph == 0) { CHECK(ds4_gpu_decode_graph_end(&key) == 0); captures++; }
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} else replays++;
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CHECK(ds4_gpu_tensor_read(out[1], 0, actual.data(), actual.size() * 4u));
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CHECK(!memcmp(expected.data(), actual.data(), width * 4u));
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for (size_t i = width; i < actual.size(); i++) CHECK(std::isnan(actual[i]));
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CHECK(ds4_gpu_tensor_read(side[0], 0, expected.data(), expected.size() * 4u));
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CHECK(ds4_gpu_tensor_read(side[1], 0, actual.data(), actual.size() * 4u));
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CHECK(!memcmp(expected.data(), actual.data(), width * 4u));
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for (size_t i = width; i < actual.size(); i++) CHECK(std::isnan(actual[i]));
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}
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CHECK(captures == 1 && replays == 6);
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key.variant = 1;
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CHECK(ds4_gpu_decode_graph_begin(&key) == -1);
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CHECK(start(2u * gu) == 1 && ds4_gpu_dsv41_shared_join());
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CHECK(ds4_gpu_synchronize());
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CHECK(ds4_gpu_decode_graph_begin(&key) == 0);
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CHECK(start(model.size()) == -1);
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ds4_gpu_decode_graph_abort(&key);
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CHECK(start(2u * gu) == 1 && ds4_gpu_dsv41_shared_join());
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serial();
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CHECK(ds4_gpu_tensor_read(out[0], 0, expected.data(), width * 4u));
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CHECK(ds4_gpu_tensor_read(out[1], 0, actual.data(), width * 4u));
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CHECK(!memcmp(expected.data(), actual.data(), width * 4u));
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ds4_gpu_tensor *large_x = ds4_gpu_tensor_alloc(65536u * 4u);
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ds4_gpu_tensor *large_out = ds4_gpu_tensor_alloc(65536u * 4u);
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CHECK(large_x && large_out && ds4_gpu_tensor_fill_f32(large_out, NAN, 65536u));
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CHECK(ds4_gpu_dsv41_shared_start(large_out, gate[1], up[1], mid[1], large_x,
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model.data(), model.size(), 0, gu, 2u * gu, 65536u, 1u, 10.0f) == 0);
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CHECK(ds4_gpu_dsv41_shared_join());
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std::vector<float> untouched(65536u);
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CHECK(ds4_gpu_tensor_read(large_out, 0, untouched.data(), untouched.size() * 4u));
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for (float value : untouched) CHECK(std::isnan(value));
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ds4_gpu_tensor_free(large_out); ds4_gpu_tensor_free(large_x);
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CHECK(ds4_gpu_synchronize());
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ds4_gpu_decode_graphs_invalidate();
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for (unsigned i = 0; i < 2; i++) {
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ds4_gpu_tensor_free(out[i]); ds4_gpu_tensor_free(gate[i]);
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ds4_gpu_tensor_free(up[i]); ds4_gpu_tensor_free(mid[i]);
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ds4_gpu_tensor_free(side[i]);
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}
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ds4_gpu_tensor_free(other); ds4_gpu_tensor_free(x);
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ds4_gpu_cleanup();
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printf("CUDA shared expert %u x %u: serial, concurrent, capture, replay, recovery exact PASS\n",
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width, hidden);
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}
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int main() {
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for (unsigned repeat = 0; repeat < 2; repeat++) {
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check(33, 65);
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check(128, 64);
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check(1280, 257);
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check(5120, 2304);
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}
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return 0;
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}
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